2 -- Copyright (C) 2016-2017 secunet Security Networks AG
4 -- This program is free software; you can redistribute it and/or modify
5 -- it under the terms of the GNU General Public License as published by
6 -- the Free Software Foundation; either version 2 of the License, or
7 -- (at your option) any later version.
9 -- This program is distributed in the hope that it will be useful,
10 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
11 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 -- GNU General Public License for more details.
20 with HW.DbC.Intel_Quirk;
21 with HW.DbC.DMA_Buffers;
22 with HW.DbC.Transfer_Info;
23 with HW.DbC.Transfer_Rings;
24 with HW.DbC.Transfers;
31 Refined_State => (State => (Connected, Running,
32 DbC_Run_Deadline, DbC_Poll_Deadline,
33 DbC_Stat_Deadline, Events.State,
34 Transfer_Info.State, Transfer_Rings.State),
35 DMA => (ERST, DbC_Context, Desc_Strings, Events.DMA,
39 Apply_Intel_Quirk : constant Boolean := True;
40 Debug_xCap : constant Boolean := False;
44 DbC_Run_Deadline : Time.T;
45 DbC_Poll_Deadline : Time.T;
46 DbC_Stat_Deadline : Time.T;
48 ----------------------------------------------------------------------------
50 ERST : Events.ERST_Entry
52 Address => System'To_Address (DMA_Buffers.Event_Ring_Segment_Table_Base);
54 DbC_Context : Contexts.DbC_Context
56 Address => System'To_Address (DMA_Buffers.DbC_Context_Base);
58 ----------------------------------------------------------------------------
60 subtype Desc_Str_Range is Natural range 0 .. 14;
61 type Desc_Str is array (Desc_Str_Range) of Word16 with Pack;
62 type String_Descriptor is record
64 bDescriptor_Type : Byte;
68 type Desc_Strings_Type is (String0, Manufacturer, Product, Serial_Number);
69 type Desc_Strings_Array is
70 array (Desc_Strings_Type) of String_Descriptor with Pack;
71 Desc_Strings : Desc_Strings_Array
73 Address => System'To_Address (DMA_Buffers.Descriptor_Strings_Base);
75 procedure String_To_Desc (Dst : out String_Descriptor; Src : in String)
79 Dst.bLength := 2 + 2 * Byte'Min (Dst.wData'Length, Src'Length);
80 Dst.bDescriptor_Type := 16#03#;
81 for I in Desc_Str_Range loop
83 Dst.wData (I) := Character'Pos (Src (I + 1));
85 Dst.wData (I) := 16#0000#;
90 ----------------------------------------------------------------------------
92 procedure Find_Next_xCap (Cap_Id : in Word8; Success : out Boolean)
100 if xCap_Regs.Byte_Offset = 0 then
101 Cap_Regs.Read (Temp_Offset, XHCI_Extended_Caps);
103 xCap_Regs.Read (Temp_Offset, Next_xCap);
106 Temp_Offset := Shift_Left (Temp_Offset, 2);
107 pragma Debug (Debug_xCap, Debug.Put_Reg32
108 ("Find_Next_xCap Offset", Temp_Offset));
110 Temp_Offset = 0 or else
111 xCap_Regs.Byte_Offset > MMIO_Size - Natural (Temp_Offset) - 2;
113 xCap_Regs.Byte_Offset := xCap_Regs.Byte_Offset + Natural (Temp_Offset);
115 xCap_Regs.Read (Current_Id, Capability_ID);
116 Success := Current_Id = Cap_Id;
117 pragma Debug (Debug_xCap, Debug.Put_Reg8
118 ("Find_Next_xCap Cap_Id", Current_Id));
121 xCap_Regs.Read (Temp_Offset, Next_xCap);
125 ----------------------------------------------------------------------------
127 procedure BIOS_Handover (Success : out Boolean)
133 xCap_Regs.Byte_Offset := 0;
134 Find_Next_xCap (1, Success);
136 Legacy_Support_Regs.Byte_Offset := xCap_Regs.Byte_Offset;
137 -- See if the BIOS claims ownership
138 Legacy_Support_Regs.Read (BIOS_Owned, HC_BIOS_Owned_Semaphore);
139 if BIOS_Owned = 1 then
140 pragma Debug (Debug.Put_Line ("DbC: BIOS claims ownership."));
142 Legacy_Support_Regs.Write (HC_OS_Owned_Semaphore, Word8'(1));
144 Deadline := Time.MS_From_Now (5_000);
146 Legacy_Support_Regs.Read (BIOS_Owned, HC_BIOS_Owned_Semaphore);
147 exit when BIOS_Owned = 0;
149 Timeout : constant Boolean := Time.Timed_Out (Deadline);
151 Success := not Timeout;
153 exit when not Success;
154 pragma Warnings (GNATprove, Off, "statement has no effect");
155 for I in 0 .. 1234 loop
156 null; -- Busy loop to reduce pressure on HC BIOS Owned
157 -- Semaphore. It shouldn't generate an SMI but
158 -- might congest the xHC?
160 pragma Warnings (GNATprove, On, "statement has no effect");
163 pragma Debug (not Success, Debug.Put_Line
164 ("ERROR: BIOS didn't hand over xHC within 5s."));
165 pragma Debug (Success, Debug.Put_Line
166 ("DbC: BIOS hand-over succeeded."));
171 procedure Reset (Initial_Reset : Boolean := False);
181 Cap_Regs.Read (Cap_Length, Capability_Registers_Length);
182 Op_Regs.Byte_Offset := Natural (Cap_Length);
184 Op_Regs.Read (CNR, Controller_Not_Ready);
188 pragma Debug (Debug.Put_Line ("WARNING: xHCI not ready!"));
189 Deadline := Time.MS_From_Now (1_000);
192 Op_Regs.Read (CNR, Controller_Not_Ready);
195 Timed_Out : constant Boolean := Time.Timed_Out (Deadline);
197 Success := not Timed_Out;
199 exit when not Success;
201 pragma Debug (not Success, Debug.Put_Line
202 ("ERROR: xHC not ready after 1s."));
206 BIOS_Handover (Success);
210 xCap_Regs.Byte_Offset := 0;
211 Find_Next_xCap (10, Success);
214 pragma Debug (not Success, Debug.Put_Line
215 ("ERROR: Couldn't find xHCI debug capability."));
218 Regs.Byte_Offset := xCap_Regs.Byte_Offset;
220 ERST := Events.ERST_Entry'
221 (Segment_Base => DMA_Buffers.Event_Ring_Base,
222 Segment_Size => TRBs.TRBs_Per_Ring,
225 Desc_Strings (String0).bLength := 16#04#;
226 Desc_Strings (String0).bDescriptor_Type := 16#03#;
227 Desc_Strings (String0).wData := (0 => 16#0409#, others => 16#0000#);
228 String_To_Desc (Desc_Strings (Manufacturer), "secunet");
229 String_To_Desc (Desc_Strings (Product), "HW.DbC");
230 String_To_Desc (Desc_Strings (Serial_Number), "1");
232 Reset (Initial_Reset => True);
236 ----------------------------------------------------------------------------
238 procedure Reset (Initial_Reset : Boolean := False)
246 if Regs.Byte_Offset /= 0 then
247 Regs.Write (DbC_Enable, Word8'(0));
249 Regs.Read (DCE, DbC_Enable);
253 Transfers.Reset (Initial_Reset);
255 Regs.Write (ERST_Size, Word16'(1));
256 Regs.Write (ERST_Base_Lo, Word32
257 (DMA_Buffers.Event_Ring_Segment_Table_Base mod 16#1_0000_0000#));
258 Regs.Write (ERST_Base_Hi, Word32
259 (DMA_Buffers.Event_Ring_Segment_Table_Base / 16#1_0000_0000#));
262 Regs.Write (ER_Dequeue_Ptr_Lo, Word32
263 (DMA_Buffers.Event_Ring_Base mod 16#1_0000_0000#));
264 Regs.Write (ER_Dequeue_Ptr_Hi, Word32
265 (DMA_Buffers.Event_Ring_Base / 16#1_0000_0000#));
267 Regs.Write (Context_Pointer_Lo, Word32
268 (DMA_Buffers.DbC_Context_Base mod 16#1_0000_0000#));
269 Regs.Write (Context_Pointer_Hi, Word32
270 (DMA_Buffers.DbC_Context_Base / 16#1_0000_0000#));
272 Contexts.Clear_DbC_Context (DbC_Context);
273 DbC_Context.DbC_Info :=
274 (String_0_Address => DMA_Buffers.Descriptor_Strings_Base,
275 Manufacturer_String_Address => DMA_Buffers.Descriptor_Strings_Base
276 + 1 * String_Descriptor'Size / 8,
277 Product_String_Address => DMA_Buffers.Descriptor_Strings_Base
278 + 2 * String_Descriptor'Size / 8,
279 Serial_Number_String_Address => DMA_Buffers.Descriptor_Strings_Base
280 + 3 * String_Descriptor'Size / 8,
281 String_0_Length => Desc_Strings (String0).bLength,
282 Manufacturer_String_Length => Desc_Strings (Manufacturer).bLength,
283 Product_String_Length => Desc_Strings (Product).bLength,
284 Serial_Number_String_Length => Desc_Strings (Serial_Number).bLength,
288 Regs.Read (MBS, Debug_Max_Burst_Size);
289 DbC_Context.OUT_EP.EP_Type := Contexts.Bulk_O;
290 DbC_Context.OUT_EP.Max_Burst_Size := MBS;
291 DbC_Context.OUT_EP.Max_Packet_Size := 1024;
292 DbC_Context.OUT_EP.TR_Dequeue_Pointer_Lo := Word28
293 (Shift_Right (Transfer_Rings.Physical (2), 4) and 16#0fff_ffff#);
294 DbC_Context.OUT_EP.TR_Dequeue_Pointer_Hi := Word32
295 (Shift_Right (Transfer_Rings.Physical (2), 32) and 16#ffff_ffff#);
296 DbC_Context.OUT_EP.Dequeue_Cycle_State := 1;
297 DbC_Context.OUT_EP.Average_TRB_Length := Max_Bulk_Size / 2;
298 DbC_Context.IN_EP.EP_Type := Contexts.Bulk_I;
299 DbC_Context.IN_EP.Max_Burst_Size := MBS;
300 DbC_Context.IN_EP.Max_Packet_Size := 1024;
301 DbC_Context.IN_EP.TR_Dequeue_Pointer_Lo := Word28
302 (Shift_Right (Transfer_Rings.Physical (3), 4) and 16#0fff_ffff#);
303 DbC_Context.IN_EP.TR_Dequeue_Pointer_Hi := Word32
304 (Shift_Right (Transfer_Rings.Physical (3), 32) and 16#ffff_ffff#);
305 DbC_Context.IN_EP.Dequeue_Cycle_State := 1;
306 DbC_Context.IN_EP.Average_TRB_Length := Max_Bulk_Size / 2;
308 Regs.Write (DbC_Protocol, Word16'(0)); -- Debug Target vendor defined.
309 Regs.Write (Vendor_ID, Word16 (16#ffff#));
310 Regs.Write (Product_ID, Word16 (16#dbc1#));
311 Regs.Write (Device_Revision, Word16 (16#0001#));
313 Regs.Write (DbC_Enable, Word8'(1));
315 Regs.Read (DCE, DbC_Enable);
319 if Apply_Intel_Quirk then
320 Intel_Quirk.Reset_Port;
325 DbC_Poll_Deadline := Time.Now;
326 DbC_Stat_Deadline := Time.MS_From_Now (12_345);
330 procedure Poll (Now : Boolean := False)
337 if Regs.Byte_Offset /= 0 then
338 Timed_Out := Time.Timed_Out (DbC_Poll_Deadline);
339 if Now or else Timed_Out then
340 Regs.Read (Temp8, DbC_Enable);
342 Regs.Read (Temp8, Current_Connect_Status);
344 -- Something is connected...
345 DbC_Poll_Deadline := Time.MS_From_Now (10);
346 if not Connected then
347 pragma Debug (Debug.Put_Line ("DbC connected."));
348 DbC_Run_Deadline := Time.MS_From_Now (333);
351 Regs.Read (Temp8, DbC_Run);
355 pragma Debug (Debug.Put_Line ("DbC configured."));
360 pragma Debug (Debug.Put_Line
361 ("DbC still connected but deconfigured."));
362 DbC_Run_Deadline := Time.MS_From_Now (333);
365 Timed_Out := Time.Timed_Out (DbC_Run_Deadline);
367 pragma Debug (Debug.Put_Line
368 ("DbC connection timed out."));
374 DbC_Poll_Deadline := Time.MS_From_Now (333);
376 pragma Debug (Debug.Put_Line ("DbC disconnected."));
382 pragma Debug (Debug.Put_Line ("DbC got disabled, huh?"));
385 Events.Handle_Events;
386 Timed_Out := Time.Timed_Out (DbC_Stat_Deadline);
388 pragma Debug (Transfer_Info.Dump_Stats);
389 DbC_Stat_Deadline := Time.MS_From_Now (12_345);
395 procedure Receive (Buf : in out Buffer; Len : in out Natural)
400 Transfers.Receive (Buf, Len);
403 procedure Send (Buf : Buffer; Len : in out Natural; Success : out Boolean)
411 Start_Now => Running,
415 procedure Ring_Doorbell (EP : Endpoint_Range)
419 Regs.Write (Doorbell_Target, Word8 (EP) - 2);
424 -- vim: set ts=8 sts=3 sw=3 et: