bb2ee73d9e0217b72c82c51191269f692a592592
[muen/linux.git] / arch / arm / firmware / trusted_foundations.c
1 /*
2  * Trusted Foundations support for ARM CPUs
3  *
4  * Copyright (c) 2013, NVIDIA Corporation.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  */
16
17 #include <linux/kernel.h>
18 #include <linux/init.h>
19 #include <linux/of.h>
20 #include <asm/firmware.h>
21 #include <asm/hardware/cache-l2x0.h>
22 #include <asm/outercache.h>
23 #include <asm/trusted_foundations.h>
24
25 #define TF_CACHE_MAINT          0xfffff100
26
27 #define TF_CACHE_ENABLE         1
28 #define TF_CACHE_DISABLE        2
29
30 #define TF_SET_CPU_BOOT_ADDR_SMC 0xfffff200
31
32 #define TF_CPU_PM               0xfffffffc
33 #define TF_CPU_PM_S3            0xffffffe3
34 #define TF_CPU_PM_S2            0xffffffe6
35 #define TF_CPU_PM_S2_NO_MC_CLK  0xffffffe5
36 #define TF_CPU_PM_S1            0xffffffe4
37 #define TF_CPU_PM_S1_NOFLUSH_L2 0xffffffe7
38
39 static unsigned long cpu_boot_addr;
40
41 static void tf_generic_smc(u32 type, u32 arg1, u32 arg2)
42 {
43         register u32 r0 asm("r0") = type;
44         register u32 r1 asm("r1") = arg1;
45         register u32 r2 asm("r2") = arg2;
46
47         asm volatile(
48                 ".arch_extension        sec\n\t"
49                 "stmfd  sp!, {r4 - r11}\n\t"
50                 __asmeq("%0", "r0")
51                 __asmeq("%1", "r1")
52                 __asmeq("%2", "r2")
53                 "mov    r3, #0\n\t"
54                 "mov    r4, #0\n\t"
55                 "smc    #0\n\t"
56                 "ldmfd  sp!, {r4 - r11}\n\t"
57                 :
58                 : "r" (r0), "r" (r1), "r" (r2)
59                 : "memory", "r3", "r12", "lr");
60 }
61
62 static int tf_set_cpu_boot_addr(int cpu, unsigned long boot_addr)
63 {
64         cpu_boot_addr = boot_addr;
65         tf_generic_smc(TF_SET_CPU_BOOT_ADDR_SMC, cpu_boot_addr, 0);
66
67         return 0;
68 }
69
70 static int tf_prepare_idle(unsigned long mode)
71 {
72         switch (mode) {
73         case TF_PM_MODE_LP0:
74                 tf_generic_smc(TF_CPU_PM, TF_CPU_PM_S3, cpu_boot_addr);
75                 break;
76
77         case TF_PM_MODE_LP1:
78                 tf_generic_smc(TF_CPU_PM, TF_CPU_PM_S2, cpu_boot_addr);
79                 break;
80
81         case TF_PM_MODE_LP1_NO_MC_CLK:
82                 tf_generic_smc(TF_CPU_PM, TF_CPU_PM_S2_NO_MC_CLK,
83                                cpu_boot_addr);
84                 break;
85
86         case TF_PM_MODE_LP2:
87                 tf_generic_smc(TF_CPU_PM, TF_CPU_PM_S1, cpu_boot_addr);
88                 break;
89
90         case TF_PM_MODE_LP2_NOFLUSH_L2:
91                 tf_generic_smc(TF_CPU_PM, TF_CPU_PM_S1_NOFLUSH_L2,
92                                cpu_boot_addr);
93                 break;
94
95         default:
96                 return -EINVAL;
97         }
98
99         return 0;
100 }
101
102 #ifdef CONFIG_CACHE_L2X0
103 static void tf_cache_write_sec(unsigned long val, unsigned int reg)
104 {
105         u32 l2x0_way_mask = 0xff;
106
107         switch (reg) {
108         case L2X0_CTRL:
109                 if (l2x0_saved_regs.aux_ctrl & L310_AUX_CTRL_ASSOCIATIVITY_16)
110                         l2x0_way_mask = 0xffff;
111
112                 if (val == L2X0_CTRL_EN)
113                         tf_generic_smc(TF_CACHE_MAINT, TF_CACHE_ENABLE,
114                                        l2x0_saved_regs.aux_ctrl);
115                 else
116                         tf_generic_smc(TF_CACHE_MAINT, TF_CACHE_DISABLE,
117                                        l2x0_way_mask);
118                 break;
119
120         default:
121                 break;
122         }
123 }
124
125 static int tf_init_cache(void)
126 {
127         outer_cache.write_sec = tf_cache_write_sec;
128
129         return 0;
130 }
131 #endif /* CONFIG_CACHE_L2X0 */
132
133 static const struct firmware_ops trusted_foundations_ops = {
134         .set_cpu_boot_addr = tf_set_cpu_boot_addr,
135         .prepare_idle = tf_prepare_idle,
136 #ifdef CONFIG_CACHE_L2X0
137         .l2x0_init = tf_init_cache,
138 #endif
139 };
140
141 void register_trusted_foundations(struct trusted_foundations_platform_data *pd)
142 {
143         /*
144          * we are not using version information for now since currently
145          * supported SMCs are compatible with all TF releases
146          */
147         register_firmware_ops(&trusted_foundations_ops);
148 }
149
150 void of_register_trusted_foundations(void)
151 {
152         struct device_node *node;
153         struct trusted_foundations_platform_data pdata;
154         int err;
155
156         node = of_find_compatible_node(NULL, NULL, "tlm,trusted-foundations");
157         if (!node)
158                 return;
159
160         err = of_property_read_u32(node, "tlm,version-major",
161                                    &pdata.version_major);
162         if (err != 0)
163                 panic("Trusted Foundation: missing version-major property\n");
164         err = of_property_read_u32(node, "tlm,version-minor",
165                                    &pdata.version_minor);
166         if (err != 0)
167                 panic("Trusted Foundation: missing version-minor property\n");
168         register_trusted_foundations(&pdata);
169 }
170
171 bool trusted_foundations_registered(void)
172 {
173         return firmware_ops == &trusted_foundations_ops;
174 }