arch/arm64/boot/dts/renesas/r8a7795.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for the R-Car H3 (R8A77950) SoC
   4  *
   5  * Copyright (C) 2015 Renesas Electronics Corp.
   6  */
   7
   8 #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
   9 #include <dt-bindings/interrupt-controller/arm-gic.h>
  10 #include <dt-bindings/power/r8a7795-sysc.h>
  11
  12 #define CPG_AUDIO_CLK_I         R8A7795_CLK_S0D4
  13
  14 / {
  15         compatible = "renesas,r8a7795";
  16         #address-cells = <2>;
  17         #size-cells = <2>;
  18
  19         aliases {
  20                 i2c0 = &i2c0;
  21                 i2c1 = &i2c1;
  22                 i2c2 = &i2c2;
  23                 i2c3 = &i2c3;
  24                 i2c4 = &i2c4;
  25                 i2c5 = &i2c5;
  26                 i2c6 = &i2c6;
  27                 i2c7 = &i2c_dvfs;
  28         };
  29
  30         /*
  31          * The external audio clocks are configured as 0 Hz fixed frequency
  32          * clocks by default.
  33          * Boards that provide audio clocks should override them.
  34          */
  35         audio_clk_a: audio_clk_a {
  36                 compatible = "fixed-clock";
  37                 #clock-cells = <0>;
  38                 clock-frequency = <0>;
  39         };
  40
  41         audio_clk_b: audio_clk_b {
  42                 compatible = "fixed-clock";
  43                 #clock-cells = <0>;
  44                 clock-frequency = <0>;
  45         };
  46
  47         audio_clk_c: audio_clk_c {
  48                 compatible = "fixed-clock";
  49                 #clock-cells = <0>;
  50                 clock-frequency = <0>;
  51         };
  52
  53         /* External CAN clock - to be overridden by boards that provide it */
  54         can_clk: can {
  55                 compatible = "fixed-clock";
  56                 #clock-cells = <0>;
  57                 clock-frequency = <0>;
  58         };
  59
  60         cluster0_opp: opp_table0 {
  61                 compatible = "operating-points-v2";
  62                 opp-shared;
  63
  64                 opp-500000000 {
  65                         opp-hz = /bits/ 64 <500000000>;
  66                         opp-microvolt = <830000>;
  67                         clock-latency-ns = <300000>;
  68                 };
  69                 opp-1000000000 {
  70                         opp-hz = /bits/ 64 <1000000000>;
  71                         opp-microvolt = <830000>;
  72                         clock-latency-ns = <300000>;
  73                 };
  74                 opp-1500000000 {
  75                         opp-hz = /bits/ 64 <1500000000>;
  76                         opp-microvolt = <830000>;
  77                         clock-latency-ns = <300000>;
  78                         opp-suspend;
  79                 };
  80                 opp-1600000000 {
  81                         opp-hz = /bits/ 64 <1600000000>;
  82                         opp-microvolt = <900000>;
  83                         clock-latency-ns = <300000>;
  84                         turbo-mode;
  85                 };
  86                 opp-1700000000 {
  87                         opp-hz = /bits/ 64 <1700000000>;
  88                         opp-microvolt = <960000>;
  89                         clock-latency-ns = <300000>;
  90                         turbo-mode;
  91                 };
  92         };
  93
  94         cluster1_opp: opp_table1 {
  95                 compatible = "operating-points-v2";
  96                 opp-shared;
  97
  98                 opp-800000000 {
  99                         opp-hz = /bits/ 64 <800000000>;
 100                         opp-microvolt = <820000>;
 101                         clock-latency-ns = <300000>;
 102                 };
 103                 opp-1000000000 {
 104                         opp-hz = /bits/ 64 <1000000000>;
 105                         opp-microvolt = <820000>;
 106                         clock-latency-ns = <300000>;
 107                 };
 108                 opp-1200000000 {
 109                         opp-hz = /bits/ 64 <1200000000>;
 110                         opp-microvolt = <820000>;
 111                         clock-latency-ns = <300000>;
 112                 };
 113         };
 114
 115         cpus {
 116                 #address-cells = <1>;
 117                 #size-cells = <0>;
 118
 119                 a57_0: cpu@0 {
 120                         compatible = "arm,cortex-a57", "arm,armv8";
 121                         reg = <0x0>;
 122                         device_type = "cpu";
 123                         power-domains = <&sysc R8A7795_PD_CA57_CPU0>;
 124                         next-level-cache = <&L2_CA57>;
 125                         enable-method = "psci";
 126                         clocks = <&cpg CPG_CORE R8A7795_CLK_Z>;
 127                         operating-points-v2 = <&cluster0_opp>;
 128                         #cooling-cells = <2>;
 129                 };
 130
 131                 a57_1: cpu@1 {
 132                         compatible = "arm,cortex-a57", "arm,armv8";
 133                         reg = <0x1>;
 134                         device_type = "cpu";
 135                         power-domains = <&sysc R8A7795_PD_CA57_CPU1>;
 136                         next-level-cache = <&L2_CA57>;
 137                         enable-method = "psci";
 138                         clocks = <&cpg CPG_CORE R8A7795_CLK_Z>;
 139                         operating-points-v2 = <&cluster0_opp>;
 140                         #cooling-cells = <2>;
 141                 };
 142
 143                 a57_2: cpu@2 {
 144                         compatible = "arm,cortex-a57", "arm,armv8";
 145                         reg = <0x2>;
 146                         device_type = "cpu";
 147                         power-domains = <&sysc R8A7795_PD_CA57_CPU2>;
 148                         next-level-cache = <&L2_CA57>;
 149                         enable-method = "psci";
 150                         clocks = <&cpg CPG_CORE R8A7795_CLK_Z>;
 151                         operating-points-v2 = <&cluster0_opp>;
 152                         #cooling-cells = <2>;
 153                 };
 154
 155                 a57_3: cpu@3 {
 156                         compatible = "arm,cortex-a57", "arm,armv8";
 157                         reg = <0x3>;
 158                         device_type = "cpu";
 159                         power-domains = <&sysc R8A7795_PD_CA57_CPU3>;
 160                         next-level-cache = <&L2_CA57>;
 161                         enable-method = "psci";
 162                         clocks = <&cpg CPG_CORE R8A7795_CLK_Z>;
 163                         operating-points-v2 = <&cluster0_opp>;
 164                         #cooling-cells = <2>;
 165                 };
 166
 167                 a53_0: cpu@100 {
 168                         compatible = "arm,cortex-a53", "arm,armv8";
 169                         reg = <0x100>;
 170                         device_type = "cpu";
 171                         power-domains = <&sysc R8A7795_PD_CA53_CPU0>;
 172                         next-level-cache = <&L2_CA53>;
 173                         enable-method = "psci";
 174                         clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>;
 175                         operating-points-v2 = <&cluster1_opp>;
 176                 };
 177
 178                 a53_1: cpu@101 {
 179                         compatible = "arm,cortex-a53", "arm,armv8";
 180                         reg = <0x101>;
 181                         device_type = "cpu";
 182                         power-domains = <&sysc R8A7795_PD_CA53_CPU1>;
 183                         next-level-cache = <&L2_CA53>;
 184                         enable-method = "psci";
 185                         clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>;
 186                         operating-points-v2 = <&cluster1_opp>;
 187                 };
 188
 189                 a53_2: cpu@102 {
 190                         compatible = "arm,cortex-a53", "arm,armv8";
 191                         reg = <0x102>;
 192                         device_type = "cpu";
 193                         power-domains = <&sysc R8A7795_PD_CA53_CPU2>;
 194                         next-level-cache = <&L2_CA53>;
 195                         enable-method = "psci";
 196                         clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>;
 197                         operating-points-v2 = <&cluster1_opp>;
 198                 };
 199
 200                 a53_3: cpu@103 {
 201                         compatible = "arm,cortex-a53", "arm,armv8";
 202                         reg = <0x103>;
 203                         device_type = "cpu";
 204                         power-domains = <&sysc R8A7795_PD_CA53_CPU3>;
 205                         next-level-cache = <&L2_CA53>;
 206                         enable-method = "psci";
 207                         clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>;
 208                         operating-points-v2 = <&cluster1_opp>;
 209                 };
 210
 211                 L2_CA57: cache-controller-0 {
 212                         compatible = "cache";
 213                         power-domains = <&sysc R8A7795_PD_CA57_SCU>;
 214                         cache-unified;
 215                         cache-level = <2>;
 216                 };
 217
 218                 L2_CA53: cache-controller-1 {
 219                         compatible = "cache";
 220                         power-domains = <&sysc R8A7795_PD_CA53_SCU>;
 221                         cache-unified;
 222                         cache-level = <2>;
 223                 };
 224         };
 225
 226         extal_clk: extal {
 227                 compatible = "fixed-clock";
 228                 #clock-cells = <0>;
 229                 /* This value must be overridden by the board */
 230                 clock-frequency = <0>;
 231         };
 232
 233         extalr_clk: extalr {
 234                 compatible = "fixed-clock";
 235                 #clock-cells = <0>;
 236                 /* This value must be overridden by the board */
 237                 clock-frequency = <0>;
 238         };
 239
 240         /* External PCIe clock - can be overridden by the board */
 241         pcie_bus_clk: pcie_bus {
 242                 compatible = "fixed-clock";
 243                 #clock-cells = <0>;
 244                 clock-frequency = <0>;
 245         };
 246
 247         pmu_a53 {
 248                 compatible = "arm,cortex-a53-pmu";
 249                 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
 250                                       <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
 251                                       <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
 252                                       <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
 253                 interrupt-affinity = <&a53_0>,
 254                                      <&a53_1>,
 255                                      <&a53_2>,
 256                                      <&a53_3>;
 257         };
 258
 259         pmu_a57 {
 260                 compatible = "arm,cortex-a57-pmu";
 261                 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
 262                                       <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
 263                                       <&gic GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
 264                                       <&gic GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
 265                 interrupt-affinity = <&a57_0>,
 266                                      <&a57_1>,
 267                                      <&a57_2>,
 268                                      <&a57_3>;
 269         };
 270
 271         psci {
 272                 compatible = "arm,psci-1.0", "arm,psci-0.2";
 273                 method = "smc";
 274         };
 275
 276         /* External SCIF clock - to be overridden by boards that provide it */
 277         scif_clk: scif {
 278                 compatible = "fixed-clock";
 279                 #clock-cells = <0>;
 280                 clock-frequency = <0>;
 281         };
 282
 283         soc: soc {
 284                 compatible = "simple-bus";
 285                 interrupt-parent = <&gic>;
 286
 287                 #address-cells = <2>;
 288                 #size-cells = <2>;
 289                 ranges;
 290
 291                 rwdt: watchdog@e6020000 {
 292                         compatible = "renesas,r8a7795-wdt", "renesas,rcar-gen3-wdt";
 293                         reg = <0 0xe6020000 0 0x0c>;
 294                         clocks = <&cpg CPG_MOD 402>;
 295                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 296                         resets = <&cpg 402>;
 297                         status = "disabled";
 298                 };
 299
 300                 gpio0: gpio@e6050000 {
 301                         compatible = "renesas,gpio-r8a7795",
 302                                      "renesas,rcar-gen3-gpio";
 303                         reg = <0 0xe6050000 0 0x50>;
 304                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 305                         #gpio-cells = <2>;
 306                         gpio-controller;
 307                         gpio-ranges = <&pfc 0 0 16>;
 308                         #interrupt-cells = <2>;
 309                         interrupt-controller;
 310                         clocks = <&cpg CPG_MOD 912>;
 311                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 312                         resets = <&cpg 912>;
 313                 };
 314
 315                 gpio1: gpio@e6051000 {
 316                         compatible = "renesas,gpio-r8a7795",
 317                                      "renesas,rcar-gen3-gpio";
 318                         reg = <0 0xe6051000 0 0x50>;
 319                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 320                         #gpio-cells = <2>;
 321                         gpio-controller;
 322                         gpio-ranges = <&pfc 0 32 29>;
 323                         #interrupt-cells = <2>;
 324                         interrupt-controller;
 325                         clocks = <&cpg CPG_MOD 911>;
 326                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 327                         resets = <&cpg 911>;
 328                 };
 329
 330                 gpio2: gpio@e6052000 {
 331                         compatible = "renesas,gpio-r8a7795",
 332                                      "renesas,rcar-gen3-gpio";
 333                         reg = <0 0xe6052000 0 0x50>;
 334                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 335                         #gpio-cells = <2>;
 336                         gpio-controller;
 337                         gpio-ranges = <&pfc 0 64 15>;
 338                         #interrupt-cells = <2>;
 339                         interrupt-controller;
 340                         clocks = <&cpg CPG_MOD 910>;
 341                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 342                         resets = <&cpg 910>;
 343                 };
 344
 345                 gpio3: gpio@e6053000 {
 346                         compatible = "renesas,gpio-r8a7795",
 347                                      "renesas,rcar-gen3-gpio";
 348                         reg = <0 0xe6053000 0 0x50>;
 349                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 350                         #gpio-cells = <2>;
 351                         gpio-controller;
 352                         gpio-ranges = <&pfc 0 96 16>;
 353                         #interrupt-cells = <2>;
 354                         interrupt-controller;
 355                         clocks = <&cpg CPG_MOD 909>;
 356                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 357                         resets = <&cpg 909>;
 358                 };
 359
 360                 gpio4: gpio@e6054000 {
 361                         compatible = "renesas,gpio-r8a7795",
 362                                      "renesas,rcar-gen3-gpio";
 363                         reg = <0 0xe6054000 0 0x50>;
 364                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 365                         #gpio-cells = <2>;
 366                         gpio-controller;
 367                         gpio-ranges = <&pfc 0 128 18>;
 368                         #interrupt-cells = <2>;
 369                         interrupt-controller;
 370                         clocks = <&cpg CPG_MOD 908>;
 371                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 372                         resets = <&cpg 908>;
 373                 };
 374
 375                 gpio5: gpio@e6055000 {
 376                         compatible = "renesas,gpio-r8a7795",
 377                                      "renesas,rcar-gen3-gpio";
 378                         reg = <0 0xe6055000 0 0x50>;
 379                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 380                         #gpio-cells = <2>;
 381                         gpio-controller;
 382                         gpio-ranges = <&pfc 0 160 26>;
 383                         #interrupt-cells = <2>;
 384                         interrupt-controller;
 385                         clocks = <&cpg CPG_MOD 907>;
 386                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 387                         resets = <&cpg 907>;
 388                 };
 389
 390                 gpio6: gpio@e6055400 {
 391                         compatible = "renesas,gpio-r8a7795",
 392                                      "renesas,rcar-gen3-gpio";
 393                         reg = <0 0xe6055400 0 0x50>;
 394                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 395                         #gpio-cells = <2>;
 396                         gpio-controller;
 397                         gpio-ranges = <&pfc 0 192 32>;
 398                         #interrupt-cells = <2>;
 399                         interrupt-controller;
 400                         clocks = <&cpg CPG_MOD 906>;
 401                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 402                         resets = <&cpg 906>;
 403                 };
 404
 405                 gpio7: gpio@e6055800 {
 406                         compatible = "renesas,gpio-r8a7795",
 407                                      "renesas,rcar-gen3-gpio";
 408                         reg = <0 0xe6055800 0 0x50>;
 409                         interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 410                         #gpio-cells = <2>;
 411                         gpio-controller;
 412                         gpio-ranges = <&pfc 0 224 4>;
 413                         #interrupt-cells = <2>;
 414                         interrupt-controller;
 415                         clocks = <&cpg CPG_MOD 905>;
 416                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 417                         resets = <&cpg 905>;
 418                 };
 419
 420                 pfc: pin-controller@e6060000 {
 421                         compatible = "renesas,pfc-r8a7795";
 422                         reg = <0 0xe6060000 0 0x50c>;
 423                 };
 424
 425                 cpg: clock-controller@e6150000 {
 426                         compatible = "renesas,r8a7795-cpg-mssr";
 427                         reg = <0 0xe6150000 0 0x1000>;
 428                         clocks = <&extal_clk>, <&extalr_clk>;
 429                         clock-names = "extal", "extalr";
 430                         #clock-cells = <2>;
 431                         #power-domain-cells = <0>;
 432                         #reset-cells = <1>;
 433                 };
 434
 435                 rst: reset-controller@e6160000 {
 436                         compatible = "renesas,r8a7795-rst";
 437                         reg = <0 0xe6160000 0 0x0200>;
 438                 };
 439
 440                 sysc: system-controller@e6180000 {
 441                         compatible = "renesas,r8a7795-sysc";
 442                         reg = <0 0xe6180000 0 0x0400>;
 443                         #power-domain-cells = <1>;
 444                 };
 445
 446                 tsc: thermal@e6198000 {
 447                         compatible = "renesas,r8a7795-thermal";
 448                         reg = <0 0xe6198000 0 0x100>,
 449                               <0 0xe61a0000 0 0x100>,
 450                               <0 0xe61a8000 0 0x100>;
 451                         interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
 452                                      <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
 453                                      <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
 454                         clocks = <&cpg CPG_MOD 522>;
 455                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 456                         resets = <&cpg 522>;
 457                         #thermal-sensor-cells = <1>;
 458                 };
 459
 460                 intc_ex: interrupt-controller@e61c0000 {
 461                         compatible = "renesas,intc-ex-r8a7795", "renesas,irqc";
 462                         #interrupt-cells = <2>;
 463                         interrupt-controller;
 464                         reg = <0 0xe61c0000 0 0x200>;
 465                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
 466                                       GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
 467                                       GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
 468                                       GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
 469                                       GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
 470                                       GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
 471                         clocks = <&cpg CPG_MOD 407>;
 472                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 473                         resets = <&cpg 407>;
 474                 };
 475
 476                 i2c0: i2c@e6500000 {
 477                         #address-cells = <1>;
 478                         #size-cells = <0>;
 479                         compatible = "renesas,i2c-r8a7795",
 480                                      "renesas,rcar-gen3-i2c";
 481                         reg = <0 0xe6500000 0 0x40>;
 482                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 483                         clocks = <&cpg CPG_MOD 931>;
 484                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 485                         resets = <&cpg 931>;
 486                         dmas = <&dmac1 0x91>, <&dmac1 0x90>,
 487                                <&dmac2 0x91>, <&dmac2 0x90>;
 488                         dma-names = "tx", "rx", "tx", "rx";
 489                         i2c-scl-internal-delay-ns = <110>;
 490                         status = "disabled";
 491                 };
 492
 493                 i2c1: i2c@e6508000 {
 494                         #address-cells = <1>;
 495                         #size-cells = <0>;
 496                         compatible = "renesas,i2c-r8a7795",
 497                                      "renesas,rcar-gen3-i2c";
 498                         reg = <0 0xe6508000 0 0x40>;
 499                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 500                         clocks = <&cpg CPG_MOD 930>;
 501                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 502                         resets = <&cpg 930>;
 503                         dmas = <&dmac1 0x93>, <&dmac1 0x92>,
 504                                <&dmac2 0x93>, <&dmac2 0x92>;
 505                         dma-names = "tx", "rx", "tx", "rx";
 506                         i2c-scl-internal-delay-ns = <6>;
 507                         status = "disabled";
 508                 };
 509
 510                 i2c2: i2c@e6510000 {
 511                         #address-cells = <1>;
 512                         #size-cells = <0>;
 513                         compatible = "renesas,i2c-r8a7795",
 514                                      "renesas,rcar-gen3-i2c";
 515                         reg = <0 0xe6510000 0 0x40>;
 516                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 517                         clocks = <&cpg CPG_MOD 929>;
 518                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 519                         resets = <&cpg 929>;
 520                         dmas = <&dmac1 0x95>, <&dmac1 0x94>,
 521                                <&dmac2 0x95>, <&dmac2 0x94>;
 522                         dma-names = "tx", "rx", "tx", "rx";
 523                         i2c-scl-internal-delay-ns = <6>;
 524                         status = "disabled";
 525                 };
 526
 527                 i2c3: i2c@e66d0000 {
 528                         #address-cells = <1>;
 529                         #size-cells = <0>;
 530                         compatible = "renesas,i2c-r8a7795",
 531                                      "renesas,rcar-gen3-i2c";
 532                         reg = <0 0xe66d0000 0 0x40>;
 533                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 534                         clocks = <&cpg CPG_MOD 928>;
 535                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 536                         resets = <&cpg 928>;
 537                         dmas = <&dmac0 0x97>, <&dmac0 0x96>;
 538                         dma-names = "tx", "rx";
 539                         i2c-scl-internal-delay-ns = <110>;
 540                         status = "disabled";
 541                 };
 542
 543                 i2c4: i2c@e66d8000 {
 544                         #address-cells = <1>;
 545                         #size-cells = <0>;
 546                         compatible = "renesas,i2c-r8a7795",
 547                                      "renesas,rcar-gen3-i2c";
 548                         reg = <0 0xe66d8000 0 0x40>;
 549                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 550                         clocks = <&cpg CPG_MOD 927>;
 551                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 552                         resets = <&cpg 927>;
 553                         dmas = <&dmac0 0x99>, <&dmac0 0x98>;
 554                         dma-names = "tx", "rx";
 555                         i2c-scl-internal-delay-ns = <110>;
 556                         status = "disabled";
 557                 };
 558
 559                 i2c5: i2c@e66e0000 {
 560                         #address-cells = <1>;
 561                         #size-cells = <0>;
 562                         compatible = "renesas,i2c-r8a7795",
 563                                      "renesas,rcar-gen3-i2c";
 564                         reg = <0 0xe66e0000 0 0x40>;
 565                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 566                         clocks = <&cpg CPG_MOD 919>;
 567                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 568                         resets = <&cpg 919>;
 569                         dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
 570                         dma-names = "tx", "rx";
 571                         i2c-scl-internal-delay-ns = <110>;
 572                         status = "disabled";
 573                 };
 574
 575                 i2c6: i2c@e66e8000 {
 576                         #address-cells = <1>;
 577                         #size-cells = <0>;
 578                         compatible = "renesas,i2c-r8a7795",
 579                                      "renesas,rcar-gen3-i2c";
 580                         reg = <0 0xe66e8000 0 0x40>;
 581                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 582                         clocks = <&cpg CPG_MOD 918>;
 583                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 584                         resets = <&cpg 918>;
 585                         dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
 586                         dma-names = "tx", "rx";
 587                         i2c-scl-internal-delay-ns = <6>;
 588                         status = "disabled";
 589                 };
 590
 591                 i2c_dvfs: i2c@e60b0000 {
 592                         #address-cells = <1>;
 593                         #size-cells = <0>;
 594                         compatible = "renesas,iic-r8a7795",
 595                                      "renesas,rcar-gen3-iic",
 596                                      "renesas,rmobile-iic";
 597                         reg = <0 0xe60b0000 0 0x425>;
 598                         interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
 599                         clocks = <&cpg CPG_MOD 926>;
 600                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 601                         resets = <&cpg 926>;
 602                         dmas = <&dmac0 0x11>, <&dmac0 0x10>;
 603                         dma-names = "tx", "rx";
 604                         status = "disabled";
 605                 };
 606
 607                 hscif0: serial@e6540000 {
 608                         compatible = "renesas,hscif-r8a7795",
 609                                      "renesas,rcar-gen3-hscif",
 610                                      "renesas,hscif";
 611                         reg = <0 0xe6540000 0 96>;
 612                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 613                         clocks = <&cpg CPG_MOD 520>,
 614                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 615                                  <&scif_clk>;
 616                         clock-names = "fck", "brg_int", "scif_clk";
 617                         dmas = <&dmac1 0x31>, <&dmac1 0x30>,
 618                                <&dmac2 0x31>, <&dmac2 0x30>;
 619                         dma-names = "tx", "rx", "tx", "rx";
 620                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 621                         resets = <&cpg 520>;
 622                         status = "disabled";
 623                 };
 624
 625                 hscif1: serial@e6550000 {
 626                         compatible = "renesas,hscif-r8a7795",
 627                                      "renesas,rcar-gen3-hscif",
 628                                      "renesas,hscif";
 629                         reg = <0 0xe6550000 0 96>;
 630                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 631                         clocks = <&cpg CPG_MOD 519>,
 632                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 633                                  <&scif_clk>;
 634                         clock-names = "fck", "brg_int", "scif_clk";
 635                         dmas = <&dmac1 0x33>, <&dmac1 0x32>,
 636                                <&dmac2 0x33>, <&dmac2 0x32>;
 637                         dma-names = "tx", "rx", "tx", "rx";
 638                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 639                         resets = <&cpg 519>;
 640                         status = "disabled";
 641                 };
 642
 643                 hscif2: serial@e6560000 {
 644                         compatible = "renesas,hscif-r8a7795",
 645                                      "renesas,rcar-gen3-hscif",
 646                                      "renesas,hscif";
 647                         reg = <0 0xe6560000 0 96>;
 648                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 649                         clocks = <&cpg CPG_MOD 518>,
 650                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 651                                  <&scif_clk>;
 652                         clock-names = "fck", "brg_int", "scif_clk";
 653                         dmas = <&dmac1 0x35>, <&dmac1 0x34>,
 654                                <&dmac2 0x35>, <&dmac2 0x34>;
 655                         dma-names = "tx", "rx", "tx", "rx";
 656                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 657                         resets = <&cpg 518>;
 658                         status = "disabled";
 659                 };
 660
 661                 hscif3: serial@e66a0000 {
 662                         compatible = "renesas,hscif-r8a7795",
 663                                      "renesas,rcar-gen3-hscif",
 664                                      "renesas,hscif";
 665                         reg = <0 0xe66a0000 0 96>;
 666                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 667                         clocks = <&cpg CPG_MOD 517>,
 668                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 669                                  <&scif_clk>;
 670                         clock-names = "fck", "brg_int", "scif_clk";
 671                         dmas = <&dmac0 0x37>, <&dmac0 0x36>;
 672                         dma-names = "tx", "rx";
 673                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 674                         resets = <&cpg 517>;
 675                         status = "disabled";
 676                 };
 677
 678                 hscif4: serial@e66b0000 {
 679                         compatible = "renesas,hscif-r8a7795",
 680                                      "renesas,rcar-gen3-hscif",
 681                                      "renesas,hscif";
 682                         reg = <0 0xe66b0000 0 96>;
 683                         interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
 684                         clocks = <&cpg CPG_MOD 516>,
 685                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 686                                  <&scif_clk>;
 687                         clock-names = "fck", "brg_int", "scif_clk";
 688                         dmas = <&dmac0 0x39>, <&dmac0 0x38>;
 689                         dma-names = "tx", "rx";
 690                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 691                         resets = <&cpg 516>;
 692                         status = "disabled";
 693                 };
 694
 695                 hsusb: usb@e6590000 {
 696                         compatible = "renesas,usbhs-r8a7795",
 697                                      "renesas,rcar-gen3-usbhs";
 698                         reg = <0 0xe6590000 0 0x100>;
 699                         interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
 700                         clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
 701                         dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
 702                                <&usb_dmac1 0>, <&usb_dmac1 1>;
 703                         dma-names = "ch0", "ch1", "ch2", "ch3";
 704                         renesas,buswait = <11>;
 705                         phys = <&usb2_phy0>;
 706                         phy-names = "usb";
 707                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 708                         resets = <&cpg 704>, <&cpg 703>;
 709                         status = "disabled";
 710                 };
 711
 712                 hsusb3: usb@e659c000 {
 713                         compatible = "renesas,usbhs-r8a7795",
 714                                      "renesas,rcar-gen3-usbhs";
 715                         reg = <0 0xe659c000 0 0x100>;
 716                         interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
 717                         clocks = <&cpg CPG_MOD 705>, <&cpg CPG_MOD 700>;
 718                         dmas = <&usb_dmac2 0>, <&usb_dmac2 1>,
 719                                <&usb_dmac3 0>, <&usb_dmac3 1>;
 720                         dma-names = "ch0", "ch1", "ch2", "ch3";
 721                         renesas,buswait = <11>;
 722                         phys = <&usb2_phy3>;
 723                         phy-names = "usb";
 724                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 725                         resets = <&cpg 705>, <&cpg 700>;
 726                         status = "disabled";
 727                 };
 728
 729                 usb_dmac0: dma-controller@e65a0000 {
 730                         compatible = "renesas,r8a7795-usb-dmac",
 731                                      "renesas,usb-dmac";
 732                         reg = <0 0xe65a0000 0 0x100>;
 733                         interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
 734                                       GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
 735                         interrupt-names = "ch0", "ch1";
 736                         clocks = <&cpg CPG_MOD 330>;
 737                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 738                         resets = <&cpg 330>;
 739                         #dma-cells = <1>;
 740                         dma-channels = <2>;
 741                 };
 742
 743                 usb_dmac1: dma-controller@e65b0000 {
 744                         compatible = "renesas,r8a7795-usb-dmac",
 745                                      "renesas,usb-dmac";
 746                         reg = <0 0xe65b0000 0 0x100>;
 747                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
 748                                       GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
 749                         interrupt-names = "ch0", "ch1";
 750                         clocks = <&cpg CPG_MOD 331>;
 751                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 752                         resets = <&cpg 331>;
 753                         #dma-cells = <1>;
 754                         dma-channels = <2>;
 755                 };
 756
 757                 usb_dmac2: dma-controller@e6460000 {
 758                         compatible = "renesas,r8a7795-usb-dmac",
 759                                      "renesas,usb-dmac";
 760                         reg = <0 0xe6460000 0 0x100>;
 761                         interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH
 762                                       GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
 763                         interrupt-names = "ch0", "ch1";
 764                         clocks = <&cpg CPG_MOD 326>;
 765                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 766                         resets = <&cpg 326>;
 767                         #dma-cells = <1>;
 768                         dma-channels = <2>;
 769                 };
 770
 771                 usb_dmac3: dma-controller@e6470000 {
 772                         compatible = "renesas,r8a7795-usb-dmac",
 773                                      "renesas,usb-dmac";
 774                         reg = <0 0xe6470000 0 0x100>;
 775                         interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH
 776                                       GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
 777                         interrupt-names = "ch0", "ch1";
 778                         clocks = <&cpg CPG_MOD 329>;
 779                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 780                         resets = <&cpg 329>;
 781                         #dma-cells = <1>;
 782                         dma-channels = <2>;
 783                 };
 784
 785                 usb3_phy0: usb-phy@e65ee000 {
 786                         compatible = "renesas,r8a7795-usb3-phy",
 787                                      "renesas,rcar-gen3-usb3-phy";
 788                         reg = <0 0xe65ee000 0 0x90>;
 789                         clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
 790                                  <&usb_extal_clk>;
 791                         clock-names = "usb3-if", "usb3s_clk", "usb_extal";
 792                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 793                         resets = <&cpg 328>;
 794                         #phy-cells = <0>;
 795                         status = "disabled";
 796                 };
 797
 798                 arm_cc630p: crypto@e6601000 {
 799                         compatible = "arm,cryptocell-630p-ree";
 800                         interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
 801                         reg = <0x0 0xe6601000 0 0x1000>;
 802                         clocks = <&cpg CPG_MOD 229>;
 803                         resets = <&cpg 229>;
 804                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 805                 };
 806
 807                 dmac0: dma-controller@e6700000 {
 808                         compatible = "renesas,dmac-r8a7795",
 809                                      "renesas,rcar-dmac";
 810                         reg = <0 0xe6700000 0 0x10000>;
 811                         interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
 812                                       GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
 813                                       GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
 814                                       GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
 815                                       GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
 816                                       GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
 817                                       GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
 818                                       GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
 819                                       GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
 820                                       GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
 821                                       GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
 822                                       GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
 823                                       GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
 824                                       GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
 825                                       GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
 826                                       GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
 827                                       GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
 828                         interrupt-names = "error",
 829                                         "ch0", "ch1", "ch2", "ch3",
 830                                         "ch4", "ch5", "ch6", "ch7",
 831                                         "ch8", "ch9", "ch10", "ch11",
 832                                         "ch12", "ch13", "ch14", "ch15";
 833                         clocks = <&cpg CPG_MOD 219>;
 834                         clock-names = "fck";
 835                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 836                         resets = <&cpg 219>;
 837                         #dma-cells = <1>;
 838                         dma-channels = <16>;
 839                         iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
 840                                <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
 841                                <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
 842                                <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
 843                                <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
 844                                <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
 845                                <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
 846                                <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
 847                 };
 848
 849                 dmac1: dma-controller@e7300000 {
 850                         compatible = "renesas,dmac-r8a7795",
 851                                      "renesas,rcar-dmac";
 852                         reg = <0 0xe7300000 0 0x10000>;
 853                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
 854                                       GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
 855                                       GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
 856                                       GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
 857                                       GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
 858                                       GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
 859                                       GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
 860                                       GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
 861                                       GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
 862                                       GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
 863                                       GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
 864                                       GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
 865                                       GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
 866                                       GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
 867                                       GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
 868                                       GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
 869                                       GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
 870                         interrupt-names = "error",
 871                                         "ch0", "ch1", "ch2", "ch3",
 872                                         "ch4", "ch5", "ch6", "ch7",
 873                                         "ch8", "ch9", "ch10", "ch11",
 874                                         "ch12", "ch13", "ch14", "ch15";
 875                         clocks = <&cpg CPG_MOD 218>;
 876                         clock-names = "fck";
 877                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 878                         resets = <&cpg 218>;
 879                         #dma-cells = <1>;
 880                         dma-channels = <16>;
 881                         iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
 882                                <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
 883                                <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
 884                                <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
 885                                <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
 886                                <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
 887                                <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
 888                                <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
 889                 };
 890
 891                 dmac2: dma-controller@e7310000 {
 892                         compatible = "renesas,dmac-r8a7795",
 893                                      "renesas,rcar-dmac";
 894                         reg = <0 0xe7310000 0 0x10000>;
 895                         interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
 896                                       GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
 897                                       GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
 898                                       GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
 899                                       GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
 900                                       GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
 901                                       GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
 902                                       GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
 903                                       GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
 904                                       GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
 905                                       GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
 906                                       GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
 907                                       GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
 908                                       GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
 909                                       GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
 910                                       GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
 911                                       GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
 912                         interrupt-names = "error",
 913                                         "ch0", "ch1", "ch2", "ch3",
 914                                         "ch4", "ch5", "ch6", "ch7",
 915                                         "ch8", "ch9", "ch10", "ch11",
 916                                         "ch12", "ch13", "ch14", "ch15";
 917                         clocks = <&cpg CPG_MOD 217>;
 918                         clock-names = "fck";
 919                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 920                         resets = <&cpg 217>;
 921                         #dma-cells = <1>;
 922                         dma-channels = <16>;
 923                         iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
 924                                <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
 925                                <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
 926                                <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
 927                                <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
 928                                <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
 929                                <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
 930                                <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
 931                 };
 932
 933                 ipmmu_ds0: mmu@e6740000 {
 934                         compatible = "renesas,ipmmu-r8a7795";
 935                         reg = <0 0xe6740000 0 0x1000>;
 936                         renesas,ipmmu-main = <&ipmmu_mm 0>;
 937                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 938                         #iommu-cells = <1>;
 939                 };
 940
 941                 ipmmu_ds1: mmu@e7740000 {
 942                         compatible = "renesas,ipmmu-r8a7795";
 943                         reg = <0 0xe7740000 0 0x1000>;
 944                         renesas,ipmmu-main = <&ipmmu_mm 1>;
 945                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 946                         #iommu-cells = <1>;
 947                 };
 948
 949                 ipmmu_hc: mmu@e6570000 {
 950                         compatible = "renesas,ipmmu-r8a7795";
 951                         reg = <0 0xe6570000 0 0x1000>;
 952                         renesas,ipmmu-main = <&ipmmu_mm 2>;
 953                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 954                         #iommu-cells = <1>;
 955                 };
 956
 957                 ipmmu_ir: mmu@ff8b0000 {
 958                         compatible = "renesas,ipmmu-r8a7795";
 959                         reg = <0 0xff8b0000 0 0x1000>;
 960                         renesas,ipmmu-main = <&ipmmu_mm 3>;
 961                         power-domains = <&sysc R8A7795_PD_A3IR>;
 962                         #iommu-cells = <1>;
 963                 };
 964
 965                 ipmmu_mm: mmu@e67b0000 {
 966                         compatible = "renesas,ipmmu-r8a7795";
 967                         reg = <0 0xe67b0000 0 0x1000>;
 968                         interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
 969                                      <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
 970                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 971                         #iommu-cells = <1>;
 972                 };
 973
 974                 ipmmu_mp0: mmu@ec670000 {
 975                         compatible = "renesas,ipmmu-r8a7795";
 976                         reg = <0 0xec670000 0 0x1000>;
 977                         renesas,ipmmu-main = <&ipmmu_mm 4>;
 978                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 979                         #iommu-cells = <1>;
 980                 };
 981
 982                 ipmmu_pv0: mmu@fd800000 {
 983                         compatible = "renesas,ipmmu-r8a7795";
 984                         reg = <0 0xfd800000 0 0x1000>;
 985                         renesas,ipmmu-main = <&ipmmu_mm 6>;
 986                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 987                         #iommu-cells = <1>;
 988                 };
 989
 990                 ipmmu_pv1: mmu@fd950000 {
 991                         compatible = "renesas,ipmmu-r8a7795";
 992                         reg = <0 0xfd950000 0 0x1000>;
 993                         renesas,ipmmu-main = <&ipmmu_mm 7>;
 994                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 995                         #iommu-cells = <1>;
 996                 };
 997
 998                 ipmmu_pv2: mmu@fd960000 {
 999                         compatible = "renesas,ipmmu-r8a7795";
1000                         reg = <0 0xfd960000 0 0x1000>;
1001                         renesas,ipmmu-main = <&ipmmu_mm 8>;
1002                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1003                         #iommu-cells = <1>;
1004                 };
1005
1006                 ipmmu_pv3: mmu@fd970000 {
1007                         compatible = "renesas,ipmmu-r8a7795";
1008                         reg = <0 0xfd970000 0 0x1000>;
1009                         renesas,ipmmu-main = <&ipmmu_mm 9>;
1010                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1011                         #iommu-cells = <1>;
1012                 };
1013
1014                 ipmmu_rt: mmu@ffc80000 {
1015                         compatible = "renesas,ipmmu-r8a7795";
1016                         reg = <0 0xffc80000 0 0x1000>;
1017                         renesas,ipmmu-main = <&ipmmu_mm 10>;
1018                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1019                         #iommu-cells = <1>;
1020                 };
1021
1022                 ipmmu_vc0: mmu@fe6b0000 {
1023                         compatible = "renesas,ipmmu-r8a7795";
1024                         reg = <0 0xfe6b0000 0 0x1000>;
1025                         renesas,ipmmu-main = <&ipmmu_mm 12>;
1026                         power-domains = <&sysc R8A7795_PD_A3VC>;
1027                         #iommu-cells = <1>;
1028                 };
1029
1030                 ipmmu_vc1: mmu@fe6f0000 {
1031                         compatible = "renesas,ipmmu-r8a7795";
1032                         reg = <0 0xfe6f0000 0 0x1000>;
1033                         renesas,ipmmu-main = <&ipmmu_mm 13>;
1034                         power-domains = <&sysc R8A7795_PD_A3VC>;
1035                         #iommu-cells = <1>;
1036                 };
1037
1038                 ipmmu_vi0: mmu@febd0000 {
1039                         compatible = "renesas,ipmmu-r8a7795";
1040                         reg = <0 0xfebd0000 0 0x1000>;
1041                         renesas,ipmmu-main = <&ipmmu_mm 14>;
1042                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1043                         #iommu-cells = <1>;
1044                 };
1045
1046                 ipmmu_vi1: mmu@febe0000 {
1047                         compatible = "renesas,ipmmu-r8a7795";
1048                         reg = <0 0xfebe0000 0 0x1000>;
1049                         renesas,ipmmu-main = <&ipmmu_mm 15>;
1050                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1051                         #iommu-cells = <1>;
1052                 };
1053
1054                 ipmmu_vp0: mmu@fe990000 {
1055                         compatible = "renesas,ipmmu-r8a7795";
1056                         reg = <0 0xfe990000 0 0x1000>;
1057                         renesas,ipmmu-main = <&ipmmu_mm 16>;
1058                         power-domains = <&sysc R8A7795_PD_A3VP>;
1059                         #iommu-cells = <1>;
1060                 };
1061
1062                 ipmmu_vp1: mmu@fe980000 {
1063                         compatible = "renesas,ipmmu-r8a7795";
1064                         reg = <0 0xfe980000 0 0x1000>;
1065                         renesas,ipmmu-main = <&ipmmu_mm 17>;
1066                         power-domains = <&sysc R8A7795_PD_A3VP>;
1067                         #iommu-cells = <1>;
1068                 };
1069
1070                 avb: ethernet@e6800000 {
1071                         compatible = "renesas,etheravb-r8a7795",
1072                                      "renesas,etheravb-rcar-gen3";
1073                         reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
1074                         interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
1075                                      <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
1076                                      <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
1077                                      <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
1078                                      <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
1079                                      <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
1080                                      <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
1081                                      <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
1082                                      <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
1083                                      <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
1084                                      <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
1085                                      <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
1086                                      <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
1087                                      <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
1088                                      <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
1089                                      <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
1090                                      <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
1091                                      <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
1092                                      <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
1093                                      <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
1094                                      <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
1095                                      <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
1096                                      <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
1097                                      <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
1098                                      <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
1099                         interrupt-names = "ch0", "ch1", "ch2", "ch3",
1100                                           "ch4", "ch5", "ch6", "ch7",
1101                                           "ch8", "ch9", "ch10", "ch11",
1102                                           "ch12", "ch13", "ch14", "ch15",
1103                                           "ch16", "ch17", "ch18", "ch19",
1104                                           "ch20", "ch21", "ch22", "ch23",
1105                                           "ch24";
1106                         clocks = <&cpg CPG_MOD 812>;
1107                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1108                         resets = <&cpg 812>;
1109                         phy-mode = "rgmii";
1110                         iommus = <&ipmmu_ds0 16>;
1111                         #address-cells = <1>;
1112                         #size-cells = <0>;
1113                         status = "disabled";
1114                 };
1115
1116                 can0: can@e6c30000 {
1117                         compatible = "renesas,can-r8a7795",
1118                                      "renesas,rcar-gen3-can";
1119                         reg = <0 0xe6c30000 0 0x1000>;
1120                         interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1121                         clocks = <&cpg CPG_MOD 916>,
1122                                <&cpg CPG_CORE R8A7795_CLK_CANFD>,
1123                                <&can_clk>;
1124                         clock-names = "clkp1", "clkp2", "can_clk";
1125                         assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
1126                         assigned-clock-rates = <40000000>;
1127                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1128                         resets = <&cpg 916>;
1129                         status = "disabled";
1130                 };
1131
1132                 can1: can@e6c38000 {
1133                         compatible = "renesas,can-r8a7795",
1134                                      "renesas,rcar-gen3-can";
1135                         reg = <0 0xe6c38000 0 0x1000>;
1136                         interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1137                         clocks = <&cpg CPG_MOD 915>,
1138                                <&cpg CPG_CORE R8A7795_CLK_CANFD>,
1139                                <&can_clk>;
1140                         clock-names = "clkp1", "clkp2", "can_clk";
1141                         assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
1142                         assigned-clock-rates = <40000000>;
1143                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1144                         resets = <&cpg 915>;
1145                         status = "disabled";
1146                 };
1147
1148                 canfd: can@e66c0000 {
1149                         compatible = "renesas,r8a7795-canfd",
1150                                      "renesas,rcar-gen3-canfd";
1151                         reg = <0 0xe66c0000 0 0x8000>;
1152                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
1153                                    <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1154                         clocks = <&cpg CPG_MOD 914>,
1155                                <&cpg CPG_CORE R8A7795_CLK_CANFD>,
1156                                <&can_clk>;
1157                         clock-names = "fck", "canfd", "can_clk";
1158                         assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
1159                         assigned-clock-rates = <40000000>;
1160                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1161                         resets = <&cpg 914>;
1162                         status = "disabled";
1163
1164                         channel0 {
1165                                 status = "disabled";
1166                         };
1167
1168                         channel1 {
1169                                 status = "disabled";
1170                         };
1171                 };
1172
1173                 pwm0: pwm@e6e30000 {
1174                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1175                         reg = <0 0xe6e30000 0 0x8>;
1176                         clocks = <&cpg CPG_MOD 523>;
1177                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1178                         resets = <&cpg 523>;
1179                         #pwm-cells = <2>;
1180                         status = "disabled";
1181                 };
1182
1183                 pwm1: pwm@e6e31000 {
1184                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1185                         reg = <0 0xe6e31000 0 0x8>;
1186                         clocks = <&cpg CPG_MOD 523>;
1187                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1188                         resets = <&cpg 523>;
1189                         #pwm-cells = <2>;
1190                         status = "disabled";
1191                 };
1192
1193                 pwm2: pwm@e6e32000 {
1194                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1195                         reg = <0 0xe6e32000 0 0x8>;
1196                         clocks = <&cpg CPG_MOD 523>;
1197                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1198                         resets = <&cpg 523>;
1199                         #pwm-cells = <2>;
1200                         status = "disabled";
1201                 };
1202
1203                 pwm3: pwm@e6e33000 {
1204                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1205                         reg = <0 0xe6e33000 0 0x8>;
1206                         clocks = <&cpg CPG_MOD 523>;
1207                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1208                         resets = <&cpg 523>;
1209                         #pwm-cells = <2>;
1210                         status = "disabled";
1211                 };
1212
1213                 pwm4: pwm@e6e34000 {
1214                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1215                         reg = <0 0xe6e34000 0 0x8>;
1216                         clocks = <&cpg CPG_MOD 523>;
1217                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1218                         resets = <&cpg 523>;
1219                         #pwm-cells = <2>;
1220                         status = "disabled";
1221                 };
1222
1223                 pwm5: pwm@e6e35000 {
1224                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1225                         reg = <0 0xe6e35000 0 0x8>;
1226                         clocks = <&cpg CPG_MOD 523>;
1227                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1228                         resets = <&cpg 523>;
1229                         #pwm-cells = <2>;
1230                         status = "disabled";
1231                 };
1232
1233                 pwm6: pwm@e6e36000 {
1234                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1235                         reg = <0 0xe6e36000 0 0x8>;
1236                         clocks = <&cpg CPG_MOD 523>;
1237                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1238                         resets = <&cpg 523>;
1239                         #pwm-cells = <2>;
1240                         status = "disabled";
1241                 };
1242
1243                 scif0: serial@e6e60000 {
1244                         compatible = "renesas,scif-r8a7795",
1245                                      "renesas,rcar-gen3-scif", "renesas,scif";
1246                         reg = <0 0xe6e60000 0 64>;
1247                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
1248                         clocks = <&cpg CPG_MOD 207>,
1249                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1250                                  <&scif_clk>;
1251                         clock-names = "fck", "brg_int", "scif_clk";
1252                         dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1253                                <&dmac2 0x51>, <&dmac2 0x50>;
1254                         dma-names = "tx", "rx", "tx", "rx";
1255                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1256                         resets = <&cpg 207>;
1257                         status = "disabled";
1258                 };
1259
1260                 scif1: serial@e6e68000 {
1261                         compatible = "renesas,scif-r8a7795",
1262                                      "renesas,rcar-gen3-scif", "renesas,scif";
1263                         reg = <0 0xe6e68000 0 64>;
1264                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
1265                         clocks = <&cpg CPG_MOD 206>,
1266                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1267                                  <&scif_clk>;
1268                         clock-names = "fck", "brg_int", "scif_clk";
1269                         dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1270                                <&dmac2 0x53>, <&dmac2 0x52>;
1271                         dma-names = "tx", "rx", "tx", "rx";
1272                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1273                         resets = <&cpg 206>;
1274                         status = "disabled";
1275                 };
1276
1277                 scif2: serial@e6e88000 {
1278                         compatible = "renesas,scif-r8a7795",
1279                                      "renesas,rcar-gen3-scif", "renesas,scif";
1280                         reg = <0 0xe6e88000 0 64>;
1281                         interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
1282                         clocks = <&cpg CPG_MOD 310>,
1283                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1284                                  <&scif_clk>;
1285                         clock-names = "fck", "brg_int", "scif_clk";
1286                         dmas = <&dmac1 0x13>, <&dmac1 0x12>,
1287                                <&dmac2 0x13>, <&dmac2 0x12>;
1288                         dma-names = "tx", "rx", "tx", "rx";
1289                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1290                         resets = <&cpg 310>;
1291                         status = "disabled";
1292                 };
1293
1294                 scif3: serial@e6c50000 {
1295                         compatible = "renesas,scif-r8a7795",
1296                                      "renesas,rcar-gen3-scif", "renesas,scif";
1297                         reg = <0 0xe6c50000 0 64>;
1298                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1299                         clocks = <&cpg CPG_MOD 204>,
1300                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1301                                  <&scif_clk>;
1302                         clock-names = "fck", "brg_int", "scif_clk";
1303                         dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1304                         dma-names = "tx", "rx";
1305                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1306                         resets = <&cpg 204>;
1307                         status = "disabled";
1308                 };
1309
1310                 scif4: serial@e6c40000 {
1311                         compatible = "renesas,scif-r8a7795",
1312                                      "renesas,rcar-gen3-scif", "renesas,scif";
1313                         reg = <0 0xe6c40000 0 64>;
1314                         interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
1315                         clocks = <&cpg CPG_MOD 203>,
1316                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1317                                  <&scif_clk>;
1318                         clock-names = "fck", "brg_int", "scif_clk";
1319                         dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1320                         dma-names = "tx", "rx";
1321                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1322                         resets = <&cpg 203>;
1323                         status = "disabled";
1324                 };
1325
1326                 scif5: serial@e6f30000 {
1327                         compatible = "renesas,scif-r8a7795",
1328                                      "renesas,rcar-gen3-scif", "renesas,scif";
1329                         reg = <0 0xe6f30000 0 64>;
1330                         interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
1331                         clocks = <&cpg CPG_MOD 202>,
1332                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1333                                  <&scif_clk>;
1334                         clock-names = "fck", "brg_int", "scif_clk";
1335                         dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
1336                                <&dmac2 0x5b>, <&dmac2 0x5a>;
1337                         dma-names = "tx", "rx", "tx", "rx";
1338                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1339                         resets = <&cpg 202>;
1340                         status = "disabled";
1341                 };
1342
1343                 msiof0: spi@e6e90000 {
1344                         compatible = "renesas,msiof-r8a7795",
1345                                      "renesas,rcar-gen3-msiof";
1346                         reg = <0 0xe6e90000 0 0x0064>;
1347                         interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1348                         clocks = <&cpg CPG_MOD 211>;
1349                         dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1350                                <&dmac2 0x41>, <&dmac2 0x40>;
1351                         dma-names = "tx", "rx", "tx", "rx";
1352                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1353                         resets = <&cpg 211>;
1354                         #address-cells = <1>;
1355                         #size-cells = <0>;
1356                         status = "disabled";
1357                 };
1358
1359                 msiof1: spi@e6ea0000 {
1360                         compatible = "renesas,msiof-r8a7795",
1361                                      "renesas,rcar-gen3-msiof";
1362                         reg = <0 0xe6ea0000 0 0x0064>;
1363                         interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1364                         clocks = <&cpg CPG_MOD 210>;
1365                         dmas = <&dmac1 0x43>, <&dmac1 0x42>,
1366                                <&dmac2 0x43>, <&dmac2 0x42>;
1367                         dma-names = "tx", "rx", "tx", "rx";
1368                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1369                         resets = <&cpg 210>;
1370                         #address-cells = <1>;
1371                         #size-cells = <0>;
1372                         status = "disabled";
1373                 };
1374
1375                 msiof2: spi@e6c00000 {
1376                         compatible = "renesas,msiof-r8a7795",
1377                                      "renesas,rcar-gen3-msiof";
1378                         reg = <0 0xe6c00000 0 0x0064>;
1379                         interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1380                         clocks = <&cpg CPG_MOD 209>;
1381                         dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1382                         dma-names = "tx", "rx";
1383                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1384                         resets = <&cpg 209>;
1385                         #address-cells = <1>;
1386                         #size-cells = <0>;
1387                         status = "disabled";
1388                 };
1389
1390                 msiof3: spi@e6c10000 {
1391                         compatible = "renesas,msiof-r8a7795",
1392                                      "renesas,rcar-gen3-msiof";
1393                         reg = <0 0xe6c10000 0 0x0064>;
1394                         interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1395                         clocks = <&cpg CPG_MOD 208>;
1396                         dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1397                         dma-names = "tx", "rx";
1398                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1399                         resets = <&cpg 208>;
1400                         #address-cells = <1>;
1401                         #size-cells = <0>;
1402                         status = "disabled";
1403                 };
1404
1405                 vin0: video@e6ef0000 {
1406                         compatible = "renesas,vin-r8a7795";
1407                         reg = <0 0xe6ef0000 0 0x1000>;
1408                         interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1409                         clocks = <&cpg CPG_MOD 811>;
1410                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1411                         resets = <&cpg 811>;
1412                         renesas,id = <0>;
1413                         status = "disabled";
1414
1415                         ports {
1416                                 #address-cells = <1>;
1417                                 #size-cells = <0>;
1418
1419                                 port@1 {
1420                                         #address-cells = <1>;
1421                                         #size-cells = <0>;
1422
1423                                         reg = <1>;
1424
1425                                         vin0csi20: endpoint@0 {
1426                                                 reg = <0>;
1427                                                 remote-endpoint = <&csi20vin0>;
1428                                         };
1429                                         vin0csi40: endpoint@2 {
1430                                                 reg = <2>;
1431                                                 remote-endpoint = <&csi40vin0>;
1432                                         };
1433                                 };
1434                         };
1435                 };
1436
1437                 vin1: video@e6ef1000 {
1438                         compatible = "renesas,vin-r8a7795";
1439                         reg = <0 0xe6ef1000 0 0x1000>;
1440                         interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1441                         clocks = <&cpg CPG_MOD 810>;
1442                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1443                         resets = <&cpg 810>;
1444                         renesas,id = <1>;
1445                         status = "disabled";
1446
1447                         ports {
1448                                 #address-cells = <1>;
1449                                 #size-cells = <0>;
1450
1451                                 port@1 {
1452                                         #address-cells = <1>;
1453                                         #size-cells = <0>;
1454
1455                                         reg = <1>;
1456
1457                                         vin1csi20: endpoint@0 {
1458                                                 reg = <0>;
1459                                                 remote-endpoint = <&csi20vin1>;
1460                                         };
1461                                         vin1csi40: endpoint@2 {
1462                                                 reg = <2>;
1463                                                 remote-endpoint = <&csi40vin1>;
1464                                         };
1465                                 };
1466                         };
1467                 };
1468
1469                 vin2: video@e6ef2000 {
1470                         compatible = "renesas,vin-r8a7795";
1471                         reg = <0 0xe6ef2000 0 0x1000>;
1472                         interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1473                         clocks = <&cpg CPG_MOD 809>;
1474                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1475                         resets = <&cpg 809>;
1476                         renesas,id = <2>;
1477                         status = "disabled";
1478
1479                         ports {
1480                                 #address-cells = <1>;
1481                                 #size-cells = <0>;
1482
1483                                 port@1 {
1484                                         #address-cells = <1>;
1485                                         #size-cells = <0>;
1486
1487                                         reg = <1>;
1488
1489                                         vin2csi20: endpoint@0 {
1490                                                 reg = <0>;
1491                                                 remote-endpoint = <&csi20vin2>;
1492                                         };
1493                                         vin2csi40: endpoint@2 {
1494                                                 reg = <2>;
1495                                                 remote-endpoint = <&csi40vin2>;
1496                                         };
1497                                 };
1498                         };
1499                 };
1500
1501                 vin3: video@e6ef3000 {
1502                         compatible = "renesas,vin-r8a7795";
1503                         reg = <0 0xe6ef3000 0 0x1000>;
1504                         interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
1505                         clocks = <&cpg CPG_MOD 808>;
1506                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1507                         resets = <&cpg 808>;
1508                         renesas,id = <3>;
1509                         status = "disabled";
1510
1511                         ports {
1512                                 #address-cells = <1>;
1513                                 #size-cells = <0>;
1514
1515                                 port@1 {
1516                                         #address-cells = <1>;
1517                                         #size-cells = <0>;
1518
1519                                         reg = <1>;
1520
1521                                         vin3csi20: endpoint@0 {
1522                                                 reg = <0>;
1523                                                 remote-endpoint = <&csi20vin3>;
1524                                         };
1525                                         vin3csi40: endpoint@2 {
1526                                                 reg = <2>;
1527                                                 remote-endpoint = <&csi40vin3>;
1528                                         };
1529                                 };
1530                         };
1531                 };
1532
1533                 vin4: video@e6ef4000 {
1534                         compatible = "renesas,vin-r8a7795";
1535                         reg = <0 0xe6ef4000 0 0x1000>;
1536                         interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
1537                         clocks = <&cpg CPG_MOD 807>;
1538                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1539                         resets = <&cpg 807>;
1540                         renesas,id = <4>;
1541                         status = "disabled";
1542
1543                         ports {
1544                                 #address-cells = <1>;
1545                                 #size-cells = <0>;
1546
1547                                 port@1 {
1548                                         #address-cells = <1>;
1549                                         #size-cells = <0>;
1550
1551                                         reg = <1>;
1552
1553                                         vin4csi20: endpoint@0 {
1554                                                 reg = <0>;
1555                                                 remote-endpoint = <&csi20vin4>;
1556                                         };
1557                                         vin4csi41: endpoint@3 {
1558                                                 reg = <3>;
1559                                                 remote-endpoint = <&csi41vin4>;
1560                                         };
1561                                 };
1562                         };
1563                 };
1564
1565                 vin5: video@e6ef5000 {
1566                         compatible = "renesas,vin-r8a7795";
1567                         reg = <0 0xe6ef5000 0 0x1000>;
1568                         interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
1569                         clocks = <&cpg CPG_MOD 806>;
1570                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1571                         resets = <&cpg 806>;
1572                         renesas,id = <5>;
1573                         status = "disabled";
1574
1575                         ports {
1576                                 #address-cells = <1>;
1577                                 #size-cells = <0>;
1578
1579                                 port@1 {
1580                                         #address-cells = <1>;
1581                                         #size-cells = <0>;
1582
1583                                         reg = <1>;
1584
1585                                         vin5csi20: endpoint@0 {
1586                                                 reg = <0>;
1587                                                 remote-endpoint = <&csi20vin5>;
1588                                         };
1589                                         vin5csi41: endpoint@3 {
1590                                                 reg = <3>;
1591                                                 remote-endpoint = <&csi41vin5>;
1592                                         };
1593                                 };
1594                         };
1595                 };
1596
1597                 vin6: video@e6ef6000 {
1598                         compatible = "renesas,vin-r8a7795";
1599                         reg = <0 0xe6ef6000 0 0x1000>;
1600                         interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
1601                         clocks = <&cpg CPG_MOD 805>;
1602                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1603                         resets = <&cpg 805>;
1604                         renesas,id = <6>;
1605                         status = "disabled";
1606
1607                         ports {
1608                                 #address-cells = <1>;
1609                                 #size-cells = <0>;
1610
1611                                 port@1 {
1612                                         #address-cells = <1>;
1613                                         #size-cells = <0>;
1614
1615                                         reg = <1>;
1616
1617                                         vin6csi20: endpoint@0 {
1618                                                 reg = <0>;
1619                                                 remote-endpoint = <&csi20vin6>;
1620                                         };
1621                                         vin6csi41: endpoint@3 {
1622                                                 reg = <3>;
1623                                                 remote-endpoint = <&csi41vin6>;
1624                                         };
1625                                 };
1626                         };
1627                 };
1628
1629                 vin7: video@e6ef7000 {
1630                         compatible = "renesas,vin-r8a7795";
1631                         reg = <0 0xe6ef7000 0 0x1000>;
1632                         interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
1633                         clocks = <&cpg CPG_MOD 804>;
1634                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1635                         resets = <&cpg 804>;
1636                         renesas,id = <7>;
1637                         status = "disabled";
1638
1639                         ports {
1640                                 #address-cells = <1>;
1641                                 #size-cells = <0>;
1642
1643                                 port@1 {
1644                                         #address-cells = <1>;
1645                                         #size-cells = <0>;
1646
1647                                         reg = <1>;
1648
1649                                         vin7csi20: endpoint@0 {
1650                                                 reg = <0>;
1651                                                 remote-endpoint = <&csi20vin7>;
1652                                         };
1653                                         vin7csi41: endpoint@3 {
1654                                                 reg = <3>;
1655                                                 remote-endpoint = <&csi41vin7>;
1656                                         };
1657                                 };
1658                         };
1659                 };
1660
1661                 drif00: rif@e6f40000 {
1662                         compatible = "renesas,r8a7795-drif",
1663                                      "renesas,rcar-gen3-drif";
1664                         reg = <0 0xe6f40000 0 0x64>;
1665                         interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
1666                         clocks = <&cpg CPG_MOD 515>;
1667                         clock-names = "fck";
1668                         dmas = <&dmac1 0x20>, <&dmac2 0x20>;
1669                         dma-names = "rx", "rx";
1670                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1671                         resets = <&cpg 515>;
1672                         renesas,bonding = <&drif01>;
1673                         status = "disabled";
1674                 };
1675
1676                 drif01: rif@e6f50000 {
1677                         compatible = "renesas,r8a7795-drif",
1678                                      "renesas,rcar-gen3-drif";
1679                         reg = <0 0xe6f50000 0 0x64>;
1680                         interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
1681                         clocks = <&cpg CPG_MOD 514>;
1682                         clock-names = "fck";
1683                         dmas = <&dmac1 0x22>, <&dmac2 0x22>;
1684                         dma-names = "rx", "rx";
1685                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1686                         resets = <&cpg 514>;
1687                         renesas,bonding = <&drif00>;
1688                         status = "disabled";
1689                 };
1690
1691                 drif10: rif@e6f60000 {
1692                         compatible = "renesas,r8a7795-drif",
1693                                      "renesas,rcar-gen3-drif";
1694                         reg = <0 0xe6f60000 0 0x64>;
1695                         interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
1696                         clocks = <&cpg CPG_MOD 513>;
1697                         clock-names = "fck";
1698                         dmas = <&dmac1 0x24>, <&dmac2 0x24>;
1699                         dma-names = "rx", "rx";
1700                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1701                         resets = <&cpg 513>;
1702                         renesas,bonding = <&drif11>;
1703                         status = "disabled";
1704                 };
1705
1706                 drif11: rif@e6f70000 {
1707                         compatible = "renesas,r8a7795-drif",
1708                                      "renesas,rcar-gen3-drif";
1709                         reg = <0 0xe6f70000 0 0x64>;
1710                         interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
1711                         clocks = <&cpg CPG_MOD 512>;
1712                         clock-names = "fck";
1713                         dmas = <&dmac1 0x26>, <&dmac2 0x26>;
1714                         dma-names = "rx", "rx";
1715                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1716                         resets = <&cpg 512>;
1717                         renesas,bonding = <&drif10>;
1718                         status = "disabled";
1719                 };
1720
1721                 drif20: rif@e6f80000 {
1722                         compatible = "renesas,r8a7795-drif",
1723                                      "renesas,rcar-gen3-drif";
1724                         reg = <0 0xe6f80000 0 0x64>;
1725                         interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
1726                         clocks = <&cpg CPG_MOD 511>;
1727                         clock-names = "fck";
1728                         dmas = <&dmac1 0x28>, <&dmac2 0x28>;
1729                         dma-names = "rx", "rx";
1730                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1731                         resets = <&cpg 511>;
1732                         renesas,bonding = <&drif21>;
1733                         status = "disabled";
1734                 };
1735
1736                 drif21: rif@e6f90000 {
1737                         compatible = "renesas,r8a7795-drif",
1738                                      "renesas,rcar-gen3-drif";
1739                         reg = <0 0xe6f90000 0 0x64>;
1740                         interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
1741                         clocks = <&cpg CPG_MOD 510>;
1742                         clock-names = "fck";
1743                         dmas = <&dmac1 0x2a>, <&dmac2 0x2a>;
1744                         dma-names = "rx", "rx";
1745                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1746                         resets = <&cpg 510>;
1747                         renesas,bonding = <&drif20>;
1748                         status = "disabled";
1749                 };
1750
1751                 drif30: rif@e6fa0000 {
1752                         compatible = "renesas,r8a7795-drif",
1753                                      "renesas,rcar-gen3-drif";
1754                         reg = <0 0xe6fa0000 0 0x64>;
1755                         interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
1756                         clocks = <&cpg CPG_MOD 509>;
1757                         clock-names = "fck";
1758                         dmas = <&dmac1 0x2c>, <&dmac2 0x2c>;
1759                         dma-names = "rx", "rx";
1760                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1761                         resets = <&cpg 509>;
1762                         renesas,bonding = <&drif31>;
1763                         status = "disabled";
1764                 };
1765
1766                 drif31: rif@e6fb0000 {
1767                         compatible = "renesas,r8a7795-drif",
1768                                      "renesas,rcar-gen3-drif";
1769                         reg = <0 0xe6fb0000 0 0x64>;
1770                         interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
1771                         clocks = <&cpg CPG_MOD 508>;
1772                         clock-names = "fck";
1773                         dmas = <&dmac1 0x2e>, <&dmac2 0x2e>;
1774                         dma-names = "rx", "rx";
1775                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1776                         resets = <&cpg 508>;
1777                         renesas,bonding = <&drif30>;
1778                         status = "disabled";
1779                 };
1780
1781                 rcar_sound: sound@ec500000 {
1782                         /*
1783                          * #sound-dai-cells is required
1784                          *
1785                          * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1786                          * Multi  DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1787                          */
1788                         /*
1789                          * #clock-cells is required for audio_clkout0/1/2/3
1790                          *
1791                          * clkout       : #clock-cells = <0>;   <&rcar_sound>;
1792                          * clkout0/1/2/3: #clock-cells = <1>;   <&rcar_sound N>;
1793                          */
1794                         compatible =  "renesas,rcar_sound-r8a7795", "renesas,rcar_sound-gen3";
1795                         reg =   <0 0xec500000 0 0x1000>, /* SCU */
1796                                 <0 0xec5a0000 0 0x100>,  /* ADG */
1797                                 <0 0xec540000 0 0x1000>, /* SSIU */
1798                                 <0 0xec541000 0 0x280>,  /* SSI */
1799                                 <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri*/
1800                         reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1801
1802                         clocks = <&cpg CPG_MOD 1005>,
1803                                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1804                                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1805                                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1806                                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1807                                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1808                                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1809                                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1810                                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1811                                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1812                                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1813                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1814                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1815                                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1816                                  <&audio_clk_a>, <&audio_clk_b>,
1817                                  <&audio_clk_c>,
1818                                  <&cpg CPG_CORE R8A7795_CLK_S0D4>;
1819                         clock-names = "ssi-all",
1820                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1821                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1822                                       "ssi.1", "ssi.0",
1823                                       "src.9", "src.8", "src.7", "src.6",
1824                                       "src.5", "src.4", "src.3", "src.2",
1825                                       "src.1", "src.0",
1826                                       "mix.1", "mix.0",
1827                                       "ctu.1", "ctu.0",
1828                                       "dvc.0", "dvc.1",
1829                                       "clk_a", "clk_b", "clk_c", "clk_i";
1830                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1831                         resets = <&cpg 1005>,
1832                                  <&cpg 1006>, <&cpg 1007>,
1833                                  <&cpg 1008>, <&cpg 1009>,
1834                                  <&cpg 1010>, <&cpg 1011>,
1835                                  <&cpg 1012>, <&cpg 1013>,
1836                                  <&cpg 1014>, <&cpg 1015>;
1837                         reset-names = "ssi-all",
1838                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1839                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1840                                       "ssi.1", "ssi.0";
1841                         status = "disabled";
1842
1843                         rcar_sound,dvc {
1844                                 dvc0: dvc-0 {
1845                                         dmas = <&audma1 0xbc>;
1846                                         dma-names = "tx";
1847                                 };
1848                                 dvc1: dvc-1 {
1849                                         dmas = <&audma1 0xbe>;
1850                                         dma-names = "tx";
1851                                 };
1852                         };
1853
1854                         rcar_sound,mix {
1855                                 mix0: mix-0 { };
1856                                 mix1: mix-1 { };
1857                         };
1858
1859                         rcar_sound,ctu {
1860                                 ctu00: ctu-0 { };
1861                                 ctu01: ctu-1 { };
1862                                 ctu02: ctu-2 { };
1863                                 ctu03: ctu-3 { };
1864                                 ctu10: ctu-4 { };
1865                                 ctu11: ctu-5 { };
1866                                 ctu12: ctu-6 { };
1867                                 ctu13: ctu-7 { };
1868                         };
1869
1870                         rcar_sound,src {
1871                                 src0: src-0 {
1872                                         interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1873                                         dmas = <&audma0 0x85>, <&audma1 0x9a>;
1874                                         dma-names = "rx", "tx";
1875                                 };
1876                                 src1: src-1 {
1877                                         interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1878                                         dmas = <&audma0 0x87>, <&audma1 0x9c>;
1879                                         dma-names = "rx", "tx";
1880                                 };
1881                                 src2: src-2 {
1882                                         interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1883                                         dmas = <&audma0 0x89>, <&audma1 0x9e>;
1884                                         dma-names = "rx", "tx";
1885                                 };
1886                                 src3: src-3 {
1887                                         interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1888                                         dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1889                                         dma-names = "rx", "tx";
1890                                 };
1891                                 src4: src-4 {
1892                                         interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1893                                         dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1894                                         dma-names = "rx", "tx";
1895                                 };
1896                                 src5: src-5 {
1897                                         interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1898                                         dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1899                                         dma-names = "rx", "tx";
1900                                 };
1901                                 src6: src-6 {
1902                                         interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1903                                         dmas = <&audma0 0x91>, <&audma1 0xb4>;
1904                                         dma-names = "rx", "tx";
1905                                 };
1906                                 src7: src-7 {
1907                                         interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1908                                         dmas = <&audma0 0x93>, <&audma1 0xb6>;
1909                                         dma-names = "rx", "tx";
1910                                 };
1911                                 src8: src-8 {
1912                                         interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1913                                         dmas = <&audma0 0x95>, <&audma1 0xb8>;
1914                                         dma-names = "rx", "tx";
1915                                 };
1916                                 src9: src-9 {
1917                                         interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1918                                         dmas = <&audma0 0x97>, <&audma1 0xba>;
1919                                         dma-names = "rx", "tx";
1920                                 };
1921                         };
1922
1923                         rcar_sound,ssi {
1924                                 ssi0: ssi-0 {
1925                                         interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1926                                         dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
1927                                         dma-names = "rx", "tx", "rxu", "txu";
1928                                 };
1929                                 ssi1: ssi-1 {
1930                                          interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1931                                         dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
1932                                         dma-names = "rx", "tx", "rxu", "txu";
1933                                 };
1934                                 ssi2: ssi-2 {
1935                                         interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1936                                         dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
1937                                         dma-names = "rx", "tx", "rxu", "txu";
1938                                 };
1939                                 ssi3: ssi-3 {
1940                                         interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1941                                         dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
1942                                         dma-names = "rx", "tx", "rxu", "txu";
1943                                 };
1944                                 ssi4: ssi-4 {
1945                                         interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1946                                         dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
1947                                         dma-names = "rx", "tx", "rxu", "txu";
1948                                 };
1949                                 ssi5: ssi-5 {
1950                                         interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1951                                         dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
1952                                         dma-names = "rx", "tx", "rxu", "txu";
1953                                 };
1954                                 ssi6: ssi-6 {
1955                                         interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1956                                         dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
1957                                         dma-names = "rx", "tx", "rxu", "txu";
1958                                 };
1959                                 ssi7: ssi-7 {
1960                                         interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1961                                         dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
1962                                         dma-names = "rx", "tx", "rxu", "txu";
1963                                 };
1964                                 ssi8: ssi-8 {
1965                                         interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1966                                         dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
1967                                         dma-names = "rx", "tx", "rxu", "txu";
1968                                 };
1969                                 ssi9: ssi-9 {
1970                                         interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1971                                         dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
1972                                         dma-names = "rx", "tx", "rxu", "txu";
1973                                 };
1974                         };
1975
1976                         ports {
1977                                 #address-cells = <1>;
1978                                 #size-cells = <0>;
1979                                 port@0 {
1980                                         reg = <0>;
1981                                 };
1982                                 port@1 {
1983                                         reg = <1>;
1984                                 };
1985                                 port@2 {
1986                                         reg = <2>;
1987                                 };
1988                         };
1989                 };
1990
1991                 audma0: dma-controller@ec700000 {
1992                         compatible = "renesas,dmac-r8a7795",
1993                                      "renesas,rcar-dmac";
1994                         reg = <0 0xec700000 0 0x10000>;
1995                         interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
1996                                       GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
1997                                       GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
1998                                       GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
1999                                       GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
2000                                       GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
2001                                       GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
2002                                       GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
2003                                       GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
2004                                       GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
2005                                       GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
2006                                       GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
2007                                       GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
2008                                       GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
2009                                       GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
2010                                       GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
2011                                       GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
2012                         interrupt-names = "error",
2013                                         "ch0", "ch1", "ch2", "ch3",
2014                                         "ch4", "ch5", "ch6", "ch7",
2015                                         "ch8", "ch9", "ch10", "ch11",
2016                                         "ch12", "ch13", "ch14", "ch15";
2017                         clocks = <&cpg CPG_MOD 502>;
2018                         clock-names = "fck";
2019                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2020                         resets = <&cpg 502>;
2021                         #dma-cells = <1>;
2022                         dma-channels = <16>;
2023                         iommus = <&ipmmu_mp0 0>, <&ipmmu_mp0 1>,
2024                                <&ipmmu_mp0 2>, <&ipmmu_mp0 3>,
2025                                <&ipmmu_mp0 4>, <&ipmmu_mp0 5>,
2026                                <&ipmmu_mp0 6>, <&ipmmu_mp0 7>,
2027                                <&ipmmu_mp0 8>, <&ipmmu_mp0 9>,
2028                                <&ipmmu_mp0 10>, <&ipmmu_mp0 11>,
2029                                <&ipmmu_mp0 12>, <&ipmmu_mp0 13>,
2030                                <&ipmmu_mp0 14>, <&ipmmu_mp0 15>;
2031                 };
2032
2033                 audma1: dma-controller@ec720000 {
2034                         compatible = "renesas,dmac-r8a7795",
2035                                      "renesas,rcar-dmac";
2036                         reg = <0 0xec720000 0 0x10000>;
2037                         interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
2038                                       GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
2039                                       GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
2040                                       GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
2041                                       GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
2042                                       GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
2043                                       GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
2044                                       GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
2045                                       GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
2046                                       GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
2047                                       GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
2048                                       GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
2049                                       GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
2050                                       GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
2051                                       GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
2052                                       GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
2053                                       GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
2054                         interrupt-names = "error",
2055                                         "ch0", "ch1", "ch2", "ch3",
2056                                         "ch4", "ch5", "ch6", "ch7",
2057                                         "ch8", "ch9", "ch10", "ch11",
2058                                         "ch12", "ch13", "ch14", "ch15";
2059                         clocks = <&cpg CPG_MOD 501>;
2060                         clock-names = "fck";
2061                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2062                         resets = <&cpg 501>;
2063                         #dma-cells = <1>;
2064                         dma-channels = <16>;
2065                         iommus = <&ipmmu_mp0 16>, <&ipmmu_mp0 17>,
2066                                <&ipmmu_mp0 18>, <&ipmmu_mp0 19>,
2067                                <&ipmmu_mp0 20>, <&ipmmu_mp0 21>,
2068                                <&ipmmu_mp0 22>, <&ipmmu_mp0 23>,
2069                                <&ipmmu_mp0 24>, <&ipmmu_mp0 25>,
2070                                <&ipmmu_mp0 26>, <&ipmmu_mp0 27>,
2071                                <&ipmmu_mp0 28>, <&ipmmu_mp0 29>,
2072                                <&ipmmu_mp0 30>, <&ipmmu_mp0 31>;
2073                 };
2074
2075                 xhci0: usb@ee000000 {
2076                         compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci";
2077                         reg = <0 0xee000000 0 0xc00>;
2078                         interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
2079                         clocks = <&cpg CPG_MOD 328>;
2080                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2081                         resets = <&cpg 328>;
2082                         status = "disabled";
2083                 };
2084
2085                 usb3_peri0: usb@ee020000 {
2086                         compatible = "renesas,r8a7795-usb3-peri",
2087                                      "renesas,rcar-gen3-usb3-peri";
2088                         reg = <0 0xee020000 0 0x400>;
2089                         interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
2090                         clocks = <&cpg CPG_MOD 328>;
2091                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2092                         resets = <&cpg 328>;
2093                         status = "disabled";
2094                 };
2095
2096                 ohci0: usb@ee080000 {
2097                         compatible = "generic-ohci";
2098                         reg = <0 0xee080000 0 0x100>;
2099                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2100                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2101                         phys = <&usb2_phy0>;
2102                         phy-names = "usb";
2103                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2104                         resets = <&cpg 703>, <&cpg 704>;
2105                         status = "disabled";
2106                 };
2107
2108                 ohci1: usb@ee0a0000 {
2109                         compatible = "generic-ohci";
2110                         reg = <0 0xee0a0000 0 0x100>;
2111                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2112                         clocks = <&cpg CPG_MOD 702>;
2113                         phys = <&usb2_phy1>;
2114                         phy-names = "usb";
2115                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2116                         resets = <&cpg 702>;
2117                         status = "disabled";
2118                 };
2119
2120                 ohci2: usb@ee0c0000 {
2121                         compatible = "generic-ohci";
2122                         reg = <0 0xee0c0000 0 0x100>;
2123                         interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
2124                         clocks = <&cpg CPG_MOD 701>;
2125                         phys = <&usb2_phy2>;
2126                         phy-names = "usb";
2127                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2128                         resets = <&cpg 701>;
2129                         status = "disabled";
2130                 };
2131
2132                 ohci3: usb@ee0e0000 {
2133                         compatible = "generic-ohci";
2134                         reg = <0 0xee0e0000 0 0x100>;
2135                         interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
2136                         clocks = <&cpg CPG_MOD 700>, <&cpg CPG_MOD 705>;
2137                         phys = <&usb2_phy3>;
2138                         phy-names = "usb";
2139                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2140                         resets = <&cpg 700>, <&cpg 705>;
2141                         status = "disabled";
2142                 };
2143
2144                 ehci0: usb@ee080100 {
2145                         compatible = "generic-ehci";
2146                         reg = <0 0xee080100 0 0x100>;
2147                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2148                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2149                         phys = <&usb2_phy0>;
2150                         phy-names = "usb";
2151                         companion = <&ohci0>;
2152                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2153                         resets = <&cpg 703>, <&cpg 704>;
2154                         status = "disabled";
2155                 };
2156
2157                 ehci1: usb@ee0a0100 {
2158                         compatible = "generic-ehci";
2159                         reg = <0 0xee0a0100 0 0x100>;
2160                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2161                         clocks = <&cpg CPG_MOD 702>;
2162                         phys = <&usb2_phy1>;
2163                         phy-names = "usb";
2164                         companion = <&ohci1>;
2165                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2166                         resets = <&cpg 702>;
2167                         status = "disabled";
2168                 };
2169
2170                 ehci2: usb@ee0c0100 {
2171                         compatible = "generic-ehci";
2172                         reg = <0 0xee0c0100 0 0x100>;
2173                         interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
2174                         clocks = <&cpg CPG_MOD 701>;
2175                         phys = <&usb2_phy2>;
2176                         phy-names = "usb";
2177                         companion = <&ohci2>;
2178                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2179                         resets = <&cpg 701>;
2180                         status = "disabled";
2181                 };
2182
2183                 ehci3: usb@ee0e0100 {
2184                         compatible = "generic-ehci";
2185                         reg = <0 0xee0e0100 0 0x100>;
2186                         interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
2187                         clocks = <&cpg CPG_MOD 700>, <&cpg CPG_MOD 705>;
2188                         phys = <&usb2_phy3>;
2189                         phy-names = "usb";
2190                         companion = <&ohci3>;
2191                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2192                         resets = <&cpg 700>, <&cpg 705>;
2193                         status = "disabled";
2194                 };
2195
2196                 usb2_phy0: usb-phy@ee080200 {
2197                         compatible = "renesas,usb2-phy-r8a7795",
2198                                      "renesas,rcar-gen3-usb2-phy";
2199                         reg = <0 0xee080200 0 0x700>;
2200                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2201                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2202                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2203                         resets = <&cpg 703>, <&cpg 704>;
2204                         #phy-cells = <0>;
2205                         status = "disabled";
2206                 };
2207
2208                 usb2_phy1: usb-phy@ee0a0200 {
2209                         compatible = "renesas,usb2-phy-r8a7795",
2210                                      "renesas,rcar-gen3-usb2-phy";
2211                         reg = <0 0xee0a0200 0 0x700>;
2212                         clocks = <&cpg CPG_MOD 702>;
2213                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2214                         resets = <&cpg 702>;
2215                         #phy-cells = <0>;
2216                         status = "disabled";
2217                 };
2218
2219                 usb2_phy2: usb-phy@ee0c0200 {
2220                         compatible = "renesas,usb2-phy-r8a7795",
2221                                      "renesas,rcar-gen3-usb2-phy";
2222                         reg = <0 0xee0c0200 0 0x700>;
2223                         clocks = <&cpg CPG_MOD 701>;
2224                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2225                         resets = <&cpg 701>;
2226                         #phy-cells = <0>;
2227                         status = "disabled";
2228                 };
2229
2230                 usb2_phy3: usb-phy@ee0e0200 {
2231                         compatible = "renesas,usb2-phy-r8a7795",
2232                                      "renesas,rcar-gen3-usb2-phy";
2233                         reg = <0 0xee0e0200 0 0x700>;
2234                         interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
2235                         clocks = <&cpg CPG_MOD 700>, <&cpg CPG_MOD 705>;
2236                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2237                         resets = <&cpg 700>, <&cpg 705>;
2238                         #phy-cells = <0>;
2239                         status = "disabled";
2240                 };
2241
2242                 sdhi0: sd@ee100000 {
2243                         compatible = "renesas,sdhi-r8a7795",
2244                                      "renesas,rcar-gen3-sdhi";
2245                         reg = <0 0xee100000 0 0x2000>;
2246                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
2247                         clocks = <&cpg CPG_MOD 314>;
2248                         max-frequency = <200000000>;
2249                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2250                         resets = <&cpg 314>;
2251                         status = "disabled";
2252                 };
2253
2254                 sdhi1: sd@ee120000 {
2255                         compatible = "renesas,sdhi-r8a7795",
2256                                      "renesas,rcar-gen3-sdhi";
2257                         reg = <0 0xee120000 0 0x2000>;
2258                         interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
2259                         clocks = <&cpg CPG_MOD 313>;
2260                         max-frequency = <200000000>;
2261                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2262                         resets = <&cpg 313>;
2263                         status = "disabled";
2264                 };
2265
2266                 sdhi2: sd@ee140000 {
2267                         compatible = "renesas,sdhi-r8a7795",
2268                                      "renesas,rcar-gen3-sdhi";
2269                         reg = <0 0xee140000 0 0x2000>;
2270                         interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
2271                         clocks = <&cpg CPG_MOD 312>;
2272                         max-frequency = <200000000>;
2273                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2274                         resets = <&cpg 312>;
2275                         status = "disabled";
2276                 };
2277
2278                 sdhi3: sd@ee160000 {
2279                         compatible = "renesas,sdhi-r8a7795",
2280                                      "renesas,rcar-gen3-sdhi";
2281                         reg = <0 0xee160000 0 0x2000>;
2282                         interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
2283                         clocks = <&cpg CPG_MOD 311>;
2284                         max-frequency = <200000000>;
2285                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2286                         resets = <&cpg 311>;
2287                         status = "disabled";
2288                 };
2289
2290                 sata: sata@ee300000 {
2291                         compatible = "renesas,sata-r8a7795",
2292                                      "renesas,rcar-gen3-sata";
2293                         reg = <0 0xee300000 0 0x200000>;
2294                         interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
2295                         clocks = <&cpg CPG_MOD 815>;
2296                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2297                         resets = <&cpg 815>;
2298                         status = "disabled";
2299                         iommus = <&ipmmu_hc 2>;
2300                 };
2301
2302                 gic: interrupt-controller@f1010000 {
2303                         compatible = "arm,gic-400";
2304                         #interrupt-cells = <3>;
2305                         #address-cells = <0>;
2306                         interrupt-controller;
2307                         reg = <0x0 0xf1010000 0 0x1000>,
2308                               <0x0 0xf1020000 0 0x20000>,
2309                               <0x0 0xf1040000 0 0x20000>,
2310                               <0x0 0xf1060000 0 0x20000>;
2311                         interrupts = <GIC_PPI 9
2312                                         (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
2313                         clocks = <&cpg CPG_MOD 408>;
2314                         clock-names = "clk";
2315                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2316                         resets = <&cpg 408>;
2317                 };
2318
2319                 pciec0: pcie@fe000000 {
2320                         compatible = "renesas,pcie-r8a7795",
2321                                      "renesas,pcie-rcar-gen3";
2322                         reg = <0 0xfe000000 0 0x80000>;
2323                         #address-cells = <3>;
2324                         #size-cells = <2>;
2325                         bus-range = <0x00 0xff>;
2326                         device_type = "pci";
2327                         ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
2328                                 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
2329                                 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
2330                                 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
2331                         /* Map all possible DDR as inbound ranges */
2332                         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
2333                         interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
2334                                 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
2335                                 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
2336                         #interrupt-cells = <1>;
2337                         interrupt-map-mask = <0 0 0 0>;
2338                         interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
2339                         clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
2340                         clock-names = "pcie", "pcie_bus";
2341                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2342                         resets = <&cpg 319>;
2343                         status = "disabled";
2344                 };
2345
2346                 pciec1: pcie@ee800000 {
2347                         compatible = "renesas,pcie-r8a7795",
2348                                      "renesas,pcie-rcar-gen3";
2349                         reg = <0 0xee800000 0 0x80000>;
2350                         #address-cells = <3>;
2351                         #size-cells = <2>;
2352                         bus-range = <0x00 0xff>;
2353                         device_type = "pci";
2354                         ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000
2355                                 0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000
2356                                 0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000
2357                                 0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
2358                         /* Map all possible DDR as inbound ranges */
2359                         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
2360                         interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
2361                                 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
2362                                 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
2363                         #interrupt-cells = <1>;
2364                         interrupt-map-mask = <0 0 0 0>;
2365                         interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
2366                         clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
2367                         clock-names = "pcie", "pcie_bus";
2368                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2369                         resets = <&cpg 318>;
2370                         status = "disabled";
2371                 };
2372
2373                 imr-lx4@fe860000 {
2374                         compatible = "renesas,r8a7795-imr-lx4",
2375                                      "renesas,imr-lx4";
2376                         reg = <0 0xfe860000 0 0x2000>;
2377                         interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
2378                         clocks = <&cpg CPG_MOD 823>;
2379                         power-domains = <&sysc R8A7795_PD_A3VC>;
2380                         resets = <&cpg 823>;
2381                 };
2382
2383                 imr-lx4@fe870000 {
2384                         compatible = "renesas,r8a7795-imr-lx4",
2385                                      "renesas,imr-lx4";
2386                         reg = <0 0xfe870000 0 0x2000>;
2387                         interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
2388                         clocks = <&cpg CPG_MOD 822>;
2389                         power-domains = <&sysc R8A7795_PD_A3VC>;
2390                         resets = <&cpg 822>;
2391                 };
2392
2393                 imr-lx4@fe880000 {
2394                         compatible = "renesas,r8a7795-imr-lx4",
2395                                      "renesas,imr-lx4";
2396                         reg = <0 0xfe880000 0 0x2000>;
2397                         interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>;
2398                         clocks = <&cpg CPG_MOD 821>;
2399                         power-domains = <&sysc R8A7795_PD_A3VC>;
2400                         resets = <&cpg 821>;
2401                 };
2402
2403                 imr-lx4@fe890000 {
2404                         compatible = "renesas,r8a7795-imr-lx4",
2405                                      "renesas,imr-lx4";
2406                         reg = <0 0xfe890000 0 0x2000>;
2407                         interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>;
2408                         clocks = <&cpg CPG_MOD 820>;
2409                         power-domains = <&sysc R8A7795_PD_A3VC>;
2410                         resets = <&cpg 820>;
2411                 };
2412
2413                 fdp1@fe940000 {
2414                         compatible = "renesas,fdp1";
2415                         reg = <0 0xfe940000 0 0x2400>;
2416                         interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
2417                         clocks = <&cpg CPG_MOD 119>;
2418                         power-domains = <&sysc R8A7795_PD_A3VP>;
2419                         resets = <&cpg 119>;
2420                         renesas,fcp = <&fcpf0>;
2421                 };
2422
2423                 fdp1@fe944000 {
2424                         compatible = "renesas,fdp1";
2425                         reg = <0 0xfe944000 0 0x2400>;
2426                         interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
2427                         clocks = <&cpg CPG_MOD 118>;
2428                         power-domains = <&sysc R8A7795_PD_A3VP>;
2429                         resets = <&cpg 118>;
2430                         renesas,fcp = <&fcpf1>;
2431                 };
2432
2433                 fcpf0: fcp@fe950000 {
2434                         compatible = "renesas,fcpf";
2435                         reg = <0 0xfe950000 0 0x200>;
2436                         clocks = <&cpg CPG_MOD 615>;
2437                         power-domains = <&sysc R8A7795_PD_A3VP>;
2438                         resets = <&cpg 615>;
2439                         iommus = <&ipmmu_vp0 0>;
2440                 };
2441
2442                 fcpf1: fcp@fe951000 {
2443                         compatible = "renesas,fcpf";
2444                         reg = <0 0xfe951000 0 0x200>;
2445                         clocks = <&cpg CPG_MOD 614>;
2446                         power-domains = <&sysc R8A7795_PD_A3VP>;
2447                         resets = <&cpg 614>;
2448                         iommus = <&ipmmu_vp1 1>;
2449                 };
2450
2451                 fcpvb0: fcp@fe96f000 {
2452                         compatible = "renesas,fcpv";
2453                         reg = <0 0xfe96f000 0 0x200>;
2454                         clocks = <&cpg CPG_MOD 607>;
2455                         power-domains = <&sysc R8A7795_PD_A3VP>;
2456                         resets = <&cpg 607>;
2457                         iommus = <&ipmmu_vp0 5>;
2458                 };
2459
2460                 fcpvb1: fcp@fe92f000 {
2461                         compatible = "renesas,fcpv";
2462                         reg = <0 0xfe92f000 0 0x200>;
2463                         clocks = <&cpg CPG_MOD 606>;
2464                         power-domains = <&sysc R8A7795_PD_A3VP>;
2465                         resets = <&cpg 606>;
2466                         iommus = <&ipmmu_vp1 7>;
2467                 };
2468
2469                 fcpvi0: fcp@fe9af000 {
2470                         compatible = "renesas,fcpv";
2471                         reg = <0 0xfe9af000 0 0x200>;
2472                         clocks = <&cpg CPG_MOD 611>;
2473                         power-domains = <&sysc R8A7795_PD_A3VP>;
2474                         resets = <&cpg 611>;
2475                         iommus = <&ipmmu_vp0 8>;
2476                 };
2477
2478                 fcpvi1: fcp@fe9bf000 {
2479                         compatible = "renesas,fcpv";
2480                         reg = <0 0xfe9bf000 0 0x200>;
2481                         clocks = <&cpg CPG_MOD 610>;
2482                         power-domains = <&sysc R8A7795_PD_A3VP>;
2483                         resets = <&cpg 610>;
2484                         iommus = <&ipmmu_vp1 9>;
2485                 };
2486
2487                 fcpvd0: fcp@fea27000 {
2488                         compatible = "renesas,fcpv";
2489                         reg = <0 0xfea27000 0 0x200>;
2490                         clocks = <&cpg CPG_MOD 603>;
2491                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2492                         resets = <&cpg 603>;
2493                         iommus = <&ipmmu_vi0 8>;
2494                 };
2495
2496                 fcpvd1: fcp@fea2f000 {
2497                         compatible = "renesas,fcpv";
2498                         reg = <0 0xfea2f000 0 0x200>;
2499                         clocks = <&cpg CPG_MOD 602>;
2500                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2501                         resets = <&cpg 602>;
2502                         iommus = <&ipmmu_vi0 9>;
2503                 };
2504
2505                 fcpvd2: fcp@fea37000 {
2506                         compatible = "renesas,fcpv";
2507                         reg = <0 0xfea37000 0 0x200>;
2508                         clocks = <&cpg CPG_MOD 601>;
2509                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2510                         resets = <&cpg 601>;
2511                         iommus = <&ipmmu_vi1 10>;
2512                 };