c4a1eadb093f3dd151681435174dc7d2995a4e81
[muen/linux.git] / drivers / base / regmap / regmap-irq.c
1 /*
2  * regmap based irq_chip
3  *
4  * Copyright 2011 Wolfson Microelectronics plc
5  *
6  * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2 as
10  * published by the Free Software Foundation.
11  */
12
13 #include <linux/device.h>
14 #include <linux/export.h>
15 #include <linux/interrupt.h>
16 #include <linux/irq.h>
17 #include <linux/irqdomain.h>
18 #include <linux/pm_runtime.h>
19 #include <linux/regmap.h>
20 #include <linux/slab.h>
21
22 #include "internal.h"
23
24 struct regmap_irq_chip_data {
25         struct mutex lock;
26         struct irq_chip irq_chip;
27
28         struct regmap *map;
29         const struct regmap_irq_chip *chip;
30
31         int irq_base;
32         struct irq_domain *domain;
33
34         int irq;
35         int wake_count;
36
37         void *status_reg_buf;
38         unsigned int *status_buf;
39         unsigned int *mask_buf;
40         unsigned int *mask_buf_def;
41         unsigned int *wake_buf;
42         unsigned int *type_buf;
43         unsigned int *type_buf_def;
44
45         unsigned int irq_reg_stride;
46         unsigned int type_reg_stride;
47 };
48
49 static inline const
50 struct regmap_irq *irq_to_regmap_irq(struct regmap_irq_chip_data *data,
51                                      int irq)
52 {
53         return &data->chip->irqs[irq];
54 }
55
56 static void regmap_irq_lock(struct irq_data *data)
57 {
58         struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data);
59
60         mutex_lock(&d->lock);
61 }
62
63 static void regmap_irq_sync_unlock(struct irq_data *data)
64 {
65         struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data);
66         struct regmap *map = d->map;
67         int i, ret;
68         u32 reg;
69         u32 unmask_offset;
70
71         if (d->chip->runtime_pm) {
72                 ret = pm_runtime_get_sync(map->dev);
73                 if (ret < 0)
74                         dev_err(map->dev, "IRQ sync failed to resume: %d\n",
75                                 ret);
76         }
77
78         /*
79          * If there's been a change in the mask write it back to the
80          * hardware.  We rely on the use of the regmap core cache to
81          * suppress pointless writes.
82          */
83         for (i = 0; i < d->chip->num_regs; i++) {
84                 reg = d->chip->mask_base +
85                         (i * map->reg_stride * d->irq_reg_stride);
86                 if (d->chip->mask_invert) {
87                         ret = regmap_update_bits(d->map, reg,
88                                          d->mask_buf_def[i], ~d->mask_buf[i]);
89                 } else if (d->chip->unmask_base) {
90                         /* set mask with mask_base register */
91                         ret = regmap_update_bits(d->map, reg,
92                                         d->mask_buf_def[i], ~d->mask_buf[i]);
93                         if (ret < 0)
94                                 dev_err(d->map->dev,
95                                         "Failed to sync unmasks in %x\n",
96                                         reg);
97                         unmask_offset = d->chip->unmask_base -
98                                                         d->chip->mask_base;
99                         /* clear mask with unmask_base register */
100                         ret = regmap_update_bits(d->map,
101                                         reg + unmask_offset,
102                                         d->mask_buf_def[i],
103                                         d->mask_buf[i]);
104                 } else {
105                         ret = regmap_update_bits(d->map, reg,
106                                          d->mask_buf_def[i], d->mask_buf[i]);
107                 }
108                 if (ret != 0)
109                         dev_err(d->map->dev, "Failed to sync masks in %x\n",
110                                 reg);
111
112                 reg = d->chip->wake_base +
113                         (i * map->reg_stride * d->irq_reg_stride);
114                 if (d->wake_buf) {
115                         if (d->chip->wake_invert)
116                                 ret = regmap_update_bits(d->map, reg,
117                                                          d->mask_buf_def[i],
118                                                          ~d->wake_buf[i]);
119                         else
120                                 ret = regmap_update_bits(d->map, reg,
121                                                          d->mask_buf_def[i],
122                                                          d->wake_buf[i]);
123                         if (ret != 0)
124                                 dev_err(d->map->dev,
125                                         "Failed to sync wakes in %x: %d\n",
126                                         reg, ret);
127                 }
128
129                 if (!d->chip->init_ack_masked)
130                         continue;
131                 /*
132                  * Ack all the masked interrupts unconditionally,
133                  * OR if there is masked interrupt which hasn't been Acked,
134                  * it'll be ignored in irq handler, then may introduce irq storm
135                  */
136                 if (d->mask_buf[i] && (d->chip->ack_base || d->chip->use_ack)) {
137                         reg = d->chip->ack_base +
138                                 (i * map->reg_stride * d->irq_reg_stride);
139                         /* some chips ack by write 0 */
140                         if (d->chip->ack_invert)
141                                 ret = regmap_write(map, reg, ~d->mask_buf[i]);
142                         else
143                                 ret = regmap_write(map, reg, d->mask_buf[i]);
144                         if (ret != 0)
145                                 dev_err(d->map->dev, "Failed to ack 0x%x: %d\n",
146                                         reg, ret);
147                 }
148         }
149
150         for (i = 0; i < d->chip->num_type_reg; i++) {
151                 if (!d->type_buf_def[i])
152                         continue;
153                 reg = d->chip->type_base +
154                         (i * map->reg_stride * d->type_reg_stride);
155                 if (d->chip->type_invert)
156                         ret = regmap_update_bits(d->map, reg,
157                                 d->type_buf_def[i], ~d->type_buf[i]);
158                 else
159                         ret = regmap_update_bits(d->map, reg,
160                                 d->type_buf_def[i], d->type_buf[i]);
161                 if (ret != 0)
162                         dev_err(d->map->dev, "Failed to sync type in %x\n",
163                                 reg);
164         }
165
166         if (d->chip->runtime_pm)
167                 pm_runtime_put(map->dev);
168
169         /* If we've changed our wakeup count propagate it to the parent */
170         if (d->wake_count < 0)
171                 for (i = d->wake_count; i < 0; i++)
172                         irq_set_irq_wake(d->irq, 0);
173         else if (d->wake_count > 0)
174                 for (i = 0; i < d->wake_count; i++)
175                         irq_set_irq_wake(d->irq, 1);
176
177         d->wake_count = 0;
178
179         mutex_unlock(&d->lock);
180 }
181
182 static void regmap_irq_enable(struct irq_data *data)
183 {
184         struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data);
185         struct regmap *map = d->map;
186         const struct regmap_irq *irq_data = irq_to_regmap_irq(d, data->hwirq);
187
188         d->mask_buf[irq_data->reg_offset / map->reg_stride] &= ~irq_data->mask;
189 }
190
191 static void regmap_irq_disable(struct irq_data *data)
192 {
193         struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data);
194         struct regmap *map = d->map;
195         const struct regmap_irq *irq_data = irq_to_regmap_irq(d, data->hwirq);
196
197         d->mask_buf[irq_data->reg_offset / map->reg_stride] |= irq_data->mask;
198 }
199
200 static int regmap_irq_set_type(struct irq_data *data, unsigned int type)
201 {
202         struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data);
203         struct regmap *map = d->map;
204         const struct regmap_irq *irq_data = irq_to_regmap_irq(d, data->hwirq);
205         int reg = irq_data->type_reg_offset / map->reg_stride;
206
207         if (!(irq_data->type_rising_mask | irq_data->type_falling_mask))
208                 return 0;
209
210         d->type_buf[reg] &= ~(irq_data->type_falling_mask |
211                                         irq_data->type_rising_mask);
212         switch (type) {
213         case IRQ_TYPE_EDGE_FALLING:
214                 d->type_buf[reg] |= irq_data->type_falling_mask;
215                 break;
216
217         case IRQ_TYPE_EDGE_RISING:
218                 d->type_buf[reg] |= irq_data->type_rising_mask;
219                 break;
220
221         case IRQ_TYPE_EDGE_BOTH:
222                 d->type_buf[reg] |= (irq_data->type_falling_mask |
223                                         irq_data->type_rising_mask);
224                 break;
225
226         default:
227                 return -EINVAL;
228         }
229         return 0;
230 }
231
232 static int regmap_irq_set_wake(struct irq_data *data, unsigned int on)
233 {
234         struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data);
235         struct regmap *map = d->map;
236         const struct regmap_irq *irq_data = irq_to_regmap_irq(d, data->hwirq);
237
238         if (on) {
239                 if (d->wake_buf)
240                         d->wake_buf[irq_data->reg_offset / map->reg_stride]
241                                 &= ~irq_data->mask;
242                 d->wake_count++;
243         } else {
244                 if (d->wake_buf)
245                         d->wake_buf[irq_data->reg_offset / map->reg_stride]
246                                 |= irq_data->mask;
247                 d->wake_count--;
248         }
249
250         return 0;
251 }
252
253 static const struct irq_chip regmap_irq_chip = {
254         .irq_bus_lock           = regmap_irq_lock,
255         .irq_bus_sync_unlock    = regmap_irq_sync_unlock,
256         .irq_disable            = regmap_irq_disable,
257         .irq_enable             = regmap_irq_enable,
258         .irq_set_type           = regmap_irq_set_type,
259         .irq_set_wake           = regmap_irq_set_wake,
260 };
261
262 static irqreturn_t regmap_irq_thread(int irq, void *d)
263 {
264         struct regmap_irq_chip_data *data = d;
265         const struct regmap_irq_chip *chip = data->chip;
266         struct regmap *map = data->map;
267         int ret, i;
268         bool handled = false;
269         u32 reg;
270
271         if (chip->handle_pre_irq)
272                 chip->handle_pre_irq(chip->irq_drv_data);
273
274         if (chip->runtime_pm) {
275                 ret = pm_runtime_get_sync(map->dev);
276                 if (ret < 0) {
277                         dev_err(map->dev, "IRQ thread failed to resume: %d\n",
278                                 ret);
279                         pm_runtime_put(map->dev);
280                         goto exit;
281                 }
282         }
283
284         /*
285          * Read in the statuses, using a single bulk read if possible
286          * in order to reduce the I/O overheads.
287          */
288         if (!map->use_single_read && map->reg_stride == 1 &&
289             data->irq_reg_stride == 1) {
290                 u8 *buf8 = data->status_reg_buf;
291                 u16 *buf16 = data->status_reg_buf;
292                 u32 *buf32 = data->status_reg_buf;
293
294                 BUG_ON(!data->status_reg_buf);
295
296                 ret = regmap_bulk_read(map, chip->status_base,
297                                        data->status_reg_buf,
298                                        chip->num_regs);
299                 if (ret != 0) {
300                         dev_err(map->dev, "Failed to read IRQ status: %d\n",
301                                 ret);
302                         goto exit;
303                 }
304
305                 for (i = 0; i < data->chip->num_regs; i++) {
306                         switch (map->format.val_bytes) {
307                         case 1:
308                                 data->status_buf[i] = buf8[i];
309                                 break;
310                         case 2:
311                                 data->status_buf[i] = buf16[i];
312                                 break;
313                         case 4:
314                                 data->status_buf[i] = buf32[i];
315                                 break;
316                         default:
317                                 BUG();
318                                 goto exit;
319                         }
320                 }
321
322         } else {
323                 for (i = 0; i < data->chip->num_regs; i++) {
324                         ret = regmap_read(map, chip->status_base +
325                                           (i * map->reg_stride
326                                            * data->irq_reg_stride),
327                                           &data->status_buf[i]);
328
329                         if (ret != 0) {
330                                 dev_err(map->dev,
331                                         "Failed to read IRQ status: %d\n",
332                                         ret);
333                                 if (chip->runtime_pm)
334                                         pm_runtime_put(map->dev);
335                                 goto exit;
336                         }
337                 }
338         }
339
340         /*
341          * Ignore masked IRQs and ack if we need to; we ack early so
342          * there is no race between handling and acknowleding the
343          * interrupt.  We assume that typically few of the interrupts
344          * will fire simultaneously so don't worry about overhead from
345          * doing a write per register.
346          */
347         for (i = 0; i < data->chip->num_regs; i++) {
348                 data->status_buf[i] &= ~data->mask_buf[i];
349
350                 if (data->status_buf[i] && (chip->ack_base || chip->use_ack)) {
351                         reg = chip->ack_base +
352                                 (i * map->reg_stride * data->irq_reg_stride);
353                         ret = regmap_write(map, reg, data->status_buf[i]);
354                         if (ret != 0)
355                                 dev_err(map->dev, "Failed to ack 0x%x: %d\n",
356                                         reg, ret);
357                 }
358         }
359
360         for (i = 0; i < chip->num_irqs; i++) {
361                 if (data->status_buf[chip->irqs[i].reg_offset /
362                                      map->reg_stride] & chip->irqs[i].mask) {
363                         handle_nested_irq(irq_find_mapping(data->domain, i));
364                         handled = true;
365                 }
366         }
367
368         if (chip->runtime_pm)
369                 pm_runtime_put(map->dev);
370
371 exit:
372         if (chip->handle_post_irq)
373                 chip->handle_post_irq(chip->irq_drv_data);
374
375         if (handled)
376                 return IRQ_HANDLED;
377         else
378                 return IRQ_NONE;
379 }
380
381 static int regmap_irq_map(struct irq_domain *h, unsigned int virq,
382                           irq_hw_number_t hw)
383 {
384         struct regmap_irq_chip_data *data = h->host_data;
385
386         irq_set_chip_data(virq, data);
387         irq_set_chip(virq, &data->irq_chip);
388         irq_set_nested_thread(virq, 1);
389         irq_set_parent(virq, data->irq);
390         irq_set_noprobe(virq);
391
392         return 0;
393 }
394
395 static const struct irq_domain_ops regmap_domain_ops = {
396         .map    = regmap_irq_map,
397         .xlate  = irq_domain_xlate_onetwocell,
398 };
399
400 /**
401  * regmap_add_irq_chip() - Use standard regmap IRQ controller handling
402  *
403  * @map: The regmap for the device.
404  * @irq: The IRQ the device uses to signal interrupts.
405  * @irq_flags: The IRQF_ flags to use for the primary interrupt.
406  * @irq_base: Allocate at specific IRQ number if irq_base > 0.
407  * @chip: Configuration for the interrupt controller.
408  * @data: Runtime data structure for the controller, allocated on success.
409  *
410  * Returns 0 on success or an errno on failure.
411  *
412  * In order for this to be efficient the chip really should use a
413  * register cache.  The chip driver is responsible for restoring the
414  * register values used by the IRQ controller over suspend and resume.
415  */
416 int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags,
417                         int irq_base, const struct regmap_irq_chip *chip,
418                         struct regmap_irq_chip_data **data)
419 {
420         struct regmap_irq_chip_data *d;
421         int i;
422         int ret = -ENOMEM;
423         u32 reg;
424         u32 unmask_offset;
425
426         if (chip->num_regs <= 0)
427                 return -EINVAL;
428
429         for (i = 0; i < chip->num_irqs; i++) {
430                 if (chip->irqs[i].reg_offset % map->reg_stride)
431                         return -EINVAL;
432                 if (chip->irqs[i].reg_offset / map->reg_stride >=
433                     chip->num_regs)
434                         return -EINVAL;
435         }
436
437         if (irq_base) {
438                 irq_base = irq_alloc_descs(irq_base, 0, chip->num_irqs, 0);
439                 if (irq_base < 0) {
440                         dev_warn(map->dev, "Failed to allocate IRQs: %d\n",
441                                  irq_base);
442                         return irq_base;
443                 }
444         }
445
446         d = kzalloc(sizeof(*d), GFP_KERNEL);
447         if (!d)
448                 return -ENOMEM;
449
450         d->status_buf = kcalloc(chip->num_regs, sizeof(unsigned int),
451                                 GFP_KERNEL);
452         if (!d->status_buf)
453                 goto err_alloc;
454
455         d->mask_buf = kcalloc(chip->num_regs, sizeof(unsigned int),
456                               GFP_KERNEL);
457         if (!d->mask_buf)
458                 goto err_alloc;
459
460         d->mask_buf_def = kcalloc(chip->num_regs, sizeof(unsigned int),
461                                   GFP_KERNEL);
462         if (!d->mask_buf_def)
463                 goto err_alloc;
464
465         if (chip->wake_base) {
466                 d->wake_buf = kcalloc(chip->num_regs, sizeof(unsigned int),
467                                       GFP_KERNEL);
468                 if (!d->wake_buf)
469                         goto err_alloc;
470         }
471
472         if (chip->num_type_reg) {
473                 d->type_buf_def = kcalloc(chip->num_type_reg,
474                                         sizeof(unsigned int), GFP_KERNEL);
475                 if (!d->type_buf_def)
476                         goto err_alloc;
477
478                 d->type_buf = kcalloc(chip->num_type_reg, sizeof(unsigned int),
479                                       GFP_KERNEL);
480                 if (!d->type_buf)
481                         goto err_alloc;
482         }
483
484         d->irq_chip = regmap_irq_chip;
485         d->irq_chip.name = chip->name;
486         d->irq = irq;
487         d->map = map;
488         d->chip = chip;
489         d->irq_base = irq_base;
490
491         if (chip->irq_reg_stride)
492                 d->irq_reg_stride = chip->irq_reg_stride;
493         else
494                 d->irq_reg_stride = 1;
495
496         if (chip->type_reg_stride)
497                 d->type_reg_stride = chip->type_reg_stride;
498         else
499                 d->type_reg_stride = 1;
500
501         if (!map->use_single_read && map->reg_stride == 1 &&
502             d->irq_reg_stride == 1) {
503                 d->status_reg_buf = kmalloc_array(chip->num_regs,
504                                                   map->format.val_bytes,
505                                                   GFP_KERNEL);
506                 if (!d->status_reg_buf)
507                         goto err_alloc;
508         }
509
510         mutex_init(&d->lock);
511
512         for (i = 0; i < chip->num_irqs; i++)
513                 d->mask_buf_def[chip->irqs[i].reg_offset / map->reg_stride]
514                         |= chip->irqs[i].mask;
515
516         /* Mask all the interrupts by default */
517         for (i = 0; i < chip->num_regs; i++) {
518                 d->mask_buf[i] = d->mask_buf_def[i];
519                 reg = chip->mask_base +
520                         (i * map->reg_stride * d->irq_reg_stride);
521                 if (chip->mask_invert)
522                         ret = regmap_update_bits(map, reg,
523                                          d->mask_buf[i], ~d->mask_buf[i]);
524                 else if (d->chip->unmask_base) {
525                         unmask_offset = d->chip->unmask_base -
526                                         d->chip->mask_base;
527                         ret = regmap_update_bits(d->map,
528                                         reg + unmask_offset,
529                                         d->mask_buf[i],
530                                         d->mask_buf[i]);
531                 } else
532                         ret = regmap_update_bits(map, reg,
533                                          d->mask_buf[i], d->mask_buf[i]);
534                 if (ret != 0) {
535                         dev_err(map->dev, "Failed to set masks in 0x%x: %d\n",
536                                 reg, ret);
537                         goto err_alloc;
538                 }
539
540                 if (!chip->init_ack_masked)
541                         continue;
542
543                 /* Ack masked but set interrupts */
544                 reg = chip->status_base +
545                         (i * map->reg_stride * d->irq_reg_stride);
546                 ret = regmap_read(map, reg, &d->status_buf[i]);
547                 if (ret != 0) {
548                         dev_err(map->dev, "Failed to read IRQ status: %d\n",
549                                 ret);
550                         goto err_alloc;
551                 }
552
553                 if (d->status_buf[i] && (chip->ack_base || chip->use_ack)) {
554                         reg = chip->ack_base +
555                                 (i * map->reg_stride * d->irq_reg_stride);
556                         if (chip->ack_invert)
557                                 ret = regmap_write(map, reg,
558                                         ~(d->status_buf[i] & d->mask_buf[i]));
559                         else
560                                 ret = regmap_write(map, reg,
561                                         d->status_buf[i] & d->mask_buf[i]);
562                         if (ret != 0) {
563                                 dev_err(map->dev, "Failed to ack 0x%x: %d\n",
564                                         reg, ret);
565                                 goto err_alloc;
566                         }
567                 }
568         }
569
570         /* Wake is disabled by default */
571         if (d->wake_buf) {
572                 for (i = 0; i < chip->num_regs; i++) {
573                         d->wake_buf[i] = d->mask_buf_def[i];
574                         reg = chip->wake_base +
575                                 (i * map->reg_stride * d->irq_reg_stride);
576
577                         if (chip->wake_invert)
578                                 ret = regmap_update_bits(map, reg,
579                                                          d->mask_buf_def[i],
580                                                          0);
581                         else
582                                 ret = regmap_update_bits(map, reg,
583                                                          d->mask_buf_def[i],
584                                                          d->wake_buf[i]);
585                         if (ret != 0) {
586                                 dev_err(map->dev, "Failed to set masks in 0x%x: %d\n",
587                                         reg, ret);
588                                 goto err_alloc;
589                         }
590                 }
591         }
592
593         if (chip->num_type_reg) {
594                 for (i = 0; i < chip->num_irqs; i++) {
595                         reg = chip->irqs[i].type_reg_offset / map->reg_stride;
596                         d->type_buf_def[reg] |= chip->irqs[i].type_rising_mask |
597                                         chip->irqs[i].type_falling_mask;
598                 }
599                 for (i = 0; i < chip->num_type_reg; ++i) {
600                         if (!d->type_buf_def[i])
601                                 continue;
602
603                         reg = chip->type_base +
604                                 (i * map->reg_stride * d->type_reg_stride);
605                         if (chip->type_invert)
606                                 ret = regmap_update_bits(map, reg,
607                                         d->type_buf_def[i], 0xFF);
608                         else
609                                 ret = regmap_update_bits(map, reg,
610                                         d->type_buf_def[i], 0x0);
611                         if (ret != 0) {
612                                 dev_err(map->dev,
613                                         "Failed to set type in 0x%x: %x\n",
614                                         reg, ret);
615                                 goto err_alloc;
616                         }
617                 }
618         }
619
620         if (irq_base)
621                 d->domain = irq_domain_add_legacy(map->dev->of_node,
622                                                   chip->num_irqs, irq_base, 0,
623                                                   &regmap_domain_ops, d);
624         else
625                 d->domain = irq_domain_add_linear(map->dev->of_node,
626                                                   chip->num_irqs,
627                                                   &regmap_domain_ops, d);
628         if (!d->domain) {
629                 dev_err(map->dev, "Failed to create IRQ domain\n");
630                 ret = -ENOMEM;
631                 goto err_alloc;
632         }
633
634         ret = request_threaded_irq(irq, NULL, regmap_irq_thread,
635                                    irq_flags | IRQF_ONESHOT,
636                                    chip->name, d);
637         if (ret != 0) {
638                 dev_err(map->dev, "Failed to request IRQ %d for %s: %d\n",
639                         irq, chip->name, ret);
640                 goto err_domain;
641         }
642
643         *data = d;
644
645         return 0;
646
647 err_domain:
648         /* Should really dispose of the domain but... */
649 err_alloc:
650         kfree(d->type_buf);
651         kfree(d->type_buf_def);
652         kfree(d->wake_buf);
653         kfree(d->mask_buf_def);
654         kfree(d->mask_buf);
655         kfree(d->status_buf);
656         kfree(d->status_reg_buf);
657         kfree(d);
658         return ret;
659 }
660 EXPORT_SYMBOL_GPL(regmap_add_irq_chip);
661
662 /**
663  * regmap_del_irq_chip() - Stop interrupt handling for a regmap IRQ chip
664  *
665  * @irq: Primary IRQ for the device
666  * @d: &regmap_irq_chip_data allocated by regmap_add_irq_chip()
667  *
668  * This function also disposes of all mapped IRQs on the chip.
669  */
670 void regmap_del_irq_chip(int irq, struct regmap_irq_chip_data *d)
671 {
672         unsigned int virq;
673         int hwirq;
674
675         if (!d)
676                 return;
677
678         free_irq(irq, d);
679
680         /* Dispose all virtual irq from irq domain before removing it */
681         for (hwirq = 0; hwirq < d->chip->num_irqs; hwirq++) {
682                 /* Ignore hwirq if holes in the IRQ list */
683                 if (!d->chip->irqs[hwirq].mask)
684                         continue;
685
686                 /*
687                  * Find the virtual irq of hwirq on chip and if it is
688                  * there then dispose it
689                  */
690                 virq = irq_find_mapping(d->domain, hwirq);
691                 if (virq)
692                         irq_dispose_mapping(virq);
693         }
694
695         irq_domain_remove(d->domain);
696         kfree(d->type_buf);
697         kfree(d->type_buf_def);
698         kfree(d->wake_buf);
699         kfree(d->mask_buf_def);
700         kfree(d->mask_buf);
701         kfree(d->status_reg_buf);
702         kfree(d->status_buf);
703         kfree(d);
704 }
705 EXPORT_SYMBOL_GPL(regmap_del_irq_chip);
706
707 static void devm_regmap_irq_chip_release(struct device *dev, void *res)
708 {
709         struct regmap_irq_chip_data *d = *(struct regmap_irq_chip_data **)res;
710
711         regmap_del_irq_chip(d->irq, d);
712 }
713
714 static int devm_regmap_irq_chip_match(struct device *dev, void *res, void *data)
715
716 {
717         struct regmap_irq_chip_data **r = res;
718
719         if (!r || !*r) {
720                 WARN_ON(!r || !*r);
721                 return 0;
722         }
723         return *r == data;
724 }
725
726 /**
727  * devm_regmap_add_irq_chip() - Resource manager regmap_add_irq_chip()
728  *
729  * @dev: The device pointer on which irq_chip belongs to.
730  * @map: The regmap for the device.
731  * @irq: The IRQ the device uses to signal interrupts
732  * @irq_flags: The IRQF_ flags to use for the primary interrupt.
733  * @irq_base: Allocate at specific IRQ number if irq_base > 0.
734  * @chip: Configuration for the interrupt controller.
735  * @data: Runtime data structure for the controller, allocated on success
736  *
737  * Returns 0 on success or an errno on failure.
738  *
739  * The &regmap_irq_chip_data will be automatically released when the device is
740  * unbound.
741  */
742 int devm_regmap_add_irq_chip(struct device *dev, struct regmap *map, int irq,
743                              int irq_flags, int irq_base,
744                              const struct regmap_irq_chip *chip,
745                              struct regmap_irq_chip_data **data)
746 {
747         struct regmap_irq_chip_data **ptr, *d;
748         int ret;
749
750         ptr = devres_alloc(devm_regmap_irq_chip_release, sizeof(*ptr),
751                            GFP_KERNEL);
752         if (!ptr)
753                 return -ENOMEM;
754
755         ret = regmap_add_irq_chip(map, irq, irq_flags, irq_base,
756                                   chip, &d);
757         if (ret < 0) {
758                 devres_free(ptr);
759                 return ret;
760         }
761
762         *ptr = d;
763         devres_add(dev, ptr);
764         *data = d;
765         return 0;
766 }
767 EXPORT_SYMBOL_GPL(devm_regmap_add_irq_chip);
768
769 /**
770  * devm_regmap_del_irq_chip() - Resource managed regmap_del_irq_chip()
771  *
772  * @dev: Device for which which resource was allocated.
773  * @irq: Primary IRQ for the device.
774  * @data: &regmap_irq_chip_data allocated by regmap_add_irq_chip().
775  *
776  * A resource managed version of regmap_del_irq_chip().
777  */
778 void devm_regmap_del_irq_chip(struct device *dev, int irq,
779                               struct regmap_irq_chip_data *data)
780 {
781         int rc;
782
783         WARN_ON(irq != data->irq);
784         rc = devres_release(dev, devm_regmap_irq_chip_release,
785                             devm_regmap_irq_chip_match, data);
786
787         if (rc != 0)
788                 WARN_ON(rc);
789 }
790 EXPORT_SYMBOL_GPL(devm_regmap_del_irq_chip);
791
792 /**
793  * regmap_irq_chip_get_base() - Retrieve interrupt base for a regmap IRQ chip
794  *
795  * @data: regmap irq controller to operate on.
796  *
797  * Useful for drivers to request their own IRQs.
798  */
799 int regmap_irq_chip_get_base(struct regmap_irq_chip_data *data)
800 {
801         WARN_ON(!data->irq_base);
802         return data->irq_base;
803 }
804 EXPORT_SYMBOL_GPL(regmap_irq_chip_get_base);
805
806 /**
807  * regmap_irq_get_virq() - Map an interrupt on a chip to a virtual IRQ
808  *
809  * @data: regmap irq controller to operate on.
810  * @irq: index of the interrupt requested in the chip IRQs.
811  *
812  * Useful for drivers to request their own IRQs.
813  */
814 int regmap_irq_get_virq(struct regmap_irq_chip_data *data, int irq)
815 {
816         /* Handle holes in the IRQ list */
817         if (!data->chip->irqs[irq].mask)
818                 return -EINVAL;
819
820         return irq_create_mapping(data->domain, irq);
821 }
822 EXPORT_SYMBOL_GPL(regmap_irq_get_virq);
823
824 /**
825  * regmap_irq_get_domain() - Retrieve the irq_domain for the chip
826  *
827  * @data: regmap_irq controller to operate on.
828  *
829  * Useful for drivers to request their own IRQs and for integration
830  * with subsystems.  For ease of integration NULL is accepted as a
831  * domain, allowing devices to just call this even if no domain is
832  * allocated.
833  */
834 struct irq_domain *regmap_irq_get_domain(struct regmap_irq_chip_data *data)
835 {
836         if (data)
837                 return data->domain;
838         else
839                 return NULL;
840 }
841 EXPORT_SYMBOL_GPL(regmap_irq_get_domain);