2 * ti-sysc.c - Texas Instruments sysc interconnect target driver
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
8 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
9 * kind, whether express or implied; without even the implied warranty
10 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
15 #include <linux/clk.h>
16 #include <linux/clkdev.h>
17 #include <linux/delay.h>
18 #include <linux/module.h>
19 #include <linux/platform_device.h>
20 #include <linux/pm_domain.h>
21 #include <linux/pm_runtime.h>
22 #include <linux/reset.h>
23 #include <linux/of_address.h>
24 #include <linux/of_platform.h>
25 #include <linux/slab.h>
26 #include <linux/iopoll.h>
28 #include <linux/platform_data/ti-sysc.h>
30 #include <dt-bindings/bus/ti-sysc.h>
32 #define MAX_MODULE_SOFTRESET_WAIT 10000
34 static const char * const reg_names[] = { "rev", "sysc", "syss", };
50 static const char * const clock_names[SYSC_ICK + 1] = { "fck", "ick", };
52 #define SYSC_IDLEMODE_MASK 3
53 #define SYSC_CLOCKACTIVITY_MASK 3
56 * struct sysc - TI sysc interconnect target module registers and capabilities
57 * @dev: struct device pointer
58 * @module_pa: physical address of the interconnect target module
59 * @module_size: size of the interconnect target module
60 * @module_va: virtual address of the interconnect target module
61 * @offsets: register offsets from module base
62 * @clocks: clocks used by the interconnect target module
63 * @clock_roles: clock role names for the found clocks
64 * @nr_clocks: number of clocks used by the interconnect target module
65 * @legacy_mode: configured for legacy mode if set
66 * @cap: interconnect target module capabilities
67 * @cfg: interconnect target module configuration
68 * @name: name if available
69 * @revision: interconnect target module revision
70 * @needs_resume: runtime resume needed on resume from suspend
76 void __iomem *module_va;
77 int offsets[SYSC_MAX_REGS];
79 const char **clock_roles;
81 struct reset_control *rsts;
82 const char *legacy_mode;
83 const struct sysc_capabilities *cap;
84 struct sysc_config cfg;
85 struct ti_sysc_cookie cookie;
90 unsigned int noirq_suspend:1;
91 bool child_needs_resume;
92 struct delayed_work idle_work;
95 void sysc_write(struct sysc *ddata, int offset, u32 value)
97 writel_relaxed(value, ddata->module_va + offset);
100 static u32 sysc_read(struct sysc *ddata, int offset)
102 if (ddata->cfg.quirks & SYSC_QUIRK_16BIT) {
105 val = readw_relaxed(ddata->module_va + offset);
106 val |= (readw_relaxed(ddata->module_va + offset + 4) << 16);
111 return readl_relaxed(ddata->module_va + offset);
114 static bool sysc_opt_clks_needed(struct sysc *ddata)
116 return !!(ddata->cfg.quirks & SYSC_QUIRK_OPT_CLKS_NEEDED);
119 static u32 sysc_read_revision(struct sysc *ddata)
121 int offset = ddata->offsets[SYSC_REVISION];
126 return sysc_read(ddata, offset);
129 static int sysc_get_one_clock(struct sysc *ddata, const char *name)
131 int error, i, index = -ENODEV;
133 if (!strncmp(clock_names[SYSC_FCK], name, 3))
135 else if (!strncmp(clock_names[SYSC_ICK], name, 3))
139 for (i = SYSC_OPTFCK0; i < SYSC_MAX_CLOCKS; i++) {
140 if (!ddata->clocks[i]) {
148 dev_err(ddata->dev, "clock %s not added\n", name);
152 ddata->clocks[index] = devm_clk_get(ddata->dev, name);
153 if (IS_ERR(ddata->clocks[index])) {
154 if (PTR_ERR(ddata->clocks[index]) == -ENOENT)
157 dev_err(ddata->dev, "clock get error for %s: %li\n",
158 name, PTR_ERR(ddata->clocks[index]));
160 return PTR_ERR(ddata->clocks[index]);
163 error = clk_prepare(ddata->clocks[index]);
165 dev_err(ddata->dev, "clock prepare error for %s: %i\n",
174 static int sysc_get_clocks(struct sysc *ddata)
176 struct device_node *np = ddata->dev->of_node;
177 struct property *prop;
179 int nr_fck = 0, nr_ick = 0, i, error = 0;
181 ddata->clock_roles = devm_kcalloc(ddata->dev,
183 sizeof(*ddata->clock_roles),
185 if (!ddata->clock_roles)
188 of_property_for_each_string(np, "clock-names", prop, name) {
189 if (!strncmp(clock_names[SYSC_FCK], name, 3))
191 if (!strncmp(clock_names[SYSC_ICK], name, 3))
193 ddata->clock_roles[ddata->nr_clocks] = name;
197 if (ddata->nr_clocks < 1)
200 if (ddata->nr_clocks > SYSC_MAX_CLOCKS) {
201 dev_err(ddata->dev, "too many clocks for %pOF\n", np);
206 if (nr_fck > 1 || nr_ick > 1) {
207 dev_err(ddata->dev, "max one fck and ick for %pOF\n", np);
212 ddata->clocks = devm_kcalloc(ddata->dev,
213 ddata->nr_clocks, sizeof(*ddata->clocks),
218 for (i = 0; i < ddata->nr_clocks; i++) {
219 error = sysc_get_one_clock(ddata, ddata->clock_roles[i]);
220 if (error && error != -ENOENT)
228 * sysc_init_resets - reset module on init
229 * @ddata: device driver data
231 * A module can have both OCP softreset control and external rstctrl.
232 * If more complicated rstctrl resets are needed, please handle these
233 * directly from the child device driver and map only the module reset
234 * for the parent interconnect target module device.
236 * Automatic reset of the module on init can be skipped with the
237 * "ti,no-reset-on-init" device tree property.
239 static int sysc_init_resets(struct sysc *ddata)
244 devm_reset_control_array_get_optional_exclusive(ddata->dev);
245 if (IS_ERR(ddata->rsts))
246 return PTR_ERR(ddata->rsts);
248 if (ddata->cfg.quirks & SYSC_QUIRK_NO_RESET_ON_INIT)
251 error = reset_control_assert(ddata->rsts);
256 error = reset_control_deassert(ddata->rsts);
264 * sysc_parse_and_check_child_range - parses module IO region from ranges
265 * @ddata: device driver data
267 * In general we only need rev, syss, and sysc registers and not the whole
268 * module range. But we do want the offsets for these registers from the
269 * module base. This allows us to check them against the legacy hwmod
270 * platform data. Let's also check the ranges are configured properly.
272 static int sysc_parse_and_check_child_range(struct sysc *ddata)
274 struct device_node *np = ddata->dev->of_node;
275 const __be32 *ranges;
276 u32 nr_addr, nr_size;
279 ranges = of_get_property(np, "ranges", &len);
281 dev_err(ddata->dev, "missing ranges for %pOF\n", np);
286 len /= sizeof(*ranges);
289 dev_err(ddata->dev, "incomplete ranges for %pOF\n", np);
294 error = of_property_read_u32(np, "#address-cells", &nr_addr);
298 error = of_property_read_u32(np, "#size-cells", &nr_size);
302 if (nr_addr != 1 || nr_size != 1) {
303 dev_err(ddata->dev, "invalid ranges for %pOF\n", np);
309 ddata->module_pa = of_translate_address(np, ranges++);
310 ddata->module_size = be32_to_cpup(ranges);
315 static struct device_node *stdout_path;
317 static void sysc_init_stdout_path(struct sysc *ddata)
319 struct device_node *np = NULL;
322 if (IS_ERR(stdout_path))
328 np = of_find_node_by_path("/chosen");
332 uart = of_get_property(np, "stdout-path", NULL);
336 np = of_find_node_by_path(uart);
345 stdout_path = ERR_PTR(-ENODEV);
348 static void sysc_check_quirk_stdout(struct sysc *ddata,
349 struct device_node *np)
351 sysc_init_stdout_path(ddata);
352 if (np != stdout_path)
355 ddata->cfg.quirks |= SYSC_QUIRK_NO_IDLE_ON_INIT |
356 SYSC_QUIRK_NO_RESET_ON_INIT;
360 * sysc_check_one_child - check child configuration
361 * @ddata: device driver data
362 * @np: child device node
364 * Let's avoid messy situations where we have new interconnect target
365 * node but children have "ti,hwmods". These belong to the interconnect
366 * target node and are managed by this driver.
368 static int sysc_check_one_child(struct sysc *ddata,
369 struct device_node *np)
373 name = of_get_property(np, "ti,hwmods", NULL);
375 dev_warn(ddata->dev, "really a child ti,hwmods property?");
377 sysc_check_quirk_stdout(ddata, np);
382 static int sysc_check_children(struct sysc *ddata)
384 struct device_node *child;
387 for_each_child_of_node(ddata->dev->of_node, child) {
388 error = sysc_check_one_child(ddata, child);
397 * So far only I2C uses 16-bit read access with clockactivity with revision
398 * in two registers with stride of 4. We can detect this based on the rev
399 * register size to configure things far enough to be able to properly read
400 * the revision register.
402 static void sysc_check_quirk_16bit(struct sysc *ddata, struct resource *res)
404 if (resource_size(res) == 8)
405 ddata->cfg.quirks |= SYSC_QUIRK_16BIT | SYSC_QUIRK_USE_CLOCKACT;
409 * sysc_parse_one - parses the interconnect target module registers
410 * @ddata: device driver data
411 * @reg: register to parse
413 static int sysc_parse_one(struct sysc *ddata, enum sysc_registers reg)
415 struct resource *res;
422 name = reg_names[reg];
428 res = platform_get_resource_byname(to_platform_device(ddata->dev),
429 IORESOURCE_MEM, name);
431 ddata->offsets[reg] = -ENODEV;
436 ddata->offsets[reg] = res->start - ddata->module_pa;
437 if (reg == SYSC_REVISION)
438 sysc_check_quirk_16bit(ddata, res);
443 static int sysc_parse_registers(struct sysc *ddata)
447 for (i = 0; i < SYSC_MAX_REGS; i++) {
448 error = sysc_parse_one(ddata, i);
457 * sysc_check_registers - check for misconfigured register overlaps
458 * @ddata: device driver data
460 static int sysc_check_registers(struct sysc *ddata)
462 int i, j, nr_regs = 0, nr_matches = 0;
464 for (i = 0; i < SYSC_MAX_REGS; i++) {
465 if (ddata->offsets[i] < 0)
468 if (ddata->offsets[i] > (ddata->module_size - 4)) {
469 dev_err(ddata->dev, "register outside module range");
474 for (j = 0; j < SYSC_MAX_REGS; j++) {
475 if (ddata->offsets[j] < 0)
478 if (ddata->offsets[i] == ddata->offsets[j])
485 dev_err(ddata->dev, "missing registers\n");
490 if (nr_matches > nr_regs) {
491 dev_err(ddata->dev, "overlapping registers: (%i/%i)",
492 nr_regs, nr_matches);
501 * syc_ioremap - ioremap register space for the interconnect target module
502 * @ddata: deviec driver data
504 * Note that the interconnect target module registers can be anywhere
505 * within the first child device address space. For example, SGX has
506 * them at offset 0x1fc00 in the 32MB module address space. We just
507 * what we need around the interconnect target module registers.
509 static int sysc_ioremap(struct sysc *ddata)
513 if (ddata->offsets[SYSC_SYSSTATUS] >= 0)
514 size = ddata->offsets[SYSC_SYSSTATUS];
515 else if (ddata->offsets[SYSC_SYSCONFIG] >= 0)
516 size = ddata->offsets[SYSC_SYSCONFIG];
517 else if (ddata->offsets[SYSC_REVISION] >= 0)
518 size = ddata->offsets[SYSC_REVISION];
525 ddata->module_va = devm_ioremap(ddata->dev,
528 if (!ddata->module_va)
535 * sysc_map_and_check_registers - ioremap and check device registers
536 * @ddata: device driver data
538 static int sysc_map_and_check_registers(struct sysc *ddata)
542 error = sysc_parse_and_check_child_range(ddata);
546 error = sysc_check_children(ddata);
550 error = sysc_parse_registers(ddata);
554 error = sysc_ioremap(ddata);
558 error = sysc_check_registers(ddata);
566 * sysc_show_rev - read and show interconnect target module revision
567 * @bufp: buffer to print the information to
568 * @ddata: device driver data
570 static int sysc_show_rev(char *bufp, struct sysc *ddata)
574 if (ddata->offsets[SYSC_REVISION] < 0)
575 return sprintf(bufp, ":NA");
577 len = sprintf(bufp, ":%08x", ddata->revision);
582 static int sysc_show_reg(struct sysc *ddata,
583 char *bufp, enum sysc_registers reg)
585 if (ddata->offsets[reg] < 0)
586 return sprintf(bufp, ":NA");
588 return sprintf(bufp, ":%x", ddata->offsets[reg]);
591 static int sysc_show_name(char *bufp, struct sysc *ddata)
596 return sprintf(bufp, ":%s", ddata->name);
600 * sysc_show_registers - show information about interconnect target module
601 * @ddata: device driver data
603 static void sysc_show_registers(struct sysc *ddata)
609 for (i = 0; i < SYSC_MAX_REGS; i++)
610 bufp += sysc_show_reg(ddata, bufp, i);
612 bufp += sysc_show_rev(bufp, ddata);
613 bufp += sysc_show_name(bufp, ddata);
615 dev_dbg(ddata->dev, "%llx:%x%s\n",
616 ddata->module_pa, ddata->module_size,
620 static int __maybe_unused sysc_runtime_suspend(struct device *dev)
622 struct ti_sysc_platform_data *pdata;
626 ddata = dev_get_drvdata(dev);
631 if (ddata->legacy_mode) {
632 pdata = dev_get_platdata(ddata->dev);
636 if (!pdata->idle_module)
639 error = pdata->idle_module(dev, &ddata->cookie);
641 dev_err(dev, "%s: could not idle: %i\n",
647 for (i = 0; i < ddata->nr_clocks; i++) {
648 if (IS_ERR_OR_NULL(ddata->clocks[i]))
651 if (i >= SYSC_OPTFCK0 && !sysc_opt_clks_needed(ddata))
654 clk_disable(ddata->clocks[i]);
658 ddata->enabled = false;
663 static int __maybe_unused sysc_runtime_resume(struct device *dev)
665 struct ti_sysc_platform_data *pdata;
669 ddata = dev_get_drvdata(dev);
674 if (ddata->legacy_mode) {
675 pdata = dev_get_platdata(ddata->dev);
679 if (!pdata->enable_module)
682 error = pdata->enable_module(dev, &ddata->cookie);
684 dev_err(dev, "%s: could not enable: %i\n",
690 for (i = 0; i < ddata->nr_clocks; i++) {
691 if (IS_ERR_OR_NULL(ddata->clocks[i]))
694 if (i >= SYSC_OPTFCK0 && !sysc_opt_clks_needed(ddata))
697 error = clk_enable(ddata->clocks[i]);
703 ddata->enabled = true;
708 #ifdef CONFIG_PM_SLEEP
709 static int sysc_suspend(struct device *dev)
714 ddata = dev_get_drvdata(dev);
716 if (ddata->cfg.quirks & SYSC_QUIRK_LEGACY_IDLE)
719 if (!ddata->enabled || ddata->noirq_suspend)
722 dev_dbg(ddata->dev, "%s %s\n", __func__,
723 ddata->name ? ddata->name : "");
725 error = pm_runtime_put_sync_suspend(dev);
726 if (error == -EBUSY) {
727 dev_dbg(ddata->dev, "%s busy, tagging for noirq suspend %s\n",
728 __func__, ddata->name ? ddata->name : "");
730 ddata->noirq_suspend = true;
733 } else if (error < 0) {
734 dev_warn(ddata->dev, "%s cannot suspend %i %s\n",
736 ddata->name ? ddata->name : "");
741 ddata->needs_resume = true;
746 static int sysc_resume(struct device *dev)
751 ddata = dev_get_drvdata(dev);
753 if (ddata->cfg.quirks & SYSC_QUIRK_LEGACY_IDLE)
756 if (!ddata->needs_resume || ddata->noirq_suspend)
759 dev_dbg(ddata->dev, "%s %s\n", __func__,
760 ddata->name ? ddata->name : "");
762 error = pm_runtime_get_sync(dev);
764 dev_err(ddata->dev, "%s error %i %s\n",
766 ddata->name ? ddata->name : "");
771 ddata->needs_resume = false;
776 static int sysc_noirq_suspend(struct device *dev)
781 ddata = dev_get_drvdata(dev);
783 if (ddata->cfg.quirks & SYSC_QUIRK_LEGACY_IDLE)
786 if (!ddata->enabled || !ddata->noirq_suspend)
789 dev_dbg(ddata->dev, "%s %s\n", __func__,
790 ddata->name ? ddata->name : "");
792 error = sysc_runtime_suspend(dev);
794 dev_warn(ddata->dev, "%s busy %i %s\n",
795 __func__, error, ddata->name ? ddata->name : "");
800 ddata->needs_resume = true;
805 static int sysc_noirq_resume(struct device *dev)
810 ddata = dev_get_drvdata(dev);
812 if (ddata->cfg.quirks & SYSC_QUIRK_LEGACY_IDLE)
815 if (!ddata->needs_resume || !ddata->noirq_suspend)
818 dev_dbg(ddata->dev, "%s %s\n", __func__,
819 ddata->name ? ddata->name : "");
821 error = sysc_runtime_resume(dev);
823 dev_warn(ddata->dev, "%s cannot resume %i %s\n",
825 ddata->name ? ddata->name : "");
830 /* Maybe also reconsider clearing noirq_suspend at some point */
831 ddata->needs_resume = false;
837 static const struct dev_pm_ops sysc_pm_ops = {
838 SET_SYSTEM_SLEEP_PM_OPS(sysc_suspend, sysc_resume)
839 SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(sysc_noirq_suspend, sysc_noirq_resume)
840 SET_RUNTIME_PM_OPS(sysc_runtime_suspend,
845 /* Module revision register based quirks */
846 struct sysc_revision_quirk {
857 #define SYSC_QUIRK(optname, optbase, optrev, optsysc, optsyss, \
858 optrev_val, optrevmask, optquirkmask) \
862 .rev_offset = (optrev), \
863 .sysc_offset = (optsysc), \
864 .syss_offset = (optsyss), \
865 .revision = (optrev_val), \
866 .revision_mask = (optrevmask), \
867 .quirks = (optquirkmask), \
870 static const struct sysc_revision_quirk sysc_revision_quirks[] = {
871 /* These drivers need to be fixed to not use pm_runtime_irq_safe() */
872 SYSC_QUIRK("gpio", 0, 0, 0x10, 0x114, 0x50600801, 0xffff0fff,
873 SYSC_QUIRK_LEGACY_IDLE | SYSC_QUIRK_OPT_CLKS_IN_RESET),
874 SYSC_QUIRK("mmu", 0, 0, 0x10, 0x14, 0x00000020, 0xffffffff,
875 SYSC_QUIRK_LEGACY_IDLE),
876 SYSC_QUIRK("mmu", 0, 0, 0x10, 0x14, 0x00000030, 0xffffffff,
877 SYSC_QUIRK_LEGACY_IDLE),
878 SYSC_QUIRK("sham", 0, 0x100, 0x110, 0x114, 0x40000c03, 0xffffffff,
879 SYSC_QUIRK_LEGACY_IDLE),
880 SYSC_QUIRK("smartreflex", 0, -1, 0x24, -1, 0x00000000, 0xffffffff,
881 SYSC_QUIRK_LEGACY_IDLE),
882 SYSC_QUIRK("smartreflex", 0, -1, 0x38, -1, 0x00000000, 0xffffffff,
883 SYSC_QUIRK_LEGACY_IDLE),
884 SYSC_QUIRK("timer", 0, 0, 0x10, 0x14, 0x00000015, 0xffffffff,
885 SYSC_QUIRK_LEGACY_IDLE),
886 /* Some timers on omap4 and later */
887 SYSC_QUIRK("timer", 0, 0, 0x10, -1, 0x4fff1301, 0xffffffff,
888 SYSC_QUIRK_LEGACY_IDLE),
889 SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x00000052, 0xffffffff,
890 SYSC_QUIRK_LEGACY_IDLE),
891 /* Uarts on omap4 and later */
892 SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x50411e03, 0xffff00ff,
893 SYSC_QUIRK_LEGACY_IDLE),
894 SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x47422e03, 0xffffffff,
895 SYSC_QUIRK_LEGACY_IDLE),
898 SYSC_QUIRK("adc", 0, 0, 0x10, -1, 0x47300001, 0xffffffff, 0),
899 SYSC_QUIRK("aess", 0, 0, 0x10, -1, 0x40000000, 0xffffffff, 0),
900 SYSC_QUIRK("control", 0, 0, 0x10, -1, 0x40000900, 0xffffffff, 0),
901 SYSC_QUIRK("cpgmac", 0, 0x1200, 0x1208, 0x1204, 0x4edb1902,
903 SYSC_QUIRK("dcan", 0, 0, -1, -1, 0x00001401, 0xffffffff, 0),
904 SYSC_QUIRK("dwc3", 0, 0, 0x10, -1, 0x500a0200, 0xffffffff, 0),
905 SYSC_QUIRK("epwmss", 0, 0, 0x4, -1, 0x47400001, 0xffffffff, 0),
906 SYSC_QUIRK("gpu", 0, 0x1fc00, 0x1fc10, -1, 0, 0, 0),
907 SYSC_QUIRK("hdq1w", 0, 0, 0x14, 0x18, 0x00000006, 0xffffffff, 0),
908 SYSC_QUIRK("hdq1w", 0, 0, 0x14, 0x18, 0x0000000a, 0xffffffff, 0),
909 SYSC_QUIRK("hsi", 0, 0, 0x10, 0x14, 0x50043101, 0xffffffff, 0),
910 SYSC_QUIRK("iss", 0, 0, 0x10, -1, 0x40000101, 0xffffffff, 0),
911 SYSC_QUIRK("i2c", 0, 0, 0x10, 0x90, 0x5040000a, 0xfffffff0, 0),
912 SYSC_QUIRK("mcasp", 0, 0, 0x4, -1, 0x44306302, 0xffffffff, 0),
913 SYSC_QUIRK("mcasp", 0, 0, 0x4, -1, 0x44307b02, 0xffffffff, 0),
914 SYSC_QUIRK("mcbsp", 0, -1, 0x8c, -1, 0, 0, 0),
915 SYSC_QUIRK("mcspi", 0, 0, 0x10, -1, 0x40300a0b, 0xffffffff, 0),
916 SYSC_QUIRK("mcspi", 0, 0, 0x110, 0x114, 0x40300a0b, 0xffffffff, 0),
917 SYSC_QUIRK("mailbox", 0, 0, 0x10, -1, 0x00000400, 0xffffffff, 0),
918 SYSC_QUIRK("m3", 0, 0, -1, -1, 0x5f580105, 0x0fff0f00, 0),
919 SYSC_QUIRK("ocp2scp", 0, 0, 0x10, 0x14, 0x50060005, 0xffffffff, 0),
920 SYSC_QUIRK("ocp2scp", 0, 0, -1, -1, 0x50060007, 0xffffffff, 0),
921 SYSC_QUIRK("padconf", 0, 0, 0x10, -1, 0x4fff0800, 0xffffffff, 0),
922 SYSC_QUIRK("prcm", 0, 0, -1, -1, 0x40000100, 0xffffffff, 0),
923 SYSC_QUIRK("prcm", 0, 0, -1, -1, 0x40000400, 0xffffffff, 0),
924 SYSC_QUIRK("scm", 0, 0, 0x10, -1, 0x40000900, 0xffffffff, 0),
925 SYSC_QUIRK("scm", 0, 0, -1, -1, 0x4f000100, 0xffffffff, 0),
926 SYSC_QUIRK("scrm", 0, 0, -1, -1, 0x00000010, 0xffffffff, 0),
927 SYSC_QUIRK("sdio", 0, 0, 0x10, -1, 0x40202301, 0xffffffff, 0),
928 SYSC_QUIRK("sdio", 0, 0x2fc, 0x110, 0x114, 0x31010000, 0xffffffff, 0),
929 SYSC_QUIRK("sdma", 0, 0, 0x2c, 0x28, 0x00010900, 0xffffffff, 0),
930 SYSC_QUIRK("slimbus", 0, 0, 0x10, -1, 0x40000902, 0xffffffff, 0),
931 SYSC_QUIRK("slimbus", 0, 0, 0x10, -1, 0x40002903, 0xffffffff, 0),
932 SYSC_QUIRK("spinlock", 0, 0, 0x10, -1, 0x50020000, 0xffffffff, 0),
933 SYSC_QUIRK("rng", 0, 0x1fe0, 0x1fe4, -1, 0x00000020, 0xffffffff, 0),
934 SYSC_QUIRK("rtc", 0, 0x74, 0x78, -1, 0x4eb01908, 0xffffffff, 0),
935 SYSC_QUIRK("timer32k", 0, 0, 0x4, -1, 0x00000060, 0xffffffff, 0),
936 SYSC_QUIRK("usbhstll", 0, 0, 0x10, 0x14, 0x00000004, 0xffffffff, 0),
937 SYSC_QUIRK("usb_host_hs", 0, 0, 0x10, 0x14, 0x50700100, 0xffffffff, 0),
938 SYSC_QUIRK("usb_otg_hs", 0, 0x400, 0x404, 0x408, 0x00000050,
940 SYSC_QUIRK("wdt", 0, 0, 0x10, 0x14, 0x502a0500, 0xfffff0f0, 0),
941 SYSC_QUIRK("vfpe", 0, 0, 0x104, -1, 0x4d001200, 0xffffffff, 0),
945 static void sysc_init_revision_quirks(struct sysc *ddata)
947 const struct sysc_revision_quirk *q;
950 for (i = 0; i < ARRAY_SIZE(sysc_revision_quirks); i++) {
951 q = &sysc_revision_quirks[i];
953 if (q->base && q->base != ddata->module_pa)
956 if (q->rev_offset >= 0 &&
957 q->rev_offset != ddata->offsets[SYSC_REVISION])
960 if (q->sysc_offset >= 0 &&
961 q->sysc_offset != ddata->offsets[SYSC_SYSCONFIG])
964 if (q->syss_offset >= 0 &&
965 q->syss_offset != ddata->offsets[SYSC_SYSSTATUS])
968 if (q->revision == ddata->revision ||
969 (q->revision & q->revision_mask) ==
970 (ddata->revision & q->revision_mask)) {
971 ddata->name = q->name;
972 ddata->cfg.quirks |= q->quirks;
977 static int sysc_reset(struct sysc *ddata)
979 int offset = ddata->offsets[SYSC_SYSCONFIG];
982 if (ddata->legacy_mode || offset < 0 ||
983 ddata->cfg.quirks & SYSC_QUIRK_NO_RESET_ON_INIT)
987 * Currently only support reset status in sysstatus.
988 * Warn and return error in all other cases
990 if (!ddata->cfg.syss_mask) {
991 dev_err(ddata->dev, "No ti,syss-mask. Reset failed\n");
995 val = sysc_read(ddata, offset);
996 val |= (0x1 << ddata->cap->regbits->srst_shift);
997 sysc_write(ddata, offset, val);
999 /* Poll on reset status */
1000 offset = ddata->offsets[SYSC_SYSSTATUS];
1002 return readl_poll_timeout(ddata->module_va + offset, val,
1003 (val & ddata->cfg.syss_mask) == 0x0,
1004 100, MAX_MODULE_SOFTRESET_WAIT);
1007 /* At this point the module is configured enough to read the revision */
1008 static int sysc_init_module(struct sysc *ddata)
1012 if (ddata->cfg.quirks & SYSC_QUIRK_NO_IDLE_ON_INIT) {
1013 ddata->revision = sysc_read_revision(ddata);
1017 error = pm_runtime_get_sync(ddata->dev);
1019 pm_runtime_put_noidle(ddata->dev);
1024 error = sysc_reset(ddata);
1026 dev_err(ddata->dev, "Reset failed with %d\n", error);
1027 pm_runtime_put_sync(ddata->dev);
1032 ddata->revision = sysc_read_revision(ddata);
1033 pm_runtime_put_sync(ddata->dev);
1036 sysc_init_revision_quirks(ddata);
1041 static int sysc_init_sysc_mask(struct sysc *ddata)
1043 struct device_node *np = ddata->dev->of_node;
1047 error = of_property_read_u32(np, "ti,sysc-mask", &val);
1052 ddata->cfg.sysc_val = val & ddata->cap->sysc_mask;
1054 ddata->cfg.sysc_val = ddata->cap->sysc_mask;
1059 static int sysc_init_idlemode(struct sysc *ddata, u8 *idlemodes,
1062 struct device_node *np = ddata->dev->of_node;
1063 struct property *prop;
1067 of_property_for_each_u32(np, name, prop, p, val) {
1068 if (val >= SYSC_NR_IDLEMODES) {
1069 dev_err(ddata->dev, "invalid idlemode: %i\n", val);
1072 *idlemodes |= (1 << val);
1078 static int sysc_init_idlemodes(struct sysc *ddata)
1082 error = sysc_init_idlemode(ddata, &ddata->cfg.midlemodes,
1087 error = sysc_init_idlemode(ddata, &ddata->cfg.sidlemodes,
1096 * Only some devices on omap4 and later have SYSCONFIG reset done
1097 * bit. We can detect this if there is no SYSSTATUS at all, or the
1098 * SYSTATUS bit 0 is not used. Note that some SYSSTATUS registers
1099 * have multiple bits for the child devices like OHCI and EHCI.
1100 * Depends on SYSC being parsed first.
1102 static int sysc_init_syss_mask(struct sysc *ddata)
1104 struct device_node *np = ddata->dev->of_node;
1108 error = of_property_read_u32(np, "ti,syss-mask", &val);
1110 if ((ddata->cap->type == TI_SYSC_OMAP4 ||
1111 ddata->cap->type == TI_SYSC_OMAP4_TIMER) &&
1112 (ddata->cfg.sysc_val & SYSC_OMAP4_SOFTRESET))
1113 ddata->cfg.quirks |= SYSC_QUIRK_RESET_STATUS;
1118 if (!(val & 1) && (ddata->cfg.sysc_val & SYSC_OMAP4_SOFTRESET))
1119 ddata->cfg.quirks |= SYSC_QUIRK_RESET_STATUS;
1121 ddata->cfg.syss_mask = val;
1127 * Many child device drivers need to have fck and opt clocks available
1128 * to get the clock rate for device internal configuration etc.
1130 static int sysc_child_add_named_clock(struct sysc *ddata,
1131 struct device *child,
1135 struct clk_lookup *l;
1141 clk = clk_get(child, name);
1148 clk = clk_get(ddata->dev, name);
1152 l = clkdev_create(clk, name, dev_name(child));
1161 static int sysc_child_add_clocks(struct sysc *ddata,
1162 struct device *child)
1166 for (i = 0; i < ddata->nr_clocks; i++) {
1167 error = sysc_child_add_named_clock(ddata,
1169 ddata->clock_roles[i]);
1170 if (error && error != -EEXIST) {
1171 dev_err(ddata->dev, "could not add child clock %s: %i\n",
1172 ddata->clock_roles[i], error);
1181 static struct device_type sysc_device_type = {
1184 static struct sysc *sysc_child_to_parent(struct device *dev)
1186 struct device *parent = dev->parent;
1188 if (!parent || parent->type != &sysc_device_type)
1191 return dev_get_drvdata(parent);
1194 static int __maybe_unused sysc_child_runtime_suspend(struct device *dev)
1199 ddata = sysc_child_to_parent(dev);
1201 error = pm_generic_runtime_suspend(dev);
1205 if (!ddata->enabled)
1208 return sysc_runtime_suspend(ddata->dev);
1211 static int __maybe_unused sysc_child_runtime_resume(struct device *dev)
1216 ddata = sysc_child_to_parent(dev);
1218 if (!ddata->enabled) {
1219 error = sysc_runtime_resume(ddata->dev);
1222 "%s error: %i\n", __func__, error);
1225 return pm_generic_runtime_resume(dev);
1228 #ifdef CONFIG_PM_SLEEP
1229 static int sysc_child_suspend_noirq(struct device *dev)
1234 ddata = sysc_child_to_parent(dev);
1236 dev_dbg(ddata->dev, "%s %s\n", __func__,
1237 ddata->name ? ddata->name : "");
1239 error = pm_generic_suspend_noirq(dev);
1241 dev_err(dev, "%s error at %i: %i\n",
1242 __func__, __LINE__, error);
1247 if (!pm_runtime_status_suspended(dev)) {
1248 error = pm_generic_runtime_suspend(dev);
1250 dev_err(dev, "%s error at %i: %i\n",
1251 __func__, __LINE__, error);
1256 error = sysc_runtime_suspend(ddata->dev);
1258 dev_err(dev, "%s error at %i: %i\n",
1259 __func__, __LINE__, error);
1264 ddata->child_needs_resume = true;
1270 static int sysc_child_resume_noirq(struct device *dev)
1275 ddata = sysc_child_to_parent(dev);
1277 dev_dbg(ddata->dev, "%s %s\n", __func__,
1278 ddata->name ? ddata->name : "");
1280 if (ddata->child_needs_resume) {
1281 ddata->child_needs_resume = false;
1283 error = sysc_runtime_resume(ddata->dev);
1286 "%s runtime resume error: %i\n",
1289 error = pm_generic_runtime_resume(dev);
1292 "%s generic runtime resume: %i\n",
1296 return pm_generic_resume_noirq(dev);
1300 struct dev_pm_domain sysc_child_pm_domain = {
1302 SET_RUNTIME_PM_OPS(sysc_child_runtime_suspend,
1303 sysc_child_runtime_resume,
1305 USE_PLATFORM_PM_SLEEP_OPS
1306 SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(sysc_child_suspend_noirq,
1307 sysc_child_resume_noirq)
1312 * sysc_legacy_idle_quirk - handle children in omap_device compatible way
1313 * @ddata: device driver data
1314 * @child: child device driver
1316 * Allow idle for child devices as done with _od_runtime_suspend().
1317 * Otherwise many child devices will not idle because of the permanent
1318 * parent usecount set in pm_runtime_irq_safe().
1320 * Note that the long term solution is to just modify the child device
1321 * drivers to not set pm_runtime_irq_safe() and then this can be just
1324 static void sysc_legacy_idle_quirk(struct sysc *ddata, struct device *child)
1326 if (!ddata->legacy_mode)
1329 if (ddata->cfg.quirks & SYSC_QUIRK_LEGACY_IDLE)
1330 dev_pm_domain_set(child, &sysc_child_pm_domain);
1333 static int sysc_notifier_call(struct notifier_block *nb,
1334 unsigned long event, void *device)
1336 struct device *dev = device;
1340 ddata = sysc_child_to_parent(dev);
1345 case BUS_NOTIFY_ADD_DEVICE:
1346 error = sysc_child_add_clocks(ddata, dev);
1349 sysc_legacy_idle_quirk(ddata, dev);
1358 static struct notifier_block sysc_nb = {
1359 .notifier_call = sysc_notifier_call,
1362 /* Device tree configured quirks */
1363 struct sysc_dts_quirk {
1368 static const struct sysc_dts_quirk sysc_dts_quirks[] = {
1369 { .name = "ti,no-idle-on-init",
1370 .mask = SYSC_QUIRK_NO_IDLE_ON_INIT, },
1371 { .name = "ti,no-reset-on-init",
1372 .mask = SYSC_QUIRK_NO_RESET_ON_INIT, },
1375 static int sysc_init_dts_quirks(struct sysc *ddata)
1377 struct device_node *np = ddata->dev->of_node;
1378 const struct property *prop;
1382 ddata->legacy_mode = of_get_property(np, "ti,hwmods", NULL);
1384 for (i = 0; i < ARRAY_SIZE(sysc_dts_quirks); i++) {
1385 prop = of_get_property(np, sysc_dts_quirks[i].name, &len);
1389 ddata->cfg.quirks |= sysc_dts_quirks[i].mask;
1392 error = of_property_read_u32(np, "ti,sysc-delay-us", &val);
1395 dev_warn(ddata->dev, "bad ti,sysc-delay-us: %i\n",
1399 ddata->cfg.srst_udelay = (u8)val;
1405 static void sysc_unprepare(struct sysc *ddata)
1409 for (i = 0; i < SYSC_MAX_CLOCKS; i++) {
1410 if (!IS_ERR_OR_NULL(ddata->clocks[i]))
1411 clk_unprepare(ddata->clocks[i]);
1416 * Common sysc register bits found on omap2, also known as type1
1418 static const struct sysc_regbits sysc_regbits_omap2 = {
1419 .dmadisable_shift = -ENODEV,
1426 .autoidle_shift = 0,
1429 static const struct sysc_capabilities sysc_omap2 = {
1430 .type = TI_SYSC_OMAP2,
1431 .sysc_mask = SYSC_OMAP2_CLOCKACTIVITY | SYSC_OMAP2_EMUFREE |
1432 SYSC_OMAP2_ENAWAKEUP | SYSC_OMAP2_SOFTRESET |
1433 SYSC_OMAP2_AUTOIDLE,
1434 .regbits = &sysc_regbits_omap2,
1437 /* All omap2 and 3 timers, and timers 1, 2 & 10 on omap 4 and 5 */
1438 static const struct sysc_capabilities sysc_omap2_timer = {
1439 .type = TI_SYSC_OMAP2_TIMER,
1440 .sysc_mask = SYSC_OMAP2_CLOCKACTIVITY | SYSC_OMAP2_EMUFREE |
1441 SYSC_OMAP2_ENAWAKEUP | SYSC_OMAP2_SOFTRESET |
1442 SYSC_OMAP2_AUTOIDLE,
1443 .regbits = &sysc_regbits_omap2,
1444 .mod_quirks = SYSC_QUIRK_USE_CLOCKACT,
1448 * SHAM2 (SHA1/MD5) sysc found on omap3, a variant of sysc_regbits_omap2
1449 * with different sidle position
1451 static const struct sysc_regbits sysc_regbits_omap3_sham = {
1452 .dmadisable_shift = -ENODEV,
1453 .midle_shift = -ENODEV,
1455 .clkact_shift = -ENODEV,
1456 .enwkup_shift = -ENODEV,
1458 .autoidle_shift = 0,
1459 .emufree_shift = -ENODEV,
1462 static const struct sysc_capabilities sysc_omap3_sham = {
1463 .type = TI_SYSC_OMAP3_SHAM,
1464 .sysc_mask = SYSC_OMAP2_SOFTRESET | SYSC_OMAP2_AUTOIDLE,
1465 .regbits = &sysc_regbits_omap3_sham,
1469 * AES register bits found on omap3 and later, a variant of
1470 * sysc_regbits_omap2 with different sidle position
1472 static const struct sysc_regbits sysc_regbits_omap3_aes = {
1473 .dmadisable_shift = -ENODEV,
1474 .midle_shift = -ENODEV,
1476 .clkact_shift = -ENODEV,
1477 .enwkup_shift = -ENODEV,
1479 .autoidle_shift = 0,
1480 .emufree_shift = -ENODEV,
1483 static const struct sysc_capabilities sysc_omap3_aes = {
1484 .type = TI_SYSC_OMAP3_AES,
1485 .sysc_mask = SYSC_OMAP2_SOFTRESET | SYSC_OMAP2_AUTOIDLE,
1486 .regbits = &sysc_regbits_omap3_aes,
1490 * Common sysc register bits found on omap4, also known as type2
1492 static const struct sysc_regbits sysc_regbits_omap4 = {
1493 .dmadisable_shift = 16,
1496 .clkact_shift = -ENODEV,
1497 .enwkup_shift = -ENODEV,
1500 .autoidle_shift = -ENODEV,
1503 static const struct sysc_capabilities sysc_omap4 = {
1504 .type = TI_SYSC_OMAP4,
1505 .sysc_mask = SYSC_OMAP4_DMADISABLE | SYSC_OMAP4_FREEEMU |
1506 SYSC_OMAP4_SOFTRESET,
1507 .regbits = &sysc_regbits_omap4,
1510 static const struct sysc_capabilities sysc_omap4_timer = {
1511 .type = TI_SYSC_OMAP4_TIMER,
1512 .sysc_mask = SYSC_OMAP4_DMADISABLE | SYSC_OMAP4_FREEEMU |
1513 SYSC_OMAP4_SOFTRESET,
1514 .regbits = &sysc_regbits_omap4,
1518 * Common sysc register bits found on omap4, also known as type3
1520 static const struct sysc_regbits sysc_regbits_omap4_simple = {
1521 .dmadisable_shift = -ENODEV,
1524 .clkact_shift = -ENODEV,
1525 .enwkup_shift = -ENODEV,
1526 .srst_shift = -ENODEV,
1527 .emufree_shift = -ENODEV,
1528 .autoidle_shift = -ENODEV,
1531 static const struct sysc_capabilities sysc_omap4_simple = {
1532 .type = TI_SYSC_OMAP4_SIMPLE,
1533 .regbits = &sysc_regbits_omap4_simple,
1537 * SmartReflex sysc found on omap34xx
1539 static const struct sysc_regbits sysc_regbits_omap34xx_sr = {
1540 .dmadisable_shift = -ENODEV,
1541 .midle_shift = -ENODEV,
1542 .sidle_shift = -ENODEV,
1544 .enwkup_shift = -ENODEV,
1545 .srst_shift = -ENODEV,
1546 .emufree_shift = -ENODEV,
1547 .autoidle_shift = -ENODEV,
1550 static const struct sysc_capabilities sysc_34xx_sr = {
1551 .type = TI_SYSC_OMAP34XX_SR,
1552 .sysc_mask = SYSC_OMAP2_CLOCKACTIVITY,
1553 .regbits = &sysc_regbits_omap34xx_sr,
1554 .mod_quirks = SYSC_QUIRK_USE_CLOCKACT | SYSC_QUIRK_UNCACHED |
1555 SYSC_QUIRK_LEGACY_IDLE,
1559 * SmartReflex sysc found on omap36xx and later
1561 static const struct sysc_regbits sysc_regbits_omap36xx_sr = {
1562 .dmadisable_shift = -ENODEV,
1563 .midle_shift = -ENODEV,
1565 .clkact_shift = -ENODEV,
1567 .srst_shift = -ENODEV,
1568 .emufree_shift = -ENODEV,
1569 .autoidle_shift = -ENODEV,
1572 static const struct sysc_capabilities sysc_36xx_sr = {
1573 .type = TI_SYSC_OMAP36XX_SR,
1574 .sysc_mask = SYSC_OMAP3_SR_ENAWAKEUP,
1575 .regbits = &sysc_regbits_omap36xx_sr,
1576 .mod_quirks = SYSC_QUIRK_UNCACHED | SYSC_QUIRK_LEGACY_IDLE,
1579 static const struct sysc_capabilities sysc_omap4_sr = {
1580 .type = TI_SYSC_OMAP4_SR,
1581 .regbits = &sysc_regbits_omap36xx_sr,
1582 .mod_quirks = SYSC_QUIRK_LEGACY_IDLE,
1586 * McASP register bits found on omap4 and later
1588 static const struct sysc_regbits sysc_regbits_omap4_mcasp = {
1589 .dmadisable_shift = -ENODEV,
1590 .midle_shift = -ENODEV,
1592 .clkact_shift = -ENODEV,
1593 .enwkup_shift = -ENODEV,
1594 .srst_shift = -ENODEV,
1595 .emufree_shift = -ENODEV,
1596 .autoidle_shift = -ENODEV,
1599 static const struct sysc_capabilities sysc_omap4_mcasp = {
1600 .type = TI_SYSC_OMAP4_MCASP,
1601 .regbits = &sysc_regbits_omap4_mcasp,
1605 * FS USB host found on omap4 and later
1607 static const struct sysc_regbits sysc_regbits_omap4_usb_host_fs = {
1608 .dmadisable_shift = -ENODEV,
1609 .midle_shift = -ENODEV,
1611 .clkact_shift = -ENODEV,
1613 .srst_shift = -ENODEV,
1614 .emufree_shift = -ENODEV,
1615 .autoidle_shift = -ENODEV,
1618 static const struct sysc_capabilities sysc_omap4_usb_host_fs = {
1619 .type = TI_SYSC_OMAP4_USB_HOST_FS,
1620 .sysc_mask = SYSC_OMAP2_ENAWAKEUP,
1621 .regbits = &sysc_regbits_omap4_usb_host_fs,
1624 static const struct sysc_regbits sysc_regbits_dra7_mcan = {
1625 .dmadisable_shift = -ENODEV,
1626 .midle_shift = -ENODEV,
1627 .sidle_shift = -ENODEV,
1628 .clkact_shift = -ENODEV,
1631 .emufree_shift = -ENODEV,
1632 .autoidle_shift = -ENODEV,
1635 static const struct sysc_capabilities sysc_dra7_mcan = {
1636 .type = TI_SYSC_DRA7_MCAN,
1637 .sysc_mask = SYSC_DRA7_MCAN_ENAWAKEUP | SYSC_OMAP4_SOFTRESET,
1638 .regbits = &sysc_regbits_dra7_mcan,
1641 static int sysc_init_pdata(struct sysc *ddata)
1643 struct ti_sysc_platform_data *pdata = dev_get_platdata(ddata->dev);
1644 struct ti_sysc_module_data mdata;
1647 if (!pdata || !ddata->legacy_mode)
1650 mdata.name = ddata->legacy_mode;
1651 mdata.module_pa = ddata->module_pa;
1652 mdata.module_size = ddata->module_size;
1653 mdata.offsets = ddata->offsets;
1654 mdata.nr_offsets = SYSC_MAX_REGS;
1655 mdata.cap = ddata->cap;
1656 mdata.cfg = &ddata->cfg;
1658 if (!pdata->init_module)
1661 error = pdata->init_module(ddata->dev, &mdata, &ddata->cookie);
1662 if (error == -EEXIST)
1668 static int sysc_init_match(struct sysc *ddata)
1670 const struct sysc_capabilities *cap;
1672 cap = of_device_get_match_data(ddata->dev);
1678 ddata->cfg.quirks |= ddata->cap->mod_quirks;
1683 static void ti_sysc_idle(struct work_struct *work)
1687 ddata = container_of(work, struct sysc, idle_work.work);
1689 if (pm_runtime_active(ddata->dev))
1690 pm_runtime_put_sync(ddata->dev);
1693 static const struct of_device_id sysc_match_table[] = {
1694 { .compatible = "simple-bus", },
1698 static int sysc_probe(struct platform_device *pdev)
1700 struct ti_sysc_platform_data *pdata = dev_get_platdata(&pdev->dev);
1704 ddata = devm_kzalloc(&pdev->dev, sizeof(*ddata), GFP_KERNEL);
1708 ddata->dev = &pdev->dev;
1709 platform_set_drvdata(pdev, ddata);
1711 error = sysc_init_match(ddata);
1715 error = sysc_init_dts_quirks(ddata);
1719 error = sysc_get_clocks(ddata);
1723 error = sysc_map_and_check_registers(ddata);
1727 error = sysc_init_sysc_mask(ddata);
1731 error = sysc_init_idlemodes(ddata);
1735 error = sysc_init_syss_mask(ddata);
1739 error = sysc_init_pdata(ddata);
1743 error = sysc_init_resets(ddata);
1747 pm_runtime_enable(ddata->dev);
1748 error = sysc_init_module(ddata);
1752 error = pm_runtime_get_sync(ddata->dev);
1754 pm_runtime_put_noidle(ddata->dev);
1755 pm_runtime_disable(ddata->dev);
1759 sysc_show_registers(ddata);
1761 ddata->dev->type = &sysc_device_type;
1762 error = of_platform_populate(ddata->dev->of_node, sysc_match_table,
1763 pdata ? pdata->auxdata : NULL,
1768 INIT_DELAYED_WORK(&ddata->idle_work, ti_sysc_idle);
1770 /* At least earlycon won't survive without deferred idle */
1771 if (ddata->cfg.quirks & (SYSC_QUIRK_NO_IDLE_ON_INIT |
1772 SYSC_QUIRK_NO_RESET_ON_INIT)) {
1773 schedule_delayed_work(&ddata->idle_work, 3000);
1775 pm_runtime_put(&pdev->dev);
1778 if (!of_get_available_child_count(ddata->dev->of_node))
1779 reset_control_assert(ddata->rsts);
1784 pm_runtime_put_sync(&pdev->dev);
1785 pm_runtime_disable(&pdev->dev);
1787 sysc_unprepare(ddata);
1792 static int sysc_remove(struct platform_device *pdev)
1794 struct sysc *ddata = platform_get_drvdata(pdev);
1797 cancel_delayed_work_sync(&ddata->idle_work);
1799 error = pm_runtime_get_sync(ddata->dev);
1801 pm_runtime_put_noidle(ddata->dev);
1802 pm_runtime_disable(ddata->dev);
1806 of_platform_depopulate(&pdev->dev);
1808 pm_runtime_put_sync(&pdev->dev);
1809 pm_runtime_disable(&pdev->dev);
1810 reset_control_assert(ddata->rsts);
1813 sysc_unprepare(ddata);
1818 static const struct of_device_id sysc_match[] = {
1819 { .compatible = "ti,sysc-omap2", .data = &sysc_omap2, },
1820 { .compatible = "ti,sysc-omap2-timer", .data = &sysc_omap2_timer, },
1821 { .compatible = "ti,sysc-omap4", .data = &sysc_omap4, },
1822 { .compatible = "ti,sysc-omap4-timer", .data = &sysc_omap4_timer, },
1823 { .compatible = "ti,sysc-omap4-simple", .data = &sysc_omap4_simple, },
1824 { .compatible = "ti,sysc-omap3430-sr", .data = &sysc_34xx_sr, },
1825 { .compatible = "ti,sysc-omap3630-sr", .data = &sysc_36xx_sr, },
1826 { .compatible = "ti,sysc-omap4-sr", .data = &sysc_omap4_sr, },
1827 { .compatible = "ti,sysc-omap3-sham", .data = &sysc_omap3_sham, },
1828 { .compatible = "ti,sysc-omap-aes", .data = &sysc_omap3_aes, },
1829 { .compatible = "ti,sysc-mcasp", .data = &sysc_omap4_mcasp, },
1830 { .compatible = "ti,sysc-usb-host-fs",
1831 .data = &sysc_omap4_usb_host_fs, },
1832 { .compatible = "ti,sysc-dra7-mcan", .data = &sysc_dra7_mcan, },
1835 MODULE_DEVICE_TABLE(of, sysc_match);
1837 static struct platform_driver sysc_driver = {
1838 .probe = sysc_probe,
1839 .remove = sysc_remove,
1842 .of_match_table = sysc_match,
1847 static int __init sysc_init(void)
1849 bus_register_notifier(&platform_bus_type, &sysc_nb);
1851 return platform_driver_register(&sysc_driver);
1853 module_init(sysc_init);
1855 static void __exit sysc_exit(void)
1857 bus_unregister_notifier(&platform_bus_type, &sysc_nb);
1858 platform_driver_unregister(&sysc_driver);
1860 module_exit(sysc_exit);
1862 MODULE_DESCRIPTION("TI sysc interconnect target driver");
1863 MODULE_LICENSE("GPL v2");