Merge tag 'drm-misc-next-2018-06-21' of git://anongit.freedesktop.org/drm/drm-misc...
[muen/linux.git] / drivers / gpu / drm / amd / amdgpu / amdgpu_prime.c
1 /*
2  * Copyright 2012 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * based on nouveau_prime.c
23  *
24  * Authors: Alex Deucher
25  */
26 #include <drm/drmP.h>
27
28 #include "amdgpu.h"
29 #include "amdgpu_display.h"
30 #include <drm/amdgpu_drm.h>
31 #include <linux/dma-buf.h>
32
33 static const struct dma_buf_ops amdgpu_dmabuf_ops;
34
35 struct sg_table *amdgpu_gem_prime_get_sg_table(struct drm_gem_object *obj)
36 {
37         struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
38         int npages = bo->tbo.num_pages;
39
40         return drm_prime_pages_to_sg(bo->tbo.ttm->pages, npages);
41 }
42
43 void *amdgpu_gem_prime_vmap(struct drm_gem_object *obj)
44 {
45         struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
46         int ret;
47
48         ret = ttm_bo_kmap(&bo->tbo, 0, bo->tbo.num_pages,
49                           &bo->dma_buf_vmap);
50         if (ret)
51                 return ERR_PTR(ret);
52
53         return bo->dma_buf_vmap.virtual;
54 }
55
56 void amdgpu_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr)
57 {
58         struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
59
60         ttm_bo_kunmap(&bo->dma_buf_vmap);
61 }
62
63 int amdgpu_gem_prime_mmap(struct drm_gem_object *obj, struct vm_area_struct *vma)
64 {
65         struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
66         struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
67         unsigned asize = amdgpu_bo_size(bo);
68         int ret;
69
70         if (!vma->vm_file)
71                 return -ENODEV;
72
73         if (adev == NULL)
74                 return -ENODEV;
75
76         /* Check for valid size. */
77         if (asize < vma->vm_end - vma->vm_start)
78                 return -EINVAL;
79
80         if (amdgpu_ttm_tt_get_usermm(bo->tbo.ttm) ||
81             (bo->flags & AMDGPU_GEM_CREATE_NO_CPU_ACCESS)) {
82                 return -EPERM;
83         }
84         vma->vm_pgoff += amdgpu_bo_mmap_offset(bo) >> PAGE_SHIFT;
85
86         /* prime mmap does not need to check access, so allow here */
87         ret = drm_vma_node_allow(&obj->vma_node, vma->vm_file->private_data);
88         if (ret)
89                 return ret;
90
91         ret = ttm_bo_mmap(vma->vm_file, vma, &adev->mman.bdev);
92         drm_vma_node_revoke(&obj->vma_node, vma->vm_file->private_data);
93
94         return ret;
95 }
96
97 struct drm_gem_object *
98 amdgpu_gem_prime_import_sg_table(struct drm_device *dev,
99                                  struct dma_buf_attachment *attach,
100                                  struct sg_table *sg)
101 {
102         struct reservation_object *resv = attach->dmabuf->resv;
103         struct amdgpu_device *adev = dev->dev_private;
104         struct amdgpu_bo *bo;
105         struct amdgpu_bo_param bp;
106         int ret;
107
108         memset(&bp, 0, sizeof(bp));
109         bp.size = attach->dmabuf->size;
110         bp.byte_align = PAGE_SIZE;
111         bp.domain = AMDGPU_GEM_DOMAIN_CPU;
112         bp.flags = 0;
113         bp.type = ttm_bo_type_sg;
114         bp.resv = resv;
115         ww_mutex_lock(&resv->lock, NULL);
116         ret = amdgpu_bo_create(adev, &bp, &bo);
117         if (ret)
118                 goto error;
119
120         bo->tbo.sg = sg;
121         bo->tbo.ttm->sg = sg;
122         bo->allowed_domains = AMDGPU_GEM_DOMAIN_GTT;
123         bo->preferred_domains = AMDGPU_GEM_DOMAIN_GTT;
124         if (attach->dmabuf->ops != &amdgpu_dmabuf_ops)
125                 bo->prime_shared_count = 1;
126
127         ww_mutex_unlock(&resv->lock);
128         return &bo->gem_base;
129
130 error:
131         ww_mutex_unlock(&resv->lock);
132         return ERR_PTR(ret);
133 }
134
135 static int amdgpu_gem_map_attach(struct dma_buf *dma_buf,
136                                  struct dma_buf_attachment *attach)
137 {
138         struct drm_gem_object *obj = dma_buf->priv;
139         struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
140         struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
141         long r;
142
143         r = drm_gem_map_attach(dma_buf, attach);
144         if (r)
145                 return r;
146
147         r = amdgpu_bo_reserve(bo, false);
148         if (unlikely(r != 0))
149                 goto error_detach;
150
151
152         if (attach->dev->driver != adev->dev->driver) {
153                 /*
154                  * Wait for all shared fences to complete before we switch to future
155                  * use of exclusive fence on this prime shared bo.
156                  */
157                 r = reservation_object_wait_timeout_rcu(bo->tbo.resv,
158                                                         true, false,
159                                                         MAX_SCHEDULE_TIMEOUT);
160                 if (unlikely(r < 0)) {
161                         DRM_DEBUG_PRIME("Fence wait failed: %li\n", r);
162                         goto error_unreserve;
163                 }
164         }
165
166         /* pin buffer into GTT */
167         r = amdgpu_bo_pin(bo, AMDGPU_GEM_DOMAIN_GTT, NULL);
168         if (r)
169                 goto error_unreserve;
170
171         if (attach->dev->driver != adev->dev->driver)
172                 bo->prime_shared_count++;
173
174 error_unreserve:
175         amdgpu_bo_unreserve(bo);
176
177 error_detach:
178         if (r)
179                 drm_gem_map_detach(dma_buf, attach);
180         return r;
181 }
182
183 static void amdgpu_gem_map_detach(struct dma_buf *dma_buf,
184                                   struct dma_buf_attachment *attach)
185 {
186         struct drm_gem_object *obj = dma_buf->priv;
187         struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
188         struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
189         int ret = 0;
190
191         ret = amdgpu_bo_reserve(bo, true);
192         if (unlikely(ret != 0))
193                 goto error;
194
195         amdgpu_bo_unpin(bo);
196         if (attach->dev->driver != adev->dev->driver && bo->prime_shared_count)
197                 bo->prime_shared_count--;
198         amdgpu_bo_unreserve(bo);
199
200 error:
201         drm_gem_map_detach(dma_buf, attach);
202 }
203
204 struct reservation_object *amdgpu_gem_prime_res_obj(struct drm_gem_object *obj)
205 {
206         struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
207
208         return bo->tbo.resv;
209 }
210
211 static int amdgpu_gem_begin_cpu_access(struct dma_buf *dma_buf,
212                                        enum dma_data_direction direction)
213 {
214         struct amdgpu_bo *bo = gem_to_amdgpu_bo(dma_buf->priv);
215         struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
216         struct ttm_operation_ctx ctx = { true, false };
217         u32 domain = amdgpu_display_supported_domains(adev);
218         int ret;
219         bool reads = (direction == DMA_BIDIRECTIONAL ||
220                       direction == DMA_FROM_DEVICE);
221
222         if (!reads || !(domain & AMDGPU_GEM_DOMAIN_GTT))
223                 return 0;
224
225         /* move to gtt */
226         ret = amdgpu_bo_reserve(bo, false);
227         if (unlikely(ret != 0))
228                 return ret;
229
230         if (!bo->pin_count && (bo->allowed_domains & AMDGPU_GEM_DOMAIN_GTT)) {
231                 amdgpu_ttm_placement_from_domain(bo, AMDGPU_GEM_DOMAIN_GTT);
232                 ret = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
233         }
234
235         amdgpu_bo_unreserve(bo);
236         return ret;
237 }
238
239 static const struct dma_buf_ops amdgpu_dmabuf_ops = {
240         .attach = amdgpu_gem_map_attach,
241         .detach = amdgpu_gem_map_detach,
242         .map_dma_buf = drm_gem_map_dma_buf,
243         .unmap_dma_buf = drm_gem_unmap_dma_buf,
244         .release = drm_gem_dmabuf_release,
245         .begin_cpu_access = amdgpu_gem_begin_cpu_access,
246         .map = drm_gem_dmabuf_kmap,
247         .unmap = drm_gem_dmabuf_kunmap,
248         .mmap = drm_gem_dmabuf_mmap,
249         .vmap = drm_gem_dmabuf_vmap,
250         .vunmap = drm_gem_dmabuf_vunmap,
251 };
252
253 struct dma_buf *amdgpu_gem_prime_export(struct drm_device *dev,
254                                         struct drm_gem_object *gobj,
255                                         int flags)
256 {
257         struct amdgpu_bo *bo = gem_to_amdgpu_bo(gobj);
258         struct dma_buf *buf;
259
260         if (amdgpu_ttm_tt_get_usermm(bo->tbo.ttm) ||
261             bo->flags & AMDGPU_GEM_CREATE_VM_ALWAYS_VALID)
262                 return ERR_PTR(-EPERM);
263
264         buf = drm_gem_prime_export(dev, gobj, flags);
265         if (!IS_ERR(buf)) {
266                 buf->file->f_mapping = dev->anon_inode->i_mapping;
267                 buf->ops = &amdgpu_dmabuf_ops;
268         }
269
270         return buf;
271 }
272
273 struct drm_gem_object *amdgpu_gem_prime_import(struct drm_device *dev,
274                                             struct dma_buf *dma_buf)
275 {
276         struct drm_gem_object *obj;
277
278         if (dma_buf->ops == &amdgpu_dmabuf_ops) {
279                 obj = dma_buf->priv;
280                 if (obj->dev == dev) {
281                         /*
282                          * Importing dmabuf exported from out own gem increases
283                          * refcount on gem itself instead of f_count of dmabuf.
284                          */
285                         drm_gem_object_get(obj);
286                         return obj;
287                 }
288         }
289
290         return drm_gem_prime_import(dev, dma_buf);
291 }