Merge tag 'drm-next-2018-11-02' of git://anongit.freedesktop.org/drm/drm
[muen/linux.git] / drivers / gpu / drm / drm_edid.c
1 /*
2  * Copyright (c) 2006 Luc Verhaegen (quirks list)
3  * Copyright (c) 2007-2008 Intel Corporation
4  *   Jesse Barnes <jesse.barnes@intel.com>
5  * Copyright 2010 Red Hat, Inc.
6  *
7  * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from
8  * FB layer.
9  *   Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com>
10  *
11  * Permission is hereby granted, free of charge, to any person obtaining a
12  * copy of this software and associated documentation files (the "Software"),
13  * to deal in the Software without restriction, including without limitation
14  * the rights to use, copy, modify, merge, publish, distribute, sub license,
15  * and/or sell copies of the Software, and to permit persons to whom the
16  * Software is furnished to do so, subject to the following conditions:
17  *
18  * The above copyright notice and this permission notice (including the
19  * next paragraph) shall be included in all copies or substantial portions
20  * of the Software.
21  *
22  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
23  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
24  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
25  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
26  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
27  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
28  * DEALINGS IN THE SOFTWARE.
29  */
30 #include <linux/kernel.h>
31 #include <linux/slab.h>
32 #include <linux/hdmi.h>
33 #include <linux/i2c.h>
34 #include <linux/module.h>
35 #include <linux/vga_switcheroo.h>
36 #include <drm/drmP.h>
37 #include <drm/drm_edid.h>
38 #include <drm/drm_encoder.h>
39 #include <drm/drm_displayid.h>
40 #include <drm/drm_scdc_helper.h>
41
42 #include "drm_crtc_internal.h"
43
44 #define version_greater(edid, maj, min) \
45         (((edid)->version > (maj)) || \
46          ((edid)->version == (maj) && (edid)->revision > (min)))
47
48 #define EDID_EST_TIMINGS 16
49 #define EDID_STD_TIMINGS 8
50 #define EDID_DETAILED_TIMINGS 4
51
52 /*
53  * EDID blocks out in the wild have a variety of bugs, try to collect
54  * them here (note that userspace may work around broken monitors first,
55  * but fixes should make their way here so that the kernel "just works"
56  * on as many displays as possible).
57  */
58
59 /* First detailed mode wrong, use largest 60Hz mode */
60 #define EDID_QUIRK_PREFER_LARGE_60              (1 << 0)
61 /* Reported 135MHz pixel clock is too high, needs adjustment */
62 #define EDID_QUIRK_135_CLOCK_TOO_HIGH           (1 << 1)
63 /* Prefer the largest mode at 75 Hz */
64 #define EDID_QUIRK_PREFER_LARGE_75              (1 << 2)
65 /* Detail timing is in cm not mm */
66 #define EDID_QUIRK_DETAILED_IN_CM               (1 << 3)
67 /* Detailed timing descriptors have bogus size values, so just take the
68  * maximum size and use that.
69  */
70 #define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE    (1 << 4)
71 /* Monitor forgot to set the first detailed is preferred bit. */
72 #define EDID_QUIRK_FIRST_DETAILED_PREFERRED     (1 << 5)
73 /* use +hsync +vsync for detailed mode */
74 #define EDID_QUIRK_DETAILED_SYNC_PP             (1 << 6)
75 /* Force reduced-blanking timings for detailed modes */
76 #define EDID_QUIRK_FORCE_REDUCED_BLANKING       (1 << 7)
77 /* Force 8bpc */
78 #define EDID_QUIRK_FORCE_8BPC                   (1 << 8)
79 /* Force 12bpc */
80 #define EDID_QUIRK_FORCE_12BPC                  (1 << 9)
81 /* Force 6bpc */
82 #define EDID_QUIRK_FORCE_6BPC                   (1 << 10)
83 /* Force 10bpc */
84 #define EDID_QUIRK_FORCE_10BPC                  (1 << 11)
85 /* Non desktop display (i.e. HMD) */
86 #define EDID_QUIRK_NON_DESKTOP                  (1 << 12)
87
88 struct detailed_mode_closure {
89         struct drm_connector *connector;
90         struct edid *edid;
91         bool preferred;
92         u32 quirks;
93         int modes;
94 };
95
96 #define LEVEL_DMT       0
97 #define LEVEL_GTF       1
98 #define LEVEL_GTF2      2
99 #define LEVEL_CVT       3
100
101 static const struct edid_quirk {
102         char vendor[4];
103         int product_id;
104         u32 quirks;
105 } edid_quirk_list[] = {
106         /* Acer AL1706 */
107         { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 },
108         /* Acer F51 */
109         { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 },
110         /* Unknown Acer */
111         { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
112
113         /* AEO model 0 reports 8 bpc, but is a 6 bpc panel */
114         { "AEO", 0, EDID_QUIRK_FORCE_6BPC },
115
116         /* BOE model on HP Pavilion 15-n233sl reports 8 bpc, but is a 6 bpc panel */
117         { "BOE", 0x78b, EDID_QUIRK_FORCE_6BPC },
118
119         /* CPT panel of Asus UX303LA reports 8 bpc, but is a 6 bpc panel */
120         { "CPT", 0x17df, EDID_QUIRK_FORCE_6BPC },
121
122         /* SDC panel of Lenovo B50-80 reports 8 bpc, but is a 6 bpc panel */
123         { "SDC", 0x3652, EDID_QUIRK_FORCE_6BPC },
124
125         /* BOE model 0x0771 reports 8 bpc, but is a 6 bpc panel */
126         { "BOE", 0x0771, EDID_QUIRK_FORCE_6BPC },
127
128         /* Belinea 10 15 55 */
129         { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 },
130         { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 },
131
132         /* Envision Peripherals, Inc. EN-7100e */
133         { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH },
134         /* Envision EN2028 */
135         { "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60 },
136
137         /* Funai Electronics PM36B */
138         { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 |
139           EDID_QUIRK_DETAILED_IN_CM },
140
141         /* LGD panel of HP zBook 17 G2, eDP 10 bpc, but reports unknown bpc */
142         { "LGD", 764, EDID_QUIRK_FORCE_10BPC },
143
144         /* LG Philips LCD LP154W01-A5 */
145         { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
146         { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
147
148         /* Philips 107p5 CRT */
149         { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
150
151         /* Proview AY765C */
152         { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
153
154         /* Samsung SyncMaster 205BW.  Note: irony */
155         { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP },
156         /* Samsung SyncMaster 22[5-6]BW */
157         { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 },
158         { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 },
159
160         /* Sony PVM-2541A does up to 12 bpc, but only reports max 8 bpc */
161         { "SNY", 0x2541, EDID_QUIRK_FORCE_12BPC },
162
163         /* ViewSonic VA2026w */
164         { "VSC", 5020, EDID_QUIRK_FORCE_REDUCED_BLANKING },
165
166         /* Medion MD 30217 PG */
167         { "MED", 0x7b8, EDID_QUIRK_PREFER_LARGE_75 },
168
169         /* Panel in Samsung NP700G7A-S01PL notebook reports 6bpc */
170         { "SEC", 0xd033, EDID_QUIRK_FORCE_8BPC },
171
172         /* Rotel RSX-1058 forwards sink's EDID but only does HDMI 1.1*/
173         { "ETR", 13896, EDID_QUIRK_FORCE_8BPC },
174
175         /* HTC Vive and Vive Pro VR Headsets */
176         { "HVR", 0xaa01, EDID_QUIRK_NON_DESKTOP },
177         { "HVR", 0xaa02, EDID_QUIRK_NON_DESKTOP },
178
179         /* Oculus Rift DK1, DK2, and CV1 VR Headsets */
180         { "OVR", 0x0001, EDID_QUIRK_NON_DESKTOP },
181         { "OVR", 0x0003, EDID_QUIRK_NON_DESKTOP },
182         { "OVR", 0x0004, EDID_QUIRK_NON_DESKTOP },
183
184         /* Windows Mixed Reality Headsets */
185         { "ACR", 0x7fce, EDID_QUIRK_NON_DESKTOP },
186         { "HPN", 0x3515, EDID_QUIRK_NON_DESKTOP },
187         { "LEN", 0x0408, EDID_QUIRK_NON_DESKTOP },
188         { "LEN", 0xb800, EDID_QUIRK_NON_DESKTOP },
189         { "FUJ", 0x1970, EDID_QUIRK_NON_DESKTOP },
190         { "DEL", 0x7fce, EDID_QUIRK_NON_DESKTOP },
191         { "SEC", 0x144a, EDID_QUIRK_NON_DESKTOP },
192         { "AUS", 0xc102, EDID_QUIRK_NON_DESKTOP },
193
194         /* Sony PlayStation VR Headset */
195         { "SNY", 0x0704, EDID_QUIRK_NON_DESKTOP },
196 };
197
198 /*
199  * Autogenerated from the DMT spec.
200  * This table is copied from xfree86/modes/xf86EdidModes.c.
201  */
202 static const struct drm_display_mode drm_dmt_modes[] = {
203         /* 0x01 - 640x350@85Hz */
204         { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
205                    736, 832, 0, 350, 382, 385, 445, 0,
206                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
207         /* 0x02 - 640x400@85Hz */
208         { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
209                    736, 832, 0, 400, 401, 404, 445, 0,
210                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
211         /* 0x03 - 720x400@85Hz */
212         { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 756,
213                    828, 936, 0, 400, 401, 404, 446, 0,
214                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
215         /* 0x04 - 640x480@60Hz */
216         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
217                    752, 800, 0, 480, 490, 492, 525, 0,
218                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
219         /* 0x05 - 640x480@72Hz */
220         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
221                    704, 832, 0, 480, 489, 492, 520, 0,
222                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
223         /* 0x06 - 640x480@75Hz */
224         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
225                    720, 840, 0, 480, 481, 484, 500, 0,
226                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
227         /* 0x07 - 640x480@85Hz */
228         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 36000, 640, 696,
229                    752, 832, 0, 480, 481, 484, 509, 0,
230                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
231         /* 0x08 - 800x600@56Hz */
232         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
233                    896, 1024, 0, 600, 601, 603, 625, 0,
234                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
235         /* 0x09 - 800x600@60Hz */
236         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
237                    968, 1056, 0, 600, 601, 605, 628, 0,
238                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
239         /* 0x0a - 800x600@72Hz */
240         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
241                    976, 1040, 0, 600, 637, 643, 666, 0,
242                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
243         /* 0x0b - 800x600@75Hz */
244         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
245                    896, 1056, 0, 600, 601, 604, 625, 0,
246                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
247         /* 0x0c - 800x600@85Hz */
248         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 56250, 800, 832,
249                    896, 1048, 0, 600, 601, 604, 631, 0,
250                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
251         /* 0x0d - 800x600@120Hz RB */
252         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 73250, 800, 848,
253                    880, 960, 0, 600, 603, 607, 636, 0,
254                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
255         /* 0x0e - 848x480@60Hz */
256         { DRM_MODE("848x480", DRM_MODE_TYPE_DRIVER, 33750, 848, 864,
257                    976, 1088, 0, 480, 486, 494, 517, 0,
258                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
259         /* 0x0f - 1024x768@43Hz, interlace */
260         { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER, 44900, 1024, 1032,
261                    1208, 1264, 0, 768, 768, 776, 817, 0,
262                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
263                    DRM_MODE_FLAG_INTERLACE) },
264         /* 0x10 - 1024x768@60Hz */
265         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
266                    1184, 1344, 0, 768, 771, 777, 806, 0,
267                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
268         /* 0x11 - 1024x768@70Hz */
269         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
270                    1184, 1328, 0, 768, 771, 777, 806, 0,
271                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
272         /* 0x12 - 1024x768@75Hz */
273         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040,
274                    1136, 1312, 0, 768, 769, 772, 800, 0,
275                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
276         /* 0x13 - 1024x768@85Hz */
277         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 94500, 1024, 1072,
278                    1168, 1376, 0, 768, 769, 772, 808, 0,
279                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
280         /* 0x14 - 1024x768@120Hz RB */
281         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 115500, 1024, 1072,
282                    1104, 1184, 0, 768, 771, 775, 813, 0,
283                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
284         /* 0x15 - 1152x864@75Hz */
285         { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
286                    1344, 1600, 0, 864, 865, 868, 900, 0,
287                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
288         /* 0x55 - 1280x720@60Hz */
289         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390,
290                    1430, 1650, 0, 720, 725, 730, 750, 0,
291                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
292         /* 0x16 - 1280x768@60Hz RB */
293         { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 68250, 1280, 1328,
294                    1360, 1440, 0, 768, 771, 778, 790, 0,
295                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
296         /* 0x17 - 1280x768@60Hz */
297         { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
298                    1472, 1664, 0, 768, 771, 778, 798, 0,
299                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
300         /* 0x18 - 1280x768@75Hz */
301         { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 102250, 1280, 1360,
302                    1488, 1696, 0, 768, 771, 778, 805, 0,
303                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
304         /* 0x19 - 1280x768@85Hz */
305         { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 117500, 1280, 1360,
306                    1496, 1712, 0, 768, 771, 778, 809, 0,
307                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
308         /* 0x1a - 1280x768@120Hz RB */
309         { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 140250, 1280, 1328,
310                    1360, 1440, 0, 768, 771, 778, 813, 0,
311                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
312         /* 0x1b - 1280x800@60Hz RB */
313         { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 71000, 1280, 1328,
314                    1360, 1440, 0, 800, 803, 809, 823, 0,
315                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
316         /* 0x1c - 1280x800@60Hz */
317         { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
318                    1480, 1680, 0, 800, 803, 809, 831, 0,
319                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
320         /* 0x1d - 1280x800@75Hz */
321         { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 106500, 1280, 1360,
322                    1488, 1696, 0, 800, 803, 809, 838, 0,
323                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
324         /* 0x1e - 1280x800@85Hz */
325         { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 122500, 1280, 1360,
326                    1496, 1712, 0, 800, 803, 809, 843, 0,
327                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
328         /* 0x1f - 1280x800@120Hz RB */
329         { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 146250, 1280, 1328,
330                    1360, 1440, 0, 800, 803, 809, 847, 0,
331                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
332         /* 0x20 - 1280x960@60Hz */
333         { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
334                    1488, 1800, 0, 960, 961, 964, 1000, 0,
335                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
336         /* 0x21 - 1280x960@85Hz */
337         { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1344,
338                    1504, 1728, 0, 960, 961, 964, 1011, 0,
339                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
340         /* 0x22 - 1280x960@120Hz RB */
341         { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 175500, 1280, 1328,
342                    1360, 1440, 0, 960, 963, 967, 1017, 0,
343                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
344         /* 0x23 - 1280x1024@60Hz */
345         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
346                    1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
347                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
348         /* 0x24 - 1280x1024@75Hz */
349         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
350                    1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
351                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
352         /* 0x25 - 1280x1024@85Hz */
353         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 157500, 1280, 1344,
354                    1504, 1728, 0, 1024, 1025, 1028, 1072, 0,
355                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
356         /* 0x26 - 1280x1024@120Hz RB */
357         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 187250, 1280, 1328,
358                    1360, 1440, 0, 1024, 1027, 1034, 1084, 0,
359                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
360         /* 0x27 - 1360x768@60Hz */
361         { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
362                    1536, 1792, 0, 768, 771, 777, 795, 0,
363                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
364         /* 0x28 - 1360x768@120Hz RB */
365         { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 148250, 1360, 1408,
366                    1440, 1520, 0, 768, 771, 776, 813, 0,
367                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
368         /* 0x51 - 1366x768@60Hz */
369         { DRM_MODE("1366x768", DRM_MODE_TYPE_DRIVER, 85500, 1366, 1436,
370                    1579, 1792, 0, 768, 771, 774, 798, 0,
371                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
372         /* 0x56 - 1366x768@60Hz */
373         { DRM_MODE("1366x768", DRM_MODE_TYPE_DRIVER, 72000, 1366, 1380,
374                    1436, 1500, 0, 768, 769, 772, 800, 0,
375                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
376         /* 0x29 - 1400x1050@60Hz RB */
377         { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 101000, 1400, 1448,
378                    1480, 1560, 0, 1050, 1053, 1057, 1080, 0,
379                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
380         /* 0x2a - 1400x1050@60Hz */
381         { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
382                    1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
383                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
384         /* 0x2b - 1400x1050@75Hz */
385         { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 156000, 1400, 1504,
386                    1648, 1896, 0, 1050, 1053, 1057, 1099, 0,
387                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
388         /* 0x2c - 1400x1050@85Hz */
389         { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 179500, 1400, 1504,
390                    1656, 1912, 0, 1050, 1053, 1057, 1105, 0,
391                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
392         /* 0x2d - 1400x1050@120Hz RB */
393         { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 208000, 1400, 1448,
394                    1480, 1560, 0, 1050, 1053, 1057, 1112, 0,
395                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
396         /* 0x2e - 1440x900@60Hz RB */
397         { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 88750, 1440, 1488,
398                    1520, 1600, 0, 900, 903, 909, 926, 0,
399                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
400         /* 0x2f - 1440x900@60Hz */
401         { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
402                    1672, 1904, 0, 900, 903, 909, 934, 0,
403                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
404         /* 0x30 - 1440x900@75Hz */
405         { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 136750, 1440, 1536,
406                    1688, 1936, 0, 900, 903, 909, 942, 0,
407                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
408         /* 0x31 - 1440x900@85Hz */
409         { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 157000, 1440, 1544,
410                    1696, 1952, 0, 900, 903, 909, 948, 0,
411                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
412         /* 0x32 - 1440x900@120Hz RB */
413         { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 182750, 1440, 1488,
414                    1520, 1600, 0, 900, 903, 909, 953, 0,
415                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
416         /* 0x53 - 1600x900@60Hz */
417         { DRM_MODE("1600x900", DRM_MODE_TYPE_DRIVER, 108000, 1600, 1624,
418                    1704, 1800, 0, 900, 901, 904, 1000, 0,
419                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
420         /* 0x33 - 1600x1200@60Hz */
421         { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
422                    1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
423                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
424         /* 0x34 - 1600x1200@65Hz */
425         { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 175500, 1600, 1664,
426                    1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
427                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
428         /* 0x35 - 1600x1200@70Hz */
429         { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 189000, 1600, 1664,
430                    1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
431                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
432         /* 0x36 - 1600x1200@75Hz */
433         { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 202500, 1600, 1664,
434                    1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
435                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
436         /* 0x37 - 1600x1200@85Hz */
437         { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 229500, 1600, 1664,
438                    1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
439                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
440         /* 0x38 - 1600x1200@120Hz RB */
441         { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 268250, 1600, 1648,
442                    1680, 1760, 0, 1200, 1203, 1207, 1271, 0,
443                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
444         /* 0x39 - 1680x1050@60Hz RB */
445         { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 119000, 1680, 1728,
446                    1760, 1840, 0, 1050, 1053, 1059, 1080, 0,
447                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
448         /* 0x3a - 1680x1050@60Hz */
449         { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
450                    1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
451                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
452         /* 0x3b - 1680x1050@75Hz */
453         { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 187000, 1680, 1800,
454                    1976, 2272, 0, 1050, 1053, 1059, 1099, 0,
455                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
456         /* 0x3c - 1680x1050@85Hz */
457         { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 214750, 1680, 1808,
458                    1984, 2288, 0, 1050, 1053, 1059, 1105, 0,
459                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
460         /* 0x3d - 1680x1050@120Hz RB */
461         { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 245500, 1680, 1728,
462                    1760, 1840, 0, 1050, 1053, 1059, 1112, 0,
463                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
464         /* 0x3e - 1792x1344@60Hz */
465         { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
466                    2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
467                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
468         /* 0x3f - 1792x1344@75Hz */
469         { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 261000, 1792, 1888,
470                    2104, 2456, 0, 1344, 1345, 1348, 1417, 0,
471                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
472         /* 0x40 - 1792x1344@120Hz RB */
473         { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 333250, 1792, 1840,
474                    1872, 1952, 0, 1344, 1347, 1351, 1423, 0,
475                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
476         /* 0x41 - 1856x1392@60Hz */
477         { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
478                    2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
479                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
480         /* 0x42 - 1856x1392@75Hz */
481         { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 288000, 1856, 1984,
482                    2208, 2560, 0, 1392, 1393, 1396, 1500, 0,
483                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
484         /* 0x43 - 1856x1392@120Hz RB */
485         { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 356500, 1856, 1904,
486                    1936, 2016, 0, 1392, 1395, 1399, 1474, 0,
487                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
488         /* 0x52 - 1920x1080@60Hz */
489         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
490                    2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
491                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
492         /* 0x44 - 1920x1200@60Hz RB */
493         { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 154000, 1920, 1968,
494                    2000, 2080, 0, 1200, 1203, 1209, 1235, 0,
495                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
496         /* 0x45 - 1920x1200@60Hz */
497         { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
498                    2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
499                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
500         /* 0x46 - 1920x1200@75Hz */
501         { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 245250, 1920, 2056,
502                    2264, 2608, 0, 1200, 1203, 1209, 1255, 0,
503                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
504         /* 0x47 - 1920x1200@85Hz */
505         { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 281250, 1920, 2064,
506                    2272, 2624, 0, 1200, 1203, 1209, 1262, 0,
507                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
508         /* 0x48 - 1920x1200@120Hz RB */
509         { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 317000, 1920, 1968,
510                    2000, 2080, 0, 1200, 1203, 1209, 1271, 0,
511                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
512         /* 0x49 - 1920x1440@60Hz */
513         { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
514                    2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
515                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
516         /* 0x4a - 1920x1440@75Hz */
517         { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2064,
518                    2288, 2640, 0, 1440, 1441, 1444, 1500, 0,
519                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
520         /* 0x4b - 1920x1440@120Hz RB */
521         { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 380500, 1920, 1968,
522                    2000, 2080, 0, 1440, 1443, 1447, 1525, 0,
523                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
524         /* 0x54 - 2048x1152@60Hz */
525         { DRM_MODE("2048x1152", DRM_MODE_TYPE_DRIVER, 162000, 2048, 2074,
526                    2154, 2250, 0, 1152, 1153, 1156, 1200, 0,
527                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
528         /* 0x4c - 2560x1600@60Hz RB */
529         { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 268500, 2560, 2608,
530                    2640, 2720, 0, 1600, 1603, 1609, 1646, 0,
531                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
532         /* 0x4d - 2560x1600@60Hz */
533         { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
534                    3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
535                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
536         /* 0x4e - 2560x1600@75Hz */
537         { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 443250, 2560, 2768,
538                    3048, 3536, 0, 1600, 1603, 1609, 1672, 0,
539                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
540         /* 0x4f - 2560x1600@85Hz */
541         { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 505250, 2560, 2768,
542                    3048, 3536, 0, 1600, 1603, 1609, 1682, 0,
543                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
544         /* 0x50 - 2560x1600@120Hz RB */
545         { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 552750, 2560, 2608,
546                    2640, 2720, 0, 1600, 1603, 1609, 1694, 0,
547                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
548         /* 0x57 - 4096x2160@60Hz RB */
549         { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 556744, 4096, 4104,
550                    4136, 4176, 0, 2160, 2208, 2216, 2222, 0,
551                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
552         /* 0x58 - 4096x2160@59.94Hz RB */
553         { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 556188, 4096, 4104,
554                    4136, 4176, 0, 2160, 2208, 2216, 2222, 0,
555                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
556 };
557
558 /*
559  * These more or less come from the DMT spec.  The 720x400 modes are
560  * inferred from historical 80x25 practice.  The 640x480@67 and 832x624@75
561  * modes are old-school Mac modes.  The EDID spec says the 1152x864@75 mode
562  * should be 1152x870, again for the Mac, but instead we use the x864 DMT
563  * mode.
564  *
565  * The DMT modes have been fact-checked; the rest are mild guesses.
566  */
567 static const struct drm_display_mode edid_est_modes[] = {
568         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
569                    968, 1056, 0, 600, 601, 605, 628, 0,
570                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@60Hz */
571         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
572                    896, 1024, 0, 600, 601, 603,  625, 0,
573                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@56Hz */
574         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
575                    720, 840, 0, 480, 481, 484, 500, 0,
576                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@75Hz */
577         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
578                    704,  832, 0, 480, 489, 492, 520, 0,
579                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@72Hz */
580         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 30240, 640, 704,
581                    768,  864, 0, 480, 483, 486, 525, 0,
582                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@67Hz */
583         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
584                    752, 800, 0, 480, 490, 492, 525, 0,
585                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@60Hz */
586         { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 738,
587                    846, 900, 0, 400, 421, 423,  449, 0,
588                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 720x400@88Hz */
589         { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 28320, 720, 738,
590                    846,  900, 0, 400, 412, 414, 449, 0,
591                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 720x400@70Hz */
592         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
593                    1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
594                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1280x1024@75Hz */
595         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040,
596                    1136, 1312, 0,  768, 769, 772, 800, 0,
597                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1024x768@75Hz */
598         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
599                    1184, 1328, 0,  768, 771, 777, 806, 0,
600                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@70Hz */
601         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
602                    1184, 1344, 0,  768, 771, 777, 806, 0,
603                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@60Hz */
604         { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER,44900, 1024, 1032,
605                    1208, 1264, 0, 768, 768, 776, 817, 0,
606                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_INTERLACE) }, /* 1024x768@43Hz */
607         { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 57284, 832, 864,
608                    928, 1152, 0, 624, 625, 628, 667, 0,
609                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 832x624@75Hz */
610         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
611                    896, 1056, 0, 600, 601, 604,  625, 0,
612                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@75Hz */
613         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
614                    976, 1040, 0, 600, 637, 643, 666, 0,
615                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@72Hz */
616         { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
617                    1344, 1600, 0,  864, 865, 868, 900, 0,
618                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1152x864@75Hz */
619 };
620
621 struct minimode {
622         short w;
623         short h;
624         short r;
625         short rb;
626 };
627
628 static const struct minimode est3_modes[] = {
629         /* byte 6 */
630         { 640, 350, 85, 0 },
631         { 640, 400, 85, 0 },
632         { 720, 400, 85, 0 },
633         { 640, 480, 85, 0 },
634         { 848, 480, 60, 0 },
635         { 800, 600, 85, 0 },
636         { 1024, 768, 85, 0 },
637         { 1152, 864, 75, 0 },
638         /* byte 7 */
639         { 1280, 768, 60, 1 },
640         { 1280, 768, 60, 0 },
641         { 1280, 768, 75, 0 },
642         { 1280, 768, 85, 0 },
643         { 1280, 960, 60, 0 },
644         { 1280, 960, 85, 0 },
645         { 1280, 1024, 60, 0 },
646         { 1280, 1024, 85, 0 },
647         /* byte 8 */
648         { 1360, 768, 60, 0 },
649         { 1440, 900, 60, 1 },
650         { 1440, 900, 60, 0 },
651         { 1440, 900, 75, 0 },
652         { 1440, 900, 85, 0 },
653         { 1400, 1050, 60, 1 },
654         { 1400, 1050, 60, 0 },
655         { 1400, 1050, 75, 0 },
656         /* byte 9 */
657         { 1400, 1050, 85, 0 },
658         { 1680, 1050, 60, 1 },
659         { 1680, 1050, 60, 0 },
660         { 1680, 1050, 75, 0 },
661         { 1680, 1050, 85, 0 },
662         { 1600, 1200, 60, 0 },
663         { 1600, 1200, 65, 0 },
664         { 1600, 1200, 70, 0 },
665         /* byte 10 */
666         { 1600, 1200, 75, 0 },
667         { 1600, 1200, 85, 0 },
668         { 1792, 1344, 60, 0 },
669         { 1792, 1344, 75, 0 },
670         { 1856, 1392, 60, 0 },
671         { 1856, 1392, 75, 0 },
672         { 1920, 1200, 60, 1 },
673         { 1920, 1200, 60, 0 },
674         /* byte 11 */
675         { 1920, 1200, 75, 0 },
676         { 1920, 1200, 85, 0 },
677         { 1920, 1440, 60, 0 },
678         { 1920, 1440, 75, 0 },
679 };
680
681 static const struct minimode extra_modes[] = {
682         { 1024, 576,  60, 0 },
683         { 1366, 768,  60, 0 },
684         { 1600, 900,  60, 0 },
685         { 1680, 945,  60, 0 },
686         { 1920, 1080, 60, 0 },
687         { 2048, 1152, 60, 0 },
688         { 2048, 1536, 60, 0 },
689 };
690
691 /*
692  * Probably taken from CEA-861 spec.
693  * This table is converted from xorg's hw/xfree86/modes/xf86EdidModes.c.
694  *
695  * Index using the VIC.
696  */
697 static const struct drm_display_mode edid_cea_modes[] = {
698         /* 0 - dummy, VICs start at 1 */
699         { },
700         /* 1 - 640x480@60Hz 4:3 */
701         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
702                    752, 800, 0, 480, 490, 492, 525, 0,
703                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
704           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
705         /* 2 - 720x480@60Hz 4:3 */
706         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736,
707                    798, 858, 0, 480, 489, 495, 525, 0,
708                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
709           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
710         /* 3 - 720x480@60Hz 16:9 */
711         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736,
712                    798, 858, 0, 480, 489, 495, 525, 0,
713                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
714           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
715         /* 4 - 1280x720@60Hz 16:9 */
716         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390,
717                    1430, 1650, 0, 720, 725, 730, 750, 0,
718                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
719           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
720         /* 5 - 1920x1080i@60Hz 16:9 */
721         { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008,
722                    2052, 2200, 0, 1080, 1084, 1094, 1125, 0,
723                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
724                    DRM_MODE_FLAG_INTERLACE),
725           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
726         /* 6 - 720(1440)x480i@60Hz 4:3 */
727         { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
728                    801, 858, 0, 480, 488, 494, 525, 0,
729                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
730                    DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
731           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
732         /* 7 - 720(1440)x480i@60Hz 16:9 */
733         { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
734                    801, 858, 0, 480, 488, 494, 525, 0,
735                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
736                    DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
737           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
738         /* 8 - 720(1440)x240@60Hz 4:3 */
739         { DRM_MODE("720x240", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
740                    801, 858, 0, 240, 244, 247, 262, 0,
741                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
742                    DRM_MODE_FLAG_DBLCLK),
743           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
744         /* 9 - 720(1440)x240@60Hz 16:9 */
745         { DRM_MODE("720x240", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
746                    801, 858, 0, 240, 244, 247, 262, 0,
747                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
748                    DRM_MODE_FLAG_DBLCLK),
749           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
750         /* 10 - 2880x480i@60Hz 4:3 */
751         { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
752                    3204, 3432, 0, 480, 488, 494, 525, 0,
753                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
754                    DRM_MODE_FLAG_INTERLACE),
755           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
756         /* 11 - 2880x480i@60Hz 16:9 */
757         { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
758                    3204, 3432, 0, 480, 488, 494, 525, 0,
759                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
760                    DRM_MODE_FLAG_INTERLACE),
761           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
762         /* 12 - 2880x240@60Hz 4:3 */
763         { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
764                    3204, 3432, 0, 240, 244, 247, 262, 0,
765                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
766           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
767         /* 13 - 2880x240@60Hz 16:9 */
768         { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
769                    3204, 3432, 0, 240, 244, 247, 262, 0,
770                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
771           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
772         /* 14 - 1440x480@60Hz 4:3 */
773         { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472,
774                    1596, 1716, 0, 480, 489, 495, 525, 0,
775                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
776           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
777         /* 15 - 1440x480@60Hz 16:9 */
778         { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472,
779                    1596, 1716, 0, 480, 489, 495, 525, 0,
780                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
781           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
782         /* 16 - 1920x1080@60Hz 16:9 */
783         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
784                    2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
785                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
786           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
787         /* 17 - 720x576@50Hz 4:3 */
788         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
789                    796, 864, 0, 576, 581, 586, 625, 0,
790                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
791           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
792         /* 18 - 720x576@50Hz 16:9 */
793         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
794                    796, 864, 0, 576, 581, 586, 625, 0,
795                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
796           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
797         /* 19 - 1280x720@50Hz 16:9 */
798         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1720,
799                    1760, 1980, 0, 720, 725, 730, 750, 0,
800                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
801           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
802         /* 20 - 1920x1080i@50Hz 16:9 */
803         { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448,
804                    2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
805                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
806                    DRM_MODE_FLAG_INTERLACE),
807           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
808         /* 21 - 720(1440)x576i@50Hz 4:3 */
809         { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
810                    795, 864, 0, 576, 580, 586, 625, 0,
811                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
812                    DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
813           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
814         /* 22 - 720(1440)x576i@50Hz 16:9 */
815         { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
816                    795, 864, 0, 576, 580, 586, 625, 0,
817                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
818                    DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
819           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
820         /* 23 - 720(1440)x288@50Hz 4:3 */
821         { DRM_MODE("720x288", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
822                    795, 864, 0, 288, 290, 293, 312, 0,
823                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
824                    DRM_MODE_FLAG_DBLCLK),
825           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
826         /* 24 - 720(1440)x288@50Hz 16:9 */
827         { DRM_MODE("720x288", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
828                    795, 864, 0, 288, 290, 293, 312, 0,
829                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
830                    DRM_MODE_FLAG_DBLCLK),
831           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
832         /* 25 - 2880x576i@50Hz 4:3 */
833         { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
834                    3180, 3456, 0, 576, 580, 586, 625, 0,
835                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
836                    DRM_MODE_FLAG_INTERLACE),
837           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
838         /* 26 - 2880x576i@50Hz 16:9 */
839         { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
840                    3180, 3456, 0, 576, 580, 586, 625, 0,
841                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
842                    DRM_MODE_FLAG_INTERLACE),
843           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
844         /* 27 - 2880x288@50Hz 4:3 */
845         { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
846                    3180, 3456, 0, 288, 290, 293, 312, 0,
847                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
848           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
849         /* 28 - 2880x288@50Hz 16:9 */
850         { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
851                    3180, 3456, 0, 288, 290, 293, 312, 0,
852                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
853           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
854         /* 29 - 1440x576@50Hz 4:3 */
855         { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
856                    1592, 1728, 0, 576, 581, 586, 625, 0,
857                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
858           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
859         /* 30 - 1440x576@50Hz 16:9 */
860         { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
861                    1592, 1728, 0, 576, 581, 586, 625, 0,
862                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
863           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
864         /* 31 - 1920x1080@50Hz 16:9 */
865         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,
866                    2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
867                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
868           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
869         /* 32 - 1920x1080@24Hz 16:9 */
870         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2558,
871                    2602, 2750, 0, 1080, 1084, 1089, 1125, 0,
872                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
873           .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
874         /* 33 - 1920x1080@25Hz 16:9 */
875         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448,
876                    2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
877                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
878           .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
879         /* 34 - 1920x1080@30Hz 16:9 */
880         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008,
881                    2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
882                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
883           .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
884         /* 35 - 2880x480@60Hz 4:3 */
885         { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944,
886                    3192, 3432, 0, 480, 489, 495, 525, 0,
887                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
888           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
889         /* 36 - 2880x480@60Hz 16:9 */
890         { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944,
891                    3192, 3432, 0, 480, 489, 495, 525, 0,
892                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
893           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
894         /* 37 - 2880x576@50Hz 4:3 */
895         { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928,
896                    3184, 3456, 0, 576, 581, 586, 625, 0,
897                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
898           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
899         /* 38 - 2880x576@50Hz 16:9 */
900         { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928,
901                    3184, 3456, 0, 576, 581, 586, 625, 0,
902                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
903           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
904         /* 39 - 1920x1080i@50Hz 16:9 */
905         { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 72000, 1920, 1952,
906                    2120, 2304, 0, 1080, 1126, 1136, 1250, 0,
907                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC |
908                    DRM_MODE_FLAG_INTERLACE),
909           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
910         /* 40 - 1920x1080i@100Hz 16:9 */
911         { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,
912                    2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
913                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
914                    DRM_MODE_FLAG_INTERLACE),
915           .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
916         /* 41 - 1280x720@100Hz 16:9 */
917         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1720,
918                    1760, 1980, 0, 720, 725, 730, 750, 0,
919                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
920           .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
921         /* 42 - 720x576@100Hz 4:3 */
922         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
923                    796, 864, 0, 576, 581, 586, 625, 0,
924                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
925           .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
926         /* 43 - 720x576@100Hz 16:9 */
927         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
928                    796, 864, 0, 576, 581, 586, 625, 0,
929                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
930           .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
931         /* 44 - 720(1440)x576i@100Hz 4:3 */
932         { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
933                    795, 864, 0, 576, 580, 586, 625, 0,
934                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
935                    DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
936           .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
937         /* 45 - 720(1440)x576i@100Hz 16:9 */
938         { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
939                    795, 864, 0, 576, 580, 586, 625, 0,
940                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
941                    DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
942           .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
943         /* 46 - 1920x1080i@120Hz 16:9 */
944         { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
945                    2052, 2200, 0, 1080, 1084, 1094, 1125, 0,
946                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
947                    DRM_MODE_FLAG_INTERLACE),
948           .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
949         /* 47 - 1280x720@120Hz 16:9 */
950         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1390,
951                    1430, 1650, 0, 720, 725, 730, 750, 0,
952                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
953           .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
954         /* 48 - 720x480@120Hz 4:3 */
955         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736,
956                    798, 858, 0, 480, 489, 495, 525, 0,
957                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
958           .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
959         /* 49 - 720x480@120Hz 16:9 */
960         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736,
961                    798, 858, 0, 480, 489, 495, 525, 0,
962                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
963           .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
964         /* 50 - 720(1440)x480i@120Hz 4:3 */
965         { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 27000, 720, 739,
966                    801, 858, 0, 480, 488, 494, 525, 0,
967                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
968                    DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
969           .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
970         /* 51 - 720(1440)x480i@120Hz 16:9 */
971         { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 27000, 720, 739,
972                    801, 858, 0, 480, 488, 494, 525, 0,
973                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
974                    DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
975           .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
976         /* 52 - 720x576@200Hz 4:3 */
977         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732,
978                    796, 864, 0, 576, 581, 586, 625, 0,
979                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
980           .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
981         /* 53 - 720x576@200Hz 16:9 */
982         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732,
983                    796, 864, 0, 576, 581, 586, 625, 0,
984                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
985           .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
986         /* 54 - 720(1440)x576i@200Hz 4:3 */
987         { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
988                    795, 864, 0, 576, 580, 586, 625, 0,
989                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
990                    DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
991           .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
992         /* 55 - 720(1440)x576i@200Hz 16:9 */
993         { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
994                    795, 864, 0, 576, 580, 586, 625, 0,
995                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
996                    DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
997           .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
998         /* 56 - 720x480@240Hz 4:3 */
999         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736,
1000                    798, 858, 0, 480, 489, 495, 525, 0,
1001                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
1002           .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
1003         /* 57 - 720x480@240Hz 16:9 */
1004         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736,
1005                    798, 858, 0, 480, 489, 495, 525, 0,
1006                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
1007           .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1008         /* 58 - 720(1440)x480i@240Hz 4:3 */
1009         { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 54000, 720, 739,
1010                    801, 858, 0, 480, 488, 494, 525, 0,
1011                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
1012                    DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
1013           .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
1014         /* 59 - 720(1440)x480i@240Hz 16:9 */
1015         { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 54000, 720, 739,
1016                    801, 858, 0, 480, 488, 494, 525, 0,
1017                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
1018                    DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
1019           .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1020         /* 60 - 1280x720@24Hz 16:9 */
1021         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 59400, 1280, 3040,
1022                    3080, 3300, 0, 720, 725, 730, 750, 0,
1023                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1024           .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1025         /* 61 - 1280x720@25Hz 16:9 */
1026         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3700,
1027                    3740, 3960, 0, 720, 725, 730, 750, 0,
1028                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1029           .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1030         /* 62 - 1280x720@30Hz 16:9 */
1031         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3040,
1032                    3080, 3300, 0, 720, 725, 730, 750, 0,
1033                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1034           .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1035         /* 63 - 1920x1080@120Hz 16:9 */
1036         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2008,
1037                    2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
1038                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1039           .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1040         /* 64 - 1920x1080@100Hz 16:9 */
1041         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2448,
1042                    2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
1043                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1044           .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1045         /* 65 - 1280x720@24Hz 64:27 */
1046         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 59400, 1280, 3040,
1047                    3080, 3300, 0, 720, 725, 730, 750, 0,
1048                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1049           .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1050         /* 66 - 1280x720@25Hz 64:27 */
1051         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3700,
1052                    3740, 3960, 0, 720, 725, 730, 750, 0,
1053                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1054           .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1055         /* 67 - 1280x720@30Hz 64:27 */
1056         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3040,
1057                    3080, 3300, 0, 720, 725, 730, 750, 0,
1058                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1059           .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1060         /* 68 - 1280x720@50Hz 64:27 */
1061         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1720,
1062                    1760, 1980, 0, 720, 725, 730, 750, 0,
1063                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1064           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1065         /* 69 - 1280x720@60Hz 64:27 */
1066         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390,
1067                    1430, 1650, 0, 720, 725, 730, 750, 0,
1068                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1069           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1070         /* 70 - 1280x720@100Hz 64:27 */
1071         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1720,
1072                    1760, 1980, 0, 720, 725, 730, 750, 0,
1073                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1074           .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1075         /* 71 - 1280x720@120Hz 64:27 */
1076         { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1390,
1077                    1430, 1650, 0, 720, 725, 730, 750, 0,
1078                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1079           .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1080         /* 72 - 1920x1080@24Hz 64:27 */
1081         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2558,
1082                    2602, 2750, 0, 1080, 1084, 1089, 1125, 0,
1083                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1084           .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1085         /* 73 - 1920x1080@25Hz 64:27 */
1086         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448,
1087                    2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
1088                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1089           .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1090         /* 74 - 1920x1080@30Hz 64:27 */
1091         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008,
1092                    2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
1093                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1094           .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1095         /* 75 - 1920x1080@50Hz 64:27 */
1096         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,
1097                    2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
1098                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1099           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1100         /* 76 - 1920x1080@60Hz 64:27 */
1101         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
1102                    2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
1103                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1104           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1105         /* 77 - 1920x1080@100Hz 64:27 */
1106         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2448,
1107                    2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
1108                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1109           .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1110         /* 78 - 1920x1080@120Hz 64:27 */
1111         { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2008,
1112                    2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
1113                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1114           .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1115         /* 79 - 1680x720@24Hz 64:27 */
1116         { DRM_MODE("1680x720", DRM_MODE_TYPE_DRIVER, 59400, 1680, 3040,
1117                    3080, 3300, 0, 720, 725, 730, 750, 0,
1118                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1119           .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1120         /* 80 - 1680x720@25Hz 64:27 */
1121         { DRM_MODE("1680x720", DRM_MODE_TYPE_DRIVER, 59400, 1680, 2908,
1122                    2948, 3168, 0, 720, 725, 730, 750, 0,
1123                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1124           .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1125         /* 81 - 1680x720@30Hz 64:27 */
1126         { DRM_MODE("1680x720", DRM_MODE_TYPE_DRIVER, 59400, 1680, 2380,
1127                    2420, 2640, 0, 720, 725, 730, 750, 0,
1128                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1129           .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1130         /* 82 - 1680x720@50Hz 64:27 */
1131         { DRM_MODE("1680x720", DRM_MODE_TYPE_DRIVER, 82500, 1680, 1940,
1132                    1980, 2200, 0, 720, 725, 730, 750, 0,
1133                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1134           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1135         /* 83 - 1680x720@60Hz 64:27 */
1136         { DRM_MODE("1680x720", DRM_MODE_TYPE_DRIVER, 99000, 1680, 1940,
1137                    1980, 2200, 0, 720, 725, 730, 750, 0,
1138                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1139           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1140         /* 84 - 1680x720@100Hz 64:27 */
1141         { DRM_MODE("1680x720", DRM_MODE_TYPE_DRIVER, 165000, 1680, 1740,
1142                    1780, 2000, 0, 720, 725, 730, 825, 0,
1143                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1144           .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1145         /* 85 - 1680x720@120Hz 64:27 */
1146         { DRM_MODE("1680x720", DRM_MODE_TYPE_DRIVER, 198000, 1680, 1740,
1147                    1780, 2000, 0, 720, 725, 730, 825, 0,
1148                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1149           .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1150         /* 86 - 2560x1080@24Hz 64:27 */
1151         { DRM_MODE("2560x1080", DRM_MODE_TYPE_DRIVER, 99000, 2560, 3558,
1152                    3602, 3750, 0, 1080, 1084, 1089, 1100, 0,
1153                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1154           .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1155         /* 87 - 2560x1080@25Hz 64:27 */
1156         { DRM_MODE("2560x1080", DRM_MODE_TYPE_DRIVER, 90000, 2560, 3008,
1157                    3052, 3200, 0, 1080, 1084, 1089, 1125, 0,
1158                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1159           .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1160         /* 88 - 2560x1080@30Hz 64:27 */
1161         { DRM_MODE("2560x1080", DRM_MODE_TYPE_DRIVER, 118800, 2560, 3328,
1162                    3372, 3520, 0, 1080, 1084, 1089, 1125, 0,
1163                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1164           .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1165         /* 89 - 2560x1080@50Hz 64:27 */
1166         { DRM_MODE("2560x1080", DRM_MODE_TYPE_DRIVER, 185625, 2560, 3108,
1167                    3152, 3300, 0, 1080, 1084, 1089, 1125, 0,
1168                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1169           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1170         /* 90 - 2560x1080@60Hz 64:27 */
1171         { DRM_MODE("2560x1080", DRM_MODE_TYPE_DRIVER, 198000, 2560, 2808,
1172                    2852, 3000, 0, 1080, 1084, 1089, 1100, 0,
1173                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1174           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1175         /* 91 - 2560x1080@100Hz 64:27 */
1176         { DRM_MODE("2560x1080", DRM_MODE_TYPE_DRIVER, 371250, 2560, 2778,
1177                    2822, 2970, 0, 1080, 1084, 1089, 1250, 0,
1178                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1179           .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1180         /* 92 - 2560x1080@120Hz 64:27 */
1181         { DRM_MODE("2560x1080", DRM_MODE_TYPE_DRIVER, 495000, 2560, 3108,
1182                    3152, 3300, 0, 1080, 1084, 1089, 1250, 0,
1183                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1184           .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1185         /* 93 - 3840x2160@24Hz 16:9 */
1186         { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, 3840, 5116,
1187                    5204, 5500, 0, 2160, 2168, 2178, 2250, 0,
1188                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1189           .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1190         /* 94 - 3840x2160@25Hz 16:9 */
1191         { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, 3840, 4896,
1192                    4984, 5280, 0, 2160, 2168, 2178, 2250, 0,
1193                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1194           .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1195         /* 95 - 3840x2160@30Hz 16:9 */
1196         { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, 3840, 4016,
1197                    4104, 4400, 0, 2160, 2168, 2178, 2250, 0,
1198                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1199           .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1200         /* 96 - 3840x2160@50Hz 16:9 */
1201         { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 594000, 3840, 4896,
1202                    4984, 5280, 0, 2160, 2168, 2178, 2250, 0,
1203                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1204           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1205         /* 97 - 3840x2160@60Hz 16:9 */
1206         { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 594000, 3840, 4016,
1207                    4104, 4400, 0, 2160, 2168, 2178, 2250, 0,
1208                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1209           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1210         /* 98 - 4096x2160@24Hz 256:135 */
1211         { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 297000, 4096, 5116,
1212                    5204, 5500, 0, 2160, 2168, 2178, 2250, 0,
1213                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1214           .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
1215         /* 99 - 4096x2160@25Hz 256:135 */
1216         { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 297000, 4096, 5064,
1217                    5152, 5280, 0, 2160, 2168, 2178, 2250, 0,
1218                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1219           .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
1220         /* 100 - 4096x2160@30Hz 256:135 */
1221         { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 297000, 4096, 4184,
1222                    4272, 4400, 0, 2160, 2168, 2178, 2250, 0,
1223                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1224           .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
1225         /* 101 - 4096x2160@50Hz 256:135 */
1226         { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 594000, 4096, 5064,
1227                    5152, 5280, 0, 2160, 2168, 2178, 2250, 0,
1228                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1229           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
1230         /* 102 - 4096x2160@60Hz 256:135 */
1231         { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 594000, 4096, 4184,
1232                    4272, 4400, 0, 2160, 2168, 2178, 2250, 0,
1233                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1234           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
1235         /* 103 - 3840x2160@24Hz 64:27 */
1236         { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, 3840, 5116,
1237                    5204, 5500, 0, 2160, 2168, 2178, 2250, 0,
1238                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1239           .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1240         /* 104 - 3840x2160@25Hz 64:27 */
1241         { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, 3840, 4896,
1242                    4984, 5280, 0, 2160, 2168, 2178, 2250, 0,
1243                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1244           .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1245         /* 105 - 3840x2160@30Hz 64:27 */
1246         { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, 3840, 4016,
1247                    4104, 4400, 0, 2160, 2168, 2178, 2250, 0,
1248                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1249           .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1250         /* 106 - 3840x2160@50Hz 64:27 */
1251         { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 594000, 3840, 4896,
1252                    4984, 5280, 0, 2160, 2168, 2178, 2250, 0,
1253                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1254           .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1255         /* 107 - 3840x2160@60Hz 64:27 */
1256         { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 594000, 3840, 4016,
1257                    4104, 4400, 0, 2160, 2168, 2178, 2250, 0,
1258                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1259           .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1260 };
1261
1262 /*
1263  * HDMI 1.4 4k modes. Index using the VIC.
1264  */
1265 static const struct drm_display_mode edid_4k_modes[] = {
1266         /* 0 - dummy, VICs start at 1 */
1267         { },
1268         /* 1 - 3840x2160@30Hz */
1269         { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000,
1270                    3840, 4016, 4104, 4400, 0,
1271                    2160, 2168, 2178, 2250, 0,
1272                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1273           .vrefresh = 30, },
1274         /* 2 - 3840x2160@25Hz */
1275         { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000,
1276                    3840, 4896, 4984, 5280, 0,
1277                    2160, 2168, 2178, 2250, 0,
1278                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1279           .vrefresh = 25, },
1280         /* 3 - 3840x2160@24Hz */
1281         { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000,
1282                    3840, 5116, 5204, 5500, 0,
1283                    2160, 2168, 2178, 2250, 0,
1284                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1285           .vrefresh = 24, },
1286         /* 4 - 4096x2160@24Hz (SMPTE) */
1287         { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 297000,
1288                    4096, 5116, 5204, 5500, 0,
1289                    2160, 2168, 2178, 2250, 0,
1290                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1291           .vrefresh = 24, },
1292 };
1293
1294 /*** DDC fetch and block validation ***/
1295
1296 static const u8 edid_header[] = {
1297         0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
1298 };
1299
1300 /**
1301  * drm_edid_header_is_valid - sanity check the header of the base EDID block
1302  * @raw_edid: pointer to raw base EDID block
1303  *
1304  * Sanity check the header of the base EDID block.
1305  *
1306  * Return: 8 if the header is perfect, down to 0 if it's totally wrong.
1307  */
1308 int drm_edid_header_is_valid(const u8 *raw_edid)
1309 {
1310         int i, score = 0;
1311
1312         for (i = 0; i < sizeof(edid_header); i++)
1313                 if (raw_edid[i] == edid_header[i])
1314                         score++;
1315
1316         return score;
1317 }
1318 EXPORT_SYMBOL(drm_edid_header_is_valid);
1319
1320 static int edid_fixup __read_mostly = 6;
1321 module_param_named(edid_fixup, edid_fixup, int, 0400);
1322 MODULE_PARM_DESC(edid_fixup,
1323                  "Minimum number of valid EDID header bytes (0-8, default 6)");
1324
1325 static void drm_get_displayid(struct drm_connector *connector,
1326                               struct edid *edid);
1327
1328 static int drm_edid_block_checksum(const u8 *raw_edid)
1329 {
1330         int i;
1331         u8 csum = 0;
1332         for (i = 0; i < EDID_LENGTH; i++)
1333                 csum += raw_edid[i];
1334
1335         return csum;
1336 }
1337
1338 static bool drm_edid_is_zero(const u8 *in_edid, int length)
1339 {
1340         if (memchr_inv(in_edid, 0, length))
1341                 return false;
1342
1343         return true;
1344 }
1345
1346 /**
1347  * drm_edid_block_valid - Sanity check the EDID block (base or extension)
1348  * @raw_edid: pointer to raw EDID block
1349  * @block: type of block to validate (0 for base, extension otherwise)
1350  * @print_bad_edid: if true, dump bad EDID blocks to the console
1351  * @edid_corrupt: if true, the header or checksum is invalid
1352  *
1353  * Validate a base or extension EDID block and optionally dump bad blocks to
1354  * the console.
1355  *
1356  * Return: True if the block is valid, false otherwise.
1357  */
1358 bool drm_edid_block_valid(u8 *raw_edid, int block, bool print_bad_edid,
1359                           bool *edid_corrupt)
1360 {
1361         u8 csum;
1362         struct edid *edid = (struct edid *)raw_edid;
1363
1364         if (WARN_ON(!raw_edid))
1365                 return false;
1366
1367         if (edid_fixup > 8 || edid_fixup < 0)
1368                 edid_fixup = 6;
1369
1370         if (block == 0) {
1371                 int score = drm_edid_header_is_valid(raw_edid);
1372                 if (score == 8) {
1373                         if (edid_corrupt)
1374                                 *edid_corrupt = false;
1375                 } else if (score >= edid_fixup) {
1376                         /* Displayport Link CTS Core 1.2 rev1.1 test 4.2.2.6
1377                          * The corrupt flag needs to be set here otherwise, the
1378                          * fix-up code here will correct the problem, the
1379                          * checksum is correct and the test fails
1380                          */
1381                         if (edid_corrupt)
1382                                 *edid_corrupt = true;
1383                         DRM_DEBUG("Fixing EDID header, your hardware may be failing\n");
1384                         memcpy(raw_edid, edid_header, sizeof(edid_header));
1385                 } else {
1386                         if (edid_corrupt)
1387                                 *edid_corrupt = true;
1388                         goto bad;
1389                 }
1390         }
1391
1392         csum = drm_edid_block_checksum(raw_edid);
1393         if (csum) {
1394                 if (edid_corrupt)
1395                         *edid_corrupt = true;
1396
1397                 /* allow CEA to slide through, switches mangle this */
1398                 if (raw_edid[0] == CEA_EXT) {
1399                         DRM_DEBUG("EDID checksum is invalid, remainder is %d\n", csum);
1400                         DRM_DEBUG("Assuming a KVM switch modified the CEA block but left the original checksum\n");
1401                 } else {
1402                         if (print_bad_edid)
1403                                 DRM_NOTE("EDID checksum is invalid, remainder is %d\n", csum);
1404
1405                         goto bad;
1406                 }
1407         }
1408
1409         /* per-block-type checks */
1410         switch (raw_edid[0]) {
1411         case 0: /* base */
1412                 if (edid->version != 1) {
1413                         DRM_NOTE("EDID has major version %d, instead of 1\n", edid->version);
1414                         goto bad;
1415                 }
1416
1417                 if (edid->revision > 4)
1418                         DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n");
1419                 break;
1420
1421         default:
1422                 break;
1423         }
1424
1425         return true;
1426
1427 bad:
1428         if (print_bad_edid) {
1429                 if (drm_edid_is_zero(raw_edid, EDID_LENGTH)) {
1430                         pr_notice("EDID block is all zeroes\n");
1431                 } else {
1432                         pr_notice("Raw EDID:\n");
1433                         print_hex_dump(KERN_NOTICE,
1434                                        " \t", DUMP_PREFIX_NONE, 16, 1,
1435                                        raw_edid, EDID_LENGTH, false);
1436                 }
1437         }
1438         return false;
1439 }
1440 EXPORT_SYMBOL(drm_edid_block_valid);
1441
1442 /**
1443  * drm_edid_is_valid - sanity check EDID data
1444  * @edid: EDID data
1445  *
1446  * Sanity-check an entire EDID record (including extensions)
1447  *
1448  * Return: True if the EDID data is valid, false otherwise.
1449  */
1450 bool drm_edid_is_valid(struct edid *edid)
1451 {
1452         int i;
1453         u8 *raw = (u8 *)edid;
1454
1455         if (!edid)
1456                 return false;
1457
1458         for (i = 0; i <= edid->extensions; i++)
1459                 if (!drm_edid_block_valid(raw + i * EDID_LENGTH, i, true, NULL))
1460                         return false;
1461
1462         return true;
1463 }
1464 EXPORT_SYMBOL(drm_edid_is_valid);
1465
1466 #define DDC_SEGMENT_ADDR 0x30
1467 /**
1468  * drm_do_probe_ddc_edid() - get EDID information via I2C
1469  * @data: I2C device adapter
1470  * @buf: EDID data buffer to be filled
1471  * @block: 128 byte EDID block to start fetching from
1472  * @len: EDID data buffer length to fetch
1473  *
1474  * Try to fetch EDID information by calling I2C driver functions.
1475  *
1476  * Return: 0 on success or -1 on failure.
1477  */
1478 static int
1479 drm_do_probe_ddc_edid(void *data, u8 *buf, unsigned int block, size_t len)
1480 {
1481         struct i2c_adapter *adapter = data;
1482         unsigned char start = block * EDID_LENGTH;
1483         unsigned char segment = block >> 1;
1484         unsigned char xfers = segment ? 3 : 2;
1485         int ret, retries = 5;
1486
1487         /*
1488          * The core I2C driver will automatically retry the transfer if the
1489          * adapter reports EAGAIN. However, we find that bit-banging transfers
1490          * are susceptible to errors under a heavily loaded machine and
1491          * generate spurious NAKs and timeouts. Retrying the transfer
1492          * of the individual block a few times seems to overcome this.
1493          */
1494         do {
1495                 struct i2c_msg msgs[] = {
1496                         {
1497                                 .addr   = DDC_SEGMENT_ADDR,
1498                                 .flags  = 0,
1499                                 .len    = 1,
1500                                 .buf    = &segment,
1501                         }, {
1502                                 .addr   = DDC_ADDR,
1503                                 .flags  = 0,
1504                                 .len    = 1,
1505                                 .buf    = &start,
1506                         }, {
1507                                 .addr   = DDC_ADDR,
1508                                 .flags  = I2C_M_RD,
1509                                 .len    = len,
1510                                 .buf    = buf,
1511                         }
1512                 };
1513
1514                 /*
1515                  * Avoid sending the segment addr to not upset non-compliant
1516                  * DDC monitors.
1517                  */
1518                 ret = i2c_transfer(adapter, &msgs[3 - xfers], xfers);
1519
1520                 if (ret == -ENXIO) {
1521                         DRM_DEBUG_KMS("drm: skipping non-existent adapter %s\n",
1522                                         adapter->name);
1523                         break;
1524                 }
1525         } while (ret != xfers && --retries);
1526
1527         return ret == xfers ? 0 : -1;
1528 }
1529
1530 static void connector_bad_edid(struct drm_connector *connector,
1531                                u8 *edid, int num_blocks)
1532 {
1533         int i;
1534
1535         if (connector->bad_edid_counter++ && !(drm_debug & DRM_UT_KMS))
1536                 return;
1537
1538         dev_warn(connector->dev->dev,
1539                  "%s: EDID is invalid:\n",
1540                  connector->name);
1541         for (i = 0; i < num_blocks; i++) {
1542                 u8 *block = edid + i * EDID_LENGTH;
1543                 char prefix[20];
1544
1545                 if (drm_edid_is_zero(block, EDID_LENGTH))
1546                         sprintf(prefix, "\t[%02x] ZERO ", i);
1547                 else if (!drm_edid_block_valid(block, i, false, NULL))
1548                         sprintf(prefix, "\t[%02x] BAD  ", i);
1549                 else
1550                         sprintf(prefix, "\t[%02x] GOOD ", i);
1551
1552                 print_hex_dump(KERN_WARNING,
1553                                prefix, DUMP_PREFIX_NONE, 16, 1,
1554                                block, EDID_LENGTH, false);
1555         }
1556 }
1557
1558 /**
1559  * drm_do_get_edid - get EDID data using a custom EDID block read function
1560  * @connector: connector we're probing
1561  * @get_edid_block: EDID block read function
1562  * @data: private data passed to the block read function
1563  *
1564  * When the I2C adapter connected to the DDC bus is hidden behind a device that
1565  * exposes a different interface to read EDID blocks this function can be used
1566  * to get EDID data using a custom block read function.
1567  *
1568  * As in the general case the DDC bus is accessible by the kernel at the I2C
1569  * level, drivers must make all reasonable efforts to expose it as an I2C
1570  * adapter and use drm_get_edid() instead of abusing this function.
1571  *
1572  * The EDID may be overridden using debugfs override_edid or firmare EDID
1573  * (drm_load_edid_firmware() and drm.edid_firmware parameter), in this priority
1574  * order. Having either of them bypasses actual EDID reads.
1575  *
1576  * Return: Pointer to valid EDID or NULL if we couldn't find any.
1577  */
1578 struct edid *drm_do_get_edid(struct drm_connector *connector,
1579         int (*get_edid_block)(void *data, u8 *buf, unsigned int block,
1580                               size_t len),
1581         void *data)
1582 {
1583         int i, j = 0, valid_extensions = 0;
1584         u8 *edid, *new;
1585         struct edid *override = NULL;
1586
1587         if (connector->override_edid)
1588                 override = drm_edid_duplicate(connector->edid_blob_ptr->data);
1589
1590         if (!override)
1591                 override = drm_load_edid_firmware(connector);
1592
1593         if (!IS_ERR_OR_NULL(override))
1594                 return override;
1595
1596         if ((edid = kmalloc(EDID_LENGTH, GFP_KERNEL)) == NULL)
1597                 return NULL;
1598
1599         /* base block fetch */
1600         for (i = 0; i < 4; i++) {
1601                 if (get_edid_block(data, edid, 0, EDID_LENGTH))
1602                         goto out;
1603                 if (drm_edid_block_valid(edid, 0, false,
1604                                          &connector->edid_corrupt))
1605                         break;
1606                 if (i == 0 && drm_edid_is_zero(edid, EDID_LENGTH)) {
1607                         connector->null_edid_counter++;
1608                         goto carp;
1609                 }
1610         }
1611         if (i == 4)
1612                 goto carp;
1613
1614         /* if there's no extensions, we're done */
1615         valid_extensions = edid[0x7e];
1616         if (valid_extensions == 0)
1617                 return (struct edid *)edid;
1618
1619         new = krealloc(edid, (valid_extensions + 1) * EDID_LENGTH, GFP_KERNEL);
1620         if (!new)
1621                 goto out;
1622         edid = new;
1623
1624         for (j = 1; j <= edid[0x7e]; j++) {
1625                 u8 *block = edid + j * EDID_LENGTH;
1626
1627                 for (i = 0; i < 4; i++) {
1628                         if (get_edid_block(data, block, j, EDID_LENGTH))
1629                                 goto out;
1630                         if (drm_edid_block_valid(block, j, false, NULL))
1631                                 break;
1632                 }
1633
1634                 if (i == 4)
1635                         valid_extensions--;
1636         }
1637
1638         if (valid_extensions != edid[0x7e]) {
1639                 u8 *base;
1640
1641                 connector_bad_edid(connector, edid, edid[0x7e] + 1);
1642
1643                 edid[EDID_LENGTH-1] += edid[0x7e] - valid_extensions;
1644                 edid[0x7e] = valid_extensions;
1645
1646                 new = kmalloc_array(valid_extensions + 1, EDID_LENGTH,
1647                                     GFP_KERNEL);
1648                 if (!new)
1649                         goto out;
1650
1651                 base = new;
1652                 for (i = 0; i <= edid[0x7e]; i++) {
1653                         u8 *block = edid + i * EDID_LENGTH;
1654
1655                         if (!drm_edid_block_valid(block, i, false, NULL))
1656                                 continue;
1657
1658                         memcpy(base, block, EDID_LENGTH);
1659                         base += EDID_LENGTH;
1660                 }
1661
1662                 kfree(edid);
1663                 edid = new;
1664         }
1665
1666         return (struct edid *)edid;
1667
1668 carp:
1669         connector_bad_edid(connector, edid, 1);
1670 out:
1671         kfree(edid);
1672         return NULL;
1673 }
1674 EXPORT_SYMBOL_GPL(drm_do_get_edid);
1675
1676 /**
1677  * drm_probe_ddc() - probe DDC presence
1678  * @adapter: I2C adapter to probe
1679  *
1680  * Return: True on success, false on failure.
1681  */
1682 bool
1683 drm_probe_ddc(struct i2c_adapter *adapter)
1684 {
1685         unsigned char out;
1686
1687         return (drm_do_probe_ddc_edid(adapter, &out, 0, 1) == 0);
1688 }
1689 EXPORT_SYMBOL(drm_probe_ddc);
1690
1691 /**
1692  * drm_get_edid - get EDID data, if available
1693  * @connector: connector we're probing
1694  * @adapter: I2C adapter to use for DDC
1695  *
1696  * Poke the given I2C channel to grab EDID data if possible.  If found,
1697  * attach it to the connector.
1698  *
1699  * Return: Pointer to valid EDID or NULL if we couldn't find any.
1700  */
1701 struct edid *drm_get_edid(struct drm_connector *connector,
1702                           struct i2c_adapter *adapter)
1703 {
1704         struct edid *edid;
1705
1706         if (connector->force == DRM_FORCE_OFF)
1707                 return NULL;
1708
1709         if (connector->force == DRM_FORCE_UNSPECIFIED && !drm_probe_ddc(adapter))
1710                 return NULL;
1711
1712         edid = drm_do_get_edid(connector, drm_do_probe_ddc_edid, adapter);
1713         if (edid)
1714                 drm_get_displayid(connector, edid);
1715         return edid;
1716 }
1717 EXPORT_SYMBOL(drm_get_edid);
1718
1719 /**
1720  * drm_get_edid_switcheroo - get EDID data for a vga_switcheroo output
1721  * @connector: connector we're probing
1722  * @adapter: I2C adapter to use for DDC
1723  *
1724  * Wrapper around drm_get_edid() for laptops with dual GPUs using one set of
1725  * outputs. The wrapper adds the requisite vga_switcheroo calls to temporarily
1726  * switch DDC to the GPU which is retrieving EDID.
1727  *
1728  * Return: Pointer to valid EDID or %NULL if we couldn't find any.
1729  */
1730 struct edid *drm_get_edid_switcheroo(struct drm_connector *connector,
1731                                      struct i2c_adapter *adapter)
1732 {
1733         struct pci_dev *pdev = connector->dev->pdev;
1734         struct edid *edid;
1735
1736         vga_switcheroo_lock_ddc(pdev);
1737         edid = drm_get_edid(connector, adapter);
1738         vga_switcheroo_unlock_ddc(pdev);
1739
1740         return edid;
1741 }
1742 EXPORT_SYMBOL(drm_get_edid_switcheroo);
1743
1744 /**
1745  * drm_edid_duplicate - duplicate an EDID and the extensions
1746  * @edid: EDID to duplicate
1747  *
1748  * Return: Pointer to duplicated EDID or NULL on allocation failure.
1749  */
1750 struct edid *drm_edid_duplicate(const struct edid *edid)
1751 {
1752         return kmemdup(edid, (edid->extensions + 1) * EDID_LENGTH, GFP_KERNEL);
1753 }
1754 EXPORT_SYMBOL(drm_edid_duplicate);
1755
1756 /*** EDID parsing ***/
1757
1758 /**
1759  * edid_vendor - match a string against EDID's obfuscated vendor field
1760  * @edid: EDID to match
1761  * @vendor: vendor string
1762  *
1763  * Returns true if @vendor is in @edid, false otherwise
1764  */
1765 static bool edid_vendor(const struct edid *edid, const char *vendor)
1766 {
1767         char edid_vendor[3];
1768
1769         edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@';
1770         edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) |
1771                           ((edid->mfg_id[1] & 0xe0) >> 5)) + '@';
1772         edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@';
1773
1774         return !strncmp(edid_vendor, vendor, 3);
1775 }
1776
1777 /**
1778  * edid_get_quirks - return quirk flags for a given EDID
1779  * @edid: EDID to process
1780  *
1781  * This tells subsequent routines what fixes they need to apply.
1782  */
1783 static u32 edid_get_quirks(const struct edid *edid)
1784 {
1785         const struct edid_quirk *quirk;
1786         int i;
1787
1788         for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) {
1789                 quirk = &edid_quirk_list[i];
1790
1791                 if (edid_vendor(edid, quirk->vendor) &&
1792                     (EDID_PRODUCT_ID(edid) == quirk->product_id))
1793                         return quirk->quirks;
1794         }
1795
1796         return 0;
1797 }
1798
1799 #define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay)
1800 #define MODE_REFRESH_DIFF(c,t) (abs((c) - (t)))
1801
1802 /**
1803  * edid_fixup_preferred - set preferred modes based on quirk list
1804  * @connector: has mode list to fix up
1805  * @quirks: quirks list
1806  *
1807  * Walk the mode list for @connector, clearing the preferred status
1808  * on existing modes and setting it anew for the right mode ala @quirks.
1809  */
1810 static void edid_fixup_preferred(struct drm_connector *connector,
1811                                  u32 quirks)
1812 {
1813         struct drm_display_mode *t, *cur_mode, *preferred_mode;
1814         int target_refresh = 0;
1815         int cur_vrefresh, preferred_vrefresh;
1816
1817         if (list_empty(&connector->probed_modes))
1818                 return;
1819
1820         if (quirks & EDID_QUIRK_PREFER_LARGE_60)
1821                 target_refresh = 60;
1822         if (quirks & EDID_QUIRK_PREFER_LARGE_75)
1823                 target_refresh = 75;
1824
1825         preferred_mode = list_first_entry(&connector->probed_modes,
1826                                           struct drm_display_mode, head);
1827
1828         list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) {
1829                 cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED;
1830
1831                 if (cur_mode == preferred_mode)
1832                         continue;
1833
1834                 /* Largest mode is preferred */
1835                 if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode))
1836                         preferred_mode = cur_mode;
1837
1838                 cur_vrefresh = cur_mode->vrefresh ?
1839                         cur_mode->vrefresh : drm_mode_vrefresh(cur_mode);
1840                 preferred_vrefresh = preferred_mode->vrefresh ?
1841                         preferred_mode->vrefresh : drm_mode_vrefresh(preferred_mode);
1842                 /* At a given size, try to get closest to target refresh */
1843                 if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) &&
1844                     MODE_REFRESH_DIFF(cur_vrefresh, target_refresh) <
1845                     MODE_REFRESH_DIFF(preferred_vrefresh, target_refresh)) {
1846                         preferred_mode = cur_mode;
1847                 }
1848         }
1849
1850         preferred_mode->type |= DRM_MODE_TYPE_PREFERRED;
1851 }
1852
1853 static bool
1854 mode_is_rb(const struct drm_display_mode *mode)
1855 {
1856         return (mode->htotal - mode->hdisplay == 160) &&
1857                (mode->hsync_end - mode->hdisplay == 80) &&
1858                (mode->hsync_end - mode->hsync_start == 32) &&
1859                (mode->vsync_start - mode->vdisplay == 3);
1860 }
1861
1862 /*
1863  * drm_mode_find_dmt - Create a copy of a mode if present in DMT
1864  * @dev: Device to duplicate against
1865  * @hsize: Mode width
1866  * @vsize: Mode height
1867  * @fresh: Mode refresh rate
1868  * @rb: Mode reduced-blanking-ness
1869  *
1870  * Walk the DMT mode list looking for a match for the given parameters.
1871  *
1872  * Return: A newly allocated copy of the mode, or NULL if not found.
1873  */
1874 struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev,
1875                                            int hsize, int vsize, int fresh,
1876                                            bool rb)
1877 {
1878         int i;
1879
1880         for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) {
1881                 const struct drm_display_mode *ptr = &drm_dmt_modes[i];
1882                 if (hsize != ptr->hdisplay)
1883                         continue;
1884                 if (vsize != ptr->vdisplay)
1885                         continue;
1886                 if (fresh != drm_mode_vrefresh(ptr))
1887                         continue;
1888                 if (rb != mode_is_rb(ptr))
1889                         continue;
1890
1891                 return drm_mode_duplicate(dev, ptr);
1892         }
1893
1894         return NULL;
1895 }
1896 EXPORT_SYMBOL(drm_mode_find_dmt);
1897
1898 typedef void detailed_cb(struct detailed_timing *timing, void *closure);
1899
1900 static void
1901 cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
1902 {
1903         int i, n = 0;
1904         u8 d = ext[0x02];
1905         u8 *det_base = ext + d;
1906
1907         n = (127 - d) / 18;
1908         for (i = 0; i < n; i++)
1909                 cb((struct detailed_timing *)(det_base + 18 * i), closure);
1910 }
1911
1912 static void
1913 vtb_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
1914 {
1915         unsigned int i, n = min((int)ext[0x02], 6);
1916         u8 *det_base = ext + 5;
1917
1918         if (ext[0x01] != 1)
1919                 return; /* unknown version */
1920
1921         for (i = 0; i < n; i++)
1922                 cb((struct detailed_timing *)(det_base + 18 * i), closure);
1923 }
1924
1925 static void
1926 drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure)
1927 {
1928         int i;
1929         struct edid *edid = (struct edid *)raw_edid;
1930
1931         if (edid == NULL)
1932                 return;
1933
1934         for (i = 0; i < EDID_DETAILED_TIMINGS; i++)
1935                 cb(&(edid->detailed_timings[i]), closure);
1936
1937         for (i = 1; i <= raw_edid[0x7e]; i++) {
1938                 u8 *ext = raw_edid + (i * EDID_LENGTH);
1939                 switch (*ext) {
1940                 case CEA_EXT:
1941                         cea_for_each_detailed_block(ext, cb, closure);
1942                         break;
1943                 case VTB_EXT:
1944                         vtb_for_each_detailed_block(ext, cb, closure);
1945                         break;
1946                 default:
1947                         break;
1948                 }
1949         }
1950 }
1951
1952 static void
1953 is_rb(struct detailed_timing *t, void *data)
1954 {
1955         u8 *r = (u8 *)t;
1956         if (r[3] == EDID_DETAIL_MONITOR_RANGE)
1957                 if (r[15] & 0x10)
1958                         *(bool *)data = true;
1959 }
1960
1961 /* EDID 1.4 defines this explicitly.  For EDID 1.3, we guess, badly. */
1962 static bool
1963 drm_monitor_supports_rb(struct edid *edid)
1964 {
1965         if (edid->revision >= 4) {
1966                 bool ret = false;
1967                 drm_for_each_detailed_block((u8 *)edid, is_rb, &ret);
1968                 return ret;
1969         }
1970
1971         return ((edid->input & DRM_EDID_INPUT_DIGITAL) != 0);
1972 }
1973
1974 static void
1975 find_gtf2(struct detailed_timing *t, void *data)
1976 {
1977         u8 *r = (u8 *)t;
1978         if (r[3] == EDID_DETAIL_MONITOR_RANGE && r[10] == 0x02)
1979                 *(u8 **)data = r;
1980 }
1981
1982 /* Secondary GTF curve kicks in above some break frequency */
1983 static int
1984 drm_gtf2_hbreak(struct edid *edid)
1985 {
1986         u8 *r = NULL;
1987         drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1988         return r ? (r[12] * 2) : 0;
1989 }
1990
1991 static int
1992 drm_gtf2_2c(struct edid *edid)
1993 {
1994         u8 *r = NULL;
1995         drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1996         return r ? r[13] : 0;
1997 }
1998
1999 static int
2000 drm_gtf2_m(struct edid *edid)
2001 {
2002         u8 *r = NULL;
2003         drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
2004         return r ? (r[15] << 8) + r[14] : 0;
2005 }
2006
2007 static int
2008 drm_gtf2_k(struct edid *edid)
2009 {
2010         u8 *r = NULL;
2011         drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
2012         return r ? r[16] : 0;
2013 }
2014
2015 static int
2016 drm_gtf2_2j(struct edid *edid)
2017 {
2018         u8 *r = NULL;
2019         drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
2020         return r ? r[17] : 0;
2021 }
2022
2023 /**
2024  * standard_timing_level - get std. timing level(CVT/GTF/DMT)
2025  * @edid: EDID block to scan
2026  */
2027 static int standard_timing_level(struct edid *edid)
2028 {
2029         if (edid->revision >= 2) {
2030                 if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF))
2031                         return LEVEL_CVT;
2032                 if (drm_gtf2_hbreak(edid))
2033                         return LEVEL_GTF2;
2034                 return LEVEL_GTF;
2035         }
2036         return LEVEL_DMT;
2037 }
2038
2039 /*
2040  * 0 is reserved.  The spec says 0x01 fill for unused timings.  Some old
2041  * monitors fill with ascii space (0x20) instead.
2042  */
2043 static int
2044 bad_std_timing(u8 a, u8 b)
2045 {
2046         return (a == 0x00 && b == 0x00) ||
2047                (a == 0x01 && b == 0x01) ||
2048                (a == 0x20 && b == 0x20);
2049 }
2050
2051 /**
2052  * drm_mode_std - convert standard mode info (width, height, refresh) into mode
2053  * @connector: connector of for the EDID block
2054  * @edid: EDID block to scan
2055  * @t: standard timing params
2056  *
2057  * Take the standard timing params (in this case width, aspect, and refresh)
2058  * and convert them into a real mode using CVT/GTF/DMT.
2059  */
2060 static struct drm_display_mode *
2061 drm_mode_std(struct drm_connector *connector, struct edid *edid,
2062              struct std_timing *t)
2063 {
2064         struct drm_device *dev = connector->dev;
2065         struct drm_display_mode *m, *mode = NULL;
2066         int hsize, vsize;
2067         int vrefresh_rate;
2068         unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK)
2069                 >> EDID_TIMING_ASPECT_SHIFT;
2070         unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK)
2071                 >> EDID_TIMING_VFREQ_SHIFT;
2072         int timing_level = standard_timing_level(edid);
2073
2074         if (bad_std_timing(t->hsize, t->vfreq_aspect))
2075                 return NULL;
2076
2077         /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */
2078         hsize = t->hsize * 8 + 248;
2079         /* vrefresh_rate = vfreq + 60 */
2080         vrefresh_rate = vfreq + 60;
2081         /* the vdisplay is calculated based on the aspect ratio */
2082         if (aspect_ratio == 0) {
2083                 if (edid->revision < 3)
2084                         vsize = hsize;
2085                 else
2086                         vsize = (hsize * 10) / 16;
2087         } else if (aspect_ratio == 1)
2088                 vsize = (hsize * 3) / 4;
2089         else if (aspect_ratio == 2)
2090                 vsize = (hsize * 4) / 5;
2091         else
2092                 vsize = (hsize * 9) / 16;
2093
2094         /* HDTV hack, part 1 */
2095         if (vrefresh_rate == 60 &&
2096             ((hsize == 1360 && vsize == 765) ||
2097              (hsize == 1368 && vsize == 769))) {
2098                 hsize = 1366;
2099                 vsize = 768;
2100         }
2101
2102         /*
2103          * If this connector already has a mode for this size and refresh
2104          * rate (because it came from detailed or CVT info), use that
2105          * instead.  This way we don't have to guess at interlace or
2106          * reduced blanking.
2107          */
2108         list_for_each_entry(m, &connector->probed_modes, head)
2109                 if (m->hdisplay == hsize && m->vdisplay == vsize &&
2110                     drm_mode_vrefresh(m) == vrefresh_rate)
2111                         return NULL;
2112
2113         /* HDTV hack, part 2 */
2114         if (hsize == 1366 && vsize == 768 && vrefresh_rate == 60) {
2115                 mode = drm_cvt_mode(dev, 1366, 768, vrefresh_rate, 0, 0,
2116                                     false);
2117                 if (!mode)
2118                         return NULL;
2119                 mode->hdisplay = 1366;
2120                 mode->hsync_start = mode->hsync_start - 1;
2121                 mode->hsync_end = mode->hsync_end - 1;
2122                 return mode;
2123         }
2124
2125         /* check whether it can be found in default mode table */
2126         if (drm_monitor_supports_rb(edid)) {
2127                 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate,
2128                                          true);
2129                 if (mode)
2130                         return mode;
2131         }
2132         mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate, false);
2133         if (mode)
2134                 return mode;
2135
2136         /* okay, generate it */
2137         switch (timing_level) {
2138         case LEVEL_DMT:
2139                 break;
2140         case LEVEL_GTF:
2141                 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
2142                 break;
2143         case LEVEL_GTF2:
2144                 /*
2145                  * This is potentially wrong if there's ever a monitor with
2146                  * more than one ranges section, each claiming a different
2147                  * secondary GTF curve.  Please don't do that.
2148                  */
2149                 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
2150                 if (!mode)
2151                         return NULL;
2152                 if (drm_mode_hsync(mode) > drm_gtf2_hbreak(edid)) {
2153                         drm_mode_destroy(dev, mode);
2154                         mode = drm_gtf_mode_complex(dev, hsize, vsize,
2155                                                     vrefresh_rate, 0, 0,
2156                                                     drm_gtf2_m(edid),
2157                                                     drm_gtf2_2c(edid),
2158                                                     drm_gtf2_k(edid),
2159                                                     drm_gtf2_2j(edid));
2160                 }
2161                 break;
2162         case LEVEL_CVT:
2163                 mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0,
2164                                     false);
2165                 break;
2166         }
2167         return mode;
2168 }
2169
2170 /*
2171  * EDID is delightfully ambiguous about how interlaced modes are to be
2172  * encoded.  Our internal representation is of frame height, but some
2173  * HDTV detailed timings are encoded as field height.
2174  *
2175  * The format list here is from CEA, in frame size.  Technically we
2176  * should be checking refresh rate too.  Whatever.
2177  */
2178 static void
2179 drm_mode_do_interlace_quirk(struct drm_display_mode *mode,
2180                             struct detailed_pixel_timing *pt)
2181 {
2182         int i;
2183         static const struct {
2184                 int w, h;
2185         } cea_interlaced[] = {
2186                 { 1920, 1080 },
2187                 {  720,  480 },
2188                 { 1440,  480 },
2189                 { 2880,  480 },
2190                 {  720,  576 },
2191                 { 1440,  576 },
2192                 { 2880,  576 },
2193         };
2194
2195         if (!(pt->misc & DRM_EDID_PT_INTERLACED))
2196                 return;
2197
2198         for (i = 0; i < ARRAY_SIZE(cea_interlaced); i++) {
2199                 if ((mode->hdisplay == cea_interlaced[i].w) &&
2200                     (mode->vdisplay == cea_interlaced[i].h / 2)) {
2201                         mode->vdisplay *= 2;
2202                         mode->vsync_start *= 2;
2203                         mode->vsync_end *= 2;
2204                         mode->vtotal *= 2;
2205                         mode->vtotal |= 1;
2206                 }
2207         }
2208
2209         mode->flags |= DRM_MODE_FLAG_INTERLACE;
2210 }
2211
2212 /**
2213  * drm_mode_detailed - create a new mode from an EDID detailed timing section
2214  * @dev: DRM device (needed to create new mode)
2215  * @edid: EDID block
2216  * @timing: EDID detailed timing info
2217  * @quirks: quirks to apply
2218  *
2219  * An EDID detailed timing block contains enough info for us to create and
2220  * return a new struct drm_display_mode.
2221  */
2222 static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
2223                                                   struct edid *edid,
2224                                                   struct detailed_timing *timing,
2225                                                   u32 quirks)
2226 {
2227         struct drm_display_mode *mode;
2228         struct detailed_pixel_timing *pt = &timing->data.pixel_data;
2229         unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo;
2230         unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo;
2231         unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo;
2232         unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo;
2233         unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo;
2234         unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo;
2235         unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) << 2 | pt->vsync_offset_pulse_width_lo >> 4;
2236         unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf);
2237
2238         /* ignore tiny modes */
2239         if (hactive < 64 || vactive < 64)
2240                 return NULL;
2241
2242         if (pt->misc & DRM_EDID_PT_STEREO) {
2243                 DRM_DEBUG_KMS("stereo mode not supported\n");
2244                 return NULL;
2245         }
2246         if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) {
2247                 DRM_DEBUG_KMS("composite sync not supported\n");
2248         }
2249
2250         /* it is incorrect if hsync/vsync width is zero */
2251         if (!hsync_pulse_width || !vsync_pulse_width) {
2252                 DRM_DEBUG_KMS("Incorrect Detailed timing. "
2253                                 "Wrong Hsync/Vsync pulse width\n");
2254                 return NULL;
2255         }
2256
2257         if (quirks & EDID_QUIRK_FORCE_REDUCED_BLANKING) {
2258                 mode = drm_cvt_mode(dev, hactive, vactive, 60, true, false, false);
2259                 if (!mode)
2260                         return NULL;
2261
2262                 goto set_size;
2263         }
2264
2265         mode = drm_mode_create(dev);
2266         if (!mode)
2267                 return NULL;
2268
2269         if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
2270                 timing->pixel_clock = cpu_to_le16(1088);
2271
2272         mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
2273
2274         mode->hdisplay = hactive;
2275         mode->hsync_start = mode->hdisplay + hsync_offset;
2276         mode->hsync_end = mode->hsync_start + hsync_pulse_width;
2277         mode->htotal = mode->hdisplay + hblank;
2278
2279         mode->vdisplay = vactive;
2280         mode->vsync_start = mode->vdisplay + vsync_offset;
2281         mode->vsync_end = mode->vsync_start + vsync_pulse_width;
2282         mode->vtotal = mode->vdisplay + vblank;
2283
2284         /* Some EDIDs have bogus h/vtotal values */
2285         if (mode->hsync_end > mode->htotal)
2286                 mode->htotal = mode->hsync_end + 1;
2287         if (mode->vsync_end > mode->vtotal)
2288                 mode->vtotal = mode->vsync_end + 1;
2289
2290         drm_mode_do_interlace_quirk(mode, pt);
2291
2292         if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) {
2293                 pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE;
2294         }
2295
2296         mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
2297                 DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
2298         mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ?
2299                 DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
2300
2301 set_size:
2302         mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4;
2303         mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8;
2304
2305         if (quirks & EDID_QUIRK_DETAILED_IN_CM) {
2306                 mode->width_mm *= 10;
2307                 mode->height_mm *= 10;
2308         }
2309
2310         if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) {
2311                 mode->width_mm = edid->width_cm * 10;
2312                 mode->height_mm = edid->height_cm * 10;
2313         }
2314
2315         mode->type = DRM_MODE_TYPE_DRIVER;
2316         mode->vrefresh = drm_mode_vrefresh(mode);
2317         drm_mode_set_name(mode);
2318
2319         return mode;
2320 }
2321
2322 static bool
2323 mode_in_hsync_range(const struct drm_display_mode *mode,
2324                     struct edid *edid, u8 *t)
2325 {
2326         int hsync, hmin, hmax;
2327
2328         hmin = t[7];
2329         if (edid->revision >= 4)
2330             hmin += ((t[4] & 0x04) ? 255 : 0);
2331         hmax = t[8];
2332         if (edid->revision >= 4)
2333             hmax += ((t[4] & 0x08) ? 255 : 0);
2334         hsync = drm_mode_hsync(mode);
2335
2336         return (hsync <= hmax && hsync >= hmin);
2337 }
2338
2339 static bool
2340 mode_in_vsync_range(const struct drm_display_mode *mode,
2341                     struct edid *edid, u8 *t)
2342 {
2343         int vsync, vmin, vmax;
2344
2345         vmin = t[5];
2346         if (edid->revision >= 4)
2347             vmin += ((t[4] & 0x01) ? 255 : 0);
2348         vmax = t[6];
2349         if (edid->revision >= 4)
2350             vmax += ((t[4] & 0x02) ? 255 : 0);
2351         vsync = drm_mode_vrefresh(mode);
2352
2353         return (vsync <= vmax && vsync >= vmin);
2354 }
2355
2356 static u32
2357 range_pixel_clock(struct edid *edid, u8 *t)
2358 {
2359         /* unspecified */
2360         if (t[9] == 0 || t[9] == 255)
2361                 return 0;
2362
2363         /* 1.4 with CVT support gives us real precision, yay */
2364         if (edid->revision >= 4 && t[10] == 0x04)
2365                 return (t[9] * 10000) - ((t[12] >> 2) * 250);
2366
2367         /* 1.3 is pathetic, so fuzz up a bit */
2368         return t[9] * 10000 + 5001;
2369 }
2370
2371 static bool
2372 mode_in_range(const struct drm_display_mode *mode, struct edid *edid,
2373               struct detailed_timing *timing)
2374 {
2375         u32 max_clock;
2376         u8 *t = (u8 *)timing;
2377
2378         if (!mode_in_hsync_range(mode, edid, t))
2379                 return false;
2380
2381         if (!mode_in_vsync_range(mode, edid, t))
2382                 return false;
2383
2384         if ((max_clock = range_pixel_clock(edid, t)))
2385                 if (mode->clock > max_clock)
2386                         return false;
2387
2388         /* 1.4 max horizontal check */
2389         if (edid->revision >= 4 && t[10] == 0x04)
2390                 if (t[13] && mode->hdisplay > 8 * (t[13] + (256 * (t[12]&0x3))))
2391                         return false;
2392
2393         if (mode_is_rb(mode) && !drm_monitor_supports_rb(edid))
2394                 return false;
2395
2396         return true;
2397 }
2398
2399 static bool valid_inferred_mode(const struct drm_connector *connector,
2400                                 const struct drm_display_mode *mode)
2401 {
2402         const struct drm_display_mode *m;
2403         bool ok = false;
2404
2405         list_for_each_entry(m, &connector->probed_modes, head) {
2406                 if (mode->hdisplay == m->hdisplay &&
2407                     mode->vdisplay == m->vdisplay &&
2408                     drm_mode_vrefresh(mode) == drm_mode_vrefresh(m))
2409                         return false; /* duplicated */
2410                 if (mode->hdisplay <= m->hdisplay &&
2411                     mode->vdisplay <= m->vdisplay)
2412                         ok = true;
2413         }
2414         return ok;
2415 }
2416
2417 static int
2418 drm_dmt_modes_for_range(struct drm_connector *connector, struct edid *edid,
2419                         struct detailed_timing *timing)
2420 {
2421         int i, modes = 0;
2422         struct drm_display_mode *newmode;
2423         struct drm_device *dev = connector->dev;
2424
2425         for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) {
2426                 if (mode_in_range(drm_dmt_modes + i, edid, timing) &&
2427                     valid_inferred_mode(connector, drm_dmt_modes + i)) {
2428                         newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]);
2429                         if (newmode) {
2430                                 drm_mode_probed_add(connector, newmode);
2431                                 modes++;
2432                         }
2433                 }
2434         }
2435
2436         return modes;
2437 }
2438
2439 /* fix up 1366x768 mode from 1368x768;
2440  * GFT/CVT can't express 1366 width which isn't dividable by 8
2441  */
2442 void drm_mode_fixup_1366x768(struct drm_display_mode *mode)
2443 {
2444         if (mode->hdisplay == 1368 && mode->vdisplay == 768) {
2445                 mode->hdisplay = 1366;
2446                 mode->hsync_start--;
2447                 mode->hsync_end--;
2448                 drm_mode_set_name(mode);
2449         }
2450 }
2451
2452 static int
2453 drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid,
2454                         struct detailed_timing *timing)
2455 {
2456         int i, modes = 0;
2457         struct drm_display_mode *newmode;
2458         struct drm_device *dev = connector->dev;
2459
2460         for (i = 0; i < ARRAY_SIZE(extra_modes); i++) {
2461                 const struct minimode *m = &extra_modes[i];
2462                 newmode = drm_gtf_mode(dev, m->w, m->h, m->r, 0, 0);
2463                 if (!newmode)
2464                         return modes;
2465
2466                 drm_mode_fixup_1366x768(newmode);
2467                 if (!mode_in_range(newmode, edid, timing) ||
2468                     !valid_inferred_mode(connector, newmode)) {
2469                         drm_mode_destroy(dev, newmode);
2470                         continue;
2471                 }
2472
2473                 drm_mode_probed_add(connector, newmode);
2474                 modes++;
2475         }
2476
2477         return modes;
2478 }
2479
2480 static int
2481 drm_cvt_modes_for_range(struct drm_connector *connector, struct edid *edid,
2482                         struct detailed_timing *timing)
2483 {
2484         int i, modes = 0;
2485         struct drm_display_mode *newmode;
2486         struct drm_device *dev = connector->dev;
2487         bool rb = drm_monitor_supports_rb(edid);
2488
2489         for (i = 0; i < ARRAY_SIZE(extra_modes); i++) {
2490                 const struct minimode *m = &extra_modes[i];
2491                 newmode = drm_cvt_mode(dev, m->w, m->h, m->r, rb, 0, 0);
2492                 if (!newmode)
2493                         return modes;
2494
2495                 drm_mode_fixup_1366x768(newmode);
2496                 if (!mode_in_range(newmode, edid, timing) ||
2497                     !valid_inferred_mode(connector, newmode)) {
2498                         drm_mode_destroy(dev, newmode);
2499                         continue;
2500                 }
2501
2502                 drm_mode_probed_add(connector, newmode);
2503                 modes++;
2504         }
2505
2506         return modes;
2507 }
2508
2509 static void
2510 do_inferred_modes(struct detailed_timing *timing, void *c)
2511 {
2512         struct detailed_mode_closure *closure = c;
2513         struct detailed_non_pixel *data = &timing->data.other_data;
2514         struct detailed_data_monitor_range *range = &data->data.range;
2515
2516         if (data->type != EDID_DETAIL_MONITOR_RANGE)
2517                 return;
2518
2519         closure->modes += drm_dmt_modes_for_range(closure->connector,
2520                                                   closure->edid,
2521                                                   timing);
2522         
2523         if (!version_greater(closure->edid, 1, 1))
2524                 return; /* GTF not defined yet */
2525
2526         switch (range->flags) {
2527         case 0x02: /* secondary gtf, XXX could do more */
2528         case 0x00: /* default gtf */
2529                 closure->modes += drm_gtf_modes_for_range(closure->connector,
2530                                                           closure->edid,
2531                                                           timing);
2532                 break;
2533         case 0x04: /* cvt, only in 1.4+ */
2534                 if (!version_greater(closure->edid, 1, 3))
2535                         break;
2536
2537                 closure->modes += drm_cvt_modes_for_range(closure->connector,
2538                                                           closure->edid,
2539                                                           timing);
2540                 break;
2541         case 0x01: /* just the ranges, no formula */
2542         default:
2543                 break;
2544         }
2545 }
2546
2547 static int
2548 add_inferred_modes(struct drm_connector *connector, struct edid *edid)
2549 {
2550         struct detailed_mode_closure closure = {
2551                 .connector = connector,
2552                 .edid = edid,
2553         };
2554
2555         if (version_greater(edid, 1, 0))
2556                 drm_for_each_detailed_block((u8 *)edid, do_inferred_modes,
2557                                             &closure);
2558
2559         return closure.modes;
2560 }
2561
2562 static int
2563 drm_est3_modes(struct drm_connector *connector, struct detailed_timing *timing)
2564 {
2565         int i, j, m, modes = 0;
2566         struct drm_display_mode *mode;
2567         u8 *est = ((u8 *)timing) + 6;
2568
2569         for (i = 0; i < 6; i++) {
2570                 for (j = 7; j >= 0; j--) {
2571                         m = (i * 8) + (7 - j);
2572                         if (m >= ARRAY_SIZE(est3_modes))
2573                                 break;
2574                         if (est[i] & (1 << j)) {
2575                                 mode = drm_mode_find_dmt(connector->dev,
2576                                                          est3_modes[m].w,
2577                                                          est3_modes[m].h,
2578                                                          est3_modes[m].r,
2579                                                          est3_modes[m].rb);
2580                                 if (mode) {
2581                                         drm_mode_probed_add(connector, mode);
2582                                         modes++;
2583                                 }
2584                         }
2585                 }
2586         }
2587
2588         return modes;
2589 }
2590
2591 static void
2592 do_established_modes(struct detailed_timing *timing, void *c)
2593 {
2594         struct detailed_mode_closure *closure = c;
2595         struct detailed_non_pixel *data = &timing->data.other_data;
2596
2597         if (data->type == EDID_DETAIL_EST_TIMINGS)
2598                 closure->modes += drm_est3_modes(closure->connector, timing);
2599 }
2600
2601 /**
2602  * add_established_modes - get est. modes from EDID and add them
2603  * @connector: connector to add mode(s) to
2604  * @edid: EDID block to scan
2605  *
2606  * Each EDID block contains a bitmap of the supported "established modes" list
2607  * (defined above).  Tease them out and add them to the global modes list.
2608  */
2609 static int
2610 add_established_modes(struct drm_connector *connector, struct edid *edid)
2611 {
2612         struct drm_device *dev = connector->dev;
2613         unsigned long est_bits = edid->established_timings.t1 |
2614                 (edid->established_timings.t2 << 8) |
2615                 ((edid->established_timings.mfg_rsvd & 0x80) << 9);
2616         int i, modes = 0;
2617         struct detailed_mode_closure closure = {
2618                 .connector = connector,
2619                 .edid = edid,
2620         };
2621
2622         for (i = 0; i <= EDID_EST_TIMINGS; i++) {
2623                 if (est_bits & (1<<i)) {
2624                         struct drm_display_mode *newmode;
2625                         newmode = drm_mode_duplicate(dev, &edid_est_modes[i]);
2626                         if (newmode) {
2627                                 drm_mode_probed_add(connector, newmode);
2628                                 modes++;
2629                         }
2630                 }
2631         }
2632
2633         if (version_greater(edid, 1, 0))
2634                     drm_for_each_detailed_block((u8 *)edid,
2635                                                 do_established_modes, &closure);
2636
2637         return modes + closure.modes;
2638 }
2639
2640 static void
2641 do_standard_modes(struct detailed_timing *timing, void *c)
2642 {
2643         struct detailed_mode_closure *closure = c;
2644         struct detailed_non_pixel *data = &timing->data.other_data;
2645         struct drm_connector *connector = closure->connector;
2646         struct edid *edid = closure->edid;
2647
2648         if (data->type == EDID_DETAIL_STD_MODES) {
2649                 int i;
2650                 for (i = 0; i < 6; i++) {
2651                         struct std_timing *std;
2652                         struct drm_display_mode *newmode;
2653
2654                         std = &data->data.timings[i];
2655                         newmode = drm_mode_std(connector, edid, std);
2656                         if (newmode) {
2657                                 drm_mode_probed_add(connector, newmode);
2658                                 closure->modes++;
2659                         }
2660                 }
2661         }
2662 }
2663
2664 /**
2665  * add_standard_modes - get std. modes from EDID and add them
2666  * @connector: connector to add mode(s) to
2667  * @edid: EDID block to scan
2668  *
2669  * Standard modes can be calculated using the appropriate standard (DMT,
2670  * GTF or CVT. Grab them from @edid and add them to the list.
2671  */
2672 static int
2673 add_standard_modes(struct drm_connector *connector, struct edid *edid)
2674 {
2675         int i, modes = 0;
2676         struct detailed_mode_closure closure = {
2677                 .connector = connector,
2678                 .edid = edid,
2679         };
2680
2681         for (i = 0; i < EDID_STD_TIMINGS; i++) {
2682                 struct drm_display_mode *newmode;
2683
2684                 newmode = drm_mode_std(connector, edid,
2685                                        &edid->standard_timings[i]);
2686                 if (newmode) {
2687                         drm_mode_probed_add(connector, newmode);
2688                         modes++;
2689                 }
2690         }
2691
2692         if (version_greater(edid, 1, 0))
2693                 drm_for_each_detailed_block((u8 *)edid, do_standard_modes,
2694                                             &closure);
2695
2696         /* XXX should also look for standard codes in VTB blocks */
2697
2698         return modes + closure.modes;
2699 }
2700
2701 static int drm_cvt_modes(struct drm_connector *connector,
2702                          struct detailed_timing *timing)
2703 {
2704         int i, j, modes = 0;
2705         struct drm_display_mode *newmode;
2706         struct drm_device *dev = connector->dev;
2707         struct cvt_timing *cvt;
2708         const int rates[] = { 60, 85, 75, 60, 50 };
2709         const u8 empty[3] = { 0, 0, 0 };
2710
2711         for (i = 0; i < 4; i++) {
2712                 int uninitialized_var(width), height;
2713                 cvt = &(timing->data.other_data.data.cvt[i]);
2714
2715                 if (!memcmp(cvt->code, empty, 3))
2716                         continue;
2717
2718                 height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2;
2719                 switch (cvt->code[1] & 0x0c) {
2720                 case 0x00:
2721                         width = height * 4 / 3;
2722                         break;
2723                 case 0x04:
2724                         width = height * 16 / 9;
2725                         break;
2726                 case 0x08:
2727                         width = height * 16 / 10;
2728                         break;
2729                 case 0x0c:
2730                         width = height * 15 / 9;
2731                         break;
2732                 }
2733
2734                 for (j = 1; j < 5; j++) {
2735                         if (cvt->code[2] & (1 << j)) {
2736                                 newmode = drm_cvt_mode(dev, width, height,
2737                                                        rates[j], j == 0,
2738                                                        false, false);
2739                                 if (newmode) {
2740                                         drm_mode_probed_add(connector, newmode);
2741                                         modes++;
2742                                 }
2743                         }
2744                 }
2745         }
2746
2747         return modes;
2748 }
2749
2750 static void
2751 do_cvt_mode(struct detailed_timing *timing, void *c)
2752 {
2753         struct detailed_mode_closure *closure = c;
2754         struct detailed_non_pixel *data = &timing->data.other_data;
2755
2756         if (data->type == EDID_DETAIL_CVT_3BYTE)
2757                 closure->modes += drm_cvt_modes(closure->connector, timing);
2758 }
2759
2760 static int
2761 add_cvt_modes(struct drm_connector *connector, struct edid *edid)
2762 {       
2763         struct detailed_mode_closure closure = {
2764                 .connector = connector,
2765                 .edid = edid,
2766         };
2767
2768         if (version_greater(edid, 1, 2))
2769                 drm_for_each_detailed_block((u8 *)edid, do_cvt_mode, &closure);
2770
2771         /* XXX should also look for CVT codes in VTB blocks */
2772
2773         return closure.modes;
2774 }
2775
2776 static void fixup_detailed_cea_mode_clock(struct drm_display_mode *mode);
2777
2778 static void
2779 do_detailed_mode(struct detailed_timing *timing, void *c)
2780 {
2781         struct detailed_mode_closure *closure = c;
2782         struct drm_display_mode *newmode;
2783
2784         if (timing->pixel_clock) {
2785                 newmode = drm_mode_detailed(closure->connector->dev,
2786                                             closure->edid, timing,
2787                                             closure->quirks);
2788                 if (!newmode)
2789                         return;
2790
2791                 if (closure->preferred)
2792                         newmode->type |= DRM_MODE_TYPE_PREFERRED;
2793
2794                 /*
2795                  * Detailed modes are limited to 10kHz pixel clock resolution,
2796                  * so fix up anything that looks like CEA/HDMI mode, but the clock
2797                  * is just slightly off.
2798                  */
2799                 fixup_detailed_cea_mode_clock(newmode);
2800
2801                 drm_mode_probed_add(closure->connector, newmode);
2802                 closure->modes++;
2803                 closure->preferred = false;
2804         }
2805 }
2806
2807 /*
2808  * add_detailed_modes - Add modes from detailed timings
2809  * @connector: attached connector
2810  * @edid: EDID block to scan
2811  * @quirks: quirks to apply
2812  */
2813 static int
2814 add_detailed_modes(struct drm_connector *connector, struct edid *edid,
2815                    u32 quirks)
2816 {
2817         struct detailed_mode_closure closure = {
2818                 .connector = connector,
2819                 .edid = edid,
2820                 .preferred = true,
2821                 .quirks = quirks,
2822         };
2823
2824         if (closure.preferred && !version_greater(edid, 1, 3))
2825                 closure.preferred =
2826                     (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING);
2827
2828         drm_for_each_detailed_block((u8 *)edid, do_detailed_mode, &closure);
2829
2830         return closure.modes;
2831 }
2832
2833 #define AUDIO_BLOCK     0x01
2834 #define VIDEO_BLOCK     0x02
2835 #define VENDOR_BLOCK    0x03
2836 #define SPEAKER_BLOCK   0x04
2837 #define USE_EXTENDED_TAG 0x07
2838 #define EXT_VIDEO_CAPABILITY_BLOCK 0x00
2839 #define EXT_VIDEO_DATA_BLOCK_420        0x0E
2840 #define EXT_VIDEO_CAP_BLOCK_Y420CMDB 0x0F
2841 #define EDID_BASIC_AUDIO        (1 << 6)
2842 #define EDID_CEA_YCRCB444       (1 << 5)
2843 #define EDID_CEA_YCRCB422       (1 << 4)
2844 #define EDID_CEA_VCDB_QS        (1 << 6)
2845
2846 /*
2847  * Search EDID for CEA extension block.
2848  */
2849 static u8 *drm_find_edid_extension(const struct edid *edid, int ext_id)
2850 {
2851         u8 *edid_ext = NULL;
2852         int i;
2853
2854         /* No EDID or EDID extensions */
2855         if (edid == NULL || edid->extensions == 0)
2856                 return NULL;
2857
2858         /* Find CEA extension */
2859         for (i = 0; i < edid->extensions; i++) {
2860                 edid_ext = (u8 *)edid + EDID_LENGTH * (i + 1);
2861                 if (edid_ext[0] == ext_id)
2862                         break;
2863         }
2864
2865         if (i == edid->extensions)
2866                 return NULL;
2867
2868         return edid_ext;
2869 }
2870
2871 static u8 *drm_find_cea_extension(const struct edid *edid)
2872 {
2873         return drm_find_edid_extension(edid, CEA_EXT);
2874 }
2875
2876 static u8 *drm_find_displayid_extension(const struct edid *edid)
2877 {
2878         return drm_find_edid_extension(edid, DISPLAYID_EXT);
2879 }
2880
2881 /*
2882  * Calculate the alternate clock for the CEA mode
2883  * (60Hz vs. 59.94Hz etc.)
2884  */
2885 static unsigned int
2886 cea_mode_alternate_clock(const struct drm_display_mode *cea_mode)
2887 {
2888         unsigned int clock = cea_mode->clock;
2889
2890         if (cea_mode->vrefresh % 6 != 0)
2891                 return clock;
2892
2893         /*
2894          * edid_cea_modes contains the 59.94Hz
2895          * variant for 240 and 480 line modes,
2896          * and the 60Hz variant otherwise.
2897          */
2898         if (cea_mode->vdisplay == 240 || cea_mode->vdisplay == 480)
2899                 clock = DIV_ROUND_CLOSEST(clock * 1001, 1000);
2900         else
2901                 clock = DIV_ROUND_CLOSEST(clock * 1000, 1001);
2902
2903         return clock;
2904 }
2905
2906 static bool
2907 cea_mode_alternate_timings(u8 vic, struct drm_display_mode *mode)
2908 {
2909         /*
2910          * For certain VICs the spec allows the vertical
2911          * front porch to vary by one or two lines.
2912          *
2913          * cea_modes[] stores the variant with the shortest
2914          * vertical front porch. We can adjust the mode to
2915          * get the other variants by simply increasing the
2916          * vertical front porch length.
2917          */
2918         BUILD_BUG_ON(edid_cea_modes[8].vtotal != 262 ||
2919                      edid_cea_modes[9].vtotal != 262 ||
2920                      edid_cea_modes[12].vtotal != 262 ||
2921                      edid_cea_modes[13].vtotal != 262 ||
2922                      edid_cea_modes[23].vtotal != 312 ||
2923                      edid_cea_modes[24].vtotal != 312 ||
2924                      edid_cea_modes[27].vtotal != 312 ||
2925                      edid_cea_modes[28].vtotal != 312);
2926
2927         if (((vic == 8 || vic == 9 ||
2928               vic == 12 || vic == 13) && mode->vtotal < 263) ||
2929             ((vic == 23 || vic == 24 ||
2930               vic == 27 || vic == 28) && mode->vtotal < 314)) {
2931                 mode->vsync_start++;
2932                 mode->vsync_end++;
2933                 mode->vtotal++;
2934
2935                 return true;
2936         }
2937
2938         return false;
2939 }
2940
2941 static u8 drm_match_cea_mode_clock_tolerance(const struct drm_display_mode *to_match,
2942                                              unsigned int clock_tolerance)
2943 {
2944         unsigned int match_flags = DRM_MODE_MATCH_TIMINGS | DRM_MODE_MATCH_FLAGS;
2945         u8 vic;
2946
2947         if (!to_match->clock)
2948                 return 0;
2949
2950         if (to_match->picture_aspect_ratio)
2951                 match_flags |= DRM_MODE_MATCH_ASPECT_RATIO;
2952
2953         for (vic = 1; vic < ARRAY_SIZE(edid_cea_modes); vic++) {
2954                 struct drm_display_mode cea_mode = edid_cea_modes[vic];
2955                 unsigned int clock1, clock2;
2956
2957                 /* Check both 60Hz and 59.94Hz */
2958                 clock1 = cea_mode.clock;
2959                 clock2 = cea_mode_alternate_clock(&cea_mode);
2960
2961                 if (abs(to_match->clock - clock1) > clock_tolerance &&
2962                     abs(to_match->clock - clock2) > clock_tolerance)
2963                         continue;
2964
2965                 do {
2966                         if (drm_mode_match(to_match, &cea_mode, match_flags))
2967                                 return vic;
2968                 } while (cea_mode_alternate_timings(vic, &cea_mode));
2969         }
2970
2971         return 0;
2972 }
2973
2974 /**
2975  * drm_match_cea_mode - look for a CEA mode matching given mode
2976  * @to_match: display mode
2977  *
2978  * Return: The CEA Video ID (VIC) of the mode or 0 if it isn't a CEA-861
2979  * mode.
2980  */
2981 u8 drm_match_cea_mode(const struct drm_display_mode *to_match)
2982 {
2983         unsigned int match_flags = DRM_MODE_MATCH_TIMINGS | DRM_MODE_MATCH_FLAGS;
2984         u8 vic;
2985
2986         if (!to_match->clock)
2987                 return 0;
2988
2989         if (to_match->picture_aspect_ratio)
2990                 match_flags |= DRM_MODE_MATCH_ASPECT_RATIO;
2991
2992         for (vic = 1; vic < ARRAY_SIZE(edid_cea_modes); vic++) {
2993                 struct drm_display_mode cea_mode = edid_cea_modes[vic];
2994                 unsigned int clock1, clock2;
2995
2996                 /* Check both 60Hz and 59.94Hz */
2997                 clock1 = cea_mode.clock;
2998                 clock2 = cea_mode_alternate_clock(&cea_mode);
2999
3000                 if (KHZ2PICOS(to_match->clock) != KHZ2PICOS(clock1) &&
3001                     KHZ2PICOS(to_match->clock) != KHZ2PICOS(clock2))
3002                         continue;
3003
3004                 do {
3005                         if (drm_mode_match(to_match, &cea_mode, match_flags))
3006                                 return vic;
3007                 } while (cea_mode_alternate_timings(vic, &cea_mode));
3008         }
3009
3010         return 0;
3011 }
3012 EXPORT_SYMBOL(drm_match_cea_mode);
3013
3014 static bool drm_valid_cea_vic(u8 vic)
3015 {
3016         return vic > 0 && vic < ARRAY_SIZE(edid_cea_modes);
3017 }
3018
3019 /**
3020  * drm_get_cea_aspect_ratio - get the picture aspect ratio corresponding to
3021  * the input VIC from the CEA mode list
3022  * @video_code: ID given to each of the CEA modes
3023  *
3024  * Returns picture aspect ratio
3025  */
3026 enum hdmi_picture_aspect drm_get_cea_aspect_ratio(const u8 video_code)
3027 {
3028         return edid_cea_modes[video_code].picture_aspect_ratio;
3029 }
3030 EXPORT_SYMBOL(drm_get_cea_aspect_ratio);
3031
3032 /*
3033  * Calculate the alternate clock for HDMI modes (those from the HDMI vendor
3034  * specific block).
3035  *
3036  * It's almost like cea_mode_alternate_clock(), we just need to add an
3037  * exception for the VIC 4 mode (4096x2160@24Hz): no alternate clock for this
3038  * one.
3039  */
3040 static unsigned int
3041 hdmi_mode_alternate_clock(const struct drm_display_mode *hdmi_mode)
3042 {
3043         if (hdmi_mode->vdisplay == 4096 && hdmi_mode->hdisplay == 2160)
3044                 return hdmi_mode->clock;
3045
3046         return cea_mode_alternate_clock(hdmi_mode);
3047 }
3048
3049 static u8 drm_match_hdmi_mode_clock_tolerance(const struct drm_display_mode *to_match,
3050                                               unsigned int clock_tolerance)
3051 {
3052         unsigned int match_flags = DRM_MODE_MATCH_TIMINGS | DRM_MODE_MATCH_FLAGS;
3053         u8 vic;
3054
3055         if (!to_match->clock)
3056                 return 0;
3057
3058         for (vic = 1; vic < ARRAY_SIZE(edid_4k_modes); vic++) {
3059                 const struct drm_display_mode *hdmi_mode = &edid_4k_modes[vic];
3060                 unsigned int clock1, clock2;
3061
3062                 /* Make sure to also match alternate clocks */
3063                 clock1 = hdmi_mode->clock;
3064                 clock2 = hdmi_mode_alternate_clock(hdmi_mode);
3065
3066                 if (abs(to_match->clock - clock1) > clock_tolerance &&
3067                     abs(to_match->clock - clock2) > clock_tolerance)
3068                         continue;
3069
3070                 if (drm_mode_match(to_match, hdmi_mode, match_flags))
3071                         return vic;
3072         }
3073
3074         return 0;
3075 }
3076
3077 /*
3078  * drm_match_hdmi_mode - look for a HDMI mode matching given mode
3079  * @to_match: display mode
3080  *
3081  * An HDMI mode is one defined in the HDMI vendor specific block.
3082  *
3083  * Returns the HDMI Video ID (VIC) of the mode or 0 if it isn't one.
3084  */
3085 static u8 drm_match_hdmi_mode(const struct drm_display_mode *to_match)
3086 {
3087         unsigned int match_flags = DRM_MODE_MATCH_TIMINGS | DRM_MODE_MATCH_FLAGS;
3088         u8 vic;
3089
3090         if (!to_match->clock)
3091                 return 0;
3092
3093         for (vic = 1; vic < ARRAY_SIZE(edid_4k_modes); vic++) {
3094                 const struct drm_display_mode *hdmi_mode = &edid_4k_modes[vic];
3095                 unsigned int clock1, clock2;
3096
3097                 /* Make sure to also match alternate clocks */
3098                 clock1 = hdmi_mode->clock;
3099                 clock2 = hdmi_mode_alternate_clock(hdmi_mode);
3100
3101                 if ((KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock1) ||
3102                      KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock2)) &&
3103                     drm_mode_match(to_match, hdmi_mode, match_flags))
3104                         return vic;
3105         }
3106         return 0;
3107 }
3108
3109 static bool drm_valid_hdmi_vic(u8 vic)
3110 {
3111         return vic > 0 && vic < ARRAY_SIZE(edid_4k_modes);
3112 }
3113
3114 static int
3115 add_alternate_cea_modes(struct drm_connector *connector, struct edid *edid)
3116 {
3117         struct drm_device *dev = connector->dev;
3118         struct drm_display_mode *mode, *tmp;
3119         LIST_HEAD(list);
3120         int modes = 0;
3121
3122         /* Don't add CEA modes if the CEA extension block is missing */
3123         if (!drm_find_cea_extension(edid))
3124                 return 0;
3125
3126         /*
3127          * Go through all probed modes and create a new mode
3128          * with the alternate clock for certain CEA modes.
3129          */
3130         list_for_each_entry(mode, &connector->probed_modes, head) {
3131                 const struct drm_display_mode *cea_mode = NULL;
3132                 struct drm_display_mode *newmode;
3133                 u8 vic = drm_match_cea_mode(mode);
3134                 unsigned int clock1, clock2;
3135
3136                 if (drm_valid_cea_vic(vic)) {
3137                         cea_mode = &edid_cea_modes[vic];
3138                         clock2 = cea_mode_alternate_clock(cea_mode);
3139                 } else {
3140                         vic = drm_match_hdmi_mode(mode);
3141                         if (drm_valid_hdmi_vic(vic)) {
3142                                 cea_mode = &edid_4k_modes[vic];
3143                                 clock2 = hdmi_mode_alternate_clock(cea_mode);
3144                         }
3145                 }
3146
3147                 if (!cea_mode)
3148                         continue;
3149
3150                 clock1 = cea_mode->clock;
3151
3152                 if (clock1 == clock2)
3153                         continue;
3154
3155                 if (mode->clock != clock1 && mode->clock != clock2)
3156                         continue;
3157
3158                 newmode = drm_mode_duplicate(dev, cea_mode);
3159                 if (!newmode)
3160                         continue;
3161
3162                 /* Carry over the stereo flags */
3163                 newmode->flags |= mode->flags & DRM_MODE_FLAG_3D_MASK;
3164
3165                 /*
3166                  * The current mode could be either variant. Make
3167                  * sure to pick the "other" clock for the new mode.
3168                  */
3169                 if (mode->clock != clock1)
3170                         newmode->clock = clock1;
3171                 else
3172                         newmode->clock = clock2;
3173
3174                 list_add_tail(&newmode->head, &list);
3175         }
3176
3177         list_for_each_entry_safe(mode, tmp, &list, head) {
3178                 list_del(&mode->head);
3179                 drm_mode_probed_add(connector, mode);
3180                 modes++;
3181         }
3182
3183         return modes;
3184 }
3185
3186 static u8 svd_to_vic(u8 svd)
3187 {
3188         /* 0-6 bit vic, 7th bit native mode indicator */
3189         if ((svd >= 1 &&  svd <= 64) || (svd >= 129 && svd <= 192))
3190                 return svd & 127;
3191
3192         return svd;
3193 }
3194
3195 static struct drm_display_mode *
3196 drm_display_mode_from_vic_index(struct drm_connector *connector,
3197                                 const u8 *video_db, u8 video_len,
3198                                 u8 video_index)
3199 {
3200         struct drm_device *dev = connector->dev;
3201         struct drm_display_mode *newmode;