Merge tag 'gvt-fixes-2017-05-11' of https://github.com/01org/gvt-linux into drm-intel...
[muen/linux.git] / drivers / gpu / drm / i915 / gvt / sched_policy.c
1 /*
2  * Copyright(c) 2011-2016 Intel Corporation. All rights reserved.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice (including the next
12  * paragraph) shall be included in all copies or substantial portions of the
13  * Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21  * SOFTWARE.
22  *
23  * Authors:
24  *    Anhua Xu
25  *    Kevin Tian <kevin.tian@intel.com>
26  *
27  * Contributors:
28  *    Min He <min.he@intel.com>
29  *    Bing Niu <bing.niu@intel.com>
30  *    Zhi Wang <zhi.a.wang@intel.com>
31  *
32  */
33
34 #include "i915_drv.h"
35 #include "gvt.h"
36
37 static bool vgpu_has_pending_workload(struct intel_vgpu *vgpu)
38 {
39         enum intel_engine_id i;
40         struct intel_engine_cs *engine;
41
42         for_each_engine(engine, vgpu->gvt->dev_priv, i) {
43                 if (!list_empty(workload_q_head(vgpu, i)))
44                         return true;
45         }
46
47         return false;
48 }
49
50 struct vgpu_sched_data {
51         struct list_head lru_list;
52         struct intel_vgpu *vgpu;
53
54         ktime_t sched_in_time;
55         ktime_t sched_out_time;
56         ktime_t sched_time;
57         ktime_t left_ts;
58         ktime_t allocated_ts;
59
60         struct vgpu_sched_ctl sched_ctl;
61 };
62
63 struct gvt_sched_data {
64         struct intel_gvt *gvt;
65         struct hrtimer timer;
66         unsigned long period;
67         struct list_head lru_runq_head;
68 };
69
70 static void vgpu_update_timeslice(struct intel_vgpu *pre_vgpu)
71 {
72         ktime_t delta_ts;
73         struct vgpu_sched_data *vgpu_data = pre_vgpu->sched_data;
74
75         delta_ts = vgpu_data->sched_out_time - vgpu_data->sched_in_time;
76
77         vgpu_data->sched_time += delta_ts;
78         vgpu_data->left_ts -= delta_ts;
79 }
80
81 #define GVT_TS_BALANCE_PERIOD_MS 100
82 #define GVT_TS_BALANCE_STAGE_NUM 10
83
84 static void gvt_balance_timeslice(struct gvt_sched_data *sched_data)
85 {
86         struct vgpu_sched_data *vgpu_data;
87         struct list_head *pos;
88         static uint64_t stage_check;
89         int stage = stage_check++ % GVT_TS_BALANCE_STAGE_NUM;
90
91         /* The timeslice accumulation reset at stage 0, which is
92          * allocated again without adding previous debt.
93          */
94         if (stage == 0) {
95                 int total_weight = 0;
96                 ktime_t fair_timeslice;
97
98                 list_for_each(pos, &sched_data->lru_runq_head) {
99                         vgpu_data = container_of(pos, struct vgpu_sched_data, lru_list);
100                         total_weight += vgpu_data->sched_ctl.weight;
101                 }
102
103                 list_for_each(pos, &sched_data->lru_runq_head) {
104                         vgpu_data = container_of(pos, struct vgpu_sched_data, lru_list);
105                         fair_timeslice = ms_to_ktime(GVT_TS_BALANCE_PERIOD_MS) *
106                                                 vgpu_data->sched_ctl.weight /
107                                                 total_weight;
108
109                         vgpu_data->allocated_ts = fair_timeslice;
110                         vgpu_data->left_ts = vgpu_data->allocated_ts;
111                 }
112         } else {
113                 list_for_each(pos, &sched_data->lru_runq_head) {
114                         vgpu_data = container_of(pos, struct vgpu_sched_data, lru_list);
115
116                         /* timeslice for next 100ms should add the left/debt
117                          * slice of previous stages.
118                          */
119                         vgpu_data->left_ts += vgpu_data->allocated_ts;
120                 }
121         }
122 }
123
124 static void try_to_schedule_next_vgpu(struct intel_gvt *gvt)
125 {
126         struct intel_gvt_workload_scheduler *scheduler = &gvt->scheduler;
127         enum intel_engine_id i;
128         struct intel_engine_cs *engine;
129         struct vgpu_sched_data *vgpu_data;
130         ktime_t cur_time;
131
132         /* no need to schedule if next_vgpu is the same with current_vgpu,
133          * let scheduler chose next_vgpu again by setting it to NULL.
134          */
135         if (scheduler->next_vgpu == scheduler->current_vgpu) {
136                 scheduler->next_vgpu = NULL;
137                 return;
138         }
139
140         /*
141          * after the flag is set, workload dispatch thread will
142          * stop dispatching workload for current vgpu
143          */
144         scheduler->need_reschedule = true;
145
146         /* still have uncompleted workload? */
147         for_each_engine(engine, gvt->dev_priv, i) {
148                 if (scheduler->current_workload[i])
149                         return;
150         }
151
152         cur_time = ktime_get();
153         if (scheduler->current_vgpu) {
154                 vgpu_data = scheduler->current_vgpu->sched_data;
155                 vgpu_data->sched_out_time = cur_time;
156                 vgpu_update_timeslice(scheduler->current_vgpu);
157         }
158         vgpu_data = scheduler->next_vgpu->sched_data;
159         vgpu_data->sched_in_time = cur_time;
160
161         /* switch current vgpu */
162         scheduler->current_vgpu = scheduler->next_vgpu;
163         scheduler->next_vgpu = NULL;
164
165         scheduler->need_reschedule = false;
166
167         /* wake up workload dispatch thread */
168         for_each_engine(engine, gvt->dev_priv, i)
169                 wake_up(&scheduler->waitq[i]);
170 }
171
172 static struct intel_vgpu *find_busy_vgpu(struct gvt_sched_data *sched_data)
173 {
174         struct vgpu_sched_data *vgpu_data;
175         struct intel_vgpu *vgpu = NULL;
176         struct list_head *head = &sched_data->lru_runq_head;
177         struct list_head *pos;
178
179         /* search a vgpu with pending workload */
180         list_for_each(pos, head) {
181
182                 vgpu_data = container_of(pos, struct vgpu_sched_data, lru_list);
183                 if (!vgpu_has_pending_workload(vgpu_data->vgpu))
184                         continue;
185
186                 /* Return the vGPU only if it has time slice left */
187                 if (vgpu_data->left_ts > 0) {
188                         vgpu = vgpu_data->vgpu;
189                         break;
190                 }
191         }
192
193         return vgpu;
194 }
195
196 /* in nanosecond */
197 #define GVT_DEFAULT_TIME_SLICE 1000000
198
199 static void tbs_sched_func(struct gvt_sched_data *sched_data)
200 {
201         struct intel_gvt *gvt = sched_data->gvt;
202         struct intel_gvt_workload_scheduler *scheduler = &gvt->scheduler;
203         struct vgpu_sched_data *vgpu_data;
204         struct intel_vgpu *vgpu = NULL;
205         static uint64_t timer_check;
206
207         if (!(timer_check++ % GVT_TS_BALANCE_PERIOD_MS))
208                 gvt_balance_timeslice(sched_data);
209
210         /* no active vgpu or has already had a target */
211         if (list_empty(&sched_data->lru_runq_head) || scheduler->next_vgpu)
212                 goto out;
213
214         vgpu = find_busy_vgpu(sched_data);
215         if (vgpu) {
216                 scheduler->next_vgpu = vgpu;
217
218                 /* Move the last used vGPU to the tail of lru_list */
219                 vgpu_data = vgpu->sched_data;
220                 list_del_init(&vgpu_data->lru_list);
221                 list_add_tail(&vgpu_data->lru_list,
222                                 &sched_data->lru_runq_head);
223         } else {
224                 scheduler->next_vgpu = gvt->idle_vgpu;
225         }
226 out:
227         if (scheduler->next_vgpu)
228                 try_to_schedule_next_vgpu(gvt);
229 }
230
231 void intel_gvt_schedule(struct intel_gvt *gvt)
232 {
233         struct gvt_sched_data *sched_data = gvt->scheduler.sched_data;
234
235         mutex_lock(&gvt->lock);
236         tbs_sched_func(sched_data);
237         mutex_unlock(&gvt->lock);
238 }
239
240 static enum hrtimer_restart tbs_timer_fn(struct hrtimer *timer_data)
241 {
242         struct gvt_sched_data *data;
243
244         data = container_of(timer_data, struct gvt_sched_data, timer);
245
246         intel_gvt_request_service(data->gvt, INTEL_GVT_REQUEST_SCHED);
247
248         hrtimer_add_expires_ns(&data->timer, data->period);
249
250         return HRTIMER_RESTART;
251 }
252
253 static int tbs_sched_init(struct intel_gvt *gvt)
254 {
255         struct intel_gvt_workload_scheduler *scheduler =
256                 &gvt->scheduler;
257
258         struct gvt_sched_data *data;
259
260         data = kzalloc(sizeof(*data), GFP_KERNEL);
261         if (!data)
262                 return -ENOMEM;
263
264         INIT_LIST_HEAD(&data->lru_runq_head);
265         hrtimer_init(&data->timer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
266         data->timer.function = tbs_timer_fn;
267         data->period = GVT_DEFAULT_TIME_SLICE;
268         data->gvt = gvt;
269
270         scheduler->sched_data = data;
271
272         return 0;
273 }
274
275 static void tbs_sched_clean(struct intel_gvt *gvt)
276 {
277         struct intel_gvt_workload_scheduler *scheduler =
278                 &gvt->scheduler;
279         struct gvt_sched_data *data = scheduler->sched_data;
280
281         hrtimer_cancel(&data->timer);
282
283         kfree(data);
284         scheduler->sched_data = NULL;
285 }
286
287 static int tbs_sched_init_vgpu(struct intel_vgpu *vgpu)
288 {
289         struct vgpu_sched_data *data;
290
291         data = kzalloc(sizeof(*data), GFP_KERNEL);
292         if (!data)
293                 return -ENOMEM;
294
295         data->sched_ctl.weight = vgpu->sched_ctl.weight;
296         data->vgpu = vgpu;
297         INIT_LIST_HEAD(&data->lru_list);
298
299         vgpu->sched_data = data;
300
301         return 0;
302 }
303
304 static void tbs_sched_clean_vgpu(struct intel_vgpu *vgpu)
305 {
306         kfree(vgpu->sched_data);
307         vgpu->sched_data = NULL;
308 }
309
310 static void tbs_sched_start_schedule(struct intel_vgpu *vgpu)
311 {
312         struct gvt_sched_data *sched_data = vgpu->gvt->scheduler.sched_data;
313         struct vgpu_sched_data *vgpu_data = vgpu->sched_data;
314
315         if (!list_empty(&vgpu_data->lru_list))
316                 return;
317
318         list_add_tail(&vgpu_data->lru_list, &sched_data->lru_runq_head);
319
320         if (!hrtimer_active(&sched_data->timer))
321                 hrtimer_start(&sched_data->timer, ktime_add_ns(ktime_get(),
322                         sched_data->period), HRTIMER_MODE_ABS);
323 }
324
325 static void tbs_sched_stop_schedule(struct intel_vgpu *vgpu)
326 {
327         struct vgpu_sched_data *vgpu_data = vgpu->sched_data;
328
329         list_del_init(&vgpu_data->lru_list);
330 }
331
332 static struct intel_gvt_sched_policy_ops tbs_schedule_ops = {
333         .init = tbs_sched_init,
334         .clean = tbs_sched_clean,
335         .init_vgpu = tbs_sched_init_vgpu,
336         .clean_vgpu = tbs_sched_clean_vgpu,
337         .start_schedule = tbs_sched_start_schedule,
338         .stop_schedule = tbs_sched_stop_schedule,
339 };
340
341 int intel_gvt_init_sched_policy(struct intel_gvt *gvt)
342 {
343         gvt->scheduler.sched_ops = &tbs_schedule_ops;
344
345         return gvt->scheduler.sched_ops->init(gvt);
346 }
347
348 void intel_gvt_clean_sched_policy(struct intel_gvt *gvt)
349 {
350         gvt->scheduler.sched_ops->clean(gvt);
351 }
352
353 int intel_vgpu_init_sched_policy(struct intel_vgpu *vgpu)
354 {
355         return vgpu->gvt->scheduler.sched_ops->init_vgpu(vgpu);
356 }
357
358 void intel_vgpu_clean_sched_policy(struct intel_vgpu *vgpu)
359 {
360         vgpu->gvt->scheduler.sched_ops->clean_vgpu(vgpu);
361 }
362
363 void intel_vgpu_start_schedule(struct intel_vgpu *vgpu)
364 {
365         gvt_dbg_core("vgpu%d: start schedule\n", vgpu->id);
366
367         vgpu->gvt->scheduler.sched_ops->start_schedule(vgpu);
368 }
369
370 void intel_vgpu_stop_schedule(struct intel_vgpu *vgpu)
371 {
372         struct intel_gvt_workload_scheduler *scheduler =
373                 &vgpu->gvt->scheduler;
374
375         gvt_dbg_core("vgpu%d: stop schedule\n", vgpu->id);
376
377         scheduler->sched_ops->stop_schedule(vgpu);
378
379         if (scheduler->next_vgpu == vgpu)
380                 scheduler->next_vgpu = NULL;
381
382         if (scheduler->current_vgpu == vgpu) {
383                 /* stop workload dispatching */
384                 scheduler->need_reschedule = true;
385                 scheduler->current_vgpu = NULL;
386         }
387 }