drivers/gpu/drm/i915/intel_sdvo.c

   1 /*
   2  * Copyright 2006 Dave Airlie <airlied@linux.ie>
   3  * Copyright © 2006-2007 Intel Corporation
   4  *   Jesse Barnes <jesse.barnes@intel.com>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  22  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  23  * DEALINGS IN THE SOFTWARE.
  24  *
  25  * Authors:
  26  *      Eric Anholt <eric@anholt.net>
  27  */
  28 #include <linux/i2c.h>
  29 #include <linux/slab.h>
  30 #include <linux/delay.h>
  31 #include <linux/export.h>
  32 #include <drm/drmP.h>
  33 #include <drm/drm_atomic_helper.h>
  34 #include <drm/drm_crtc.h>
  35 #include <drm/drm_edid.h>
  36 #include "intel_drv.h"
  37 #include <drm/i915_drm.h>
  38 #include "i915_drv.h"
  39 #include "intel_sdvo_regs.h"
  40
  41 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
  42 #define SDVO_RGB_MASK  (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
  43 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
  44 #define SDVO_TV_MASK   (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
  45
  46 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
  47                         SDVO_TV_MASK)
  48
  49 #define IS_TV(c)        (c->output_flag & SDVO_TV_MASK)
  50 #define IS_TMDS(c)      (c->output_flag & SDVO_TMDS_MASK)
  51 #define IS_LVDS(c)      (c->output_flag & SDVO_LVDS_MASK)
  52 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
  53 #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
  54
  55
  56 static const char * const tv_format_names[] = {
  57         "NTSC_M"   , "NTSC_J"  , "NTSC_443",
  58         "PAL_B"    , "PAL_D"   , "PAL_G"   ,
  59         "PAL_H"    , "PAL_I"   , "PAL_M"   ,
  60         "PAL_N"    , "PAL_NC"  , "PAL_60"  ,
  61         "SECAM_B"  , "SECAM_D" , "SECAM_G" ,
  62         "SECAM_K"  , "SECAM_K1", "SECAM_L" ,
  63         "SECAM_60"
  64 };
  65
  66 #define TV_FORMAT_NUM  ARRAY_SIZE(tv_format_names)
  67
  68 struct intel_sdvo {
  69         struct intel_encoder base;
  70
  71         struct i2c_adapter *i2c;
  72         u8 slave_addr;
  73
  74         struct i2c_adapter ddc;
  75
  76         /* Register for the SDVO device: SDVOB or SDVOC */
  77         i915_reg_t sdvo_reg;
  78
  79         /* Active outputs controlled by this SDVO output */
  80         uint16_t controlled_output;
  81
  82         /*
  83          * Capabilities of the SDVO device returned by
  84          * intel_sdvo_get_capabilities()
  85          */
  86         struct intel_sdvo_caps caps;
  87
  88         /* Pixel clock limitations reported by the SDVO device, in kHz */
  89         int pixel_clock_min, pixel_clock_max;
  90
  91         /*
  92         * For multiple function SDVO device,
  93         * this is for current attached outputs.
  94         */
  95         uint16_t attached_output;
  96
  97         /*
  98          * Hotplug activation bits for this device
  99          */
 100         uint16_t hotplug_active;
 101
 102         enum port port;
 103
 104         bool has_hdmi_monitor;
 105         bool has_hdmi_audio;
 106         bool rgb_quant_range_selectable;
 107
 108         /**
 109          * This is sdvo fixed pannel mode pointer
 110          */
 111         struct drm_display_mode *sdvo_lvds_fixed_mode;
 112
 113         /* DDC bus used by this SDVO encoder */
 114         uint8_t ddc_bus;
 115
 116         /*
 117          * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd
 118          */
 119         uint8_t dtd_sdvo_flags;
 120 };
 121
 122 struct intel_sdvo_connector {
 123         struct intel_connector base;
 124
 125         /* Mark the type of connector */
 126         uint16_t output_flag;
 127
 128         /* This contains all current supported TV format */
 129         u8 tv_format_supported[TV_FORMAT_NUM];
 130         int   format_supported_num;
 131         struct drm_property *tv_format;
 132
 133         /* add the property for the SDVO-TV */
 134         struct drm_property *left;
 135         struct drm_property *right;
 136         struct drm_property *top;
 137         struct drm_property *bottom;
 138         struct drm_property *hpos;
 139         struct drm_property *vpos;
 140         struct drm_property *contrast;
 141         struct drm_property *saturation;
 142         struct drm_property *hue;
 143         struct drm_property *sharpness;
 144         struct drm_property *flicker_filter;
 145         struct drm_property *flicker_filter_adaptive;
 146         struct drm_property *flicker_filter_2d;
 147         struct drm_property *tv_chroma_filter;
 148         struct drm_property *tv_luma_filter;
 149         struct drm_property *dot_crawl;
 150
 151         /* add the property for the SDVO-TV/LVDS */
 152         struct drm_property *brightness;
 153
 154         /* this is to get the range of margin.*/
 155         u32 max_hscan, max_vscan;
 156
 157         /**
 158          * This is set if we treat the device as HDMI, instead of DVI.
 159          */
 160         bool is_hdmi;
 161 };
 162
 163 struct intel_sdvo_connector_state {
 164         /* base.base: tv.saturation/contrast/hue/brightness */
 165         struct intel_digital_connector_state base;
 166
 167         struct {
 168                 unsigned overscan_h, overscan_v, hpos, vpos, sharpness;
 169                 unsigned flicker_filter, flicker_filter_2d, flicker_filter_adaptive;
 170                 unsigned chroma_filter, luma_filter, dot_crawl;
 171         } tv;
 172 };
 173
 174 static struct intel_sdvo *to_sdvo(struct intel_encoder *encoder)
 175 {
 176         return container_of(encoder, struct intel_sdvo, base);
 177 }
 178
 179 static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
 180 {
 181         return to_sdvo(intel_attached_encoder(connector));
 182 }
 183
 184 static struct intel_sdvo_connector *
 185 to_intel_sdvo_connector(struct drm_connector *connector)
 186 {
 187         return container_of(connector, struct intel_sdvo_connector, base.base);
 188 }
 189
 190 #define to_intel_sdvo_connector_state(conn_state) \
 191         container_of((conn_state), struct intel_sdvo_connector_state, base.base)
 192
 193 static bool
 194 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
 195 static bool
 196 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
 197                               struct intel_sdvo_connector *intel_sdvo_connector,
 198                               int type);
 199 static bool
 200 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
 201                                    struct intel_sdvo_connector *intel_sdvo_connector);
 202
 203 /*
 204  * Writes the SDVOB or SDVOC with the given value, but always writes both
 205  * SDVOB and SDVOC to work around apparent hardware issues (according to
 206  * comments in the BIOS).
 207  */
 208 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
 209 {
 210         struct drm_device *dev = intel_sdvo->base.base.dev;
 211         struct drm_i915_private *dev_priv = to_i915(dev);
 212         u32 bval = val, cval = val;
 213         int i;
 214
 215         if (HAS_PCH_SPLIT(dev_priv)) {
 216                 I915_WRITE(intel_sdvo->sdvo_reg, val);
 217                 POSTING_READ(intel_sdvo->sdvo_reg);
 218                 /*
 219                  * HW workaround, need to write this twice for issue
 220                  * that may result in first write getting masked.
 221                  */
 222                 if (HAS_PCH_IBX(dev_priv)) {
 223                         I915_WRITE(intel_sdvo->sdvo_reg, val);
 224                         POSTING_READ(intel_sdvo->sdvo_reg);
 225                 }
 226                 return;
 227         }
 228
 229         if (intel_sdvo->port == PORT_B)
 230                 cval = I915_READ(GEN3_SDVOC);
 231         else
 232                 bval = I915_READ(GEN3_SDVOB);
 233
 234         /*
 235          * Write the registers twice for luck. Sometimes,
 236          * writing them only once doesn't appear to 'stick'.
 237          * The BIOS does this too. Yay, magic
 238          */
 239         for (i = 0; i < 2; i++) {
 240                 I915_WRITE(GEN3_SDVOB, bval);
 241                 POSTING_READ(GEN3_SDVOB);
 242
 243                 I915_WRITE(GEN3_SDVOC, cval);
 244                 POSTING_READ(GEN3_SDVOC);
 245         }
 246 }
 247
 248 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
 249 {
 250         struct i2c_msg msgs[] = {
 251                 {
 252                         .addr = intel_sdvo->slave_addr,
 253                         .flags = 0,
 254                         .len = 1,
 255                         .buf = &addr,
 256                 },
 257                 {
 258                         .addr = intel_sdvo->slave_addr,
 259                         .flags = I2C_M_RD,
 260                         .len = 1,
 261                         .buf = ch,
 262                 }
 263         };
 264         int ret;
 265
 266         if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
 267                 return true;
 268
 269         DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
 270         return false;
 271 }
 272
 273 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
 274 /** Mapping of command numbers to names, for debug output */
 275 static const struct _sdvo_cmd_name {
 276         u8 cmd;
 277         const char *name;
 278 } __attribute__ ((packed)) sdvo_cmd_names[] = {
 279         SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
 280         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
 281         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
 282         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
 283         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
 284         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
 285         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
 286         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
 287         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
 288         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
 289         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
 290         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
 291         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
 292         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
 293         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
 294         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
 295         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
 296         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
 297         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
 298         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
 299         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
 300         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
 301         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
 302         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
 303         SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
 304         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
 305         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
 306         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
 307         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
 308         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
 309         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
 310         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
 311         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
 312         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
 313         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
 314         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
 315         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
 316         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
 317         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
 318         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
 319         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
 320         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
 321         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
 322
 323         /* Add the op code for SDVO enhancements */
 324         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
 325         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
 326         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
 327         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
 328         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
 329         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
 330         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
 331         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
 332         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
 333         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
 334         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
 335         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
 336         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
 337         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
 338         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
 339         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
 340         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
 341         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
 342         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
 343         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
 344         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
 345         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
 346         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
 347         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
 348         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
 349         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
 350         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
 351         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
 352         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
 353         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
 354         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
 355         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
 356         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
 357         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
 358         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
 359         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
 360         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
 361         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
 362         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
 363         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
 364         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
 365         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
 366         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
 367         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
 368
 369         /* HDMI op code */
 370         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
 371         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
 372         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
 373         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
 374         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
 375         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
 376         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
 377         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
 378         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
 379         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
 380         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
 381         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
 382         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
 383         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
 384         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
 385         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
 386         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
 387         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
 388         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
 389         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
 390 };
 391
 392 #define SDVO_NAME(svdo) ((svdo)->port == PORT_B ? "SDVOB" : "SDVOC")
 393
 394 static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
 395                                    const void *args, int args_len)
 396 {
 397         int i, pos = 0;
 398 #define BUF_LEN 256
 399         char buffer[BUF_LEN];
 400
 401 #define BUF_PRINT(args...) \
 402         pos += snprintf(buffer + pos, max_t(int, BUF_LEN - pos, 0), args)
 403
 404
 405         for (i = 0; i < args_len; i++) {
 406                 BUF_PRINT("%02X ", ((u8 *)args)[i]);
 407         }
 408         for (; i < 8; i++) {
 409                 BUF_PRINT("   ");
 410         }
 411         for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
 412                 if (cmd == sdvo_cmd_names[i].cmd) {
 413                         BUF_PRINT("(%s)", sdvo_cmd_names[i].name);
 414                         break;
 415                 }
 416         }
 417         if (i == ARRAY_SIZE(sdvo_cmd_names)) {
 418                 BUF_PRINT("(%02X)", cmd);
 419         }
 420         BUG_ON(pos >= BUF_LEN - 1);
 421 #undef BUF_PRINT
 422 #undef BUF_LEN
 423
 424         DRM_DEBUG_KMS("%s: W: %02X %s\n", SDVO_NAME(intel_sdvo), cmd, buffer);
 425 }
 426
 427 static const char * const cmd_status_names[] = {
 428         "Power on",
 429         "Success",
 430         "Not supported",
 431         "Invalid arg",
 432         "Pending",
 433         "Target not specified",
 434         "Scaling not supported"
 435 };
 436
 437 static bool __intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
 438                                    const void *args, int args_len,
 439                                    bool unlocked)
 440 {
 441         u8 *buf, status;
 442         struct i2c_msg *msgs;
 443         int i, ret = true;
 444
 445         /* Would be simpler to allocate both in one go ? */
 446         buf = kzalloc(args_len * 2 + 2, GFP_KERNEL);
 447         if (!buf)
 448                 return false;
 449
 450         msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL);
 451         if (!msgs) {
 452                 kfree(buf);
 453                 return false;
 454         }
 455
 456         intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
 457
 458         for (i = 0; i < args_len; i++) {
 459                 msgs[i].addr = intel_sdvo->slave_addr;
 460                 msgs[i].flags = 0;
 461                 msgs[i].len = 2;
 462                 msgs[i].buf = buf + 2 *i;
 463                 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
 464                 buf[2*i + 1] = ((u8*)args)[i];
 465         }
 466         msgs[i].addr = intel_sdvo->slave_addr;
 467         msgs[i].flags = 0;
 468         msgs[i].len = 2;
 469         msgs[i].buf = buf + 2*i;
 470         buf[2*i + 0] = SDVO_I2C_OPCODE;
 471         buf[2*i + 1] = cmd;
 472
 473         /* the following two are to read the response */
 474         status = SDVO_I2C_CMD_STATUS;
 475         msgs[i+1].addr = intel_sdvo->slave_addr;
 476         msgs[i+1].flags = 0;
 477         msgs[i+1].len = 1;
 478         msgs[i+1].buf = &status;
 479
 480         msgs[i+2].addr = intel_sdvo->slave_addr;
 481         msgs[i+2].flags = I2C_M_RD;
 482         msgs[i+2].len = 1;
 483         msgs[i+2].buf = &status;
 484
 485         if (unlocked)
 486                 ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
 487         else
 488                 ret = __i2c_transfer(intel_sdvo->i2c, msgs, i+3);
 489         if (ret < 0) {
 490                 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
 491                 ret = false;
 492                 goto out;
 493         }
 494         if (ret != i+3) {
 495                 /* failure in I2C transfer */
 496                 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
 497                 ret = false;
 498         }
 499
 500 out:
 501         kfree(msgs);
 502         kfree(buf);
 503         return ret;
 504 }
 505
 506 static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
 507                                  const void *args, int args_len)
 508 {
 509         return __intel_sdvo_write_cmd(intel_sdvo, cmd, args, args_len, true);
 510 }
 511
 512 static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
 513                                      void *response, int response_len)
 514 {
 515         u8 retry = 15; /* 5 quick checks, followed by 10 long checks */
 516         u8 status;
 517         int i, pos = 0;
 518 #define BUF_LEN 256
 519         char buffer[BUF_LEN];
 520
 521
 522         /*
 523          * The documentation states that all commands will be
 524          * processed within 15µs, and that we need only poll
 525          * the status byte a maximum of 3 times in order for the
 526          * command to be complete.
 527          *
 528          * Check 5 times in case the hardware failed to read the docs.
 529          *
 530          * Also beware that the first response by many devices is to
 531          * reply PENDING and stall for time. TVs are notorious for
 532          * requiring longer than specified to complete their replies.
 533          * Originally (in the DDX long ago), the delay was only ever 15ms
 534          * with an additional delay of 30ms applied for TVs added later after
 535          * many experiments. To accommodate both sets of delays, we do a
 536          * sequence of slow checks if the device is falling behind and fails
 537          * to reply within 5*15µs.
 538          */
 539         if (!intel_sdvo_read_byte(intel_sdvo,
 540                                   SDVO_I2C_CMD_STATUS,
 541                                   &status))
 542                 goto log_fail;
 543
 544         while ((status == SDVO_CMD_STATUS_PENDING ||
 545                 status == SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED) && --retry) {
 546                 if (retry < 10)
 547                         msleep(15);
 548                 else
 549                         udelay(15);
 550
 551                 if (!intel_sdvo_read_byte(intel_sdvo,
 552                                           SDVO_I2C_CMD_STATUS,
 553                                           &status))
 554                         goto log_fail;
 555         }
 556
 557 #define BUF_PRINT(args...) \
 558         pos += snprintf(buffer + pos, max_t(int, BUF_LEN - pos, 0), args)
 559
 560         if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
 561                 BUF_PRINT("(%s)", cmd_status_names[status]);
 562         else
 563                 BUF_PRINT("(??? %d)", status);
 564
 565         if (status != SDVO_CMD_STATUS_SUCCESS)
 566                 goto log_fail;
 567
 568         /* Read the command response */
 569         for (i = 0; i < response_len; i++) {
 570                 if (!intel_sdvo_read_byte(intel_sdvo,
 571                                           SDVO_I2C_RETURN_0 + i,
 572                                           &((u8 *)response)[i]))
 573                         goto log_fail;
 574                 BUF_PRINT(" %02X", ((u8 *)response)[i]);
 575         }
 576         BUG_ON(pos >= BUF_LEN - 1);
 577 #undef BUF_PRINT
 578 #undef BUF_LEN
 579
 580         DRM_DEBUG_KMS("%s: R: %s\n", SDVO_NAME(intel_sdvo), buffer);
 581         return true;
 582
 583 log_fail:
 584         DRM_DEBUG_KMS("%s: R: ... failed\n", SDVO_NAME(intel_sdvo));
 585         return false;
 586 }
 587
 588 static int intel_sdvo_get_pixel_multiplier(const struct drm_display_mode *adjusted_mode)
 589 {
 590         if (adjusted_mode->crtc_clock >= 100000)
 591                 return 1;
 592         else if (adjusted_mode->crtc_clock >= 50000)
 593                 return 2;
 594         else
 595                 return 4;
 596 }
 597
 598 static bool __intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
 599                                                 u8 ddc_bus)
 600 {
 601         /* This must be the immediately preceding write before the i2c xfer */
 602         return __intel_sdvo_write_cmd(intel_sdvo,
 603                                       SDVO_CMD_SET_CONTROL_BUS_SWITCH,
 604                                       &ddc_bus, 1, false);
 605 }
 606
 607 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
 608 {
 609         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
 610                 return false;
 611
 612         return intel_sdvo_read_response(intel_sdvo, NULL, 0);
 613 }
 614
 615 static bool
 616 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
 617 {
 618         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
 619                 return false;
 620
 621         return intel_sdvo_read_response(intel_sdvo, value, len);
 622 }
 623
 624 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
 625 {
 626         struct intel_sdvo_set_target_input_args targets = {0};
 627         return intel_sdvo_set_value(intel_sdvo,
 628                                     SDVO_CMD_SET_TARGET_INPUT,
 629                                     &targets, sizeof(targets));
 630 }
 631
 632 /*
 633  * Return whether each input is trained.
 634  *
 635  * This function is making an assumption about the layout of the response,
 636  * which should be checked against the docs.
 637  */
 638 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
 639 {
 640         struct intel_sdvo_get_trained_inputs_response response;
 641
 642         BUILD_BUG_ON(sizeof(response) != 1);
 643         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
 644                                   &response, sizeof(response)))
 645                 return false;
 646
 647         *input_1 = response.input0_trained;
 648         *input_2 = response.input1_trained;
 649         return true;
 650 }
 651
 652 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
 653                                           u16 outputs)
 654 {
 655         return intel_sdvo_set_value(intel_sdvo,
 656                                     SDVO_CMD_SET_ACTIVE_OUTPUTS,
 657                                     &outputs, sizeof(outputs));
 658 }
 659
 660 static bool intel_sdvo_get_active_outputs(struct intel_sdvo *intel_sdvo,
 661                                           u16 *outputs)
 662 {
 663         return intel_sdvo_get_value(intel_sdvo,
 664                                     SDVO_CMD_GET_ACTIVE_OUTPUTS,
 665                                     outputs, sizeof(*outputs));
 666 }
 667
 668 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
 669                                                int mode)
 670 {
 671         u8 state = SDVO_ENCODER_STATE_ON;
 672
 673         switch (mode) {
 674         case DRM_MODE_DPMS_ON:
 675                 state = SDVO_ENCODER_STATE_ON;
 676                 break;
 677         case DRM_MODE_DPMS_STANDBY:
 678                 state = SDVO_ENCODER_STATE_STANDBY;
 679                 break;
 680         case DRM_MODE_DPMS_SUSPEND:
 681                 state = SDVO_ENCODER_STATE_SUSPEND;
 682                 break;
 683         case DRM_MODE_DPMS_OFF:
 684                 state = SDVO_ENCODER_STATE_OFF;
 685                 break;
 686         }
 687
 688         return intel_sdvo_set_value(intel_sdvo,
 689                                     SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
 690 }
 691
 692 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
 693                                                    int *clock_min,
 694                                                    int *clock_max)
 695 {
 696         struct intel_sdvo_pixel_clock_range clocks;
 697
 698         BUILD_BUG_ON(sizeof(clocks) != 4);
 699         if (!intel_sdvo_get_value(intel_sdvo,
 700                                   SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
 701                                   &clocks, sizeof(clocks)))
 702                 return false;
 703
 704         /* Convert the values from units of 10 kHz to kHz. */
 705         *clock_min = clocks.min * 10;
 706         *clock_max = clocks.max * 10;
 707         return true;
 708 }
 709
 710 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
 711                                          u16 outputs)
 712 {
 713         return intel_sdvo_set_value(intel_sdvo,
 714                                     SDVO_CMD_SET_TARGET_OUTPUT,
 715                                     &outputs, sizeof(outputs));
 716 }
 717
 718 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
 719                                   struct intel_sdvo_dtd *dtd)
 720 {
 721         return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
 722                 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
 723 }
 724
 725 static bool intel_sdvo_get_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
 726                                   struct intel_sdvo_dtd *dtd)
 727 {
 728         return intel_sdvo_get_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
 729                 intel_sdvo_get_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
 730 }
 731
 732 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
 733                                          struct intel_sdvo_dtd *dtd)
 734 {
 735         return intel_sdvo_set_timing(intel_sdvo,
 736                                      SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
 737 }
 738
 739 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
 740                                          struct intel_sdvo_dtd *dtd)
 741 {
 742         return intel_sdvo_set_timing(intel_sdvo,
 743                                      SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
 744 }
 745
 746 static bool intel_sdvo_get_input_timing(struct intel_sdvo *intel_sdvo,
 747                                         struct intel_sdvo_dtd *dtd)
 748 {
 749         return intel_sdvo_get_timing(intel_sdvo,
 750                                      SDVO_CMD_GET_INPUT_TIMINGS_PART1, dtd);
 751 }
 752
 753 static bool
 754 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
 755                                          struct intel_sdvo_connector *intel_sdvo_connector,
 756                                          uint16_t clock,
 757                                          uint16_t width,
 758                                          uint16_t height)
 759 {
 760         struct intel_sdvo_preferred_input_timing_args args;
 761
 762         memset(&args, 0, sizeof(args));
 763         args.clock = clock;
 764         args.width = width;
 765         args.height = height;
 766         args.interlace = 0;
 767
 768         if (IS_LVDS(intel_sdvo_connector) &&
 769            (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
 770             intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
 771                 args.scaled = 1;
 772
 773         return intel_sdvo_set_value(intel_sdvo,
 774                                     SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
 775                                     &args, sizeof(args));
 776 }
 777
 778 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
 779                                                   struct intel_sdvo_dtd *dtd)
 780 {
 781         BUILD_BUG_ON(sizeof(dtd->part1) != 8);
 782         BUILD_BUG_ON(sizeof(dtd->part2) != 8);
 783         return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
 784                                     &dtd->part1, sizeof(dtd->part1)) &&
 785                 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
 786                                      &dtd->part2, sizeof(dtd->part2));
 787 }
 788
 789 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
 790 {
 791         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
 792 }
 793
 794 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
 795                                          const struct drm_display_mode *mode)
 796 {
 797         uint16_t width, height;
 798         uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
 799         uint16_t h_sync_offset, v_sync_offset;
 800         int mode_clock;
 801
 802         memset(dtd, 0, sizeof(*dtd));
 803
 804         width = mode->hdisplay;
 805         height = mode->vdisplay;
 806
 807         /* do some mode translations */
 808         h_blank_len = mode->htotal - mode->hdisplay;
 809         h_sync_len = mode->hsync_end - mode->hsync_start;
 810
 811         v_blank_len = mode->vtotal - mode->vdisplay;
 812         v_sync_len = mode->vsync_end - mode->vsync_start;
 813
 814         h_sync_offset = mode->hsync_start - mode->hdisplay;
 815         v_sync_offset = mode->vsync_start - mode->vdisplay;
 816
 817         mode_clock = mode->clock;
 818         mode_clock /= 10;
 819         dtd->part1.clock = mode_clock;
 820
 821         dtd->part1.h_active = width & 0xff;
 822         dtd->part1.h_blank = h_blank_len & 0xff;
 823         dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
 824                 ((h_blank_len >> 8) & 0xf);
 825         dtd->part1.v_active = height & 0xff;
 826         dtd->part1.v_blank = v_blank_len & 0xff;
 827         dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
 828                 ((v_blank_len >> 8) & 0xf);
 829
 830         dtd->part2.h_sync_off = h_sync_offset & 0xff;
 831         dtd->part2.h_sync_width = h_sync_len & 0xff;
 832         dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
 833                 (v_sync_len & 0xf);
 834         dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
 835                 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
 836                 ((v_sync_len & 0x30) >> 4);
 837
 838         dtd->part2.dtd_flags = 0x18;
 839         if (mode->flags & DRM_MODE_FLAG_INTERLACE)
 840                 dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE;
 841         if (mode->flags & DRM_MODE_FLAG_PHSYNC)
 842                 dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE;
 843         if (mode->flags & DRM_MODE_FLAG_PVSYNC)
 844                 dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE;
 845
 846         dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
 847 }
 848
 849 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode *pmode,
 850                                          const struct intel_sdvo_dtd *dtd)
 851 {
 852         struct drm_display_mode mode = {};
 853
 854         mode.hdisplay = dtd->part1.h_active;
 855         mode.hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
 856         mode.hsync_start = mode.hdisplay + dtd->part2.h_sync_off;
 857         mode.hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
 858         mode.hsync_end = mode.hsync_start + dtd->part2.h_sync_width;
 859         mode.hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
 860         mode.htotal = mode.hdisplay + dtd->part1.h_blank;
 861         mode.htotal += (dtd->part1.h_high & 0xf) << 8;
 862
 863         mode.vdisplay = dtd->part1.v_active;
 864         mode.vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
 865         mode.vsync_start = mode.vdisplay;
 866         mode.vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
 867         mode.vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
 868         mode.vsync_start += dtd->part2.v_sync_off_high & 0xc0;
 869         mode.vsync_end = mode.vsync_start +
 870                 (dtd->part2.v_sync_off_width & 0xf);
 871         mode.vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
 872         mode.vtotal = mode.vdisplay + dtd->part1.v_blank;
 873         mode.vtotal += (dtd->part1.v_high & 0xf) << 8;
 874
 875         mode.clock = dtd->part1.clock * 10;
 876
 877         if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE)
 878                 mode.flags |= DRM_MODE_FLAG_INTERLACE;
 879         if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
 880                 mode.flags |= DRM_MODE_FLAG_PHSYNC;
 881         else
 882                 mode.flags |= DRM_MODE_FLAG_NHSYNC;
 883         if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
 884                 mode.flags |= DRM_MODE_FLAG_PVSYNC;
 885         else
 886                 mode.flags |= DRM_MODE_FLAG_NVSYNC;
 887
 888         drm_mode_set_crtcinfo(&mode, 0);
 889
 890         drm_mode_copy(pmode, &mode);
 891 }
 892
 893 static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
 894 {
 895         struct intel_sdvo_encode encode;
 896
 897         BUILD_BUG_ON(sizeof(encode) != 2);
 898         return intel_sdvo_get_value(intel_sdvo,
 899                                   SDVO_CMD_GET_SUPP_ENCODE,
 900                                   &encode, sizeof(encode));
 901 }
 902
 903 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
 904                                   uint8_t mode)
 905 {
 906         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
 907 }
 908
 909 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
 910                                        uint8_t mode)
 911 {
 912         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
 913 }
 914
 915 #if 0
 916 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
 917 {
 918         int i, j;
 919         uint8_t set_buf_index[2];
 920         uint8_t av_split;
 921         uint8_t buf_size;
 922         uint8_t buf[48];
 923         uint8_t *pos;
 924
 925         intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
 926
 927         for (i = 0; i <= av_split; i++) {
 928                 set_buf_index[0] = i; set_buf_index[1] = 0;
 929                 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
 930                                      set_buf_index, 2);
 931                 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
 932                 intel_sdvo_read_response(encoder, &buf_size, 1);
 933
 934                 pos = buf;
 935                 for (j = 0; j <= buf_size; j += 8) {
 936                         intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
 937                                              NULL, 0);
 938                         intel_sdvo_read_response(encoder, pos, 8);
 939                         pos += 8;
 940                 }
 941         }
 942 }
 943 #endif
 944
 945 static bool intel_sdvo_write_infoframe(struct intel_sdvo *intel_sdvo,
 946                                        unsigned if_index, uint8_t tx_rate,
 947                                        const uint8_t *data, unsigned length)
 948 {
 949         uint8_t set_buf_index[2] = { if_index, 0 };
 950         uint8_t hbuf_size, tmp[8];
 951         int i;
 952
 953         if (!intel_sdvo_set_value(intel_sdvo,
 954                                   SDVO_CMD_SET_HBUF_INDEX,
 955                                   set_buf_index, 2))
 956                 return false;
 957
 958         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO,
 959                                   &hbuf_size, 1))
 960                 return false;
 961
 962         /* Buffer size is 0 based, hooray! */
 963         hbuf_size++;
 964
 965         DRM_DEBUG_KMS("writing sdvo hbuf: %i, hbuf_size %i, hbuf_size: %i\n",
 966                       if_index, length, hbuf_size);
 967
 968         for (i = 0; i < hbuf_size; i += 8) {
 969                 memset(tmp, 0, 8);
 970                 if (i < length)
 971                         memcpy(tmp, data + i, min_t(unsigned, 8, length - i));
 972
 973                 if (!intel_sdvo_set_value(intel_sdvo,
 974                                           SDVO_CMD_SET_HBUF_DATA,
 975                                           tmp, 8))
 976                         return false;
 977         }
 978
 979         return intel_sdvo_set_value(intel_sdvo,
 980                                     SDVO_CMD_SET_HBUF_TXRATE,
 981                                     &tx_rate, 1);
 982 }
 983
 984 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo,
 985                                          const struct intel_crtc_state *pipe_config)
 986 {
 987         uint8_t sdvo_data[HDMI_INFOFRAME_SIZE(AVI)];
 988         union hdmi_infoframe frame;
 989         int ret;
 990         ssize_t len;
 991
 992         ret = drm_hdmi_avi_infoframe_from_display_mode(&frame.avi,
 993                                                        &pipe_config->base.adjusted_mode,
 994                                                        false);
 995         if (ret < 0) {
 996                 DRM_ERROR("couldn't fill AVI infoframe\n");
 997                 return false;
 998         }
 999
1000         if (intel_sdvo->rgb_quant_range_selectable) {
1001                 if (pipe_config->limited_color_range)
1002                         frame.avi.quantization_range =
1003                                 HDMI_QUANTIZATION_RANGE_LIMITED;
1004                 else
1005                         frame.avi.quantization_range =
1006                                 HDMI_QUANTIZATION_RANGE_FULL;
1007         }
1008
1009         len = hdmi_infoframe_pack(&frame, sdvo_data, sizeof(sdvo_data));
1010         if (len < 0)
1011                 return false;
1012
1013         return intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF,
1014                                           SDVO_HBUF_TX_VSYNC,
1015                                           sdvo_data, sizeof(sdvo_data));
1016 }
1017
1018 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo,
1019                                      const struct drm_connector_state *conn_state)
1020 {
1021         struct intel_sdvo_tv_format format;
1022         uint32_t format_map;
1023
1024         format_map = 1 << conn_state->tv.mode;
1025         memset(&format, 0, sizeof(format));
1026         memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
1027
1028         BUILD_BUG_ON(sizeof(format) != 6);
1029         return intel_sdvo_set_value(intel_sdvo,
1030                                     SDVO_CMD_SET_TV_FORMAT,
1031                                     &format, sizeof(format));
1032 }
1033
1034 static bool
1035 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
1036                                         const struct drm_display_mode *mode)
1037 {
1038         struct intel_sdvo_dtd output_dtd;
1039
1040         if (!intel_sdvo_set_target_output(intel_sdvo,
1041                                           intel_sdvo->attached_output))
1042                 return false;
1043
1044         intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1045         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1046                 return false;
1047
1048         return true;
1049 }
1050
1051 /*
1052  * Asks the sdvo controller for the preferred input mode given the output mode.
1053  * Unfortunately we have to set up the full output mode to do that.
1054  */
1055 static bool
1056 intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo,
1057                                     struct intel_sdvo_connector *intel_sdvo_connector,
1058                                     const struct drm_display_mode *mode,
1059                                     struct drm_display_mode *adjusted_mode)
1060 {
1061         struct intel_sdvo_dtd input_dtd;
1062
1063         /* Reset the input timing to the screen. Assume always input 0. */
1064         if (!intel_sdvo_set_target_input(intel_sdvo))
1065                 return false;
1066
1067         if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
1068                                                       intel_sdvo_connector,
1069                                                       mode->clock / 10,
1070                                                       mode->hdisplay,
1071                                                       mode->vdisplay))
1072                 return false;
1073
1074         if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
1075                                                    &input_dtd))
1076                 return false;
1077
1078         intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd);
1079         intel_sdvo->dtd_sdvo_flags = input_dtd.part2.sdvo_flags;
1080
1081         return true;
1082 }
1083
1084 static void i9xx_adjust_sdvo_tv_clock(struct intel_crtc_state *pipe_config)
1085 {
1086         unsigned dotclock = pipe_config->port_clock;
1087         struct dpll *clock = &pipe_config->dpll;
1088
1089         /*
1090          * SDVO TV has fixed PLL values depend on its clock range,
1091          * this mirrors vbios setting.
1092          */
1093         if (dotclock >= 100000 && dotclock < 140500) {
1094                 clock->p1 = 2;
1095                 clock->p2 = 10;
1096                 clock->n = 3;
1097                 clock->m1 = 16;
1098                 clock->m2 = 8;
1099         } else if (dotclock >= 140500 && dotclock <= 200000) {
1100                 clock->p1 = 1;
1101                 clock->p2 = 10;
1102                 clock->n = 6;
1103                 clock->m1 = 12;
1104                 clock->m2 = 8;
1105         } else {
1106                 WARN(1, "SDVO TV clock out of range: %i\n", dotclock);
1107         }
1108
1109         pipe_config->clock_set = true;
1110 }
1111
1112 static bool intel_sdvo_compute_config(struct intel_encoder *encoder,
1113                                       struct intel_crtc_state *pipe_config,
1114                                       struct drm_connector_state *conn_state)
1115 {
1116         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1117         struct intel_sdvo_connector_state *intel_sdvo_state =
1118                 to_intel_sdvo_connector_state(conn_state);
1119         struct intel_sdvo_connector *intel_sdvo_connector =
1120                 to_intel_sdvo_connector(conn_state->connector);
1121         struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
1122         struct drm_display_mode *mode = &pipe_config->base.mode;
1123
1124         DRM_DEBUG_KMS("forcing bpc to 8 for SDVO\n");
1125         pipe_config->pipe_bpp = 8*3;
1126
1127         if (HAS_PCH_SPLIT(to_i915(encoder->base.dev)))
1128                 pipe_config->has_pch_encoder = true;
1129
1130         /*
1131          * We need to construct preferred input timings based on our
1132          * output timings.  To do that, we have to set the output
1133          * timings, even though this isn't really the right place in
1134          * the sequence to do it. Oh well.
1135          */
1136         if (IS_TV(intel_sdvo_connector)) {
1137                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
1138                         return false;
1139
1140                 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1141                                                            intel_sdvo_connector,
1142                                                            mode,
1143                                                            adjusted_mode);
1144                 pipe_config->sdvo_tv_clock = true;
1145         } else if (IS_LVDS(intel_sdvo_connector)) {
1146                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
1147                                                              intel_sdvo->sdvo_lvds_fixed_mode))
1148                         return false;
1149
1150                 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1151                                                            intel_sdvo_connector,
1152                                                            mode,
1153                                                            adjusted_mode);
1154         }
1155
1156         if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
1157                 return false;
1158
1159         /*
1160          * Make the CRTC code factor in the SDVO pixel multiplier.  The
1161          * SDVO device will factor out the multiplier during mode_set.
1162          */
1163         pipe_config->pixel_multiplier =
1164                 intel_sdvo_get_pixel_multiplier(adjusted_mode);
1165
1166         if (intel_sdvo_state->base.force_audio != HDMI_AUDIO_OFF_DVI)
1167                 pipe_config->has_hdmi_sink = intel_sdvo->has_hdmi_monitor;
1168
1169         if (intel_sdvo_state->base.force_audio == HDMI_AUDIO_ON ||
1170             (intel_sdvo_state->base.force_audio == HDMI_AUDIO_AUTO && intel_sdvo->has_hdmi_audio))
1171                 pipe_config->has_audio = true;
1172
1173         if (intel_sdvo_state->base.broadcast_rgb == INTEL_BROADCAST_RGB_AUTO) {
1174                 /*
1175                  * See CEA-861-E - 5.1 Default Encoding Parameters
1176                  *
1177                  * FIXME: This bit is only valid when using TMDS encoding and 8
1178                  * bit per color mode.
1179                  */
1180                 if (pipe_config->has_hdmi_sink &&
1181                     drm_match_cea_mode(adjusted_mode) > 1)
1182                         pipe_config->limited_color_range = true;
1183         } else {
1184                 if (pipe_config->has_hdmi_sink &&
1185                     intel_sdvo_state->base.broadcast_rgb == INTEL_BROADCAST_RGB_LIMITED)
1186                         pipe_config->limited_color_range = true;
1187         }
1188
1189         /* Clock computation needs to happen after pixel multiplier. */
1190         if (IS_TV(intel_sdvo_connector))
1191                 i9xx_adjust_sdvo_tv_clock(pipe_config);
1192
1193         /* Set user selected PAR to incoming mode's member */
1194         if (intel_sdvo_connector->is_hdmi)
1195                 adjusted_mode->picture_aspect_ratio = conn_state->picture_aspect_ratio;
1196
1197         return true;
1198 }
1199
1200 #define UPDATE_PROPERTY(input, NAME) \
1201         do { \
1202                 val = input; \
1203                 intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_##NAME, &val, sizeof(val)); \
1204         } while (0)
1205
1206 static void intel_sdvo_update_props(struct intel_sdvo *intel_sdvo,
1207                                     const struct intel_sdvo_connector_state *sdvo_state)
1208 {
1209         const struct drm_connector_state *conn_state = &sdvo_state->base.base;
1210         struct intel_sdvo_connector *intel_sdvo_conn =
1211                 to_intel_sdvo_connector(conn_state->connector);
1212         uint16_t val;
1213
1214         if (intel_sdvo_conn->left)
1215                 UPDATE_PROPERTY(sdvo_state->tv.overscan_h, OVERSCAN_H);
1216
1217         if (intel_sdvo_conn->top)
1218                 UPDATE_PROPERTY(sdvo_state->tv.overscan_v, OVERSCAN_V);
1219
1220         if (intel_sdvo_conn->hpos)
1221                 UPDATE_PROPERTY(sdvo_state->tv.hpos, HPOS);
1222
1223         if (intel_sdvo_conn->vpos)
1224                 UPDATE_PROPERTY(sdvo_state->tv.vpos, VPOS);
1225
1226         if (intel_sdvo_conn->saturation)
1227                 UPDATE_PROPERTY(conn_state->tv.saturation, SATURATION);
1228
1229         if (intel_sdvo_conn->contrast)
1230                 UPDATE_PROPERTY(conn_state->tv.contrast, CONTRAST);
1231
1232         if (intel_sdvo_conn->hue)
1233                 UPDATE_PROPERTY(conn_state->tv.hue, HUE);
1234
1235         if (intel_sdvo_conn->brightness)
1236                 UPDATE_PROPERTY(conn_state->tv.brightness, BRIGHTNESS);
1237
1238         if (intel_sdvo_conn->sharpness)
1239                 UPDATE_PROPERTY(sdvo_state->tv.sharpness, SHARPNESS);
1240
1241         if (intel_sdvo_conn->flicker_filter)
1242                 UPDATE_PROPERTY(sdvo_state->tv.flicker_filter, FLICKER_FILTER);
1243
1244         if (intel_sdvo_conn->flicker_filter_2d)
1245                 UPDATE_PROPERTY(sdvo_state->tv.flicker_filter_2d, FLICKER_FILTER_2D);
1246
1247         if (intel_sdvo_conn->flicker_filter_adaptive)
1248                 UPDATE_PROPERTY(sdvo_state->tv.flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
1249
1250         if (intel_sdvo_conn->tv_chroma_filter)
1251                 UPDATE_PROPERTY(sdvo_state->tv.chroma_filter, TV_CHROMA_FILTER);
1252
1253         if (intel_sdvo_conn->tv_luma_filter)
1254                 UPDATE_PROPERTY(sdvo_state->tv.luma_filter, TV_LUMA_FILTER);
1255
1256         if (intel_sdvo_conn->dot_crawl)
1257                 UPDATE_PROPERTY(sdvo_state->tv.dot_crawl, DOT_CRAWL);
1258
1259 #undef UPDATE_PROPERTY
1260 }
1261
1262 static void intel_sdvo_pre_enable(struct intel_encoder *intel_encoder,
1263                                   const struct intel_crtc_state *crtc_state,
1264                                   const struct drm_connector_state *conn_state)
1265 {
1266         struct drm_i915_private *dev_priv = to_i915(intel_encoder->base.dev);
1267         struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
1268         const struct drm_display_mode *adjusted_mode = &crtc_state->base.adjusted_mode;
1269         const struct intel_sdvo_connector_state *sdvo_state =
1270                 to_intel_sdvo_connector_state(conn_state);
1271         const struct intel_sdvo_connector *intel_sdvo_connector =
1272                 to_intel_sdvo_connector(conn_state->connector);
1273         const struct drm_display_mode *mode = &crtc_state->base.mode;
1274         struct intel_sdvo *intel_sdvo = to_sdvo(intel_encoder);
1275         u32 sdvox;
1276         struct intel_sdvo_in_out_map in_out;
1277         struct intel_sdvo_dtd input_dtd, output_dtd;
1278         int rate;
1279
1280         intel_sdvo_update_props(intel_sdvo, sdvo_state);
1281
1282         /*
1283          * First, set the input mapping for the first input to our controlled
1284          * output. This is only correct if we're a single-input device, in
1285          * which case the first input is the output from the appropriate SDVO
1286          * channel on the motherboard.  In a two-input device, the first input
1287          * will be SDVOB and the second SDVOC.
1288          */
1289         in_out.in0 = intel_sdvo->attached_output;
1290         in_out.in1 = 0;
1291
1292         intel_sdvo_set_value(intel_sdvo,
1293                              SDVO_CMD_SET_IN_OUT_MAP,
1294                              &in_out, sizeof(in_out));
1295
1296         /* Set the output timings to the screen */
1297         if (!intel_sdvo_set_target_output(intel_sdvo,
1298                                           intel_sdvo->attached_output))
1299                 return;
1300
1301         /* lvds has a special fixed output timing. */
1302         if (IS_LVDS(intel_sdvo_connector))
1303                 intel_sdvo_get_dtd_from_mode(&output_dtd,
1304                                              intel_sdvo->sdvo_lvds_fixed_mode);
1305         else
1306                 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1307         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1308                 DRM_INFO("Setting output timings on %s failed\n",
1309                          SDVO_NAME(intel_sdvo));
1310
1311         /* Set the input timing to the screen. Assume always input 0. */
1312         if (!intel_sdvo_set_target_input(intel_sdvo))
1313                 return;
1314
1315         if (crtc_state->has_hdmi_sink) {
1316                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1317                 intel_sdvo_set_colorimetry(intel_sdvo,
1318                                            SDVO_COLORIMETRY_RGB256);
1319                 intel_sdvo_set_avi_infoframe(intel_sdvo, crtc_state);
1320         } else
1321                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
1322
1323         if (IS_TV(intel_sdvo_connector) &&
1324             !intel_sdvo_set_tv_format(intel_sdvo, conn_state))
1325                 return;
1326
1327         intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1328
1329         if (IS_TV(intel_sdvo_connector) || IS_LVDS(intel_sdvo_connector))
1330                 input_dtd.part2.sdvo_flags = intel_sdvo->dtd_sdvo_flags;
1331         if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd))
1332                 DRM_INFO("Setting input timings on %s failed\n",
1333                          SDVO_NAME(intel_sdvo));
1334
1335         switch (crtc_state->pixel_multiplier) {
1336         default:
1337                 WARN(1, "unknown pixel multiplier specified\n");
1338                 /* fall through */
1339         case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1340         case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1341         case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1342         }
1343         if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1344                 return;
1345
1346         /* Set the SDVO control regs. */
1347         if (INTEL_GEN(dev_priv) >= 4) {
1348                 /* The real mode polarity is set by the SDVO commands, using
1349                  * struct intel_sdvo_dtd. */
1350                 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
1351                 if (!HAS_PCH_SPLIT(dev_priv) && crtc_state->limited_color_range)
1352                         sdvox |= HDMI_COLOR_RANGE_16_235;
1353                 if (INTEL_GEN(dev_priv) < 5)
1354                         sdvox |= SDVO_BORDER_ENABLE;
1355         } else {
1356                 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1357                 if (intel_sdvo->port == PORT_B)
1358                         sdvox &= SDVOB_PRESERVE_MASK;
1359                 else
1360                         sdvox &= SDVOC_PRESERVE_MASK;
1361                 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1362         }
1363
1364         if (HAS_PCH_CPT(dev_priv))
1365                 sdvox |= SDVO_PIPE_SEL_CPT(crtc->pipe);
1366         else
1367                 sdvox |= SDVO_PIPE_SEL(crtc->pipe);
1368
1369         if (crtc_state->has_audio) {
1370                 WARN_ON_ONCE(INTEL_GEN(dev_priv) < 4);
1371                 sdvox |= SDVO_AUDIO_ENABLE;
1372         }
1373
1374         if (INTEL_GEN(dev_priv) >= 4) {
1375                 /* done in crtc_mode_set as the dpll_md reg must be written early */
1376         } else if (IS_I945G(dev_priv) || IS_I945GM(dev_priv) ||
1377                    IS_G33(dev_priv) || IS_PINEVIEW(dev_priv)) {
1378                 /* done in crtc_mode_set as it lives inside the dpll register */
1379         } else {
1380                 sdvox |= (crtc_state->pixel_multiplier - 1)
1381                         << SDVO_PORT_MULTIPLY_SHIFT;
1382         }
1383
1384         if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1385             INTEL_GEN(dev_priv) < 5)
1386                 sdvox |= SDVO_STALL_SELECT;
1387         intel_sdvo_write_sdvox(intel_sdvo, sdvox);
1388 }
1389
1390 static bool intel_sdvo_connector_get_hw_state(struct intel_connector *connector)
1391 {
1392         struct intel_sdvo_connector *intel_sdvo_connector =
1393                 to_intel_sdvo_connector(&connector->base);
1394         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(&connector->base);
1395         u16 active_outputs = 0;
1396
1397         intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1398
1399         return active_outputs & intel_sdvo_connector->output_flag;
1400 }
1401
1402 bool intel_sdvo_port_enabled(struct drm_i915_private *dev_priv,
1403                              i915_reg_t sdvo_reg, enum pipe *pipe)
1404 {
1405         u32 val;
1406
1407         val = I915_READ(sdvo_reg);
1408
1409         /* asserts want to know the pipe even if the port is disabled */
1410         if (HAS_PCH_CPT(dev_priv))
1411                 *pipe = (val & SDVO_PIPE_SEL_MASK_CPT) >> SDVO_PIPE_SEL_SHIFT_CPT;
1412         else if (IS_CHERRYVIEW(dev_priv))
1413                 *pipe = (val & SDVO_PIPE_SEL_MASK_CHV) >> SDVO_PIPE_SEL_SHIFT_CHV;
1414         else
1415                 *pipe = (val & SDVO_PIPE_SEL_MASK) >> SDVO_PIPE_SEL_SHIFT;
1416
1417         return val & SDVO_ENABLE;
1418 }
1419
1420 static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder,
1421                                     enum pipe *pipe)
1422 {
1423         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
1424         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1425         u16 active_outputs = 0;
1426         bool ret;
1427
1428         intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1429
1430         ret = intel_sdvo_port_enabled(dev_priv, intel_sdvo->sdvo_reg, pipe);
1431
1432         return ret || active_outputs;
1433 }
1434
1435 static void intel_sdvo_get_config(struct intel_encoder *encoder,
1436                                   struct intel_crtc_state *pipe_config)
1437 {
1438         struct drm_device *dev = encoder->base.dev;
1439         struct drm_i915_private *dev_priv = to_i915(dev);
1440         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1441         struct intel_sdvo_dtd dtd;
1442         int encoder_pixel_multiplier = 0;
1443         int dotclock;
1444         u32 flags = 0, sdvox;
1445         u8 val;
1446         bool ret;
1447
1448         pipe_config->output_types |= BIT(INTEL_OUTPUT_SDVO);
1449
1450         sdvox = I915_READ(intel_sdvo->sdvo_reg);
1451
1452         ret = intel_sdvo_get_input_timing(intel_sdvo, &dtd);
1453         if (!ret) {
1454                 /*
1455                  * Some sdvo encoders are not spec compliant and don't
1456                  * implement the mandatory get_timings function.
1457                  */
1458                 DRM_DEBUG_DRIVER("failed to retrieve SDVO DTD\n");
1459                 pipe_config->quirks |= PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS;
1460         } else {
1461                 if (dtd.part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
1462                         flags |= DRM_MODE_FLAG_PHSYNC;
1463                 else
1464                         flags |= DRM_MODE_FLAG_NHSYNC;
1465
1466                 if (dtd.part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
1467                         flags |= DRM_MODE_FLAG_PVSYNC;
1468                 else
1469                         flags |= DRM_MODE_FLAG_NVSYNC;
1470         }
1471
1472         pipe_config->base.adjusted_mode.flags |= flags;
1473
1474         /*
1475          * pixel multiplier readout is tricky: Only on i915g/gm it is stored in
1476          * the sdvo port register, on all other platforms it is part of the dpll
1477          * state. Since the general pipe state readout happens before the
1478          * encoder->get_config we so already have a valid pixel multplier on all
1479          * other platfroms.
1480          */
1481         if (IS_I915G(dev_priv) || IS_I915GM(dev_priv)) {
1482                 pipe_config->pixel_multiplier =
1483                         ((sdvox & SDVO_PORT_MULTIPLY_MASK)
1484                          >> SDVO_PORT_MULTIPLY_SHIFT) + 1;
1485         }
1486
1487         dotclock = pipe_config->port_clock;
1488
1489         if (pipe_config->pixel_multiplier)
1490                 dotclock /= pipe_config->pixel_multiplier;
1491
1492         pipe_config->base.adjusted_mode.crtc_clock = dotclock;
1493
1494         /* Cross check the port pixel multiplier with the sdvo encoder state. */
1495         if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_CLOCK_RATE_MULT,
1496                                  &val, 1)) {
1497                 switch (val) {
1498                 case SDVO_CLOCK_RATE_MULT_1X:
1499                         encoder_pixel_multiplier = 1;
1500                         break;
1501                 case SDVO_CLOCK_RATE_MULT_2X:
1502                         encoder_pixel_multiplier = 2;
1503                         break;
1504                 case SDVO_CLOCK_RATE_MULT_4X:
1505                         encoder_pixel_multiplier = 4;
1506                         break;
1507                 }
1508         }
1509
1510         if (sdvox & HDMI_COLOR_RANGE_16_235)
1511                 pipe_config->limited_color_range = true;
1512
1513         if (sdvox & SDVO_AUDIO_ENABLE)
1514                 pipe_config->has_audio = true;
1515
1516         if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ENCODE,
1517                                  &val, 1)) {
1518                 if (val == SDVO_ENCODE_HDMI)
1519                         pipe_config->has_hdmi_sink = true;
1520         }
1521
1522         WARN(encoder_pixel_multiplier != pipe_config->pixel_multiplier,
1523              "SDVO pixel multiplier mismatch, port: %i, encoder: %i\n",
1524              pipe_config->pixel_multiplier, encoder_pixel_multiplier);
1525 }
1526
1527 static void intel_disable_sdvo(struct intel_encoder *encoder,
1528                                const struct intel_crtc_state *old_crtc_state,
1529                                const struct drm_connector_state *conn_state)
1530 {
1531         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
1532         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1533         struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc);
1534         u32 temp;
1535
1536         intel_sdvo_set_active_outputs(intel_sdvo, 0);
1537         if (0)
1538                 intel_sdvo_set_encoder_power_state(intel_sdvo,
1539                                                    DRM_MODE_DPMS_OFF);
1540
1541         temp = I915_READ(intel_sdvo->sdvo_reg);
1542
1543         temp &= ~SDVO_ENABLE;
1544         intel_sdvo_write_sdvox(intel_sdvo, temp);
1545
1546         /*
1547          * HW workaround for IBX, we need to move the port
1548          * to transcoder A after disabling it to allow the
1549          * matching DP port to be enabled on transcoder A.
1550          */
1551         if (HAS_PCH_IBX(dev_priv) && crtc->pipe == PIPE_B) {
1552                 /*
1553                  * We get CPU/PCH FIFO underruns on the other pipe when
1554                  * doing the workaround. Sweep them under the rug.
1555                  */
1556                 intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, false);
1557                 intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);
1558
1559                 temp &= ~SDVO_PIPE_SEL_MASK;
1560                 temp |= SDVO_ENABLE | SDVO_PIPE_SEL(PIPE_A);
1561                 intel_sdvo_write_sdvox(intel_sdvo, temp);
1562
1563                 temp &= ~SDVO_ENABLE;
1564                 intel_sdvo_write_sdvox(intel_sdvo, temp);
1565
1566                 intel_wait_for_vblank_if_active(dev_priv, PIPE_A);
1567                 intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, true);
1568                 intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true);
1569         }
1570 }
1571
1572 static void pch_disable_sdvo(struct intel_encoder *encoder,
1573                              const struct intel_crtc_state *old_crtc_state,
1574                              const struct drm_connector_state *old_conn_state)
1575 {
1576 }
1577
1578 static void pch_post_disable_sdvo(struct intel_encoder *encoder,
1579                                   const struct intel_crtc_state *old_crtc_state,
1580                                   const struct drm_connector_state *old_conn_state)
1581 {
1582         intel_disable_sdvo(encoder, old_crtc_state, old_conn_state);
1583 }
1584
1585 static void intel_enable_sdvo(struct intel_encoder *encoder,
1586                               const struct intel_crtc_state *pipe_config,
1587                               const struct drm_connector_state *conn_state)
1588 {
1589         struct drm_device *dev = encoder->base.dev;
1590         struct drm_i915_private *dev_priv = to_i915(dev);
1591         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1592         struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc);
1593         u32 temp;
1594         bool input1, input2;
1595         int i;
1596         bool success;
1597
1598         temp = I915_READ(intel_sdvo->sdvo_reg);
1599         temp |= SDVO_ENABLE;
1600         intel_sdvo_write_sdvox(intel_sdvo, temp);
1601
1602         for (i = 0; i < 2; i++)
1603                 intel_wait_for_vblank(dev_priv, intel_crtc->pipe);
1604
1605         success = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1606         /*
1607          * Warn if the device reported failure to sync.
1608          *
1609          * A lot of SDVO devices fail to notify of sync, but it's
1610          * a given it the status is a success, we succeeded.
1611          */
1612         if (success && !input1) {
1613                 DRM_DEBUG_KMS("First %s output reported failure to "
1614                                 "sync\n", SDVO_NAME(intel_sdvo));
1615         }
1616
1617         if (0)
1618                 intel_sdvo_set_encoder_power_state(intel_sdvo,
1619                                                    DRM_MODE_DPMS_ON);
1620         intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1621 }
1622
1623 static enum drm_mode_status
1624 intel_sdvo_mode_valid(struct drm_connector *connector,
1625                       struct drm_display_mode *mode)
1626 {
1627         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1628         struct intel_sdvo_connector *intel_sdvo_connector =
1629                 to_intel_sdvo_connector(connector);
1630         int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
1631
1632         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1633                 return MODE_NO_DBLESCAN;
1634
1635         if (intel_sdvo->pixel_clock_min > mode->clock)
1636                 return MODE_CLOCK_LOW;
1637
1638         if (intel_sdvo->pixel_clock_max < mode->clock)
1639                 return MODE_CLOCK_HIGH;
1640
1641         if (mode->clock > max_dotclk)
1642                 return MODE_CLOCK_HIGH;
1643
1644         if (IS_LVDS(intel_sdvo_connector)) {
1645                 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
1646                         return MODE_PANEL;
1647
1648                 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
1649                         return MODE_PANEL;
1650         }
1651
1652         return MODE_OK;
1653 }
1654
1655 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
1656 {
1657         BUILD_BUG_ON(sizeof(*caps) != 8);
1658         if (!intel_sdvo_get_value(intel_sdvo,
1659                                   SDVO_CMD_GET_DEVICE_CAPS,
1660                                   caps, sizeof(*caps)))
1661                 return false;
1662
1663         DRM_DEBUG_KMS("SDVO capabilities:\n"
1664                       "  vendor_id: %d\n"
1665                       "  device_id: %d\n"
1666                       "  device_rev_id: %d\n"
1667                       "  sdvo_version_major: %d\n"
1668                       "  sdvo_version_minor: %d\n"
1669                       "  sdvo_inputs_mask: %d\n"
1670                       "  smooth_scaling: %d\n"
1671                       "  sharp_scaling: %d\n"
1672                       "  up_scaling: %d\n"
1673                       "  down_scaling: %d\n"
1674                       "  stall_support: %d\n"
1675                       "  output_flags: %d\n",
1676                       caps->vendor_id,
1677                       caps->device_id,
1678                       caps->device_rev_id,
1679                       caps->sdvo_version_major,
1680                       caps->sdvo_version_minor,
1681                       caps->sdvo_inputs_mask,
1682                       caps->smooth_scaling,
1683                       caps->sharp_scaling,
1684                       caps->up_scaling,
1685                       caps->down_scaling,
1686                       caps->stall_support,
1687                       caps->output_flags);
1688
1689         return true;
1690 }
1691
1692 static uint16_t intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo)
1693 {
1694         struct drm_i915_private *dev_priv = to_i915(intel_sdvo->base.base.dev);
1695         uint16_t hotplug;
1696
1697         if (!I915_HAS_HOTPLUG(dev_priv))
1698                 return 0;
1699
1700         /*
1701          * HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
1702          * on the line.
1703          */
1704         if (IS_I945G(dev_priv) || IS_I945GM(dev_priv))
1705                 return 0;
1706
1707         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1708                                         &hotplug, sizeof(hotplug)))
1709                 return 0;
1710
1711         return hotplug;
1712 }
1713
1714 static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
1715 {
1716         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1717
1718         intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG,
1719                              &intel_sdvo->hotplug_active, 2);
1720 }
1721
1722 static bool intel_sdvo_hotplug(struct intel_encoder *encoder,
1723                                struct intel_connector *connector)
1724 {
1725         intel_sdvo_enable_hotplug(encoder);
1726
1727         return intel_encoder_hotplug(encoder, connector);
1728 }
1729
1730 static bool
1731 intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
1732 {
1733         /* Is there more than one type of output? */
1734         return hweight16(intel_sdvo->caps.output_flags) > 1;
1735 }
1736
1737 static struct edid *
1738 intel_sdvo_get_edid(struct drm_connector *connector)
1739 {
1740         struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1741         return drm_get_edid(connector, &sdvo->ddc);
1742 }
1743
1744 /* Mac mini hack -- use the same DDC as the analog connector */
1745 static struct edid *
1746 intel_sdvo_get_analog_edid(struct drm_connector *connector)
1747 {
1748         struct drm_i915_private *dev_priv = to_i915(connector->dev);
1749
1750         return drm_get_edid(connector,
1751                             intel_gmbus_get_adapter(dev_priv,
1752                                                     dev_priv->vbt.crt_ddc_pin));
1753 }
1754
1755 static enum drm_connector_status
1756 intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
1757 {
1758         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1759         struct intel_sdvo_connector *intel_sdvo_connector =
1760                 to_intel_sdvo_connector(connector);
1761         enum drm_connector_status status;
1762         struct edid *edid;
1763
1764         edid = intel_sdvo_get_edid(connector);
1765
1766         if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
1767                 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
1768
1769                 /*
1770                  * Don't use the 1 as the argument of DDC bus switch to get
1771                  * the EDID. It is used for SDVO SPD ROM.
1772                  */
1773                 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1774                         intel_sdvo->ddc_bus = ddc;
1775                         edid = intel_sdvo_get_edid(connector);
1776                         if (edid)
1777                                 break;
1778                 }
1779                 /*
1780                  * If we found the EDID on the other bus,
1781                  * assume that is the correct DDC bus.
1782                  */
1783                 if (edid == NULL)
1784                         intel_sdvo->ddc_bus = saved_ddc;
1785         }
1786
1787         /*
1788          * When there is no edid and no monitor is connected with VGA
1789          * port, try to use the CRT ddc to read the EDID for DVI-connector.
1790          */
1791         if (edid == NULL)
1792                 edid = intel_sdvo_get_analog_edid(connector);
1793
1794         status = connector_status_unknown;
1795         if (edid != NULL) {
1796                 /* DDC bus is shared, match EDID to connector type */
1797                 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1798                         status = connector_status_connected;
1799                         if (intel_sdvo_connector->is_hdmi) {
1800                                 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1801                                 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1802                                 intel_sdvo->rgb_quant_range_selectable =
1803                                         drm_rgb_quant_range_selectable(edid);
1804                         }
1805                 } else
1806                         status = connector_status_disconnected;
1807                 kfree(edid);
1808         }
1809
1810         return status;
1811 }
1812
1813 static bool
1814 intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
1815                                   struct edid *edid)
1816 {
1817         bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1818         bool connector_is_digital = !!IS_DIGITAL(sdvo);
1819
1820         DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
1821                       connector_is_digital, monitor_is_digital);
1822         return connector_is_digital == monitor_is_digital;
1823 }
1824
1825 static enum drm_connector_status
1826 intel_sdvo_detect(struct drm_connector *connector, bool force)
1827 {
1828         uint16_t response;
1829         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1830         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1831         enum drm_connector_status ret;
1832
1833         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1834                       connector->base.id, connector->name);
1835
1836         if (!intel_sdvo_get_value(intel_sdvo,
1837                                   SDVO_CMD_GET_ATTACHED_DISPLAYS,
1838                                   &response, 2))
1839                 return connector_status_unknown;
1840
1841         DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1842                       response & 0xff, response >> 8,
1843                       intel_sdvo_connector->output_flag);
1844
1845         if (response == 0)
1846                 return connector_status_disconnected;
1847
1848         intel_sdvo->attached_output = response;
1849
1850         intel_sdvo->has_hdmi_monitor = false;
1851         intel_sdvo->has_hdmi_audio = false;
1852         intel_sdvo->rgb_quant_range_selectable = false;
1853
1854         if ((intel_sdvo_connector->output_flag & response) == 0)
1855                 ret = connector_status_disconnected;
1856         else if (IS_TMDS(intel_sdvo_connector))
1857                 ret = intel_sdvo_tmds_sink_detect(connector);
1858         else {
1859                 struct edid *edid;
1860
1861                 /* if we have an edid check it matches the connection */
1862                 edid = intel_sdvo_get_edid(connector);
1863                 if (edid == NULL)
1864                         edid = intel_sdvo_get_analog_edid(connector);
1865                 if (edid != NULL) {
1866                         if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
1867                                                               edid))
1868                                 ret = connector_status_connected;
1869                         else
1870                                 ret = connector_status_disconnected;
1871
1872                         kfree(edid);
1873                 } else
1874                         ret = connector_status_connected;
1875         }
1876
1877         return ret;
1878 }
1879
1880 static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1881 {
1882         struct edid *edid;
1883
1884         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1885                       connector->base.id, connector->name);
1886
1887         /* set the bus switch and get the modes */
1888         edid = intel_sdvo_get_edid(connector);
1889
1890         /*
1891          * Mac mini hack.  On this device, the DVI-I connector shares one DDC
1892          * link between analog and digital outputs. So, if the regular SDVO
1893          * DDC fails, check to see if the analog output is disconnected, in
1894          * which case we'll look there for the digital DDC data.
1895          */
1896         if (edid == NULL)
1897                 edid = intel_sdvo_get_analog_edid(connector);
1898
1899         if (edid != NULL) {
1900                 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
1901                                                       edid)) {
1902                         drm_connector_update_edid_property(connector, edid);
1903                         drm_add_edid_modes(connector, edid);
1904                 }
1905
1906                 kfree(edid);
1907         }
1908 }
1909
1910 /*
1911  * Set of SDVO TV modes.
1912  * Note!  This is in reply order (see loop in get_tv_modes).
1913  * XXX: all 60Hz refresh?
1914  */
1915 static const struct drm_display_mode sdvo_tv_modes[] = {
1916         { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1917                    416, 0, 200, 201, 232, 233, 0,
1918                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1919         { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1920                    416, 0, 240, 241, 272, 273, 0,
1921                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1922         { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1923                    496, 0, 300, 301, 332, 333, 0,
1924                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1925         { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1926                    736, 0, 350, 351, 382, 383, 0,
1927                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1928         { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1929                    736, 0, 400, 401, 432, 433, 0,
1930                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1931         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1932                    736, 0, 480, 481, 512, 513, 0,
1933                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1934         { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1935                    800, 0, 480, 481, 512, 513, 0,
1936                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1937         { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1938                    800, 0, 576, 577, 608, 609, 0,
1939                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1940         { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1941                    816, 0, 350, 351, 382, 383, 0,
1942                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1943         { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1944                    816, 0, 400, 401, 432, 433, 0,
1945                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1946         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1947                    816, 0, 480, 481, 512, 513, 0,
1948                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1949         { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1950                    816, 0, 540, 541, 572, 573, 0,
1951                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1952         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1953                    816, 0, 576, 577, 608, 609, 0,
1954                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1955         { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1956                    864, 0, 576, 577, 608, 609, 0,
1957                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1958         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1959                    896, 0, 600, 601, 632, 633, 0,
1960                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1961         { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1962                    928, 0, 624, 625, 656, 657, 0,
1963                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1964         { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1965                    1016, 0, 766, 767, 798, 799, 0,
1966                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1967         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1968                    1120, 0, 768, 769, 800, 801, 0,
1969                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1970         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1971                    1376, 0, 1024, 1025, 1056, 1057, 0,
1972                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1973 };
1974
1975 static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1976 {
1977         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1978         const struct drm_connector_state *conn_state = connector->state;
1979         struct intel_sdvo_sdtv_resolution_request tv_res;
1980         uint32_t reply = 0, format_map = 0;
1981         int i;
1982
1983         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1984                       connector->base.id, connector->name);
1985
1986         /*
1987          * Read the list of supported input resolutions for the selected TV
1988          * format.
1989          */
1990         format_map = 1 << conn_state->tv.mode;
1991         memcpy(&tv_res, &format_map,
1992                min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
1993
1994         if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1995                 return;
1996
1997         BUILD_BUG_ON(sizeof(tv_res) != 3);
1998         if (!intel_sdvo_write_cmd(intel_sdvo,
1999                                   SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
2000                                   &tv_res, sizeof(tv_res)))
2001                 return;
2002         if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
2003                 return;
2004
2005         for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
2006                 if (reply & (1 << i)) {
2007                         struct drm_display_mode *nmode;
2008                         nmode = drm_mode_duplicate(connector->dev,
2009                                                    &sdvo_tv_modes[i]);
2010                         if (nmode)
2011                                 drm_mode_probed_add(connector, nmode);
2012                 }
2013 }
2014
2015 static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
2016 {
2017         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
2018         struct drm_i915_private *dev_priv = to_i915(connector->dev);
2019         struct drm_display_mode *newmode;
2020
2021         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
2022                       connector->base.id, connector->name);
2023
2024         /*
2025          * Fetch modes from VBT. For SDVO prefer the VBT mode since some
2026          * SDVO->LVDS transcoders can't cope with the EDID mode.
2027          */
2028         if (dev_priv->vbt.sdvo_lvds_vbt_mode != NULL) {
2029                 newmode = drm_mode_duplicate(connector->dev,
2030                                              dev_priv->vbt.sdvo_lvds_vbt_mode);
2031                 if (newmode != NULL) {
2032                         /* Guarantee the mode is preferred */
2033                         newmode->type = (DRM_MODE_TYPE_PREFERRED |
2034                                          DRM_MODE_TYPE_DRIVER);
2035                         drm_mode_probed_add(connector, newmode);
2036                 }
2037         }
2038
2039         /*
2040          * Attempt to get the mode list from DDC.
2041          * Assume that the preferred modes are
2042          * arranged in priority order.
2043          */
2044         intel_ddc_get_modes(connector, &intel_sdvo->ddc);
2045 }
2046
2047 static int intel_sdvo_get_modes(struct drm_connector *connector)
2048 {
2049         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2050
2051         if (IS_TV(intel_sdvo_connector))
2052                 intel_sdvo_get_tv_modes(connector);
2053         else if (IS_LVDS(intel_sdvo_connector))
2054                 intel_sdvo_get_lvds_modes(connector);
2055         else
2056                 intel_sdvo_get_ddc_modes(connector);
2057
2058         return !list_empty(&connector->probed_modes);
2059 }
2060
2061 static void intel_sdvo_destroy(struct drm_connector *connector)
2062 {
2063         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2064
2065         drm_connector_cleanup(connector);
2066         kfree(intel_sdvo_connector);
2067 }
2068
2069 static int
2070 intel_sdvo_connector_atomic_get_property(struct drm_connector *connector,
2071                                          const struct drm_connector_state *state,
2072                                          struct drm_property *property,
2073                                          uint64_t *val)
2074 {
2075         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2076         const struct intel_sdvo_connector_state *sdvo_state = to_intel_sdvo_connector_state((void *)state);
2077
2078         if (property == intel_sdvo_connector->tv_format) {
2079                 int i;
2080
2081                 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2082                         if (state->tv.mode == intel_sdvo_connector->tv_format_supported[i]) {
2083                                 *val = i;
2084
2085                                 return 0;
2086                         }
2087
2088                 WARN_ON(1);
2089                 *val = 0;
2090         } else if (property == intel_sdvo_connector->top ||
2091                    property == intel_sdvo_connector->bottom)
2092                 *val = intel_sdvo_connector->max_vscan - sdvo_state->tv.overscan_v;
2093         else if (property == intel_sdvo_connector->left ||
2094                  property == intel_sdvo_connector->right)
2095                 *val = intel_sdvo_connector->max_hscan - sdvo_state->tv.overscan_h;
2096         else if (property == intel_sdvo_connector->hpos)
2097                 *val = sdvo_state->tv.hpos;
2098         else if (property == intel_sdvo_connector->vpos)
2099                 *val = sdvo_state->tv.vpos;
2100         else if (property == intel_sdvo_connector->saturation)
2101                 *val = state->tv.saturation;
2102         else if (property == intel_sdvo_connector->contrast)
2103                 *val = state->tv.contrast;
2104         else if (property == intel_sdvo_connector->hue)
2105                 *val = state->tv.hue;
2106         else if (property == intel_sdvo_connector->brightness)
2107                 *val = state->tv.brightness;
2108         else if (property == intel_sdvo_connector->sharpness)
2109                 *val = sdvo_state->tv.sharpness;
2110         else if (property == intel_sdvo_connector->flicker_filter)
2111                 *val = sdvo_state->tv.flicker_filter;
2112         else if (property == intel_sdvo_connector->flicker_filter_2d)
2113                 *val = sdvo_state->tv.flicker_filter_2d;
2114         else if (property == intel_sdvo_connector->flicker_filter_adaptive)
2115                 *val = sdvo_state->tv.flicker_filter_adaptive;
2116         else if (property == intel_sdvo_connector->tv_chroma_filter)
2117                 *val = sdvo_state->tv.chroma_filter;
2118         else if (property == intel_sdvo_connector->tv_luma_filter)
2119                 *val = sdvo_state->tv.luma_filter;
2120         else if (property == intel_sdvo_connector->dot_crawl)
2121                 *val = sdvo_state->tv.dot_crawl;
2122         else
2123                 return intel_digital_connector_atomic_get_property(connector, state, property, val);
2124
2125         return 0;
2126 }
2127
2128 static int
2129 intel_sdvo_connector_atomic_set_property(struct drm_connector *connector,
2130                                          struct drm_connector_state *state,
2131                                          struct drm_property *property,
2132                                          uint64_t val)
2133 {
2134         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2135         struct intel_sdvo_connector_state *sdvo_state = to_intel_sdvo_connector_state(state);
2136
2137         if (property == intel_sdvo_connector->tv_format) {
2138                 state->tv.mode = intel_sdvo_connector->tv_format_supported[val];
2139
2140                 if (state->crtc) {
2141                         struct drm_crtc_state *crtc_state =
2142                                 drm_atomic_get_new_crtc_state(state->state, state->crtc);
2143
2144                         crtc_state->connectors_changed = true;
2145                 }
2146         } else if (property == intel_sdvo_connector->top ||
2147                    property == intel_sdvo_connector->bottom)
2148                 /* Cannot set these independent from each other */
2149                 sdvo_state->tv.overscan_v = intel_sdvo_connector->max_vscan - val;
2150         else if (property == intel_sdvo_connector->left ||
2151                  property == intel_sdvo_connector->right)
2152                 /* Cannot set these independent from each other */
2153                 sdvo_state->tv.overscan_h = intel_sdvo_connector->max_hscan - val;
2154         else if (property == intel_sdvo_connector->hpos)
2155                 sdvo_state->tv.hpos = val;
2156         else if (property == intel_sdvo_connector->vpos)
2157                 sdvo_state->tv.vpos = val;
2158         else if (property == intel_sdvo_connector->saturation)
2159                 state->tv.saturation = val;
2160         else if (property == intel_sdvo_connector->contrast)
2161                 state->tv.contrast = val;
2162         else if (property == intel_sdvo_connector->hue)
2163                 state->tv.hue = val;
2164         else if (property == intel_sdvo_connector->brightness)
2165                 state->tv.brightness = val;
2166         else if (property == intel_sdvo_connector->sharpness)
2167                 sdvo_state->tv.sharpness = val;
2168         else if (property == intel_sdvo_connector->flicker_filter)
2169                 sdvo_state->tv.flicker_filter = val;
2170         else if (property == intel_sdvo_connector->flicker_filter_2d)
2171                 sdvo_state->tv.flicker_filter_2d = val;
2172         else if (property == intel_sdvo_connector->flicker_filter_adaptive)
2173                 sdvo_state->tv.flicker_filter_adaptive = val;
2174         else if (property == intel_sdvo_connector->tv_chroma_filter)
2175                 sdvo_state->tv.chroma_filter = val;
2176         else if (property == intel_sdvo_connector->tv_luma_filter)
2177                 sdvo_state->tv.luma_filter = val;
2178         else if (property == intel_sdvo_connector->dot_crawl)
2179                 sdvo_state->tv.dot_crawl = val;
2180         else
2181                 return intel_digital_connector_atomic_set_property(connector, state, property, val);
2182
2183         return 0;
2184 }
2185
2186 static int
2187 intel_sdvo_connector_register(struct drm_connector *connector)
2188 {
2189         struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
2190         int ret;
2191
2192         ret = intel_connector_register(connector);
2193         if (ret)
2194                 return ret;
2195
2196         return sysfs_create_link(&connector->kdev->kobj,
2197                                  &sdvo->ddc.dev.kobj,
2198                                  sdvo->ddc.dev.kobj.name);
2199 }
2200
2201 static void
2202 intel_sdvo_connector_unregister(struct drm_connector *connector)
2203 {
2204         struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
2205
2206         sysfs_remove_link(&connector->kdev->kobj,
2207                           sdvo->ddc.dev.kobj.name);
2208         intel_connector_unregister(connector);
2209 }
2210
2211 static struct drm_connector_state *
2212 intel_sdvo_connector_duplicate_state(struct drm_connector *connector)
2213 {
2214         struct intel_sdvo_connector_state *state;
2215
2216         state = kmemdup(connector->state, sizeof(*state), GFP_KERNEL);
2217         if (!state)
2218                 return NULL;
2219
2220         __drm_atomic_helper_connector_duplicate_state(connector, &state->base.base);
2221         return &state->base.base;
2222 }
2223
2224 static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
2225         .detect = intel_sdvo_detect,
2226         .fill_modes = drm_helper_probe_single_connector_modes,
2227         .atomic_get_property = intel_sdvo_connector_atomic_get_property,
2228         .atomic_set_property = intel_sdvo_connector_atomic_set_property,
2229         .late_register = intel_sdvo_connector_register,
2230         .early_unregister = intel_sdvo_connector_unregister,
2231         .destroy = intel_sdvo_destroy,
2232         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
2233         .atomic_duplicate_state = intel_sdvo_connector_duplicate_state,
2234 };
2235
2236 static int intel_sdvo_atomic_check(struct drm_connector *conn,
2237                                    struct drm_connector_state *new_conn_state)
2238 {
2239         struct drm_atomic_state *state = new_conn_state->state;
2240         struct drm_connector_state *old_conn_state =
2241                 drm_atomic_get_old_connector_state(state, conn);
2242         struct intel_sdvo_connector_state *old_state =
2243                 to_intel_sdvo_connector_state(old_conn_state);
2244         struct intel_sdvo_connector_state *new_state =
2245                 to_intel_sdvo_connector_state(new_conn_state);
2246
2247         if (new_conn_state->crtc &&
2248             (memcmp(&old_state->tv, &new_state->tv, sizeof(old_state->tv)) ||
2249              memcmp(&old_conn_state->tv, &new_conn_state->tv, sizeof(old_conn_state->tv)))) {
2250                 struct drm_crtc_state *crtc_state =
2251                         drm_atomic_get_new_crtc_state(new_conn_state->state,
2252                                                       new_conn_state->crtc);
2253
2254                 crtc_state->connectors_changed = true;
2255         }
2256
2257         return intel_digital_connector_atomic_check(conn, new_conn_state);
2258 }
2259
2260 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
2261         .get_modes = intel_sdvo_get_modes,
2262         .mode_valid = intel_sdvo_mode_valid,
2263         .atomic_check = intel_sdvo_atomic_check,
2264 };
2265
2266 static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
2267 {
2268         struct intel_sdvo *intel_sdvo = to_sdvo(to_intel_encoder(encoder));
2269
2270         if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
2271                 drm_mode_destroy(encoder->dev,
2272                                  intel_sdvo->sdvo_lvds_fixed_mode);
2273
2274         i2c_del_adapter(&intel_sdvo->ddc);
2275         intel_encoder_destroy(encoder);
2276 }
2277
2278 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
2279         .destroy = intel_sdvo_enc_destroy,
2280 };
2281
2282 static void
2283 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
2284 {
2285         uint16_t mask = 0;
2286         unsigned int num_bits;
2287
2288         /*
2289          * Make a mask of outputs less than or equal to our own priority in the
2290          * list.
2291          */
2292         switch (sdvo->controlled_output) {
2293         case SDVO_OUTPUT_LVDS1:
2294                 mask |= SDVO_OUTPUT_LVDS1;
2295                 /* fall through */
2296         case SDVO_OUTPUT_LVDS0:
2297                 mask |= SDVO_OUTPUT_LVDS0;
2298                 /* fall through */
2299         case SDVO_OUTPUT_TMDS1:
2300                 mask |= SDVO_OUTPUT_TMDS1;
2301                 /* fall through */
2302         case SDVO_OUTPUT_TMDS0:
2303                 mask |= SDVO_OUTPUT_TMDS0;
2304                 /* fall through */
2305         case SDVO_OUTPUT_RGB1:
2306                 mask |= SDVO_OUTPUT_RGB1;
2307                 /* fall through */
2308         case SDVO_OUTPUT_RGB0:
2309                 mask |= SDVO_OUTPUT_RGB0;
2310                 break;
2311         }
2312
2313         /* Count bits to find what number we are in the priority list. */
2314         mask &= sdvo->caps.output_flags;
2315         num_bits = hweight16(mask);
2316         /* If more than 3 outputs, default to DDC bus 3 for now. */
2317         if (num_bits > 3)
2318                 num_bits = 3;
2319
2320         /* Corresponds to SDVO_CONTROL_BUS_DDCx */
2321         sdvo->ddc_bus = 1 << num_bits;
2322 }
2323
2324 /*
2325  * Choose the appropriate DDC bus for control bus switch command for this
2326  * SDVO output based on the controlled output.
2327  *
2328  * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
2329  * outputs, then LVDS outputs.
2330  */
2331 static void
2332 intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
2333                           struct intel_sdvo *sdvo)
2334 {
2335         struct sdvo_device_mapping *mapping;
2336
2337         if (sdvo->port == PORT_B)
2338                 mapping = &dev_priv->vbt.sdvo_mappings[0];
2339         else
2340                 mapping = &dev_priv->vbt.sdvo_mappings[1];
2341
2342         if (mapping->initialized)
2343                 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
2344         else
2345                 intel_sdvo_guess_ddc_bus(sdvo);
2346 }
2347
2348 static void
2349 intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
2350                           struct intel_sdvo *sdvo)
2351 {
2352         struct sdvo_device_mapping *mapping;
2353         u8 pin;
2354
2355         if (sdvo->port == PORT_B)
2356                 mapping = &dev_priv->vbt.sdvo_mappings[0];
2357         else
2358                 mapping = &dev_priv->vbt.sdvo_mappings[1];
2359
2360         if (mapping->initialized &&
2361             intel_gmbus_is_valid_pin(dev_priv, mapping->i2c_pin))
2362                 pin = mapping->i2c_pin;
2363         else
2364                 pin = GMBUS_PIN_DPB;
2365
2366         sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin);
2367
2368         /*
2369          * With gmbus we should be able to drive sdvo i2c at 2MHz, but somehow
2370          * our code totally fails once we start using gmbus. Hence fall back to
2371          * bit banging for now.
2372          */
2373         intel_gmbus_force_bit(sdvo->i2c, true);
2374 }
2375
2376 /* undo any changes intel_sdvo_select_i2c_bus() did to sdvo->i2c */
2377 static void
2378 intel_sdvo_unselect_i2c_bus(struct intel_sdvo *sdvo)
2379 {
2380         intel_gmbus_force_bit(sdvo->i2c, false);
2381 }
2382
2383 static bool
2384 intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
2385 {
2386         return intel_sdvo_check_supp_encode(intel_sdvo);
2387 }
2388
2389 static u8
2390 intel_sdvo_get_slave_addr(struct drm_i915_private *dev_priv,
2391                           struct intel_sdvo *sdvo)
2392 {
2393         struct sdvo_device_mapping *my_mapping, *other_mapping;
2394
2395         if (sdvo->port == PORT_B) {
2396                 my_mapping = &dev_priv->vbt.sdvo_mappings[0];
2397                 other_mapping = &dev_priv->vbt.sdvo_mappings[1];
2398         } else {
2399                 my_mapping = &dev_priv->vbt.sdvo_mappings[1];
2400                 other_mapping = &dev_priv->vbt.sdvo_mappings[0];
2401         }
2402
2403         /* If the BIOS described our SDVO device, take advantage of it. */
2404         if (my_mapping->slave_addr)
2405                 return my_mapping->slave_addr;
2406
2407         /*
2408          * If the BIOS only described a different SDVO device, use the
2409          * address that it isn't using.
2410          */
2411         if (other_mapping->slave_addr) {
2412                 if (other_mapping->slave_addr == 0x70)
2413                         return 0x72;
2414                 else
2415                         return 0x70;
2416         }
2417
2418         /*
2419          * No SDVO device info is found for another DVO port,
2420          * so use mapping assumption we had before BIOS parsing.
2421          */
2422         if (sdvo->port == PORT_B)
2423                 return 0x70;
2424         else
2425                 return 0x72;
2426 }
2427
2428 static int
2429 intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
2430                           struct intel_sdvo *encoder)
2431 {
2432         struct drm_connector *drm_connector;
2433         int ret;
2434
2435         drm_connector = &connector->base.base;
2436         ret = drm_connector_init(encoder->base.base.dev,
2437                            drm_connector,
2438                            &intel_sdvo_connector_funcs,
2439                            connector->base.base.connector_type);
2440         if (ret < 0)
2441                 return ret;
2442
2443         drm_connector_helper_add(drm_connector,
2444                                  &intel_sdvo_connector_helper_funcs);
2445
2446         connector->base.base.interlace_allowed = 1;
2447         connector->base.base.doublescan_allowed = 0;
2448         connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
2449         connector->base.get_hw_state = intel_sdvo_connector_get_hw_state;
2450
2451         intel_connector_attach_encoder(&connector->base, &encoder->base);
2452
2453         return 0;
2454 }
2455
2456 static void
2457 intel_sdvo_add_hdmi_properties(struct intel_sdvo *intel_sdvo,
2458                                struct intel_sdvo_connector *connector)
2459 {
2460         struct drm_i915_private *dev_priv = to_i915(connector->base.base.dev);
2461
2462         intel_attach_force_audio_property(&connector->base.base);
2463         if (INTEL_GEN(dev_priv) >= 4 && IS_MOBILE(dev_priv)) {
2464                 intel_attach_broadcast_rgb_property(&connector->base.base);
2465         }
2466         intel_attach_aspect_ratio_property(&connector->base.base);
2467         connector->base.base.state->picture_aspect_ratio = HDMI_PICTURE_ASPECT_NONE;
2468 }
2469
2470 static struct intel_sdvo_connector *intel_sdvo_connector_alloc(void)
2471 {
2472         struct intel_sdvo_connector *sdvo_connector;
2473         struct intel_sdvo_connector_state *conn_state;
2474
2475         sdvo_connector = kzalloc(sizeof(*sdvo_connector), GFP_KERNEL);
2476         if (!sdvo_connector)
2477                 return NULL;
2478
2479         conn_state = kzalloc(sizeof(*conn_state), GFP_KERNEL);
2480         if (!conn_state) {
2481                 kfree(sdvo_connector);
2482                 return NULL;
2483         }
2484
2485         __drm_atomic_helper_connector_reset(&sdvo_connector->base.base,
2486                                             &conn_state->base.base);
2487
2488         return sdvo_connector;
2489 }
2490
2491 static bool
2492 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
2493 {
2494         struct drm_encoder *encoder = &intel_sdvo->base.base;
2495         struct drm_i915_private *dev_priv = to_i915(encoder->dev);
2496         struct drm_connector *connector;
2497         struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
2498         struct intel_connector *intel_connector;
2499         struct intel_sdvo_connector *intel_sdvo_connector;
2500
2501         DRM_DEBUG_KMS("initialising DVI device %d\n", device);
2502
2503         intel_sdvo_connector = intel_sdvo_connector_alloc();
2504         if (!intel_sdvo_connector)
2505                 return false;
2506
2507         if (device == 0) {
2508                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
2509                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
2510         } else if (device == 1) {
2511                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
2512                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
2513         }
2514
2515         intel_connector = &intel_sdvo_connector->base;
2516         connector = &intel_connector->base;
2517         if (intel_sdvo_get_hotplug_support(intel_sdvo) &
2518                 intel_sdvo_connector->output_flag) {
2519                 intel_sdvo->hotplug_active |= intel_sdvo_connector->output_flag;
2520                 /*
2521                  * Some SDVO devices have one-shot hotplug interrupts.
2522                  * Ensure that they get re-enabled when an interrupt happens.
2523                  */
2524                 intel_encoder->hotplug = intel_sdvo_hotplug;
2525                 intel_sdvo_enable_hotplug(intel_encoder);
2526         } else {
2527                 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2528         }
2529         encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2530         connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2531
2532         /* gen3 doesn't do the hdmi bits in the SDVO register */
2533         if (INTEL_GEN(dev_priv) >= 4 &&
2534             intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
2535                 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2536                 intel_sdvo_connector->is_hdmi = true;
2537         }
2538
2539         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2540                 kfree(intel_sdvo_connector);
2541                 return false;
2542         }
2543
2544         if (intel_sdvo_connector->is_hdmi)
2545                 intel_sdvo_add_hdmi_properties(intel_sdvo, intel_sdvo_connector);
2546
2547         return true;
2548 }
2549
2550 static bool
2551 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
2552 {
2553         struct drm_encoder *encoder = &intel_sdvo->base.base;
2554         struct drm_connector *connector;
2555         struct intel_connector *intel_connector;
2556         struct intel_sdvo_connector *intel_sdvo_connector;
2557
2558         DRM_DEBUG_KMS("initialising TV type %d\n", type);
2559
2560         intel_sdvo_connector = intel_sdvo_connector_alloc();
2561         if (!intel_sdvo_connector)
2562                 return false;
2563
2564         intel_connector = &intel_sdvo_connector->base;
2565         connector = &intel_connector->base;
2566         encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2567         connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2568
2569         intel_sdvo->controlled_output |= type;
2570         intel_sdvo_connector->output_flag = type;
2571
2572         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2573                 kfree(intel_sdvo_connector);
2574                 return false;
2575         }
2576
2577         if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2578                 goto err;
2579
2580         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2581                 goto err;
2582
2583         return true;
2584
2585 err:
2586         intel_sdvo_destroy(connector);
2587         return false;
2588 }
2589
2590 static bool
2591 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
2592 {
2593         struct drm_encoder *encoder = &intel_sdvo->base.base;
2594         struct drm_connector *connector;
2595         struct intel_connector *intel_connector;
2596         struct intel_sdvo_connector *intel_sdvo_connector;
2597
2598         DRM_DEBUG_KMS("initialising analog device %d\n", device);
2599
2600         intel_sdvo_connector = intel_sdvo_connector_alloc();
2601         if (!intel_sdvo_connector)
2602                 return false;
2603
2604         intel_connector = &intel_sdvo_connector->base;
2605         connector = &intel_connector->base;
2606         intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2607         encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2608         connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2609
2610         if (device == 0) {
2611                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2612                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2613         } else if (device == 1) {
2614                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2615                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2616         }
2617
2618         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2619                 kfree(intel_sdvo_connector);
2620                 return false;
2621         }
2622
2623         return true;
2624 }
2625
2626 static bool
2627 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2628 {
2629         struct drm_encoder *encoder = &intel_sdvo->base.base;
2630         struct drm_connector *connector;
2631         struct intel_connector *intel_connector;
2632         struct intel_sdvo_connector *intel_sdvo_connector;
2633         struct drm_display_mode *mode;
2634
2635         DRM_DEBUG_KMS("initialising LVDS device %d\n", device);
2636
2637         intel_sdvo_connector = intel_sdvo_connector_alloc();
2638         if (!intel_sdvo_connector)
2639                 return false;
2640
2641         intel_connector = &intel_sdvo_connector->base;
2642         connector = &intel_connector->base;
2643         encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2644         connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2645
2646         if (device == 0) {
2647                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2648                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2649         } else if (device == 1) {
2650                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2651                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2652         }
2653
2654         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2655                 kfree(intel_sdvo_connector);
2656                 return false;
2657         }
2658
2659         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2660                 goto err;
2661
2662         intel_sdvo_get_lvds_modes(connector);
2663
2664         list_for_each_entry(mode, &connector->probed_modes, head) {
2665                 if (mode->type & DRM_MODE_TYPE_PREFERRED) {
2666                         intel_sdvo->sdvo_lvds_fixed_mode =
2667                                 drm_mode_duplicate(connector->dev, mode);
2668                         break;
2669                 }
2670         }
2671
2672         if (!intel_sdvo->sdvo_lvds_fixed_mode)
2673                 goto err;
2674
2675         return true;
2676
2677 err:
2678         intel_sdvo_destroy(connector);
2679         return false;
2680 }
2681
2682 static bool
2683 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
2684 {
2685         /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2686
2687         if (flags & SDVO_OUTPUT_TMDS0)
2688                 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
2689                         return false;
2690
2691         if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2692                 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
2693                         return false;
2694
2695         /* TV has no XXX1 function block */
2696         if (flags & SDVO_OUTPUT_SVID0)
2697                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
2698                         return false;
2699
2700         if (flags & SDVO_OUTPUT_CVBS0)
2701                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
2702                         return false;
2703
2704         if (flags & SDVO_OUTPUT_YPRPB0)
2705                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0))
2706                         return false;
2707
2708         if (flags & SDVO_OUTPUT_RGB0)
2709                 if (!intel_sdvo_analog_init(intel_sdvo, 0))
2710                         return false;
2711
2712         if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2713                 if (!intel_sdvo_analog_init(intel_sdvo, 1))
2714                         return false;
2715
2716         if (flags & SDVO_OUTPUT_LVDS0)
2717                 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
2718                         return false;
2719
2720         if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2721                 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
2722                         return false;
2723
2724         if ((flags & SDVO_OUTPUT_MASK) == 0) {
2725                 unsigned char bytes[2];
2726
2727                 intel_sdvo->controlled_output = 0;
2728                 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
2729                 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2730                               SDVO_NAME(intel_sdvo),
2731                               bytes[0], bytes[1]);
2732                 return false;
2733         }
2734         intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
2735
2736         return true;
2737 }
2738
2739 static void intel_sdvo_output_cleanup(struct intel_sdvo *intel_sdvo)
2740 {
2741         struct drm_device *dev = intel_sdvo->base.base.dev;
2742         struct drm_connector *connector, *tmp;
2743
2744         list_for_each_entry_safe(connector, tmp,
2745                                  &dev->mode_config.connector_list, head) {
2746                 if (intel_attached_encoder(connector) == &intel_sdvo->base) {
2747                         drm_connector_unregister(connector);
2748                         intel_sdvo_destroy(connector);
2749                 }
2750         }
2751 }
2752
2753 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2754                                           struct intel_sdvo_connector *intel_sdvo_connector,
2755                                           int type)
2756 {
2757         struct drm_device *dev = intel_sdvo->base.base.dev;
2758         struct intel_sdvo_tv_format format;
2759         uint32_t format_map, i;
2760
2761         if (!intel_sdvo_set_target_output(intel_sdvo, type))
2762                 return false;
2763
2764         BUILD_BUG_ON(sizeof(format) != 6);
2765         if (!intel_sdvo_get_value(intel_sdvo,
2766                                   SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2767                                   &format, sizeof(format)))
2768                 return false;
2769
2770         memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
2771
2772         if (format_map == 0)
2773                 return false;
2774
2775         intel_sdvo_connector->format_supported_num = 0;
2776         for (i = 0 ; i < TV_FORMAT_NUM; i++)
2777                 if (format_map & (1 << i))
2778                         intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
2779
2780
2781         intel_sdvo_connector->tv_format =
2782                         drm_property_create(dev, DRM_MODE_PROP_ENUM,
2783                                             "mode", intel_sdvo_connector->format_supported_num);
2784         if (!intel_sdvo_connector->tv_format)
2785                 return false;
2786
2787         for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2788                 drm_property_add_enum(intel_sdvo_connector->tv_format, i,
2789                                       tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
2790
2791         intel_sdvo_connector->base.base.state->tv.mode = intel_sdvo_connector->tv_format_supported[0];
2792         drm_object_attach_property(&intel_sdvo_connector->base.base.base,
2793                                    intel_sdvo_connector->tv_format, 0);
2794         return true;
2795
2796 }
2797
2798 #define _ENHANCEMENT(state_assignment, name, NAME) do { \
2799         if (enhancements.name) { \
2800                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2801                     !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2802                         return false; \
2803                 intel_sdvo_connector->name = \
2804                         drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
2805                 if (!intel_sdvo_connector->name) return false; \
2806                 state_assignment = response; \
2807                 drm_object_attach_property(&connector->base, \
2808                                            intel_sdvo_connector->name, 0); \
2809                 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2810                               data_value[0], data_value[1], response); \
2811         } \
2812 } while (0)
2813
2814 #define ENHANCEMENT(state, name, NAME) _ENHANCEMENT((state)->name, name, NAME)
2815
2816 static bool
2817 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2818                                       struct intel_sdvo_connector *intel_sdvo_connector,
2819                                       struct intel_sdvo_enhancements_reply enhancements)
2820 {
2821         struct drm_device *dev = intel_sdvo->base.base.dev;
2822         struct drm_connector *connector = &intel_sdvo_connector->base.base;
2823         struct drm_connector_state *conn_state = connector->state;
2824         struct intel_sdvo_connector_state *sdvo_state =
2825                 to_intel_sdvo_connector_state(conn_state);
2826         uint16_t response, data_value[2];
2827
2828         /* when horizontal overscan is supported, Add the left/right property */
2829         if (enhancements.overscan_h) {
2830                 if (!intel_sdvo_get_value(intel_sdvo,
2831                                           SDVO_CMD_GET_MAX_OVERSCAN_H,
2832                                           &data_value, 4))
2833                         return false;
2834
2835                 if (!intel_sdvo_get_value(intel_sdvo,
2836                                           SDVO_CMD_GET_OVERSCAN_H,
2837                                           &response, 2))
2838                         return false;
2839
2840                 sdvo_state->tv.overscan_h = response;
2841
2842                 intel_sdvo_connector->max_hscan = data_value[0];
2843                 intel_sdvo_connector->left =
2844                         drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
2845                 if (!intel_sdvo_connector->left)
2846                         return false;
2847
2848                 drm_object_attach_property(&connector->base,
2849                                            intel_sdvo_connector->left, 0);
2850
2851                 intel_sdvo_connector->right =
2852                         drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
2853                 if (!intel_sdvo_connector->right)
2854                         return false;
2855
2856                 drm_object_attach_property(&connector->base,
2857                                               intel_sdvo_connector->right, 0);
2858                 DRM_DEBUG_KMS("h_overscan: max %d, "
2859                               "default %d, current %d\n",
2860                               data_value[0], data_value[1], response);
2861         }
2862
2863         if (enhancements.overscan_v) {
2864                 if (!intel_sdvo_get_value(intel_sdvo,
2865                                           SDVO_CMD_GET_MAX_OVERSCAN_V,
2866                                           &data_value, 4))
2867                         return false;
2868
2869                 if (!intel_sdvo_get_value(intel_sdvo,
2870                                           SDVO_CMD_GET_OVERSCAN_V,
2871                                           &response, 2))
2872                         return false;
2873
2874                 sdvo_state->tv.overscan_v = response;
2875
2876                 intel_sdvo_connector->max_vscan = data_value[0];
2877                 intel_sdvo_connector->top =
2878                         drm_property_create_range(dev, 0,
2879                                             "top_margin", 0, data_value[0]);
2880                 if (!intel_sdvo_connector->top)
2881                         return false;
2882
2883                 drm_object_attach_property(&connector->base,
2884                                            intel_sdvo_connector->top, 0);
2885
2886                 intel_sdvo_connector->bottom =
2887                         drm_property_create_range(dev, 0,
2888                                             "bottom_margin", 0, data_value[0]);
2889                 if (!intel_sdvo_connector->bottom)
2890                         return false;
2891
2892                 drm_object_attach_property(&connector->base,
2893                                               intel_sdvo_connector->bottom, 0);
2894                 DRM_DEBUG_KMS("v_overscan: max %d, "
2895                               "default %d, current %d\n",
2896                               data_value[0], data_value[1], response);
2897         }
2898
2899         ENHANCEMENT(&sdvo_state->tv, hpos, HPOS);
2900         ENHANCEMENT(&sdvo_state->tv, vpos, VPOS);
2901         ENHANCEMENT(&conn_state->tv, saturation, SATURATION);
2902         ENHANCEMENT(&conn_state->tv, contrast, CONTRAST);
2903         ENHANCEMENT(&conn_state->tv, hue, HUE);
2904         ENHANCEMENT(&conn_state->tv, brightness, BRIGHTNESS);
2905         ENHANCEMENT(&sdvo_state->tv, sharpness, SHARPNESS);
2906         ENHANCEMENT(&sdvo_state->tv, flicker_filter, FLICKER_FILTER);
2907         ENHANCEMENT(&sdvo_state->tv, flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2908         ENHANCEMENT(&sdvo_state->tv, flicker_filter_2d, FLICKER_FILTER_2D);
2909         _ENHANCEMENT(sdvo_state->tv.chroma_filter, tv_chroma_filter, TV_CHROMA_FILTER);
2910         _ENHANCEMENT(sdvo_state->tv.luma_filter, tv_luma_filter, TV_LUMA_FILTER);
2911
2912         if (enhancements.dot_crawl) {
2913                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2914                         return false;
2915
2916                 sdvo_state->tv.dot_crawl = response & 0x1;
2917                 intel_sdvo_connector->dot_crawl =
2918                         drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
2919                 if (!intel_sdvo_connector->dot_crawl)
2920                         return false;
2921
2922                 drm_object_attach_property(&connector->base,
2923                                            intel_sdvo_connector->dot_crawl, 0);
2924                 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2925         }
2926
2927         return true;
2928 }
2929
2930 static bool
2931 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2932                                         struct intel_sdvo_connector *intel_sdvo_connector,
2933                                         struct intel_sdvo_enhancements_reply enhancements)
2934 {
2935         struct drm_device *dev = intel_sdvo->base.base.dev;
2936         struct drm_connector *connector = &intel_sdvo_connector->base.base;
2937         uint16_t response, data_value[2];
2938
2939         ENHANCEMENT(&connector->state->tv, brightness, BRIGHTNESS);
2940
2941         return true;
2942 }
2943 #undef ENHANCEMENT
2944 #undef _ENHANCEMENT
2945
2946 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2947                                                struct intel_sdvo_connector *intel_sdvo_connector)
2948 {
2949         union {
2950                 struct intel_sdvo_enhancements_reply reply;
2951                 uint16_t response;
2952         } enhancements;
2953
2954         BUILD_BUG_ON(sizeof(enhancements) != 2);
2955
2956         if (!intel_sdvo_get_value(intel_sdvo,
2957                                   SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2958                                   &enhancements, sizeof(enhancements)) ||
2959             enhancements.response == 0) {
2960                 DRM_DEBUG_KMS("No enhancement is supported\n");
2961                 return true;
2962         }
2963
2964         if (IS_TV(intel_sdvo_connector))
2965                 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2966         else if (IS_LVDS(intel_sdvo_connector))
2967                 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2968         else
2969                 return true;
2970 }
2971
2972 static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2973                                      struct i2c_msg *msgs,
2974                                      int num)
2975 {
2976         struct intel_sdvo *sdvo = adapter->algo_data;
2977
2978         if (!__intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2979                 return -EIO;
2980
2981         return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2982 }
2983
2984 static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2985 {
2986         struct intel_sdvo *sdvo = adapter->algo_data;
2987         return sdvo->i2c->algo->functionality(sdvo->i2c);
2988 }
2989
2990 static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
2991         .master_xfer    = intel_sdvo_ddc_proxy_xfer,
2992         .functionality  = intel_sdvo_ddc_proxy_func
2993 };
2994
2995 static void proxy_lock_bus(struct i2c_adapter *adapter,
2996                            unsigned int flags)
2997 {
2998         struct intel_sdvo *sdvo = adapter->algo_data;
2999         sdvo->i2c->lock_ops->lock_bus(sdvo->i2c, flags);
3000 }
3001
3002 static int proxy_trylock_bus(struct i2c_adapter *adapter,
3003                              unsigned int flags)
3004 {
3005         struct intel_sdvo *sdvo = adapter->algo_data;
3006         return sdvo->i2c->lock_ops->trylock_bus(sdvo->i2c, flags);
3007 }
3008
3009 static void proxy_unlock_bus(struct i2c_adapter *adapter,
3010                              unsigned int flags)
3011 {
3012         struct intel_sdvo *sdvo = adapter->algo_data;
3013         sdvo->i2c->lock_ops->unlock_bus(sdvo->i2c, flags);
3014 }
3015
3016 static const struct i2c_lock_operations proxy_lock_ops = {
3017         .lock_bus =    proxy_lock_bus,
3018         .trylock_bus = proxy_trylock_bus,
3019         .unlock_bus =  proxy_unlock_bus,
3020 };
3021
3022 static bool
3023 intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
3024                           struct drm_i915_private *dev_priv)
3025 {
3026         struct pci_dev *pdev = dev_priv->drm.pdev;
3027
3028         sdvo->ddc.owner = THIS_MODULE;
3029         sdvo->ddc.class = I2C_CLASS_DDC;
3030         snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
3031         sdvo->ddc.dev.parent = &pdev->dev;
3032         sdvo->ddc.algo_data = sdvo;
3033         sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
3034         sdvo->ddc.lock_ops = &proxy_lock_ops;
3035
3036         return i2c_add_adapter(&sdvo->ddc) == 0;
3037 }
3038
3039 static void assert_sdvo_port_valid(const struct drm_i915_private *dev_priv,
3040                                    enum port port)
3041 {
3042         if (HAS_PCH_SPLIT(dev_priv))
3043                 WARN_ON(port != PORT_B);
3044         else
3045                 WARN_ON(port != PORT_B && port != PORT_C);
3046 }
3047
3048 bool intel_sdvo_init(struct drm_i915_private *dev_priv,
3049                      i915_reg_t sdvo_reg, enum port port)
3050 {
3051         struct intel_encoder *intel_encoder;
3052         struct intel_sdvo *intel_sdvo;
3053         int i;
3054
3055         assert_sdvo_port_valid(dev_priv, port);
3056
3057         intel_sdvo = kzalloc(sizeof(*intel_sdvo), GFP_KERNEL);
3058         if (!intel_sdvo)
3059                 return false;
3060
3061         intel_sdvo->sdvo_reg = sdvo_reg;
3062         intel_sdvo->port = port;
3063         intel_sdvo->slave_addr =
3064                 intel_sdvo_get_slave_addr(dev_priv, intel_sdvo) >> 1;
3065         intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo);
3066         if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev_priv))
3067                 goto err_i2c_bus;
3068
3069         /* encoder type will be decided later */
3070         intel_encoder = &intel_sdvo->base;
3071         intel_encoder->type = INTEL_OUTPUT_SDVO;
3072         intel_encoder->power_domain = POWER_DOMAIN_PORT_OTHER;
3073         intel_encoder->port = port;
3074         drm_encoder_init(&dev_priv->drm, &intel_encoder->base,
3075                          &intel_sdvo_enc_funcs, 0,
3076                          "SDVO %c", port_name(port));
3077
3078         /* Read the regs to test if we can talk to the device */
3079         for (i = 0; i < 0x40; i++) {
3080                 u8 byte;
3081
3082                 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
3083                         DRM_DEBUG_KMS("No SDVO device found on %s\n",
3084                                       SDVO_NAME(intel_sdvo));
3085                         goto err;
3086                 }
3087         }
3088
3089         intel_encoder->compute_config = intel_sdvo_compute_config;
3090         if (HAS_PCH_SPLIT(dev_priv)) {
3091                 intel_encoder->disable = pch_disable_sdvo;
3092                 intel_encoder->post_disable = pch_post_disable_sdvo;
3093         } else {
3094                 intel_encoder->disable = intel_disable_sdvo;
3095         }
3096         intel_encoder->pre_enable = intel_sdvo_pre_enable;
3097         intel_encoder->enable = intel_enable_sdvo;
3098         intel_encoder->get_hw_state = intel_sdvo_get_hw_state;
3099         intel_encoder->get_config = intel_sdvo_get_config;
3100
3101         /* In default case sdvo lvds is false */
3102         if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
3103                 goto err;
3104
3105         if (intel_sdvo_output_setup(intel_sdvo,
3106                                     intel_sdvo->caps.output_flags) != true) {
3107                 DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
3108                               SDVO_NAME(intel_sdvo));
3109                 /* Output_setup can leave behind connectors! */
3110                 goto err_output;
3111         }
3112
3113         /*
3114          * Only enable the hotplug irq if we need it, to work around noisy
3115          * hotplug lines.
3116          */
3117         if (intel_sdvo->hotplug_active) {
3118                 if (intel_sdvo->port == PORT_B)
3119                         intel_encoder->hpd_pin = HPD_SDVO_B;
3120                 else
3121                         intel_encoder->hpd_pin = HPD_SDVO_C;
3122         }
3123
3124         /*
3125          * Cloning SDVO with anything is often impossible, since the SDVO
3126          * encoder can request a special input timing mode. And even if that's
3127          * not the case we have evidence that cloning a plain unscaled mode with
3128          * VGA doesn't really work. Furthermore the cloning flags are way too
3129          * simplistic anyway to express such constraints, so just give up on
3130          * cloning for SDVO encoders.
3131          */
3132         intel_sdvo->base.cloneable = 0;
3133
3134         intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo);
3135
3136         /* Set the input timing to the screen. Assume always input 0. */
3137         if (!intel_sdvo_set_target_input(intel_sdvo))
3138                 goto err_output;
3139
3140         if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
3141                                                     &intel_sdvo->pixel_clock_min,
3142                                                     &intel_sdvo->pixel_clock_max))
3143                 goto err_output;
3144
3145         DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
3146                         "clock range %dMHz - %dMHz, "
3147                         "input 1: %c, input 2: %c, "
3148                         "output 1: %c, output 2: %c\n",
3149                         SDVO_NAME(intel_sdvo),
3150                         intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
3151                         intel_sdvo->caps.device_rev_id,
3152                         intel_sdvo->pixel_clock_min / 1000,
3153                         intel_sdvo->pixel_clock_max / 1000,
3154                         (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
3155                         (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
3156                         /* check currently supported outputs */
3157                         intel_sdvo->caps.output_flags &
3158                         (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
3159                         intel_sdvo->caps.output_flags &
3160                         (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
3161         return true;
3162
3163 err_output:
3164         intel_sdvo_output_cleanup(intel_sdvo);
3165
3166 err:
3167         drm_encoder_cleanup(&intel_encoder->base);
3168         i2c_del_adapter(&intel_sdvo->ddc);
3169 err_i2c_bus:
3170         intel_sdvo_unselect_i2c_bus(intel_sdvo);
3171         kfree(intel_sdvo);
3172
3173         return false;
3174 }