Merge tag 'drm-misc-next-2018-09-27' of git://anongit.freedesktop.org/drm/drm-misc...
[muen/linux.git] / drivers / gpu / drm / i915 / intel_sdvo.c
1 /*
2  * Copyright 2006 Dave Airlie <airlied@linux.ie>
3  * Copyright © 2006-2007 Intel Corporation
4  *   Jesse Barnes <jesse.barnes@intel.com>
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a
7  * copy of this software and associated documentation files (the "Software"),
8  * to deal in the Software without restriction, including without limitation
9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10  * and/or sell copies of the Software, and to permit persons to whom the
11  * Software is furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice (including the next
14  * paragraph) shall be included in all copies or substantial portions of the
15  * Software.
16  *
17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23  * DEALINGS IN THE SOFTWARE.
24  *
25  * Authors:
26  *      Eric Anholt <eric@anholt.net>
27  */
28 #include <linux/i2c.h>
29 #include <linux/slab.h>
30 #include <linux/delay.h>
31 #include <linux/export.h>
32 #include <drm/drmP.h>
33 #include <drm/drm_atomic_helper.h>
34 #include <drm/drm_crtc.h>
35 #include <drm/drm_edid.h>
36 #include "intel_drv.h"
37 #include <drm/i915_drm.h>
38 #include "i915_drv.h"
39 #include "intel_sdvo_regs.h"
40
41 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
42 #define SDVO_RGB_MASK  (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
43 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
44 #define SDVO_TV_MASK   (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
45
46 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
47                         SDVO_TV_MASK)
48
49 #define IS_TV(c)        (c->output_flag & SDVO_TV_MASK)
50 #define IS_TMDS(c)      (c->output_flag & SDVO_TMDS_MASK)
51 #define IS_LVDS(c)      (c->output_flag & SDVO_LVDS_MASK)
52 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
53 #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
54
55
56 static const char * const tv_format_names[] = {
57         "NTSC_M"   , "NTSC_J"  , "NTSC_443",
58         "PAL_B"    , "PAL_D"   , "PAL_G"   ,
59         "PAL_H"    , "PAL_I"   , "PAL_M"   ,
60         "PAL_N"    , "PAL_NC"  , "PAL_60"  ,
61         "SECAM_B"  , "SECAM_D" , "SECAM_G" ,
62         "SECAM_K"  , "SECAM_K1", "SECAM_L" ,
63         "SECAM_60"
64 };
65
66 #define TV_FORMAT_NUM  ARRAY_SIZE(tv_format_names)
67
68 struct intel_sdvo {
69         struct intel_encoder base;
70
71         struct i2c_adapter *i2c;
72         u8 slave_addr;
73
74         struct i2c_adapter ddc;
75
76         /* Register for the SDVO device: SDVOB or SDVOC */
77         i915_reg_t sdvo_reg;
78
79         /* Active outputs controlled by this SDVO output */
80         uint16_t controlled_output;
81
82         /*
83          * Capabilities of the SDVO device returned by
84          * intel_sdvo_get_capabilities()
85          */
86         struct intel_sdvo_caps caps;
87
88         /* Pixel clock limitations reported by the SDVO device, in kHz */
89         int pixel_clock_min, pixel_clock_max;
90
91         /*
92         * For multiple function SDVO device,
93         * this is for current attached outputs.
94         */
95         uint16_t attached_output;
96
97         /*
98          * Hotplug activation bits for this device
99          */
100         uint16_t hotplug_active;
101
102         /**
103          * This is set if we're going to treat the device as TV-out.
104          *
105          * While we have these nice friendly flags for output types that ought
106          * to decide this for us, the S-Video output on our HDMI+S-Video card
107          * shows up as RGB1 (VGA).
108          */
109         bool is_tv;
110
111         enum port port;
112
113         /**
114          * This is set if we treat the device as HDMI, instead of DVI.
115          */
116         bool is_hdmi;
117         bool has_hdmi_monitor;
118         bool has_hdmi_audio;
119         bool rgb_quant_range_selectable;
120
121         /**
122          * This is set if we detect output of sdvo device as LVDS and
123          * have a valid fixed mode to use with the panel.
124          */
125         bool is_lvds;
126
127         /**
128          * This is sdvo fixed pannel mode pointer
129          */
130         struct drm_display_mode *sdvo_lvds_fixed_mode;
131
132         /* DDC bus used by this SDVO encoder */
133         uint8_t ddc_bus;
134
135         /*
136          * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd
137          */
138         uint8_t dtd_sdvo_flags;
139 };
140
141 struct intel_sdvo_connector {
142         struct intel_connector base;
143
144         /* Mark the type of connector */
145         uint16_t output_flag;
146
147         /* This contains all current supported TV format */
148         u8 tv_format_supported[TV_FORMAT_NUM];
149         int   format_supported_num;
150         struct drm_property *tv_format;
151
152         /* add the property for the SDVO-TV */
153         struct drm_property *left;
154         struct drm_property *right;
155         struct drm_property *top;
156         struct drm_property *bottom;
157         struct drm_property *hpos;
158         struct drm_property *vpos;
159         struct drm_property *contrast;
160         struct drm_property *saturation;
161         struct drm_property *hue;
162         struct drm_property *sharpness;
163         struct drm_property *flicker_filter;
164         struct drm_property *flicker_filter_adaptive;
165         struct drm_property *flicker_filter_2d;
166         struct drm_property *tv_chroma_filter;
167         struct drm_property *tv_luma_filter;
168         struct drm_property *dot_crawl;
169
170         /* add the property for the SDVO-TV/LVDS */
171         struct drm_property *brightness;
172
173         /* this is to get the range of margin.*/
174         u32 max_hscan, max_vscan;
175 };
176
177 struct intel_sdvo_connector_state {
178         /* base.base: tv.saturation/contrast/hue/brightness */
179         struct intel_digital_connector_state base;
180
181         struct {
182                 unsigned overscan_h, overscan_v, hpos, vpos, sharpness;
183                 unsigned flicker_filter, flicker_filter_2d, flicker_filter_adaptive;
184                 unsigned chroma_filter, luma_filter, dot_crawl;
185         } tv;
186 };
187
188 static struct intel_sdvo *to_sdvo(struct intel_encoder *encoder)
189 {
190         return container_of(encoder, struct intel_sdvo, base);
191 }
192
193 static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
194 {
195         return to_sdvo(intel_attached_encoder(connector));
196 }
197
198 static struct intel_sdvo_connector *
199 to_intel_sdvo_connector(struct drm_connector *connector)
200 {
201         return container_of(connector, struct intel_sdvo_connector, base.base);
202 }
203
204 #define to_intel_sdvo_connector_state(conn_state) \
205         container_of((conn_state), struct intel_sdvo_connector_state, base.base)
206
207 static bool
208 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
209 static bool
210 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
211                               struct intel_sdvo_connector *intel_sdvo_connector,
212                               int type);
213 static bool
214 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
215                                    struct intel_sdvo_connector *intel_sdvo_connector);
216
217 /*
218  * Writes the SDVOB or SDVOC with the given value, but always writes both
219  * SDVOB and SDVOC to work around apparent hardware issues (according to
220  * comments in the BIOS).
221  */
222 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
223 {
224         struct drm_device *dev = intel_sdvo->base.base.dev;
225         struct drm_i915_private *dev_priv = to_i915(dev);
226         u32 bval = val, cval = val;
227         int i;
228
229         if (HAS_PCH_SPLIT(dev_priv)) {
230                 I915_WRITE(intel_sdvo->sdvo_reg, val);
231                 POSTING_READ(intel_sdvo->sdvo_reg);
232                 /*
233                  * HW workaround, need to write this twice for issue
234                  * that may result in first write getting masked.
235                  */
236                 if (HAS_PCH_IBX(dev_priv)) {
237                         I915_WRITE(intel_sdvo->sdvo_reg, val);
238                         POSTING_READ(intel_sdvo->sdvo_reg);
239                 }
240                 return;
241         }
242
243         if (intel_sdvo->port == PORT_B)
244                 cval = I915_READ(GEN3_SDVOC);
245         else
246                 bval = I915_READ(GEN3_SDVOB);
247
248         /*
249          * Write the registers twice for luck. Sometimes,
250          * writing them only once doesn't appear to 'stick'.
251          * The BIOS does this too. Yay, magic
252          */
253         for (i = 0; i < 2; i++) {
254                 I915_WRITE(GEN3_SDVOB, bval);
255                 POSTING_READ(GEN3_SDVOB);
256
257                 I915_WRITE(GEN3_SDVOC, cval);
258                 POSTING_READ(GEN3_SDVOC);
259         }
260 }
261
262 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
263 {
264         struct i2c_msg msgs[] = {
265                 {
266                         .addr = intel_sdvo->slave_addr,
267                         .flags = 0,
268                         .len = 1,
269                         .buf = &addr,
270                 },
271                 {
272                         .addr = intel_sdvo->slave_addr,
273                         .flags = I2C_M_RD,
274                         .len = 1,
275                         .buf = ch,
276                 }
277         };
278         int ret;
279
280         if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
281                 return true;
282
283         DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
284         return false;
285 }
286
287 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
288 /** Mapping of command numbers to names, for debug output */
289 static const struct _sdvo_cmd_name {
290         u8 cmd;
291         const char *name;
292 } __attribute__ ((packed)) sdvo_cmd_names[] = {
293         SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
294         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
295         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
296         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
297         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
298         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
299         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
300         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
301         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
302         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
303         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
304         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
305         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
306         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
307         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
308         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
309         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
310         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
311         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
312         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
313         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
314         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
315         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
316         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
317         SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
318         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
319         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
320         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
321         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
322         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
323         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
324         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
325         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
326         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
327         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
328         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
329         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
330         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
331         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
332         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
333         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
334         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
335         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
336
337         /* Add the op code for SDVO enhancements */
338         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
339         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
340         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
341         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
342         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
343         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
344         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
345         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
346         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
347         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
348         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
349         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
350         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
351         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
352         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
353         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
354         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
355         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
356         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
357         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
358         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
359         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
360         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
361         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
362         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
363         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
364         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
365         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
366         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
367         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
368         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
369         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
370         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
371         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
372         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
373         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
374         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
375         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
376         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
377         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
378         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
379         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
380         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
381         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
382
383         /* HDMI op code */
384         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
385         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
386         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
387         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
388         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
389         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
390         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
391         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
392         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
393         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
394         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
395         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
396         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
397         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
398         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
399         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
400         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
401         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
402         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
403         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
404 };
405
406 #define SDVO_NAME(svdo) ((svdo)->port == PORT_B ? "SDVOB" : "SDVOC")
407
408 static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
409                                    const void *args, int args_len)
410 {
411         int i, pos = 0;
412 #define BUF_LEN 256
413         char buffer[BUF_LEN];
414
415 #define BUF_PRINT(args...) \
416         pos += snprintf(buffer + pos, max_t(int, BUF_LEN - pos, 0), args)
417
418
419         for (i = 0; i < args_len; i++) {
420                 BUF_PRINT("%02X ", ((u8 *)args)[i]);
421         }
422         for (; i < 8; i++) {
423                 BUF_PRINT("   ");
424         }
425         for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
426                 if (cmd == sdvo_cmd_names[i].cmd) {
427                         BUF_PRINT("(%s)", sdvo_cmd_names[i].name);
428                         break;
429                 }
430         }
431         if (i == ARRAY_SIZE(sdvo_cmd_names)) {
432                 BUF_PRINT("(%02X)", cmd);
433         }
434         BUG_ON(pos >= BUF_LEN - 1);
435 #undef BUF_PRINT
436 #undef BUF_LEN
437
438         DRM_DEBUG_KMS("%s: W: %02X %s\n", SDVO_NAME(intel_sdvo), cmd, buffer);
439 }
440
441 static const char * const cmd_status_names[] = {
442         "Power on",
443         "Success",
444         "Not supported",
445         "Invalid arg",
446         "Pending",
447         "Target not specified",
448         "Scaling not supported"
449 };
450
451 static bool __intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
452                                    const void *args, int args_len,
453                                    bool unlocked)
454 {
455         u8 *buf, status;
456         struct i2c_msg *msgs;
457         int i, ret = true;
458
459         /* Would be simpler to allocate both in one go ? */
460         buf = kzalloc(args_len * 2 + 2, GFP_KERNEL);
461         if (!buf)
462                 return false;
463
464         msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL);
465         if (!msgs) {
466                 kfree(buf);
467                 return false;
468         }
469
470         intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
471
472         for (i = 0; i < args_len; i++) {
473                 msgs[i].addr = intel_sdvo->slave_addr;
474                 msgs[i].flags = 0;
475                 msgs[i].len = 2;
476                 msgs[i].buf = buf + 2 *i;
477                 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
478                 buf[2*i + 1] = ((u8*)args)[i];
479         }
480         msgs[i].addr = intel_sdvo->slave_addr;
481         msgs[i].flags = 0;
482         msgs[i].len = 2;
483         msgs[i].buf = buf + 2*i;
484         buf[2*i + 0] = SDVO_I2C_OPCODE;
485         buf[2*i + 1] = cmd;
486
487         /* the following two are to read the response */
488         status = SDVO_I2C_CMD_STATUS;
489         msgs[i+1].addr = intel_sdvo->slave_addr;
490         msgs[i+1].flags = 0;
491         msgs[i+1].len = 1;
492         msgs[i+1].buf = &status;
493
494         msgs[i+2].addr = intel_sdvo->slave_addr;
495         msgs[i+2].flags = I2C_M_RD;
496         msgs[i+2].len = 1;
497         msgs[i+2].buf = &status;
498
499         if (unlocked)
500                 ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
501         else
502                 ret = __i2c_transfer(intel_sdvo->i2c, msgs, i+3);
503         if (ret < 0) {
504                 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
505                 ret = false;
506                 goto out;
507         }
508         if (ret != i+3) {
509                 /* failure in I2C transfer */
510                 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
511                 ret = false;
512         }
513
514 out:
515         kfree(msgs);
516         kfree(buf);
517         return ret;
518 }
519
520 static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
521                                  const void *args, int args_len)
522 {
523         return __intel_sdvo_write_cmd(intel_sdvo, cmd, args, args_len, true);
524 }
525
526 static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
527                                      void *response, int response_len)
528 {
529         u8 retry = 15; /* 5 quick checks, followed by 10 long checks */
530         u8 status;
531         int i, pos = 0;
532 #define BUF_LEN 256
533         char buffer[BUF_LEN];
534
535
536         /*
537          * The documentation states that all commands will be
538          * processed within 15µs, and that we need only poll
539          * the status byte a maximum of 3 times in order for the
540          * command to be complete.
541          *
542          * Check 5 times in case the hardware failed to read the docs.
543          *
544          * Also beware that the first response by many devices is to
545          * reply PENDING and stall for time. TVs are notorious for
546          * requiring longer than specified to complete their replies.
547          * Originally (in the DDX long ago), the delay was only ever 15ms
548          * with an additional delay of 30ms applied for TVs added later after
549          * many experiments. To accommodate both sets of delays, we do a
550          * sequence of slow checks if the device is falling behind and fails
551          * to reply within 5*15µs.
552          */
553         if (!intel_sdvo_read_byte(intel_sdvo,
554                                   SDVO_I2C_CMD_STATUS,
555                                   &status))
556                 goto log_fail;
557
558         while ((status == SDVO_CMD_STATUS_PENDING ||
559                 status == SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED) && --retry) {
560                 if (retry < 10)
561                         msleep(15);
562                 else
563                         udelay(15);
564
565                 if (!intel_sdvo_read_byte(intel_sdvo,
566                                           SDVO_I2C_CMD_STATUS,
567                                           &status))
568                         goto log_fail;
569         }
570
571 #define BUF_PRINT(args...) \
572         pos += snprintf(buffer + pos, max_t(int, BUF_LEN - pos, 0), args)
573
574         if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
575                 BUF_PRINT("(%s)", cmd_status_names[status]);
576         else
577                 BUF_PRINT("(??? %d)", status);
578
579         if (status != SDVO_CMD_STATUS_SUCCESS)
580                 goto log_fail;
581
582         /* Read the command response */
583         for (i = 0; i < response_len; i++) {
584                 if (!intel_sdvo_read_byte(intel_sdvo,
585                                           SDVO_I2C_RETURN_0 + i,
586                                           &((u8 *)response)[i]))
587                         goto log_fail;
588                 BUF_PRINT(" %02X", ((u8 *)response)[i]);
589         }
590         BUG_ON(pos >= BUF_LEN - 1);
591 #undef BUF_PRINT
592 #undef BUF_LEN
593
594         DRM_DEBUG_KMS("%s: R: %s\n", SDVO_NAME(intel_sdvo), buffer);
595         return true;
596
597 log_fail:
598         DRM_DEBUG_KMS("%s: R: ... failed\n", SDVO_NAME(intel_sdvo));
599         return false;
600 }
601
602 static int intel_sdvo_get_pixel_multiplier(const struct drm_display_mode *adjusted_mode)
603 {
604         if (adjusted_mode->crtc_clock >= 100000)
605                 return 1;
606         else if (adjusted_mode->crtc_clock >= 50000)
607                 return 2;
608         else
609                 return 4;
610 }
611
612 static bool __intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
613                                                 u8 ddc_bus)
614 {
615         /* This must be the immediately preceding write before the i2c xfer */
616         return __intel_sdvo_write_cmd(intel_sdvo,
617                                       SDVO_CMD_SET_CONTROL_BUS_SWITCH,
618                                       &ddc_bus, 1, false);
619 }
620
621 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
622 {
623         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
624                 return false;
625
626         return intel_sdvo_read_response(intel_sdvo, NULL, 0);
627 }
628
629 static bool
630 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
631 {
632         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
633                 return false;
634
635         return intel_sdvo_read_response(intel_sdvo, value, len);
636 }
637
638 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
639 {
640         struct intel_sdvo_set_target_input_args targets = {0};
641         return intel_sdvo_set_value(intel_sdvo,
642                                     SDVO_CMD_SET_TARGET_INPUT,
643                                     &targets, sizeof(targets));
644 }
645
646 /*
647  * Return whether each input is trained.
648  *
649  * This function is making an assumption about the layout of the response,
650  * which should be checked against the docs.
651  */
652 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
653 {
654         struct intel_sdvo_get_trained_inputs_response response;
655
656         BUILD_BUG_ON(sizeof(response) != 1);
657         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
658                                   &response, sizeof(response)))
659                 return false;
660
661         *input_1 = response.input0_trained;
662         *input_2 = response.input1_trained;
663         return true;
664 }
665
666 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
667                                           u16 outputs)
668 {
669         return intel_sdvo_set_value(intel_sdvo,
670                                     SDVO_CMD_SET_ACTIVE_OUTPUTS,
671                                     &outputs, sizeof(outputs));
672 }
673
674 static bool intel_sdvo_get_active_outputs(struct intel_sdvo *intel_sdvo,
675                                           u16 *outputs)
676 {
677         return intel_sdvo_get_value(intel_sdvo,
678                                     SDVO_CMD_GET_ACTIVE_OUTPUTS,
679                                     outputs, sizeof(*outputs));
680 }
681
682 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
683                                                int mode)
684 {
685         u8 state = SDVO_ENCODER_STATE_ON;
686
687         switch (mode) {
688         case DRM_MODE_DPMS_ON:
689                 state = SDVO_ENCODER_STATE_ON;
690                 break;
691         case DRM_MODE_DPMS_STANDBY:
692                 state = SDVO_ENCODER_STATE_STANDBY;
693                 break;
694         case DRM_MODE_DPMS_SUSPEND:
695                 state = SDVO_ENCODER_STATE_SUSPEND;
696                 break;
697         case DRM_MODE_DPMS_OFF:
698                 state = SDVO_ENCODER_STATE_OFF;
699                 break;
700         }
701
702         return intel_sdvo_set_value(intel_sdvo,
703                                     SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
704 }
705
706 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
707                                                    int *clock_min,
708                                                    int *clock_max)
709 {
710         struct intel_sdvo_pixel_clock_range clocks;
711
712         BUILD_BUG_ON(sizeof(clocks) != 4);
713         if (!intel_sdvo_get_value(intel_sdvo,
714                                   SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
715                                   &clocks, sizeof(clocks)))
716                 return false;
717
718         /* Convert the values from units of 10 kHz to kHz. */
719         *clock_min = clocks.min * 10;
720         *clock_max = clocks.max * 10;
721         return true;
722 }
723
724 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
725                                          u16 outputs)
726 {
727         return intel_sdvo_set_value(intel_sdvo,
728                                     SDVO_CMD_SET_TARGET_OUTPUT,
729                                     &outputs, sizeof(outputs));
730 }
731
732 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
733                                   struct intel_sdvo_dtd *dtd)
734 {
735         return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
736                 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
737 }
738
739 static bool intel_sdvo_get_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
740                                   struct intel_sdvo_dtd *dtd)
741 {
742         return intel_sdvo_get_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
743                 intel_sdvo_get_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
744 }
745
746 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
747                                          struct intel_sdvo_dtd *dtd)
748 {
749         return intel_sdvo_set_timing(intel_sdvo,
750                                      SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
751 }
752
753 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
754                                          struct intel_sdvo_dtd *dtd)
755 {
756         return intel_sdvo_set_timing(intel_sdvo,
757                                      SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
758 }
759
760 static bool intel_sdvo_get_input_timing(struct intel_sdvo *intel_sdvo,
761                                         struct intel_sdvo_dtd *dtd)
762 {
763         return intel_sdvo_get_timing(intel_sdvo,
764                                      SDVO_CMD_GET_INPUT_TIMINGS_PART1, dtd);
765 }
766
767 static bool
768 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
769                                          uint16_t clock,
770                                          uint16_t width,
771                                          uint16_t height)
772 {
773         struct intel_sdvo_preferred_input_timing_args args;
774
775         memset(&args, 0, sizeof(args));
776         args.clock = clock;
777         args.width = width;
778         args.height = height;
779         args.interlace = 0;
780
781         if (intel_sdvo->is_lvds &&
782            (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
783             intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
784                 args.scaled = 1;
785
786         return intel_sdvo_set_value(intel_sdvo,
787                                     SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
788                                     &args, sizeof(args));
789 }
790
791 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
792                                                   struct intel_sdvo_dtd *dtd)
793 {
794         BUILD_BUG_ON(sizeof(dtd->part1) != 8);
795         BUILD_BUG_ON(sizeof(dtd->part2) != 8);
796         return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
797                                     &dtd->part1, sizeof(dtd->part1)) &&
798                 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
799                                      &dtd->part2, sizeof(dtd->part2));
800 }
801
802 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
803 {
804         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
805 }
806
807 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
808                                          const struct drm_display_mode *mode)
809 {
810         uint16_t width, height;
811         uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
812         uint16_t h_sync_offset, v_sync_offset;
813         int mode_clock;
814
815         memset(dtd, 0, sizeof(*dtd));
816
817         width = mode->hdisplay;
818         height = mode->vdisplay;
819
820         /* do some mode translations */
821         h_blank_len = mode->htotal - mode->hdisplay;
822         h_sync_len = mode->hsync_end - mode->hsync_start;
823
824         v_blank_len = mode->vtotal - mode->vdisplay;
825         v_sync_len = mode->vsync_end - mode->vsync_start;
826
827         h_sync_offset = mode->hsync_start - mode->hdisplay;
828         v_sync_offset = mode->vsync_start - mode->vdisplay;
829
830         mode_clock = mode->clock;
831         mode_clock /= 10;
832         dtd->part1.clock = mode_clock;
833
834         dtd->part1.h_active = width & 0xff;
835         dtd->part1.h_blank = h_blank_len & 0xff;
836         dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
837                 ((h_blank_len >> 8) & 0xf);
838         dtd->part1.v_active = height & 0xff;
839         dtd->part1.v_blank = v_blank_len & 0xff;
840         dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
841                 ((v_blank_len >> 8) & 0xf);
842
843         dtd->part2.h_sync_off = h_sync_offset & 0xff;
844         dtd->part2.h_sync_width = h_sync_len & 0xff;
845         dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
846                 (v_sync_len & 0xf);
847         dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
848                 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
849                 ((v_sync_len & 0x30) >> 4);
850
851         dtd->part2.dtd_flags = 0x18;
852         if (mode->flags & DRM_MODE_FLAG_INTERLACE)
853                 dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE;
854         if (mode->flags & DRM_MODE_FLAG_PHSYNC)
855                 dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE;
856         if (mode->flags & DRM_MODE_FLAG_PVSYNC)
857                 dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE;
858
859         dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
860 }
861
862 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode *pmode,
863                                          const struct intel_sdvo_dtd *dtd)
864 {
865         struct drm_display_mode mode = {};
866
867         mode.hdisplay = dtd->part1.h_active;
868         mode.hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
869         mode.hsync_start = mode.hdisplay + dtd->part2.h_sync_off;
870         mode.hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
871         mode.hsync_end = mode.hsync_start + dtd->part2.h_sync_width;
872         mode.hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
873         mode.htotal = mode.hdisplay + dtd->part1.h_blank;
874         mode.htotal += (dtd->part1.h_high & 0xf) << 8;
875
876         mode.vdisplay = dtd->part1.v_active;
877         mode.vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
878         mode.vsync_start = mode.vdisplay;
879         mode.vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
880         mode.vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
881         mode.vsync_start += dtd->part2.v_sync_off_high & 0xc0;
882         mode.vsync_end = mode.vsync_start +
883                 (dtd->part2.v_sync_off_width & 0xf);
884         mode.vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
885         mode.vtotal = mode.vdisplay + dtd->part1.v_blank;
886         mode.vtotal += (dtd->part1.v_high & 0xf) << 8;
887
888         mode.clock = dtd->part1.clock * 10;
889
890         if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE)
891                 mode.flags |= DRM_MODE_FLAG_INTERLACE;
892         if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
893                 mode.flags |= DRM_MODE_FLAG_PHSYNC;
894         else
895                 mode.flags |= DRM_MODE_FLAG_NHSYNC;
896         if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
897                 mode.flags |= DRM_MODE_FLAG_PVSYNC;
898         else
899                 mode.flags |= DRM_MODE_FLAG_NVSYNC;
900
901         drm_mode_set_crtcinfo(&mode, 0);
902
903         drm_mode_copy(pmode, &mode);
904 }
905
906 static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
907 {
908         struct intel_sdvo_encode encode;
909
910         BUILD_BUG_ON(sizeof(encode) != 2);
911         return intel_sdvo_get_value(intel_sdvo,
912                                   SDVO_CMD_GET_SUPP_ENCODE,
913                                   &encode, sizeof(encode));
914 }
915
916 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
917                                   uint8_t mode)
918 {
919         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
920 }
921
922 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
923                                        uint8_t mode)
924 {
925         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
926 }
927
928 #if 0
929 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
930 {
931         int i, j;
932         uint8_t set_buf_index[2];
933         uint8_t av_split;
934         uint8_t buf_size;
935         uint8_t buf[48];
936         uint8_t *pos;
937
938         intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
939
940         for (i = 0; i <= av_split; i++) {
941                 set_buf_index[0] = i; set_buf_index[1] = 0;
942                 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
943                                      set_buf_index, 2);
944                 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
945                 intel_sdvo_read_response(encoder, &buf_size, 1);
946
947                 pos = buf;
948                 for (j = 0; j <= buf_size; j += 8) {
949                         intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
950                                              NULL, 0);
951                         intel_sdvo_read_response(encoder, pos, 8);
952                         pos += 8;
953                 }
954         }
955 }
956 #endif
957
958 static bool intel_sdvo_write_infoframe(struct intel_sdvo *intel_sdvo,
959                                        unsigned if_index, uint8_t tx_rate,
960                                        const uint8_t *data, unsigned length)
961 {
962         uint8_t set_buf_index[2] = { if_index, 0 };
963         uint8_t hbuf_size, tmp[8];
964         int i;
965
966         if (!intel_sdvo_set_value(intel_sdvo,
967                                   SDVO_CMD_SET_HBUF_INDEX,
968                                   set_buf_index, 2))
969                 return false;
970
971         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO,
972                                   &hbuf_size, 1))
973                 return false;
974
975         /* Buffer size is 0 based, hooray! */
976         hbuf_size++;
977
978         DRM_DEBUG_KMS("writing sdvo hbuf: %i, hbuf_size %i, hbuf_size: %i\n",
979                       if_index, length, hbuf_size);
980
981         for (i = 0; i < hbuf_size; i += 8) {
982                 memset(tmp, 0, 8);
983                 if (i < length)
984                         memcpy(tmp, data + i, min_t(unsigned, 8, length - i));
985
986                 if (!intel_sdvo_set_value(intel_sdvo,
987                                           SDVO_CMD_SET_HBUF_DATA,
988                                           tmp, 8))
989                         return false;
990         }
991
992         return intel_sdvo_set_value(intel_sdvo,
993                                     SDVO_CMD_SET_HBUF_TXRATE,
994                                     &tx_rate, 1);
995 }
996
997 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo,
998                                          const struct intel_crtc_state *pipe_config)
999 {
1000         uint8_t sdvo_data[HDMI_INFOFRAME_SIZE(AVI)];
1001         union hdmi_infoframe frame;
1002         int ret;
1003         ssize_t len;
1004
1005         ret = drm_hdmi_avi_infoframe_from_display_mode(&frame.avi,
1006                                                        &pipe_config->base.adjusted_mode,
1007                                                        false);
1008         if (ret < 0) {
1009                 DRM_ERROR("couldn't fill AVI infoframe\n");
1010                 return false;
1011         }
1012
1013         if (intel_sdvo->rgb_quant_range_selectable) {
1014                 if (pipe_config->limited_color_range)
1015                         frame.avi.quantization_range =
1016                                 HDMI_QUANTIZATION_RANGE_LIMITED;
1017                 else
1018                         frame.avi.quantization_range =
1019                                 HDMI_QUANTIZATION_RANGE_FULL;
1020         }
1021
1022         len = hdmi_infoframe_pack(&frame, sdvo_data, sizeof(sdvo_data));
1023         if (len < 0)
1024                 return false;
1025
1026         return intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF,
1027                                           SDVO_HBUF_TX_VSYNC,
1028                                           sdvo_data, sizeof(sdvo_data));
1029 }
1030
1031 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo,
1032                                      const struct drm_connector_state *conn_state)
1033 {
1034         struct intel_sdvo_tv_format format;
1035         uint32_t format_map;
1036
1037         format_map = 1 << conn_state->tv.mode;
1038         memset(&format, 0, sizeof(format));
1039         memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
1040
1041         BUILD_BUG_ON(sizeof(format) != 6);
1042         return intel_sdvo_set_value(intel_sdvo,
1043                                     SDVO_CMD_SET_TV_FORMAT,
1044                                     &format, sizeof(format));
1045 }
1046
1047 static bool
1048 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
1049                                         const struct drm_display_mode *mode)
1050 {
1051         struct intel_sdvo_dtd output_dtd;
1052
1053         if (!intel_sdvo_set_target_output(intel_sdvo,
1054                                           intel_sdvo->attached_output))
1055                 return false;
1056
1057         intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1058         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1059                 return false;
1060
1061         return true;
1062 }
1063
1064 /*
1065  * Asks the sdvo controller for the preferred input mode given the output mode.
1066  * Unfortunately we have to set up the full output mode to do that.
1067  */
1068 static bool
1069 intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo,
1070                                     const struct drm_display_mode *mode,
1071                                     struct drm_display_mode *adjusted_mode)
1072 {
1073         struct intel_sdvo_dtd input_dtd;
1074
1075         /* Reset the input timing to the screen. Assume always input 0. */
1076         if (!intel_sdvo_set_target_input(intel_sdvo))
1077                 return false;
1078
1079         if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
1080                                                       mode->clock / 10,
1081                                                       mode->hdisplay,
1082                                                       mode->vdisplay))
1083                 return false;
1084
1085         if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
1086                                                    &input_dtd))
1087                 return false;
1088
1089         intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd);
1090         intel_sdvo->dtd_sdvo_flags = input_dtd.part2.sdvo_flags;
1091
1092         return true;
1093 }
1094
1095 static void i9xx_adjust_sdvo_tv_clock(struct intel_crtc_state *pipe_config)
1096 {
1097         unsigned dotclock = pipe_config->port_clock;
1098         struct dpll *clock = &pipe_config->dpll;
1099
1100         /*
1101          * SDVO TV has fixed PLL values depend on its clock range,
1102          * this mirrors vbios setting.
1103          */
1104         if (dotclock >= 100000 && dotclock < 140500) {
1105                 clock->p1 = 2;
1106                 clock->p2 = 10;
1107                 clock->n = 3;
1108                 clock->m1 = 16;
1109                 clock->m2 = 8;
1110         } else if (dotclock >= 140500 && dotclock <= 200000) {
1111                 clock->p1 = 1;
1112                 clock->p2 = 10;
1113                 clock->n = 6;
1114                 clock->m1 = 12;
1115                 clock->m2 = 8;
1116         } else {
1117                 WARN(1, "SDVO TV clock out of range: %i\n", dotclock);
1118         }
1119
1120         pipe_config->clock_set = true;
1121 }
1122
1123 static bool intel_sdvo_compute_config(struct intel_encoder *encoder,
1124                                       struct intel_crtc_state *pipe_config,
1125                                       struct drm_connector_state *conn_state)
1126 {
1127         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1128         struct intel_sdvo_connector_state *intel_sdvo_state =
1129                 to_intel_sdvo_connector_state(conn_state);
1130         struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
1131         struct drm_display_mode *mode = &pipe_config->base.mode;
1132
1133         DRM_DEBUG_KMS("forcing bpc to 8 for SDVO\n");
1134         pipe_config->pipe_bpp = 8*3;
1135
1136         if (HAS_PCH_SPLIT(to_i915(encoder->base.dev)))
1137                 pipe_config->has_pch_encoder = true;
1138
1139         /*
1140          * We need to construct preferred input timings based on our
1141          * output timings.  To do that, we have to set the output
1142          * timings, even though this isn't really the right place in
1143          * the sequence to do it. Oh well.
1144          */
1145         if (intel_sdvo->is_tv) {
1146                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
1147                         return false;
1148
1149                 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1150                                                            mode,
1151                                                            adjusted_mode);
1152                 pipe_config->sdvo_tv_clock = true;
1153         } else if (intel_sdvo->is_lvds) {
1154                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
1155                                                              intel_sdvo->sdvo_lvds_fixed_mode))
1156                         return false;
1157
1158                 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1159                                                            mode,
1160                                                            adjusted_mode);
1161         }
1162
1163         if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
1164                 return false;
1165
1166         /*
1167          * Make the CRTC code factor in the SDVO pixel multiplier.  The
1168          * SDVO device will factor out the multiplier during mode_set.
1169          */
1170         pipe_config->pixel_multiplier =
1171                 intel_sdvo_get_pixel_multiplier(adjusted_mode);
1172
1173         if (intel_sdvo_state->base.force_audio != HDMI_AUDIO_OFF_DVI)
1174                 pipe_config->has_hdmi_sink = intel_sdvo->has_hdmi_monitor;
1175
1176         if (intel_sdvo_state->base.force_audio == HDMI_AUDIO_ON ||
1177             (intel_sdvo_state->base.force_audio == HDMI_AUDIO_AUTO && intel_sdvo->has_hdmi_audio))
1178                 pipe_config->has_audio = true;
1179
1180         if (intel_sdvo_state->base.broadcast_rgb == INTEL_BROADCAST_RGB_AUTO) {
1181                 /*
1182                  * See CEA-861-E - 5.1 Default Encoding Parameters
1183                  *
1184                  * FIXME: This bit is only valid when using TMDS encoding and 8
1185                  * bit per color mode.
1186                  */
1187                 if (pipe_config->has_hdmi_sink &&
1188                     drm_match_cea_mode(adjusted_mode) > 1)
1189                         pipe_config->limited_color_range = true;
1190         } else {
1191                 if (pipe_config->has_hdmi_sink &&
1192                     intel_sdvo_state->base.broadcast_rgb == INTEL_BROADCAST_RGB_LIMITED)
1193                         pipe_config->limited_color_range = true;
1194         }
1195
1196         /* Clock computation needs to happen after pixel multiplier. */
1197         if (intel_sdvo->is_tv)
1198                 i9xx_adjust_sdvo_tv_clock(pipe_config);
1199
1200         /* Set user selected PAR to incoming mode's member */
1201         if (intel_sdvo->is_hdmi)
1202                 adjusted_mode->picture_aspect_ratio = conn_state->picture_aspect_ratio;
1203
1204         return true;
1205 }
1206
1207 #define UPDATE_PROPERTY(input, NAME) \
1208         do { \
1209                 val = input; \
1210                 intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_##NAME, &val, sizeof(val)); \
1211         } while (0)
1212
1213 static void intel_sdvo_update_props(struct intel_sdvo *intel_sdvo,
1214                                     const struct intel_sdvo_connector_state *sdvo_state)
1215 {
1216         const struct drm_connector_state *conn_state = &sdvo_state->base.base;
1217         struct intel_sdvo_connector *intel_sdvo_conn =
1218                 to_intel_sdvo_connector(conn_state->connector);
1219         uint16_t val;
1220
1221         if (intel_sdvo_conn->left)
1222                 UPDATE_PROPERTY(sdvo_state->tv.overscan_h, OVERSCAN_H);
1223
1224         if (intel_sdvo_conn->top)
1225                 UPDATE_PROPERTY(sdvo_state->tv.overscan_v, OVERSCAN_V);
1226
1227         if (intel_sdvo_conn->hpos)
1228                 UPDATE_PROPERTY(sdvo_state->tv.hpos, HPOS);
1229
1230         if (intel_sdvo_conn->vpos)
1231                 UPDATE_PROPERTY(sdvo_state->tv.vpos, VPOS);
1232
1233         if (intel_sdvo_conn->saturation)
1234                 UPDATE_PROPERTY(conn_state->tv.saturation, SATURATION);
1235
1236         if (intel_sdvo_conn->contrast)
1237                 UPDATE_PROPERTY(conn_state->tv.contrast, CONTRAST);
1238
1239         if (intel_sdvo_conn->hue)
1240                 UPDATE_PROPERTY(conn_state->tv.hue, HUE);
1241
1242         if (intel_sdvo_conn->brightness)
1243                 UPDATE_PROPERTY(conn_state->tv.brightness, BRIGHTNESS);
1244
1245         if (intel_sdvo_conn->sharpness)
1246                 UPDATE_PROPERTY(sdvo_state->tv.sharpness, SHARPNESS);
1247
1248         if (intel_sdvo_conn->flicker_filter)
1249                 UPDATE_PROPERTY(sdvo_state->tv.flicker_filter, FLICKER_FILTER);
1250
1251         if (intel_sdvo_conn->flicker_filter_2d)
1252                 UPDATE_PROPERTY(sdvo_state->tv.flicker_filter_2d, FLICKER_FILTER_2D);
1253
1254         if (intel_sdvo_conn->flicker_filter_adaptive)
1255                 UPDATE_PROPERTY(sdvo_state->tv.flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
1256
1257         if (intel_sdvo_conn->tv_chroma_filter)
1258                 UPDATE_PROPERTY(sdvo_state->tv.chroma_filter, TV_CHROMA_FILTER);
1259
1260         if (intel_sdvo_conn->tv_luma_filter)
1261                 UPDATE_PROPERTY(sdvo_state->tv.luma_filter, TV_LUMA_FILTER);
1262
1263         if (intel_sdvo_conn->dot_crawl)
1264                 UPDATE_PROPERTY(sdvo_state->tv.dot_crawl, DOT_CRAWL);
1265
1266 #undef UPDATE_PROPERTY
1267 }
1268
1269 static void intel_sdvo_pre_enable(struct intel_encoder *intel_encoder,
1270                                   const struct intel_crtc_state *crtc_state,
1271                                   const struct drm_connector_state *conn_state)
1272 {
1273         struct drm_i915_private *dev_priv = to_i915(intel_encoder->base.dev);
1274         struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
1275         const struct drm_display_mode *adjusted_mode = &crtc_state->base.adjusted_mode;
1276         const struct intel_sdvo_connector_state *sdvo_state =
1277                 to_intel_sdvo_connector_state(conn_state);
1278         const struct drm_display_mode *mode = &crtc_state->base.mode;
1279         struct intel_sdvo *intel_sdvo = to_sdvo(intel_encoder);
1280         u32 sdvox;
1281         struct intel_sdvo_in_out_map in_out;
1282         struct intel_sdvo_dtd input_dtd, output_dtd;
1283         int rate;
1284
1285         intel_sdvo_update_props(intel_sdvo, sdvo_state);
1286
1287         /*
1288          * First, set the input mapping for the first input to our controlled
1289          * output. This is only correct if we're a single-input device, in
1290          * which case the first input is the output from the appropriate SDVO
1291          * channel on the motherboard.  In a two-input device, the first input
1292          * will be SDVOB and the second SDVOC.
1293          */
1294         in_out.in0 = intel_sdvo->attached_output;
1295         in_out.in1 = 0;
1296
1297         intel_sdvo_set_value(intel_sdvo,
1298                              SDVO_CMD_SET_IN_OUT_MAP,
1299                              &in_out, sizeof(in_out));
1300
1301         /* Set the output timings to the screen */
1302         if (!intel_sdvo_set_target_output(intel_sdvo,
1303                                           intel_sdvo->attached_output))
1304                 return;
1305
1306         /* lvds has a special fixed output timing. */
1307         if (intel_sdvo->is_lvds)
1308                 intel_sdvo_get_dtd_from_mode(&output_dtd,
1309                                              intel_sdvo->sdvo_lvds_fixed_mode);
1310         else
1311                 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1312         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1313                 DRM_INFO("Setting output timings on %s failed\n",
1314                          SDVO_NAME(intel_sdvo));
1315
1316         /* Set the input timing to the screen. Assume always input 0. */
1317         if (!intel_sdvo_set_target_input(intel_sdvo))
1318                 return;
1319
1320         if (crtc_state->has_hdmi_sink) {
1321                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1322                 intel_sdvo_set_colorimetry(intel_sdvo,
1323                                            SDVO_COLORIMETRY_RGB256);
1324                 intel_sdvo_set_avi_infoframe(intel_sdvo, crtc_state);
1325         } else
1326                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
1327
1328         if (intel_sdvo->is_tv &&
1329             !intel_sdvo_set_tv_format(intel_sdvo, conn_state))
1330                 return;
1331
1332         intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1333
1334         if (intel_sdvo->is_tv || intel_sdvo->is_lvds)
1335                 input_dtd.part2.sdvo_flags = intel_sdvo->dtd_sdvo_flags;
1336         if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd))
1337                 DRM_INFO("Setting input timings on %s failed\n",
1338                          SDVO_NAME(intel_sdvo));
1339
1340         switch (crtc_state->pixel_multiplier) {
1341         default:
1342                 WARN(1, "unknown pixel multiplier specified\n");
1343                 /* fall through */
1344         case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1345         case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1346         case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1347         }
1348         if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1349                 return;
1350
1351         /* Set the SDVO control regs. */
1352         if (INTEL_GEN(dev_priv) >= 4) {
1353                 /* The real mode polarity is set by the SDVO commands, using
1354                  * struct intel_sdvo_dtd. */
1355                 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
1356                 if (!HAS_PCH_SPLIT(dev_priv) && crtc_state->limited_color_range)
1357                         sdvox |= HDMI_COLOR_RANGE_16_235;
1358                 if (INTEL_GEN(dev_priv) < 5)
1359                         sdvox |= SDVO_BORDER_ENABLE;
1360         } else {
1361                 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1362                 if (intel_sdvo->port == PORT_B)
1363                         sdvox &= SDVOB_PRESERVE_MASK;
1364                 else
1365                         sdvox &= SDVOC_PRESERVE_MASK;
1366                 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1367         }
1368
1369         if (HAS_PCH_CPT(dev_priv))
1370                 sdvox |= SDVO_PIPE_SEL_CPT(crtc->pipe);
1371         else
1372                 sdvox |= SDVO_PIPE_SEL(crtc->pipe);
1373
1374         if (crtc_state->has_audio) {
1375                 WARN_ON_ONCE(INTEL_GEN(dev_priv) < 4);
1376                 sdvox |= SDVO_AUDIO_ENABLE;
1377         }
1378
1379         if (INTEL_GEN(dev_priv) >= 4) {
1380                 /* done in crtc_mode_set as the dpll_md reg must be written early */
1381         } else if (IS_I945G(dev_priv) || IS_I945GM(dev_priv) ||
1382                    IS_G33(dev_priv) || IS_PINEVIEW(dev_priv)) {
1383                 /* done in crtc_mode_set as it lives inside the dpll register */
1384         } else {
1385                 sdvox |= (crtc_state->pixel_multiplier - 1)
1386                         << SDVO_PORT_MULTIPLY_SHIFT;
1387         }
1388
1389         if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1390             INTEL_GEN(dev_priv) < 5)
1391                 sdvox |= SDVO_STALL_SELECT;
1392         intel_sdvo_write_sdvox(intel_sdvo, sdvox);
1393 }
1394
1395 static bool intel_sdvo_connector_get_hw_state(struct intel_connector *connector)
1396 {
1397         struct intel_sdvo_connector *intel_sdvo_connector =
1398                 to_intel_sdvo_connector(&connector->base);
1399         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(&connector->base);
1400         u16 active_outputs = 0;
1401
1402         intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1403
1404         return active_outputs & intel_sdvo_connector->output_flag;
1405 }
1406
1407 bool intel_sdvo_port_enabled(struct drm_i915_private *dev_priv,
1408                              i915_reg_t sdvo_reg, enum pipe *pipe)
1409 {
1410         u32 val;
1411
1412         val = I915_READ(sdvo_reg);
1413
1414         /* asserts want to know the pipe even if the port is disabled */
1415         if (HAS_PCH_CPT(dev_priv))
1416                 *pipe = (val & SDVO_PIPE_SEL_MASK_CPT) >> SDVO_PIPE_SEL_SHIFT_CPT;
1417         else if (IS_CHERRYVIEW(dev_priv))
1418                 *pipe = (val & SDVO_PIPE_SEL_MASK_CHV) >> SDVO_PIPE_SEL_SHIFT_CHV;
1419         else
1420                 *pipe = (val & SDVO_PIPE_SEL_MASK) >> SDVO_PIPE_SEL_SHIFT;
1421
1422         return val & SDVO_ENABLE;
1423 }
1424
1425 static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder,
1426                                     enum pipe *pipe)
1427 {
1428         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
1429         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1430         u16 active_outputs = 0;
1431         bool ret;
1432
1433         intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1434
1435         ret = intel_sdvo_port_enabled(dev_priv, intel_sdvo->sdvo_reg, pipe);
1436
1437         return ret || active_outputs;
1438 }
1439
1440 static void intel_sdvo_get_config(struct intel_encoder *encoder,
1441                                   struct intel_crtc_state *pipe_config)
1442 {
1443         struct drm_device *dev = encoder->base.dev;
1444         struct drm_i915_private *dev_priv = to_i915(dev);
1445         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1446         struct intel_sdvo_dtd dtd;
1447         int encoder_pixel_multiplier = 0;
1448         int dotclock;
1449         u32 flags = 0, sdvox;
1450         u8 val;
1451         bool ret;
1452
1453         pipe_config->output_types |= BIT(INTEL_OUTPUT_SDVO);
1454
1455         sdvox = I915_READ(intel_sdvo->sdvo_reg);
1456
1457         ret = intel_sdvo_get_input_timing(intel_sdvo, &dtd);
1458         if (!ret) {
1459                 /*
1460                  * Some sdvo encoders are not spec compliant and don't
1461                  * implement the mandatory get_timings function.
1462                  */
1463                 DRM_DEBUG_DRIVER("failed to retrieve SDVO DTD\n");
1464                 pipe_config->quirks |= PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS;
1465         } else {
1466                 if (dtd.part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
1467                         flags |= DRM_MODE_FLAG_PHSYNC;
1468                 else
1469                         flags |= DRM_MODE_FLAG_NHSYNC;
1470
1471                 if (dtd.part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
1472                         flags |= DRM_MODE_FLAG_PVSYNC;
1473                 else
1474                         flags |= DRM_MODE_FLAG_NVSYNC;
1475         }
1476
1477         pipe_config->base.adjusted_mode.flags |= flags;
1478
1479         /*
1480          * pixel multiplier readout is tricky: Only on i915g/gm it is stored in
1481          * the sdvo port register, on all other platforms it is part of the dpll
1482          * state. Since the general pipe state readout happens before the
1483          * encoder->get_config we so already have a valid pixel multplier on all
1484          * other platfroms.
1485          */
1486         if (IS_I915G(dev_priv) || IS_I915GM(dev_priv)) {
1487                 pipe_config->pixel_multiplier =
1488                         ((sdvox & SDVO_PORT_MULTIPLY_MASK)
1489                          >> SDVO_PORT_MULTIPLY_SHIFT) + 1;
1490         }
1491
1492         dotclock = pipe_config->port_clock;
1493
1494         if (pipe_config->pixel_multiplier)
1495                 dotclock /= pipe_config->pixel_multiplier;
1496
1497         pipe_config->base.adjusted_mode.crtc_clock = dotclock;
1498
1499         /* Cross check the port pixel multiplier with the sdvo encoder state. */
1500         if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_CLOCK_RATE_MULT,
1501                                  &val, 1)) {
1502                 switch (val) {
1503                 case SDVO_CLOCK_RATE_MULT_1X:
1504                         encoder_pixel_multiplier = 1;
1505                         break;
1506                 case SDVO_CLOCK_RATE_MULT_2X:
1507                         encoder_pixel_multiplier = 2;
1508                         break;
1509                 case SDVO_CLOCK_RATE_MULT_4X:
1510                         encoder_pixel_multiplier = 4;
1511                         break;
1512                 }
1513         }
1514
1515         if (sdvox & HDMI_COLOR_RANGE_16_235)
1516                 pipe_config->limited_color_range = true;
1517
1518         if (sdvox & SDVO_AUDIO_ENABLE)
1519                 pipe_config->has_audio = true;
1520
1521         if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ENCODE,
1522                                  &val, 1)) {
1523                 if (val == SDVO_ENCODE_HDMI)
1524                         pipe_config->has_hdmi_sink = true;
1525         }
1526
1527         WARN(encoder_pixel_multiplier != pipe_config->pixel_multiplier,
1528              "SDVO pixel multiplier mismatch, port: %i, encoder: %i\n",
1529              pipe_config->pixel_multiplier, encoder_pixel_multiplier);
1530 }
1531
1532 static void intel_disable_sdvo(struct intel_encoder *encoder,
1533                                const struct intel_crtc_state *old_crtc_state,
1534                                const struct drm_connector_state *conn_state)
1535 {
1536         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
1537         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1538         struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc);
1539         u32 temp;
1540
1541         intel_sdvo_set_active_outputs(intel_sdvo, 0);
1542         if (0)
1543                 intel_sdvo_set_encoder_power_state(intel_sdvo,
1544                                                    DRM_MODE_DPMS_OFF);
1545
1546         temp = I915_READ(intel_sdvo->sdvo_reg);
1547
1548         temp &= ~SDVO_ENABLE;
1549         intel_sdvo_write_sdvox(intel_sdvo, temp);
1550
1551         /*
1552          * HW workaround for IBX, we need to move the port
1553          * to transcoder A after disabling it to allow the
1554          * matching DP port to be enabled on transcoder A.
1555          */
1556         if (HAS_PCH_IBX(dev_priv) && crtc->pipe == PIPE_B) {
1557                 /*
1558                  * We get CPU/PCH FIFO underruns on the other pipe when
1559                  * doing the workaround. Sweep them under the rug.
1560                  */
1561                 intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, false);
1562                 intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);
1563
1564                 temp &= ~SDVO_PIPE_SEL_MASK;
1565                 temp |= SDVO_ENABLE | SDVO_PIPE_SEL(PIPE_A);
1566                 intel_sdvo_write_sdvox(intel_sdvo, temp);
1567
1568                 temp &= ~SDVO_ENABLE;
1569                 intel_sdvo_write_sdvox(intel_sdvo, temp);
1570
1571                 intel_wait_for_vblank_if_active(dev_priv, PIPE_A);
1572                 intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, true);
1573                 intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true);
1574         }
1575 }
1576
1577 static void pch_disable_sdvo(struct intel_encoder *encoder,
1578                              const struct intel_crtc_state *old_crtc_state,
1579                              const struct drm_connector_state *old_conn_state)
1580 {
1581 }
1582
1583 static void pch_post_disable_sdvo(struct intel_encoder *encoder,
1584                                   const struct intel_crtc_state *old_crtc_state,
1585                                   const struct drm_connector_state *old_conn_state)
1586 {
1587         intel_disable_sdvo(encoder, old_crtc_state, old_conn_state);
1588 }
1589
1590 static void intel_enable_sdvo(struct intel_encoder *encoder,
1591                               const struct intel_crtc_state *pipe_config,
1592                               const struct drm_connector_state *conn_state)
1593 {
1594         struct drm_device *dev = encoder->base.dev;
1595         struct drm_i915_private *dev_priv = to_i915(dev);
1596         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1597         struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc);
1598         u32 temp;
1599         bool input1, input2;
1600         int i;
1601         bool success;
1602
1603         temp = I915_READ(intel_sdvo->sdvo_reg);
1604         temp |= SDVO_ENABLE;
1605         intel_sdvo_write_sdvox(intel_sdvo, temp);
1606
1607         for (i = 0; i < 2; i++)
1608                 intel_wait_for_vblank(dev_priv, intel_crtc->pipe);
1609
1610         success = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1611         /*
1612          * Warn if the device reported failure to sync.
1613          *
1614          * A lot of SDVO devices fail to notify of sync, but it's
1615          * a given it the status is a success, we succeeded.
1616          */
1617         if (success && !input1) {
1618                 DRM_DEBUG_KMS("First %s output reported failure to "
1619                                 "sync\n", SDVO_NAME(intel_sdvo));
1620         }
1621
1622         if (0)
1623                 intel_sdvo_set_encoder_power_state(intel_sdvo,
1624                                                    DRM_MODE_DPMS_ON);
1625         intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1626 }
1627
1628 static enum drm_mode_status
1629 intel_sdvo_mode_valid(struct drm_connector *connector,
1630                       struct drm_display_mode *mode)
1631 {
1632         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1633         int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
1634
1635         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1636                 return MODE_NO_DBLESCAN;
1637
1638         if (intel_sdvo->pixel_clock_min > mode->clock)
1639                 return MODE_CLOCK_LOW;
1640
1641         if (intel_sdvo->pixel_clock_max < mode->clock)
1642                 return MODE_CLOCK_HIGH;
1643
1644         if (mode->clock > max_dotclk)
1645                 return MODE_CLOCK_HIGH;
1646
1647         if (intel_sdvo->is_lvds) {
1648                 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
1649                         return MODE_PANEL;
1650
1651                 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
1652                         return MODE_PANEL;
1653         }
1654
1655         return MODE_OK;
1656 }
1657
1658 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
1659 {
1660         BUILD_BUG_ON(sizeof(*caps) != 8);
1661         if (!intel_sdvo_get_value(intel_sdvo,
1662                                   SDVO_CMD_GET_DEVICE_CAPS,
1663                                   caps, sizeof(*caps)))
1664                 return false;
1665
1666         DRM_DEBUG_KMS("SDVO capabilities:\n"
1667                       "  vendor_id: %d\n"
1668                       "  device_id: %d\n"
1669                       "  device_rev_id: %d\n"
1670                       "  sdvo_version_major: %d\n"
1671                       "  sdvo_version_minor: %d\n"
1672                       "  sdvo_inputs_mask: %d\n"
1673                       "  smooth_scaling: %d\n"
1674                       "  sharp_scaling: %d\n"
1675                       "  up_scaling: %d\n"
1676                       "  down_scaling: %d\n"
1677                       "  stall_support: %d\n"
1678                       "  output_flags: %d\n",
1679                       caps->vendor_id,
1680                       caps->device_id,
1681                       caps->device_rev_id,
1682                       caps->sdvo_version_major,
1683                       caps->sdvo_version_minor,
1684                       caps->sdvo_inputs_mask,
1685                       caps->smooth_scaling,
1686                       caps->sharp_scaling,
1687                       caps->up_scaling,
1688                       caps->down_scaling,
1689                       caps->stall_support,
1690                       caps->output_flags);
1691
1692         return true;
1693 }
1694
1695 static uint16_t intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo)
1696 {
1697         struct drm_i915_private *dev_priv = to_i915(intel_sdvo->base.base.dev);
1698         uint16_t hotplug;
1699
1700         if (!I915_HAS_HOTPLUG(dev_priv))
1701                 return 0;
1702
1703         /*
1704          * HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
1705          * on the line.
1706          */
1707         if (IS_I945G(dev_priv) || IS_I945GM(dev_priv))
1708                 return 0;
1709
1710         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1711                                         &hotplug, sizeof(hotplug)))
1712                 return 0;
1713
1714         return hotplug;
1715 }
1716
1717 static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
1718 {
1719         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1720
1721         intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG,
1722                              &intel_sdvo->hotplug_active, 2);
1723 }
1724
1725 static bool intel_sdvo_hotplug(struct intel_encoder *encoder,
1726                                struct intel_connector *connector)
1727 {
1728         intel_sdvo_enable_hotplug(encoder);
1729
1730         return intel_encoder_hotplug(encoder, connector);
1731 }
1732
1733 static bool
1734 intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
1735 {
1736         /* Is there more than one type of output? */
1737         return hweight16(intel_sdvo->caps.output_flags) > 1;
1738 }
1739
1740 static struct edid *
1741 intel_sdvo_get_edid(struct drm_connector *connector)
1742 {
1743         struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1744         return drm_get_edid(connector, &sdvo->ddc);
1745 }
1746
1747 /* Mac mini hack -- use the same DDC as the analog connector */
1748 static struct edid *
1749 intel_sdvo_get_analog_edid(struct drm_connector *connector)
1750 {
1751         struct drm_i915_private *dev_priv = to_i915(connector->dev);
1752
1753         return drm_get_edid(connector,
1754                             intel_gmbus_get_adapter(dev_priv,
1755                                                     dev_priv->vbt.crt_ddc_pin));
1756 }
1757
1758 static enum drm_connector_status
1759 intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
1760 {
1761         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1762         enum drm_connector_status status;
1763         struct edid *edid;
1764
1765         edid = intel_sdvo_get_edid(connector);
1766
1767         if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
1768                 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
1769
1770                 /*
1771                  * Don't use the 1 as the argument of DDC bus switch to get
1772                  * the EDID. It is used for SDVO SPD ROM.
1773                  */
1774                 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1775                         intel_sdvo->ddc_bus = ddc;
1776                         edid = intel_sdvo_get_edid(connector);
1777                         if (edid)
1778                                 break;
1779                 }
1780                 /*
1781                  * If we found the EDID on the other bus,
1782                  * assume that is the correct DDC bus.
1783                  */
1784                 if (edid == NULL)
1785                         intel_sdvo->ddc_bus = saved_ddc;
1786         }
1787
1788         /*
1789          * When there is no edid and no monitor is connected with VGA
1790          * port, try to use the CRT ddc to read the EDID for DVI-connector.
1791          */
1792         if (edid == NULL)
1793                 edid = intel_sdvo_get_analog_edid(connector);
1794
1795         status = connector_status_unknown;
1796         if (edid != NULL) {
1797                 /* DDC bus is shared, match EDID to connector type */
1798                 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1799                         status = connector_status_connected;
1800                         if (intel_sdvo->is_hdmi) {
1801                                 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1802                                 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1803                                 intel_sdvo->rgb_quant_range_selectable =
1804                                         drm_rgb_quant_range_selectable(edid);
1805                         }
1806                 } else
1807                         status = connector_status_disconnected;
1808                 kfree(edid);
1809         }
1810
1811         return status;
1812 }
1813
1814 static bool
1815 intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
1816                                   struct edid *edid)
1817 {
1818         bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1819         bool connector_is_digital = !!IS_DIGITAL(sdvo);
1820
1821         DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
1822                       connector_is_digital, monitor_is_digital);
1823         return connector_is_digital == monitor_is_digital;
1824 }
1825
1826 static enum drm_connector_status
1827 intel_sdvo_detect(struct drm_connector *connector, bool force)
1828 {
1829         uint16_t response;
1830         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1831         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1832         enum drm_connector_status ret;
1833
1834         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1835                       connector->base.id, connector->name);
1836
1837         if (!intel_sdvo_get_value(intel_sdvo,
1838                                   SDVO_CMD_GET_ATTACHED_DISPLAYS,
1839                                   &response, 2))
1840                 return connector_status_unknown;
1841
1842         DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1843                       response & 0xff, response >> 8,
1844                       intel_sdvo_connector->output_flag);
1845
1846         if (response == 0)
1847                 return connector_status_disconnected;
1848
1849         intel_sdvo->attached_output = response;
1850
1851         intel_sdvo->has_hdmi_monitor = false;
1852         intel_sdvo->has_hdmi_audio = false;
1853         intel_sdvo->rgb_quant_range_selectable = false;
1854
1855         if ((intel_sdvo_connector->output_flag & response) == 0)
1856                 ret = connector_status_disconnected;
1857         else if (IS_TMDS(intel_sdvo_connector))
1858                 ret = intel_sdvo_tmds_sink_detect(connector);
1859         else {
1860                 struct edid *edid;
1861
1862                 /* if we have an edid check it matches the connection */
1863                 edid = intel_sdvo_get_edid(connector);
1864                 if (edid == NULL)
1865                         edid = intel_sdvo_get_analog_edid(connector);
1866                 if (edid != NULL) {
1867                         if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
1868                                                               edid))
1869                                 ret = connector_status_connected;
1870                         else
1871                                 ret = connector_status_disconnected;
1872
1873                         kfree(edid);
1874                 } else
1875                         ret = connector_status_connected;
1876         }
1877
1878         /* May update encoder flag for like clock for SDVO TV, etc.*/
1879         if (ret == connector_status_connected) {
1880                 intel_sdvo->is_tv = false;
1881                 intel_sdvo->is_lvds = false;
1882
1883                 if (response & SDVO_TV_MASK)
1884                         intel_sdvo->is_tv = true;
1885                 if (response & SDVO_LVDS_MASK)
1886                         intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
1887         }
1888
1889         return ret;
1890 }
1891
1892 static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1893 {
1894         struct edid *edid;
1895
1896         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1897                       connector->base.id, connector->name);
1898
1899         /* set the bus switch and get the modes */
1900         edid = intel_sdvo_get_edid(connector);
1901
1902         /*
1903          * Mac mini hack.  On this device, the DVI-I connector shares one DDC
1904          * link between analog and digital outputs. So, if the regular SDVO
1905          * DDC fails, check to see if the analog output is disconnected, in
1906          * which case we'll look there for the digital DDC data.
1907          */
1908         if (edid == NULL)
1909                 edid = intel_sdvo_get_analog_edid(connector);
1910
1911         if (edid != NULL) {
1912                 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
1913                                                       edid)) {
1914                         drm_connector_update_edid_property(connector, edid);
1915                         drm_add_edid_modes(connector, edid);
1916                 }
1917
1918                 kfree(edid);
1919         }
1920 }
1921
1922 /*
1923  * Set of SDVO TV modes.
1924  * Note!  This is in reply order (see loop in get_tv_modes).
1925  * XXX: all 60Hz refresh?
1926  */
1927 static const struct drm_display_mode sdvo_tv_modes[] = {
1928         { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1929                    416, 0, 200, 201, 232, 233, 0,
1930                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1931         { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1932                    416, 0, 240, 241, 272, 273, 0,
1933                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1934         { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1935                    496, 0, 300, 301, 332, 333, 0,
1936                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1937         { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1938                    736, 0, 350, 351, 382, 383, 0,
1939                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1940         { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1941                    736, 0, 400, 401, 432, 433, 0,
1942                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1943         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1944                    736, 0, 480, 481, 512, 513, 0,
1945                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1946         { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1947                    800, 0, 480, 481, 512, 513, 0,
1948                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1949         { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1950                    800, 0, 576, 577, 608, 609, 0,
1951                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1952         { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1953                    816, 0, 350, 351, 382, 383, 0,
1954                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1955         { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1956                    816, 0, 400, 401, 432, 433, 0,
1957                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1958         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1959                    816, 0, 480, 481, 512, 513, 0,
1960                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1961         { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1962                    816, 0, 540, 541, 572, 573, 0,
1963                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1964         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1965                    816, 0, 576, 577, 608, 609, 0,
1966                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1967         { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1968                    864, 0, 576, 577, 608, 609, 0,
1969                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1970         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1971                    896, 0, 600, 601, 632, 633, 0,
1972                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1973         { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1974                    928, 0, 624, 625, 656, 657, 0,
1975                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1976         { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1977                    1016, 0, 766, 767, 798, 799, 0,
1978                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1979         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1980                    1120, 0, 768, 769, 800, 801, 0,
1981                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1982         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1983                    1376, 0, 1024, 1025, 1056, 1057, 0,
1984                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1985 };
1986
1987 static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1988 {
1989         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1990         const struct drm_connector_state *conn_state = connector->state;
1991         struct intel_sdvo_sdtv_resolution_request tv_res;
1992         uint32_t reply = 0, format_map = 0;
1993         int i;
1994
1995         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1996                       connector->base.id, connector->name);
1997
1998         /*
1999          * Read the list of supported input resolutions for the selected TV
2000          * format.
2001          */
2002         format_map = 1 << conn_state->tv.mode;
2003         memcpy(&tv_res, &format_map,
2004                min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
2005
2006         if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
2007                 return;
2008
2009         BUILD_BUG_ON(sizeof(tv_res) != 3);
2010         if (!intel_sdvo_write_cmd(intel_sdvo,
2011                                   SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
2012                                   &tv_res, sizeof(tv_res)))
2013                 return;
2014         if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
2015                 return;
2016
2017         for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
2018                 if (reply & (1 << i)) {
2019                         struct drm_display_mode *nmode;
2020                         nmode = drm_mode_duplicate(connector->dev,
2021                                                    &sdvo_tv_modes[i]);
2022                         if (nmode)
2023                                 drm_mode_probed_add(connector, nmode);
2024                 }
2025 }
2026
2027 static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
2028 {
2029         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
2030         struct drm_i915_private *dev_priv = to_i915(connector->dev);
2031         struct drm_display_mode *newmode;
2032
2033         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
2034                       connector->base.id, connector->name);
2035
2036         /*
2037          * Fetch modes from VBT. For SDVO prefer the VBT mode since some
2038          * SDVO->LVDS transcoders can't cope with the EDID mode.
2039          */
2040         if (dev_priv->vbt.sdvo_lvds_vbt_mode != NULL) {
2041                 newmode = drm_mode_duplicate(connector->dev,
2042                                              dev_priv->vbt.sdvo_lvds_vbt_mode);
2043                 if (newmode != NULL) {
2044                         /* Guarantee the mode is preferred */
2045                         newmode->type = (DRM_MODE_TYPE_PREFERRED |
2046                                          DRM_MODE_TYPE_DRIVER);
2047                         drm_mode_probed_add(connector, newmode);
2048                 }
2049         }
2050
2051         /*
2052          * Attempt to get the mode list from DDC.
2053          * Assume that the preferred modes are
2054          * arranged in priority order.
2055          */
2056         intel_ddc_get_modes(connector, &intel_sdvo->ddc);
2057
2058         list_for_each_entry(newmode, &connector->probed_modes, head) {
2059                 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
2060                         intel_sdvo->sdvo_lvds_fixed_mode =
2061                                 drm_mode_duplicate(connector->dev, newmode);
2062
2063                         intel_sdvo->is_lvds = true;
2064                         break;
2065                 }
2066         }
2067 }
2068
2069 static int intel_sdvo_get_modes(struct drm_connector *connector)
2070 {
2071         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2072
2073         if (IS_TV(intel_sdvo_connector))
2074                 intel_sdvo_get_tv_modes(connector);
2075         else if (IS_LVDS(intel_sdvo_connector))
2076                 intel_sdvo_get_lvds_modes(connector);
2077         else
2078                 intel_sdvo_get_ddc_modes(connector);
2079
2080         return !list_empty(&connector->probed_modes);
2081 }
2082
2083 static void intel_sdvo_destroy(struct drm_connector *connector)
2084 {
2085         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2086
2087         drm_connector_cleanup(connector);
2088         kfree(intel_sdvo_connector);
2089 }
2090
2091 static int
2092 intel_sdvo_connector_atomic_get_property(struct drm_connector *connector,
2093                                          const struct drm_connector_state *state,
2094                                          struct drm_property *property,
2095                                          uint64_t *val)
2096 {
2097         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2098         const struct intel_sdvo_connector_state *sdvo_state = to_intel_sdvo_connector_state((void *)state);
2099
2100         if (property == intel_sdvo_connector->tv_format) {
2101                 int i;
2102
2103                 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2104                         if (state->tv.mode == intel_sdvo_connector->tv_format_supported[i]) {
2105                                 *val = i;
2106
2107                                 return 0;
2108                         }
2109
2110                 WARN_ON(1);
2111                 *val = 0;
2112         } else if (property == intel_sdvo_connector->top ||
2113                    property == intel_sdvo_connector->bottom)
2114                 *val = intel_sdvo_connector->max_vscan - sdvo_state->tv.overscan_v;
2115         else if (property == intel_sdvo_connector->left ||
2116                  property == intel_sdvo_connector->right)
2117                 *val = intel_sdvo_connector->max_hscan - sdvo_state->tv.overscan_h;
2118         else if (property == intel_sdvo_connector->hpos)
2119                 *val = sdvo_state->tv.hpos;
2120         else if (property == intel_sdvo_connector->vpos)
2121                 *val = sdvo_state->tv.vpos;
2122         else if (property == intel_sdvo_connector->saturation)
2123                 *val = state->tv.saturation;
2124         else if (property == intel_sdvo_connector->contrast)
2125                 *val = state->tv.contrast;
2126         else if (property == intel_sdvo_connector->hue)
2127                 *val = state->tv.hue;
2128         else if (property == intel_sdvo_connector->brightness)
2129                 *val = state->tv.brightness;
2130         else if (property == intel_sdvo_connector->sharpness)
2131                 *val = sdvo_state->tv.sharpness;
2132         else if (property == intel_sdvo_connector->flicker_filter)
2133                 *val = sdvo_state->tv.flicker_filter;
2134         else if (property == intel_sdvo_connector->flicker_filter_2d)
2135                 *val = sdvo_state->tv.flicker_filter_2d;
2136         else if (property == intel_sdvo_connector->flicker_filter_adaptive)
2137                 *val = sdvo_state->tv.flicker_filter_adaptive;
2138         else if (property == intel_sdvo_connector->tv_chroma_filter)
2139                 *val = sdvo_state->tv.chroma_filter;
2140         else if (property == intel_sdvo_connector->tv_luma_filter)
2141                 *val = sdvo_state->tv.luma_filter;
2142         else if (property == intel_sdvo_connector->dot_crawl)
2143                 *val = sdvo_state->tv.dot_crawl;
2144         else
2145                 return intel_digital_connector_atomic_get_property(connector, state, property, val);
2146
2147         return 0;
2148 }
2149
2150 static int
2151 intel_sdvo_connector_atomic_set_property(struct drm_connector *connector,
2152                                          struct drm_connector_state *state,
2153                                          struct drm_property *property,
2154                                          uint64_t val)
2155 {
2156         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2157         struct intel_sdvo_connector_state *sdvo_state = to_intel_sdvo_connector_state(state);
2158
2159         if (property == intel_sdvo_connector->tv_format) {
2160                 state->tv.mode = intel_sdvo_connector->tv_format_supported[val];
2161
2162                 if (state->crtc) {
2163                         struct drm_crtc_state *crtc_state =
2164                                 drm_atomic_get_new_crtc_state(state->state, state->crtc);
2165
2166                         crtc_state->connectors_changed = true;
2167                 }
2168         } else if (property == intel_sdvo_connector->top ||
2169                    property == intel_sdvo_connector->bottom)
2170                 /* Cannot set these independent from each other */
2171                 sdvo_state->tv.overscan_v = intel_sdvo_connector->max_vscan - val;
2172         else if (property == intel_sdvo_connector->left ||
2173                  property == intel_sdvo_connector->right)
2174                 /* Cannot set these independent from each other */
2175                 sdvo_state->tv.overscan_h = intel_sdvo_connector->max_hscan - val;
2176         else if (property == intel_sdvo_connector->hpos)
2177                 sdvo_state->tv.hpos = val;
2178         else if (property == intel_sdvo_connector->vpos)
2179                 sdvo_state->tv.vpos = val;
2180         else if (property == intel_sdvo_connector->saturation)
2181                 state->tv.saturation = val;
2182         else if (property == intel_sdvo_connector->contrast)
2183                 state->tv.contrast = val;
2184         else if (property == intel_sdvo_connector->hue)
2185                 state->tv.hue = val;
2186         else if (property == intel_sdvo_connector->brightness)
2187                 state->tv.brightness = val;
2188         else if (property == intel_sdvo_connector->sharpness)
2189                 sdvo_state->tv.sharpness = val;
2190         else if (property == intel_sdvo_connector->flicker_filter)
2191                 sdvo_state->tv.flicker_filter = val;
2192         else if (property == intel_sdvo_connector->flicker_filter_2d)
2193                 sdvo_state->tv.flicker_filter_2d = val;
2194         else if (property == intel_sdvo_connector->flicker_filter_adaptive)
2195                 sdvo_state->tv.flicker_filter_adaptive = val;
2196         else if (property == intel_sdvo_connector->tv_chroma_filter)
2197                 sdvo_state->tv.chroma_filter = val;
2198         else if (property == intel_sdvo_connector->tv_luma_filter)
2199                 sdvo_state->tv.luma_filter = val;
2200         else if (property == intel_sdvo_connector->dot_crawl)
2201                 sdvo_state->tv.dot_crawl = val;
2202         else
2203                 return intel_digital_connector_atomic_set_property(connector, state, property, val);
2204
2205         return 0;
2206 }
2207
2208 static int
2209 intel_sdvo_connector_register(struct drm_connector *connector)
2210 {
2211         struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
2212         int ret;
2213
2214         ret = intel_connector_register(connector);
2215         if (ret)
2216                 return ret;
2217
2218         return sysfs_create_link(&connector->kdev->kobj,
2219                                  &sdvo->ddc.dev.kobj,
2220                                  sdvo->ddc.dev.kobj.name);
2221 }
2222
2223 static void
2224 intel_sdvo_connector_unregister(struct drm_connector *connector)
2225 {
2226         struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
2227
2228         sysfs_remove_link(&connector->kdev->kobj,
2229                           sdvo->ddc.dev.kobj.name);
2230         intel_connector_unregister(connector);
2231 }
2232
2233 static struct drm_connector_state *
2234 intel_sdvo_connector_duplicate_state(struct drm_connector *connector)
2235 {
2236         struct intel_sdvo_connector_state *state;
2237
2238         state = kmemdup(connector->state, sizeof(*state), GFP_KERNEL);
2239         if (!state)
2240                 return NULL;
2241
2242         __drm_atomic_helper_connector_duplicate_state(connector, &state->base.base);
2243         return &state->base.base;
2244 }
2245
2246 static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
2247         .detect = intel_sdvo_detect,
2248         .fill_modes = drm_helper_probe_single_connector_modes,
2249         .atomic_get_property = intel_sdvo_connector_atomic_get_property,
2250         .atomic_set_property = intel_sdvo_connector_atomic_set_property,
2251         .late_register = intel_sdvo_connector_register,
2252         .early_unregister = intel_sdvo_connector_unregister,
2253         .destroy = intel_sdvo_destroy,
2254         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
2255         .atomic_duplicate_state = intel_sdvo_connector_duplicate_state,
2256 };
2257
2258 static int intel_sdvo_atomic_check(struct drm_connector *conn,
2259                                    struct drm_connector_state *new_conn_state)
2260 {
2261         struct drm_atomic_state *state = new_conn_state->state;
2262         struct drm_connector_state *old_conn_state =
2263                 drm_atomic_get_old_connector_state(state, conn);
2264         struct intel_sdvo_connector_state *old_state =
2265                 to_intel_sdvo_connector_state(old_conn_state);
2266         struct intel_sdvo_connector_state *new_state =
2267                 to_intel_sdvo_connector_state(new_conn_state);
2268
2269         if (new_conn_state->crtc &&
2270             (memcmp(&old_state->tv, &new_state->tv, sizeof(old_state->tv)) ||
2271              memcmp(&old_conn_state->tv, &new_conn_state->tv, sizeof(old_conn_state->tv)))) {
2272                 struct drm_crtc_state *crtc_state =
2273                         drm_atomic_get_new_crtc_state(new_conn_state->state,
2274                                                       new_conn_state->crtc);
2275
2276                 crtc_state->connectors_changed = true;
2277         }
2278
2279         return intel_digital_connector_atomic_check(conn, new_conn_state);
2280 }
2281
2282 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
2283         .get_modes = intel_sdvo_get_modes,
2284         .mode_valid = intel_sdvo_mode_valid,
2285         .atomic_check = intel_sdvo_atomic_check,
2286 };
2287
2288 static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
2289 {
2290         struct intel_sdvo *intel_sdvo = to_sdvo(to_intel_encoder(encoder));
2291
2292         if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
2293                 drm_mode_destroy(encoder->dev,
2294                                  intel_sdvo->sdvo_lvds_fixed_mode);
2295
2296         i2c_del_adapter(&intel_sdvo->ddc);
2297         intel_encoder_destroy(encoder);
2298 }
2299
2300 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
2301         .destroy = intel_sdvo_enc_destroy,
2302 };
2303
2304 static void
2305 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
2306 {
2307         uint16_t mask = 0;
2308         unsigned int num_bits;
2309
2310         /*
2311          * Make a mask of outputs less than or equal to our own priority in the
2312          * list.
2313          */
2314         switch (sdvo->controlled_output) {
2315         case SDVO_OUTPUT_LVDS1:
2316                 mask |= SDVO_OUTPUT_LVDS1;
2317                 /* fall through */
2318         case SDVO_OUTPUT_LVDS0:
2319                 mask |= SDVO_OUTPUT_LVDS0;
2320                 /* fall through */
2321         case SDVO_OUTPUT_TMDS1:
2322                 mask |= SDVO_OUTPUT_TMDS1;
2323                 /* fall through */
2324         case SDVO_OUTPUT_TMDS0:
2325                 mask |= SDVO_OUTPUT_TMDS0;
2326                 /* fall through */
2327         case SDVO_OUTPUT_RGB1:
2328                 mask |= SDVO_OUTPUT_RGB1;
2329                 /* fall through */
2330         case SDVO_OUTPUT_RGB0:
2331                 mask |= SDVO_OUTPUT_RGB0;
2332                 break;
2333         }
2334
2335         /* Count bits to find what number we are in the priority list. */
2336         mask &= sdvo->caps.output_flags;
2337         num_bits = hweight16(mask);
2338         /* If more than 3 outputs, default to DDC bus 3 for now. */
2339         if (num_bits > 3)
2340                 num_bits = 3;
2341
2342         /* Corresponds to SDVO_CONTROL_BUS_DDCx */
2343         sdvo->ddc_bus = 1 << num_bits;
2344 }
2345
2346 /*
2347  * Choose the appropriate DDC bus for control bus switch command for this
2348  * SDVO output based on the controlled output.
2349  *
2350  * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
2351  * outputs, then LVDS outputs.
2352  */
2353 static void
2354 intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
2355                           struct intel_sdvo *sdvo)
2356 {
2357         struct sdvo_device_mapping *mapping;
2358
2359         if (sdvo->port == PORT_B)
2360                 mapping = &dev_priv->vbt.sdvo_mappings[0];
2361         else
2362                 mapping = &dev_priv->vbt.sdvo_mappings[1];
2363
2364         if (mapping->initialized)
2365                 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
2366         else
2367                 intel_sdvo_guess_ddc_bus(sdvo);
2368 }
2369
2370 static void
2371 intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
2372                           struct intel_sdvo *sdvo)
2373 {
2374         struct sdvo_device_mapping *mapping;
2375         u8 pin;
2376
2377         if (sdvo->port == PORT_B)
2378                 mapping = &dev_priv->vbt.sdvo_mappings[0];
2379         else
2380                 mapping = &dev_priv->vbt.sdvo_mappings[1];
2381
2382         if (mapping->initialized &&
2383             intel_gmbus_is_valid_pin(dev_priv, mapping->i2c_pin))
2384                 pin = mapping->i2c_pin;
2385         else
2386                 pin = GMBUS_PIN_DPB;
2387
2388         sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin);
2389
2390         /*
2391          * With gmbus we should be able to drive sdvo i2c at 2MHz, but somehow
2392          * our code totally fails once we start using gmbus. Hence fall back to
2393          * bit banging for now.
2394          */
2395         intel_gmbus_force_bit(sdvo->i2c, true);
2396 }
2397
2398 /* undo any changes intel_sdvo_select_i2c_bus() did to sdvo->i2c */
2399 static void
2400 intel_sdvo_unselect_i2c_bus(struct intel_sdvo *sdvo)
2401 {
2402         intel_gmbus_force_bit(sdvo->i2c, false);
2403 }
2404
2405 static bool
2406 intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
2407 {
2408         return intel_sdvo_check_supp_encode(intel_sdvo);
2409 }
2410
2411 static u8
2412 intel_sdvo_get_slave_addr(struct drm_i915_private *dev_priv,
2413                           struct intel_sdvo *sdvo)
2414 {
2415         struct sdvo_device_mapping *my_mapping, *other_mapping;
2416
2417         if (sdvo->port == PORT_B) {
2418                 my_mapping = &dev_priv->vbt.sdvo_mappings[0];
2419                 other_mapping = &dev_priv->vbt.sdvo_mappings[1];
2420         } else {
2421                 my_mapping = &dev_priv->vbt.sdvo_mappings[1];
2422                 other_mapping = &dev_priv->vbt.sdvo_mappings[0];
2423         }
2424
2425         /* If the BIOS described our SDVO device, take advantage of it. */
2426         if (my_mapping->slave_addr)
2427                 return my_mapping->slave_addr;
2428
2429         /*
2430          * If the BIOS only described a different SDVO device, use the
2431          * address that it isn't using.
2432          */
2433         if (other_mapping->slave_addr) {
2434                 if (other_mapping->slave_addr == 0x70)
2435                         return 0x72;
2436                 else
2437                         return 0x70;
2438         }
2439
2440         /*
2441          * No SDVO device info is found for another DVO port,
2442          * so use mapping assumption we had before BIOS parsing.
2443          */
2444         if (sdvo->port == PORT_B)
2445                 return 0x70;
2446         else
2447                 return 0x72;
2448 }
2449
2450 static int
2451 intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
2452                           struct intel_sdvo *encoder)
2453 {
2454         struct drm_connector *drm_connector;
2455         int ret;
2456
2457         drm_connector = &connector->base.base;
2458         ret = drm_connector_init(encoder->base.base.dev,
2459                            drm_connector,
2460                            &intel_sdvo_connector_funcs,
2461                            connector->base.base.connector_type);
2462         if (ret < 0)
2463                 return ret;
2464
2465         drm_connector_helper_add(drm_connector,
2466                                  &intel_sdvo_connector_helper_funcs);
2467
2468         connector->base.base.interlace_allowed = 1;
2469         connector->base.base.doublescan_allowed = 0;
2470         connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
2471         connector->base.get_hw_state = intel_sdvo_connector_get_hw_state;
2472
2473         intel_connector_attach_encoder(&connector->base, &encoder->base);
2474
2475         return 0;
2476 }
2477
2478 static void
2479 intel_sdvo_add_hdmi_properties(struct intel_sdvo *intel_sdvo,
2480                                struct intel_sdvo_connector *connector)
2481 {
2482         struct drm_i915_private *dev_priv = to_i915(connector->base.base.dev);
2483
2484         intel_attach_force_audio_property(&connector->base.base);
2485         if (INTEL_GEN(dev_priv) >= 4 && IS_MOBILE(dev_priv)) {
2486                 intel_attach_broadcast_rgb_property(&connector->base.base);
2487         }
2488         intel_attach_aspect_ratio_property(&connector->base.base);
2489         connector->base.base.state->picture_aspect_ratio = HDMI_PICTURE_ASPECT_NONE;
2490 }
2491
2492 static struct intel_sdvo_connector *intel_sdvo_connector_alloc(void)
2493 {
2494         struct intel_sdvo_connector *sdvo_connector;
2495         struct intel_sdvo_connector_state *conn_state;
2496
2497         sdvo_connector = kzalloc(sizeof(*sdvo_connector), GFP_KERNEL);
2498         if (!sdvo_connector)
2499                 return NULL;
2500
2501         conn_state = kzalloc(sizeof(*conn_state), GFP_KERNEL);
2502         if (!conn_state) {
2503                 kfree(sdvo_connector);
2504                 return NULL;
2505         }
2506
2507         __drm_atomic_helper_connector_reset(&sdvo_connector->base.base,
2508                                             &conn_state->base.base);
2509
2510         return sdvo_connector;
2511 }
2512
2513 static bool
2514 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
2515 {
2516         struct drm_encoder *encoder = &intel_sdvo->base.base;
2517         struct drm_i915_private *dev_priv = to_i915(encoder->dev);
2518         struct drm_connector *connector;
2519         struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
2520         struct intel_connector *intel_connector;
2521         struct intel_sdvo_connector *intel_sdvo_connector;
2522
2523         DRM_DEBUG_KMS("initialising DVI device %d\n", device);
2524
2525         intel_sdvo_connector = intel_sdvo_connector_alloc();
2526         if (!intel_sdvo_connector)
2527                 return false;
2528
2529         if (device == 0) {
2530                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
2531                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
2532         } else if (device == 1) {
2533                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
2534                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
2535         }
2536
2537         intel_connector = &intel_sdvo_connector->base;
2538         connector = &intel_connector->base;
2539         if (intel_sdvo_get_hotplug_support(intel_sdvo) &
2540                 intel_sdvo_connector->output_flag) {
2541                 intel_sdvo->hotplug_active |= intel_sdvo_connector->output_flag;
2542                 /*
2543                  * Some SDVO devices have one-shot hotplug interrupts.
2544                  * Ensure that they get re-enabled when an interrupt happens.
2545                  */
2546                 intel_encoder->hotplug = intel_sdvo_hotplug;
2547                 intel_sdvo_enable_hotplug(intel_encoder);
2548         } else {
2549                 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2550         }
2551         encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2552         connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2553
2554         /* gen3 doesn't do the hdmi bits in the SDVO register */
2555         if (INTEL_GEN(dev_priv) >= 4 &&
2556             intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
2557                 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2558                 intel_sdvo->is_hdmi = true;
2559         }
2560
2561         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2562                 kfree(intel_sdvo_connector);
2563                 return false;
2564         }
2565
2566         if (intel_sdvo->is_hdmi)
2567                 intel_sdvo_add_hdmi_properties(intel_sdvo, intel_sdvo_connector);
2568
2569         return true;
2570 }
2571
2572 static bool
2573 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
2574 {
2575         struct drm_encoder *encoder = &intel_sdvo->base.base;
2576         struct drm_connector *connector;
2577         struct intel_connector *intel_connector;
2578         struct intel_sdvo_connector *intel_sdvo_connector;
2579
2580         DRM_DEBUG_KMS("initialising TV type %d\n", type);
2581
2582         intel_sdvo_connector = intel_sdvo_connector_alloc();
2583         if (!intel_sdvo_connector)
2584                 return false;
2585
2586         intel_connector = &intel_sdvo_connector->base;
2587         connector = &intel_connector->base;
2588         encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2589         connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2590
2591         intel_sdvo->controlled_output |= type;
2592         intel_sdvo_connector->output_flag = type;
2593
2594         intel_sdvo->is_tv = true;
2595
2596         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2597                 kfree(intel_sdvo_connector);
2598                 return false;
2599         }
2600
2601         if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2602                 goto err;
2603
2604         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2605                 goto err;
2606
2607         return true;
2608
2609 err:
2610         intel_sdvo_destroy(connector);
2611         return false;
2612 }
2613
2614 static bool
2615 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
2616 {
2617         struct drm_encoder *encoder = &intel_sdvo->base.base;
2618         struct drm_connector *connector;
2619         struct intel_connector *intel_connector;
2620         struct intel_sdvo_connector *intel_sdvo_connector;
2621
2622         DRM_DEBUG_KMS("initialising analog device %d\n", device);
2623
2624         intel_sdvo_connector = intel_sdvo_connector_alloc();
2625         if (!intel_sdvo_connector)
2626                 return false;
2627
2628         intel_connector = &intel_sdvo_connector->base;
2629         connector = &intel_connector->base;
2630         intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2631         encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2632         connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2633
2634         if (device == 0) {
2635                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2636                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2637         } else if (device == 1) {
2638                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2639                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2640         }
2641
2642         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2643                 kfree(intel_sdvo_connector);
2644                 return false;
2645         }
2646
2647         return true;
2648 }
2649
2650 static bool
2651 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2652 {
2653         struct drm_encoder *encoder = &intel_sdvo->base.base;
2654         struct drm_connector *connector;
2655         struct intel_connector *intel_connector;
2656         struct intel_sdvo_connector *intel_sdvo_connector;
2657
2658         DRM_DEBUG_KMS("initialising LVDS device %d\n", device);
2659
2660         intel_sdvo_connector = intel_sdvo_connector_alloc();
2661         if (!intel_sdvo_connector)
2662                 return false;
2663
2664         intel_connector = &intel_sdvo_connector->base;
2665         connector = &intel_connector->base;
2666         encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2667         connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2668
2669         if (device == 0) {
2670                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2671                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2672         } else if (device == 1) {
2673                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2674                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2675         }
2676
2677         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2678                 kfree(intel_sdvo_connector);
2679                 return false;
2680         }
2681
2682         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2683                 goto err;
2684
2685         return true;
2686
2687 err:
2688         intel_sdvo_destroy(connector);
2689         return false;
2690 }
2691
2692 static bool
2693 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
2694 {
2695         intel_sdvo->is_tv = false;
2696         intel_sdvo->is_lvds = false;
2697
2698         /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2699
2700         if (flags & SDVO_OUTPUT_TMDS0)
2701                 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
2702                         return false;
2703
2704         if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2705                 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
2706                         return false;
2707
2708         /* TV has no XXX1 function block */
2709         if (flags & SDVO_OUTPUT_SVID0)
2710                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
2711                         return false;
2712
2713         if (flags & SDVO_OUTPUT_CVBS0)
2714                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
2715                         return false;
2716
2717         if (flags & SDVO_OUTPUT_YPRPB0)
2718                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0))
2719                         return false;
2720
2721         if (flags & SDVO_OUTPUT_RGB0)
2722                 if (!intel_sdvo_analog_init(intel_sdvo, 0))
2723                         return false;
2724
2725         if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2726                 if (!intel_sdvo_analog_init(intel_sdvo, 1))
2727                         return false;
2728
2729         if (flags & SDVO_OUTPUT_LVDS0)
2730                 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
2731                         return false;
2732
2733         if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2734                 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
2735                         return false;
2736
2737         if ((flags & SDVO_OUTPUT_MASK) == 0) {
2738                 unsigned char bytes[2];
2739
2740                 intel_sdvo->controlled_output = 0;
2741                 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
2742                 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2743                               SDVO_NAME(intel_sdvo),
2744                               bytes[0], bytes[1]);
2745                 return false;
2746         }
2747         intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
2748
2749         return true;
2750 }
2751
2752 static void intel_sdvo_output_cleanup(struct intel_sdvo *intel_sdvo)
2753 {
2754         struct drm_device *dev = intel_sdvo->base.base.dev;
2755         struct drm_connector *connector, *tmp;
2756
2757         list_for_each_entry_safe(connector, tmp,
2758                                  &dev->mode_config.connector_list, head) {
2759                 if (intel_attached_encoder(connector) == &intel_sdvo->base) {
2760                         drm_connector_unregister(connector);
2761                         intel_sdvo_destroy(connector);
2762                 }
2763         }
2764 }
2765
2766 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2767                                           struct intel_sdvo_connector *intel_sdvo_connector,
2768                                           int type)
2769 {
2770         struct drm_device *dev = intel_sdvo->base.base.dev;
2771         struct intel_sdvo_tv_format format;
2772         uint32_t format_map, i;
2773
2774         if (!intel_sdvo_set_target_output(intel_sdvo, type))
2775                 return false;
2776
2777         BUILD_BUG_ON(sizeof(format) != 6);
2778         if (!intel_sdvo_get_value(intel_sdvo,
2779                                   SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2780                                   &format, sizeof(format)))
2781                 return false;
2782
2783         memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
2784
2785         if (format_map == 0)
2786                 return false;
2787
2788         intel_sdvo_connector->format_supported_num = 0;
2789         for (i = 0 ; i < TV_FORMAT_NUM; i++)
2790                 if (format_map & (1 << i))
2791                         intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
2792
2793
2794         intel_sdvo_connector->tv_format =
2795                         drm_property_create(dev, DRM_MODE_PROP_ENUM,
2796                                             "mode", intel_sdvo_connector->format_supported_num);
2797         if (!intel_sdvo_connector->tv_format)
2798                 return false;
2799
2800         for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2801                 drm_property_add_enum(intel_sdvo_connector->tv_format, i,
2802                                       tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
2803
2804         intel_sdvo_connector->base.base.state->tv.mode = intel_sdvo_connector->tv_format_supported[0];
2805         drm_object_attach_property(&intel_sdvo_connector->base.base.base,
2806                                    intel_sdvo_connector->tv_format, 0);
2807         return true;
2808
2809 }
2810
2811 #define _ENHANCEMENT(state_assignment, name, NAME) do { \
2812         if (enhancements.name) { \
2813                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2814                     !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2815                         return false; \
2816                 intel_sdvo_connector->name = \
2817                         drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
2818                 if (!intel_sdvo_connector->name) return false; \
2819                 state_assignment = response; \
2820                 drm_object_attach_property(&connector->base, \
2821                                            intel_sdvo_connector->name, 0); \
2822                 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2823                               data_value[0], data_value[1], response); \
2824         } \
2825 } while (0)
2826
2827 #define ENHANCEMENT(state, name, NAME) _ENHANCEMENT((state)->name, name, NAME)
2828
2829 static bool
2830 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2831                                       struct intel_sdvo_connector *intel_sdvo_connector,
2832                                       struct intel_sdvo_enhancements_reply enhancements)
2833 {
2834         struct drm_device *dev = intel_sdvo->base.base.dev;
2835         struct drm_connector *connector = &intel_sdvo_connector->base.base;
2836         struct drm_connector_state *conn_state = connector->state;
2837         struct intel_sdvo_connector_state *sdvo_state =
2838                 to_intel_sdvo_connector_state(conn_state);
2839         uint16_t response, data_value[2];
2840
2841         /* when horizontal overscan is supported, Add the left/right property */
2842         if (enhancements.overscan_h) {
2843                 if (!intel_sdvo_get_value(intel_sdvo,
2844                                           SDVO_CMD_GET_MAX_OVERSCAN_H,
2845                                           &data_value, 4))
2846                         return false;
2847
2848                 if (!intel_sdvo_get_value(intel_sdvo,
2849                                           SDVO_CMD_GET_OVERSCAN_H,
2850                                           &response, 2))
2851                         return false;
2852
2853                 sdvo_state->tv.overscan_h = response;
2854
2855                 intel_sdvo_connector->max_hscan = data_value[0];
2856                 intel_sdvo_connector->left =
2857                         drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
2858                 if (!intel_sdvo_connector->left)
2859                         return false;
2860
2861                 drm_object_attach_property(&connector->base,
2862                                            intel_sdvo_connector->left, 0);
2863
2864                 intel_sdvo_connector->right =
2865                         drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
2866                 if (!intel_sdvo_connector->right)
2867                         return false;
2868
2869                 drm_object_attach_property(&connector->base,
2870                                               intel_sdvo_connector->right, 0);
2871                 DRM_DEBUG_KMS("h_overscan: max %d, "
2872                               "default %d, current %d\n",
2873                               data_value[0], data_value[1], response);
2874         }
2875
2876         if (enhancements.overscan_v) {
2877                 if (!intel_sdvo_get_value(intel_sdvo,
2878                                           SDVO_CMD_GET_MAX_OVERSCAN_V,
2879                                           &data_value, 4))
2880                         return false;
2881
2882                 if (!intel_sdvo_get_value(intel_sdvo,
2883                                           SDVO_CMD_GET_OVERSCAN_V,
2884                                           &response, 2))
2885                         return false;
2886
2887                 sdvo_state->tv.overscan_v = response;
2888
2889                 intel_sdvo_connector->max_vscan = data_value[0];
2890                 intel_sdvo_connector->top =
2891                         drm_property_create_range(dev, 0,
2892                                             "top_margin", 0, data_value[0]);
2893                 if (!intel_sdvo_connector->top)
2894                         return false;
2895
2896                 drm_object_attach_property(&connector->base,
2897                                            intel_sdvo_connector->top, 0);
2898
2899                 intel_sdvo_connector->bottom =
2900                         drm_property_create_range(dev, 0,
2901                                             "bottom_margin", 0, data_value[0]);
2902                 if (!intel_sdvo_connector->bottom)
2903                         return false;
2904
2905                 drm_object_attach_property(&connector->base,
2906                                               intel_sdvo_connector->bottom, 0);
2907                 DRM_DEBUG_KMS("v_overscan: max %d, "
2908                               "default %d, current %d\n",
2909                               data_value[0], data_value[1], response);
2910         }
2911
2912         ENHANCEMENT(&sdvo_state->tv, hpos, HPOS);
2913         ENHANCEMENT(&sdvo_state->tv, vpos, VPOS);
2914         ENHANCEMENT(&conn_state->tv, saturation, SATURATION);
2915         ENHANCEMENT(&conn_state->tv, contrast, CONTRAST);
2916         ENHANCEMENT(&conn_state->tv, hue, HUE);
2917         ENHANCEMENT(&conn_state->tv, brightness, BRIGHTNESS);
2918         ENHANCEMENT(&sdvo_state->tv, sharpness, SHARPNESS);
2919         ENHANCEMENT(&sdvo_state->tv, flicker_filter, FLICKER_FILTER);
2920         ENHANCEMENT(&sdvo_state->tv, flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2921         ENHANCEMENT(&sdvo_state->tv, flicker_filter_2d, FLICKER_FILTER_2D);
2922         _ENHANCEMENT(sdvo_state->tv.chroma_filter, tv_chroma_filter, TV_CHROMA_FILTER);
2923         _ENHANCEMENT(sdvo_state->tv.luma_filter, tv_luma_filter, TV_LUMA_FILTER);
2924
2925         if (enhancements.dot_crawl) {
2926                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2927                         return false;
2928
2929                 sdvo_state->tv.dot_crawl = response & 0x1;
2930                 intel_sdvo_connector->dot_crawl =
2931                         drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
2932                 if (!intel_sdvo_connector->dot_crawl)
2933                         return false;
2934
2935                 drm_object_attach_property(&connector->base,
2936                                            intel_sdvo_connector->dot_crawl, 0);
2937                 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2938         }
2939
2940         return true;
2941 }
2942
2943 static bool
2944 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2945                                         struct intel_sdvo_connector *intel_sdvo_connector,
2946                                         struct intel_sdvo_enhancements_reply enhancements)
2947 {
2948         struct drm_device *dev = intel_sdvo->base.base.dev;
2949         struct drm_connector *connector = &intel_sdvo_connector->base.base;
2950         uint16_t response, data_value[2];
2951
2952         ENHANCEMENT(&connector->state->tv, brightness, BRIGHTNESS);
2953
2954         return true;
2955 }
2956 #undef ENHANCEMENT
2957 #undef _ENHANCEMENT
2958
2959 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2960                                                struct intel_sdvo_connector *intel_sdvo_connector)
2961 {
2962         union {
2963                 struct intel_sdvo_enhancements_reply reply;
2964                 uint16_t response;
2965         } enhancements;
2966
2967         BUILD_BUG_ON(sizeof(enhancements) != 2);
2968
2969         if (!intel_sdvo_get_value(intel_sdvo,
2970                                   SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2971                                   &enhancements, sizeof(enhancements)) ||
2972             enhancements.response == 0) {
2973                 DRM_DEBUG_KMS("No enhancement is supported\n");
2974                 return true;
2975         }
2976
2977         if (IS_TV(intel_sdvo_connector))
2978                 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2979         else if (IS_LVDS(intel_sdvo_connector))
2980                 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2981         else
2982                 return true;
2983 }
2984
2985 static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2986                                      struct i2c_msg *msgs,
2987                                      int num)
2988 {
2989         struct intel_sdvo *sdvo = adapter->algo_data;
2990
2991         if (!__intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2992                 return -EIO;
2993
2994         return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2995 }
2996
2997 static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2998 {
2999         struct intel_sdvo *sdvo = adapter->algo_data;
3000         return sdvo->i2c->algo->functionality(sdvo->i2c);
3001 }
3002
3003 static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
3004         .master_xfer    = intel_sdvo_ddc_proxy_xfer,
3005         .functionality  = intel_sdvo_ddc_proxy_func
3006 };
3007
3008 static void proxy_lock_bus(struct i2c_adapter *adapter,
3009                            unsigned int flags)
3010 {
3011         struct intel_sdvo *sdvo = adapter->algo_data;
3012         sdvo->i2c->lock_ops->lock_bus(sdvo->i2c, flags);
3013 }
3014
3015 static int proxy_trylock_bus(struct i2c_adapter *adapter,
3016                              unsigned int flags)
3017 {
3018         struct intel_sdvo *sdvo = adapter->algo_data;
3019         return sdvo->i2c->lock_ops->trylock_bus(sdvo->i2c, flags);
3020 }
3021
3022 static void proxy_unlock_bus(struct i2c_adapter *adapter,
3023                              unsigned int flags)
3024 {
3025         struct intel_sdvo *sdvo = adapter->algo_data;
3026         sdvo->i2c->lock_ops->unlock_bus(sdvo->i2c, flags);
3027 }
3028
3029 static const struct i2c_lock_operations proxy_lock_ops = {
3030         .lock_bus =    proxy_lock_bus,
3031         .trylock_bus = proxy_trylock_bus,
3032         .unlock_bus =  proxy_unlock_bus,
3033 };
3034
3035 static bool
3036 intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
3037                           struct drm_i915_private *dev_priv)
3038 {
3039         struct pci_dev *pdev = dev_priv->drm.pdev;
3040
3041         sdvo->ddc.owner = THIS_MODULE;
3042         sdvo->ddc.class = I2C_CLASS_DDC;
3043         snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
3044         sdvo->ddc.dev.parent = &pdev->dev;
3045         sdvo->ddc.algo_data = sdvo;
3046         sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
3047         sdvo->ddc.lock_ops = &proxy_lock_ops;
3048
3049         return i2c_add_adapter(&sdvo->ddc) == 0;
3050 }
3051
3052 static void assert_sdvo_port_valid(const struct drm_i915_private *dev_priv,
3053                                    enum port port)
3054 {
3055         if (HAS_PCH_SPLIT(dev_priv))
3056                 WARN_ON(port != PORT_B);
3057         else
3058                 WARN_ON(port != PORT_B && port != PORT_C);
3059 }
3060
3061 bool intel_sdvo_init(struct drm_i915_private *dev_priv,
3062                      i915_reg_t sdvo_reg, enum port port)
3063 {
3064         struct intel_encoder *intel_encoder;
3065         struct intel_sdvo *intel_sdvo;
3066         int i;
3067
3068         assert_sdvo_port_valid(dev_priv, port);
3069
3070         intel_sdvo = kzalloc(sizeof(*intel_sdvo), GFP_KERNEL);
3071         if (!intel_sdvo)
3072                 return false;
3073
3074         intel_sdvo->sdvo_reg = sdvo_reg;
3075         intel_sdvo->port = port;
3076         intel_sdvo->slave_addr =
3077                 intel_sdvo_get_slave_addr(dev_priv, intel_sdvo) >> 1;
3078         intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo);
3079         if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev_priv))
3080                 goto err_i2c_bus;
3081
3082         /* encoder type will be decided later */
3083         intel_encoder = &intel_sdvo->base;
3084         intel_encoder->type = INTEL_OUTPUT_SDVO;
3085         intel_encoder->power_domain = POWER_DOMAIN_PORT_OTHER;
3086         intel_encoder->port = port;
3087         drm_encoder_init(&dev_priv->drm, &intel_encoder->base,
3088                          &intel_sdvo_enc_funcs, 0,
3089                          "SDVO %c", port_name(port));
3090
3091         /* Read the regs to test if we can talk to the device */
3092         for (i = 0; i < 0x40; i++) {
3093                 u8 byte;
3094
3095                 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
3096                         DRM_DEBUG_KMS("No SDVO device found on %s\n",
3097                                       SDVO_NAME(intel_sdvo));
3098                         goto err;
3099                 }
3100         }
3101
3102         intel_encoder->compute_config = intel_sdvo_compute_config;
3103         if (HAS_PCH_SPLIT(dev_priv)) {
3104                 intel_encoder->disable = pch_disable_sdvo;
3105                 intel_encoder->post_disable = pch_post_disable_sdvo;
3106         } else {
3107                 intel_encoder->disable = intel_disable_sdvo;
3108         }
3109         intel_encoder->pre_enable = intel_sdvo_pre_enable;
3110         intel_encoder->enable = intel_enable_sdvo;
3111         intel_encoder->get_hw_state = intel_sdvo_get_hw_state;
3112         intel_encoder->get_config = intel_sdvo_get_config;
3113
3114         /* In default case sdvo lvds is false */
3115         if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
3116                 goto err;
3117
3118         if (intel_sdvo_output_setup(intel_sdvo,
3119                                     intel_sdvo->caps.output_flags) != true) {
3120                 DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
3121                               SDVO_NAME(intel_sdvo));
3122                 /* Output_setup can leave behind connectors! */
3123                 goto err_output;
3124         }
3125
3126         /*
3127          * Only enable the hotplug irq if we need it, to work around noisy
3128          * hotplug lines.
3129          */
3130         if (intel_sdvo->hotplug_active) {
3131                 if (intel_sdvo->port == PORT_B)
3132                         intel_encoder->hpd_pin = HPD_SDVO_B;
3133                 else
3134                         intel_encoder->hpd_pin = HPD_SDVO_C;
3135         }
3136
3137         /*
3138          * Cloning SDVO with anything is often impossible, since the SDVO
3139          * encoder can request a special input timing mode. And even if that's
3140          * not the case we have evidence that cloning a plain unscaled mode with
3141          * VGA doesn't really work. Furthermore the cloning flags are way too
3142          * simplistic anyway to express such constraints, so just give up on
3143          * cloning for SDVO encoders.
3144          */
3145         intel_sdvo->base.cloneable = 0;
3146
3147         intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo);
3148
3149         /* Set the input timing to the screen. Assume always input 0. */
3150         if (!intel_sdvo_set_target_input(intel_sdvo))
3151                 goto err_output;
3152
3153         if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
3154                                                     &intel_sdvo->pixel_clock_min,
3155                                                     &intel_sdvo->pixel_clock_max))
3156                 goto err_output;
3157
3158         DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
3159                         "clock range %dMHz - %dMHz, "
3160                         "input 1: %c, input 2: %c, "
3161                         "output 1: %c, output 2: %c\n",
3162                         SDVO_NAME(intel_sdvo),
3163                         intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
3164                         intel_sdvo->caps.device_rev_id,
3165                         intel_sdvo->pixel_clock_min / 1000,
3166                         intel_sdvo->pixel_clock_max / 1000,
3167                         (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
3168                         (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
3169                         /* check currently supported outputs */
3170                         intel_sdvo->caps.output_flags &
3171                         (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
3172                         intel_sdvo->caps.output_flags &
3173                         (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
3174         return true;
3175
3176 err_output:
3177         intel_sdvo_output_cleanup(intel_sdvo);
3178
3179 err:
3180         drm_encoder_cleanup(&intel_encoder->base);
3181         i2c_del_adapter(&intel_sdvo->ddc);
3182 err_i2c_bus:
3183         intel_sdvo_unselect_i2c_bus(intel_sdvo);
3184         kfree(intel_sdvo);
3185
3186         return false;
3187 }