e6a64b3ecd919653d2306abd1a62e478a86f1027
[muen/linux.git] / drivers / gpu / drm / i915 / intel_sdvo.c
1 /*
2  * Copyright 2006 Dave Airlie <airlied@linux.ie>
3  * Copyright © 2006-2007 Intel Corporation
4  *   Jesse Barnes <jesse.barnes@intel.com>
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a
7  * copy of this software and associated documentation files (the "Software"),
8  * to deal in the Software without restriction, including without limitation
9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10  * and/or sell copies of the Software, and to permit persons to whom the
11  * Software is furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice (including the next
14  * paragraph) shall be included in all copies or substantial portions of the
15  * Software.
16  *
17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23  * DEALINGS IN THE SOFTWARE.
24  *
25  * Authors:
26  *      Eric Anholt <eric@anholt.net>
27  */
28 #include <linux/i2c.h>
29 #include <linux/slab.h>
30 #include <linux/delay.h>
31 #include <linux/export.h>
32 #include <drm/drmP.h>
33 #include <drm/drm_atomic_helper.h>
34 #include <drm/drm_crtc.h>
35 #include <drm/drm_edid.h>
36 #include "intel_drv.h"
37 #include <drm/i915_drm.h>
38 #include "i915_drv.h"
39 #include "intel_sdvo_regs.h"
40
41 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
42 #define SDVO_RGB_MASK  (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
43 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
44 #define SDVO_TV_MASK   (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
45
46 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
47                         SDVO_TV_MASK)
48
49 #define IS_TV(c)        (c->output_flag & SDVO_TV_MASK)
50 #define IS_TMDS(c)      (c->output_flag & SDVO_TMDS_MASK)
51 #define IS_LVDS(c)      (c->output_flag & SDVO_LVDS_MASK)
52 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
53 #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
54
55
56 static const char * const tv_format_names[] = {
57         "NTSC_M"   , "NTSC_J"  , "NTSC_443",
58         "PAL_B"    , "PAL_D"   , "PAL_G"   ,
59         "PAL_H"    , "PAL_I"   , "PAL_M"   ,
60         "PAL_N"    , "PAL_NC"  , "PAL_60"  ,
61         "SECAM_B"  , "SECAM_D" , "SECAM_G" ,
62         "SECAM_K"  , "SECAM_K1", "SECAM_L" ,
63         "SECAM_60"
64 };
65
66 #define TV_FORMAT_NUM  ARRAY_SIZE(tv_format_names)
67
68 struct intel_sdvo {
69         struct intel_encoder base;
70
71         struct i2c_adapter *i2c;
72         u8 slave_addr;
73
74         struct i2c_adapter ddc;
75
76         /* Register for the SDVO device: SDVOB or SDVOC */
77         i915_reg_t sdvo_reg;
78
79         /* Active outputs controlled by this SDVO output */
80         uint16_t controlled_output;
81
82         /*
83          * Capabilities of the SDVO device returned by
84          * intel_sdvo_get_capabilities()
85          */
86         struct intel_sdvo_caps caps;
87
88         /* Pixel clock limitations reported by the SDVO device, in kHz */
89         int pixel_clock_min, pixel_clock_max;
90
91         /*
92         * For multiple function SDVO device,
93         * this is for current attached outputs.
94         */
95         uint16_t attached_output;
96
97         /*
98          * Hotplug activation bits for this device
99          */
100         uint16_t hotplug_active;
101
102         /**
103          * This is set if we're going to treat the device as TV-out.
104          *
105          * While we have these nice friendly flags for output types that ought
106          * to decide this for us, the S-Video output on our HDMI+S-Video card
107          * shows up as RGB1 (VGA).
108          */
109         bool is_tv;
110
111         enum port port;
112
113         /**
114          * This is set if we treat the device as HDMI, instead of DVI.
115          */
116         bool is_hdmi;
117         bool has_hdmi_monitor;
118         bool has_hdmi_audio;
119         bool rgb_quant_range_selectable;
120
121         /**
122          * This is set if we detect output of sdvo device as LVDS and
123          * have a valid fixed mode to use with the panel.
124          */
125         bool is_lvds;
126
127         /**
128          * This is sdvo fixed pannel mode pointer
129          */
130         struct drm_display_mode *sdvo_lvds_fixed_mode;
131
132         /* DDC bus used by this SDVO encoder */
133         uint8_t ddc_bus;
134
135         /*
136          * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd
137          */
138         uint8_t dtd_sdvo_flags;
139 };
140
141 struct intel_sdvo_connector {
142         struct intel_connector base;
143
144         /* Mark the type of connector */
145         uint16_t output_flag;
146
147         /* This contains all current supported TV format */
148         u8 tv_format_supported[TV_FORMAT_NUM];
149         int   format_supported_num;
150         struct drm_property *tv_format;
151
152         /* add the property for the SDVO-TV */
153         struct drm_property *left;
154         struct drm_property *right;
155         struct drm_property *top;
156         struct drm_property *bottom;
157         struct drm_property *hpos;
158         struct drm_property *vpos;
159         struct drm_property *contrast;
160         struct drm_property *saturation;
161         struct drm_property *hue;
162         struct drm_property *sharpness;
163         struct drm_property *flicker_filter;
164         struct drm_property *flicker_filter_adaptive;
165         struct drm_property *flicker_filter_2d;
166         struct drm_property *tv_chroma_filter;
167         struct drm_property *tv_luma_filter;
168         struct drm_property *dot_crawl;
169
170         /* add the property for the SDVO-TV/LVDS */
171         struct drm_property *brightness;
172
173         /* this is to get the range of margin.*/
174         u32 max_hscan, max_vscan;
175 };
176
177 struct intel_sdvo_connector_state {
178         /* base.base: tv.saturation/contrast/hue/brightness */
179         struct intel_digital_connector_state base;
180
181         struct {
182                 unsigned overscan_h, overscan_v, hpos, vpos, sharpness;
183                 unsigned flicker_filter, flicker_filter_2d, flicker_filter_adaptive;
184                 unsigned chroma_filter, luma_filter, dot_crawl;
185         } tv;
186 };
187
188 static struct intel_sdvo *to_sdvo(struct intel_encoder *encoder)
189 {
190         return container_of(encoder, struct intel_sdvo, base);
191 }
192
193 static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
194 {
195         return to_sdvo(intel_attached_encoder(connector));
196 }
197
198 static struct intel_sdvo_connector *
199 to_intel_sdvo_connector(struct drm_connector *connector)
200 {
201         return container_of(connector, struct intel_sdvo_connector, base.base);
202 }
203
204 #define to_intel_sdvo_connector_state(conn_state) \
205         container_of((conn_state), struct intel_sdvo_connector_state, base.base)
206
207 static bool
208 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
209 static bool
210 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
211                               struct intel_sdvo_connector *intel_sdvo_connector,
212                               int type);
213 static bool
214 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
215                                    struct intel_sdvo_connector *intel_sdvo_connector);
216
217 /*
218  * Writes the SDVOB or SDVOC with the given value, but always writes both
219  * SDVOB and SDVOC to work around apparent hardware issues (according to
220  * comments in the BIOS).
221  */
222 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
223 {
224         struct drm_device *dev = intel_sdvo->base.base.dev;
225         struct drm_i915_private *dev_priv = to_i915(dev);
226         u32 bval = val, cval = val;
227         int i;
228
229         if (HAS_PCH_SPLIT(dev_priv)) {
230                 I915_WRITE(intel_sdvo->sdvo_reg, val);
231                 POSTING_READ(intel_sdvo->sdvo_reg);
232                 /*
233                  * HW workaround, need to write this twice for issue
234                  * that may result in first write getting masked.
235                  */
236                 if (HAS_PCH_IBX(dev_priv)) {
237                         I915_WRITE(intel_sdvo->sdvo_reg, val);
238                         POSTING_READ(intel_sdvo->sdvo_reg);
239                 }
240                 return;
241         }
242
243         if (intel_sdvo->port == PORT_B)
244                 cval = I915_READ(GEN3_SDVOC);
245         else
246                 bval = I915_READ(GEN3_SDVOB);
247
248         /*
249          * Write the registers twice for luck. Sometimes,
250          * writing them only once doesn't appear to 'stick'.
251          * The BIOS does this too. Yay, magic
252          */
253         for (i = 0; i < 2; i++) {
254                 I915_WRITE(GEN3_SDVOB, bval);
255                 POSTING_READ(GEN3_SDVOB);
256
257                 I915_WRITE(GEN3_SDVOC, cval);
258                 POSTING_READ(GEN3_SDVOC);
259         }
260 }
261
262 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
263 {
264         struct i2c_msg msgs[] = {
265                 {
266                         .addr = intel_sdvo->slave_addr,
267                         .flags = 0,
268                         .len = 1,
269                         .buf = &addr,
270                 },
271                 {
272                         .addr = intel_sdvo->slave_addr,
273                         .flags = I2C_M_RD,
274                         .len = 1,
275                         .buf = ch,
276                 }
277         };
278         int ret;
279
280         if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
281                 return true;
282
283         DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
284         return false;
285 }
286
287 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
288 /** Mapping of command numbers to names, for debug output */
289 static const struct _sdvo_cmd_name {
290         u8 cmd;
291         const char *name;
292 } __attribute__ ((packed)) sdvo_cmd_names[] = {
293         SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
294         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
295         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
296         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
297         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
298         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
299         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
300         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
301         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
302         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
303         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
304         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
305         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
306         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
307         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
308         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
309         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
310         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
311         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
312         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
313         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
314         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
315         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
316         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
317         SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
318         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
319         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
320         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
321         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
322         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
323         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
324         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
325         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
326         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
327         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
328         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
329         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
330         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
331         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
332         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
333         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
334         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
335         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
336
337         /* Add the op code for SDVO enhancements */
338         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
339         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
340         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
341         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
342         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
343         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
344         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
345         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
346         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
347         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
348         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
349         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
350         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
351         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
352         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
353         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
354         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
355         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
356         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
357         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
358         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
359         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
360         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
361         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
362         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
363         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
364         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
365         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
366         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
367         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
368         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
369         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
370         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
371         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
372         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
373         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
374         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
375         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
376         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
377         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
378         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
379         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
380         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
381         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
382
383         /* HDMI op code */
384         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
385         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
386         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
387         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
388         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
389         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
390         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
391         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
392         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
393         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
394         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
395         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
396         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
397         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
398         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
399         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
400         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
401         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
402         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
403         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
404 };
405
406 #define SDVO_NAME(svdo) ((svdo)->port == PORT_B ? "SDVOB" : "SDVOC")
407
408 static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
409                                    const void *args, int args_len)
410 {
411         int i, pos = 0;
412 #define BUF_LEN 256
413         char buffer[BUF_LEN];
414
415 #define BUF_PRINT(args...) \
416         pos += snprintf(buffer + pos, max_t(int, BUF_LEN - pos, 0), args)
417
418
419         for (i = 0; i < args_len; i++) {
420                 BUF_PRINT("%02X ", ((u8 *)args)[i]);
421         }
422         for (; i < 8; i++) {
423                 BUF_PRINT("   ");
424         }
425         for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
426                 if (cmd == sdvo_cmd_names[i].cmd) {
427                         BUF_PRINT("(%s)", sdvo_cmd_names[i].name);
428                         break;
429                 }
430         }
431         if (i == ARRAY_SIZE(sdvo_cmd_names)) {
432                 BUF_PRINT("(%02X)", cmd);
433         }
434         BUG_ON(pos >= BUF_LEN - 1);
435 #undef BUF_PRINT
436 #undef BUF_LEN
437
438         DRM_DEBUG_KMS("%s: W: %02X %s\n", SDVO_NAME(intel_sdvo), cmd, buffer);
439 }
440
441 static const char * const cmd_status_names[] = {
442         "Power on",
443         "Success",
444         "Not supported",
445         "Invalid arg",
446         "Pending",
447         "Target not specified",
448         "Scaling not supported"
449 };
450
451 static bool __intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
452                                    const void *args, int args_len,
453                                    bool unlocked)
454 {
455         u8 *buf, status;
456         struct i2c_msg *msgs;
457         int i, ret = true;
458
459         /* Would be simpler to allocate both in one go ? */
460         buf = kzalloc(args_len * 2 + 2, GFP_KERNEL);
461         if (!buf)
462                 return false;
463
464         msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL);
465         if (!msgs) {
466                 kfree(buf);
467                 return false;
468         }
469
470         intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
471
472         for (i = 0; i < args_len; i++) {
473                 msgs[i].addr = intel_sdvo->slave_addr;
474                 msgs[i].flags = 0;
475                 msgs[i].len = 2;
476                 msgs[i].buf = buf + 2 *i;
477                 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
478                 buf[2*i + 1] = ((u8*)args)[i];
479         }
480         msgs[i].addr = intel_sdvo->slave_addr;
481         msgs[i].flags = 0;
482         msgs[i].len = 2;
483         msgs[i].buf = buf + 2*i;
484         buf[2*i + 0] = SDVO_I2C_OPCODE;
485         buf[2*i + 1] = cmd;
486
487         /* the following two are to read the response */
488         status = SDVO_I2C_CMD_STATUS;
489         msgs[i+1].addr = intel_sdvo->slave_addr;
490         msgs[i+1].flags = 0;
491         msgs[i+1].len = 1;
492         msgs[i+1].buf = &status;
493
494         msgs[i+2].addr = intel_sdvo->slave_addr;
495         msgs[i+2].flags = I2C_M_RD;
496         msgs[i+2].len = 1;
497         msgs[i+2].buf = &status;
498
499         if (unlocked)
500                 ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
501         else
502                 ret = __i2c_transfer(intel_sdvo->i2c, msgs, i+3);
503         if (ret < 0) {
504                 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
505                 ret = false;
506                 goto out;
507         }
508         if (ret != i+3) {
509                 /* failure in I2C transfer */
510                 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
511                 ret = false;
512         }
513
514 out:
515         kfree(msgs);
516         kfree(buf);
517         return ret;
518 }
519
520 static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
521                                  const void *args, int args_len)
522 {
523         return __intel_sdvo_write_cmd(intel_sdvo, cmd, args, args_len, true);
524 }
525
526 static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
527                                      void *response, int response_len)
528 {
529         u8 retry = 15; /* 5 quick checks, followed by 10 long checks */
530         u8 status;
531         int i, pos = 0;
532 #define BUF_LEN 256
533         char buffer[BUF_LEN];
534
535
536         /*
537          * The documentation states that all commands will be
538          * processed within 15µs, and that we need only poll
539          * the status byte a maximum of 3 times in order for the
540          * command to be complete.
541          *
542          * Check 5 times in case the hardware failed to read the docs.
543          *
544          * Also beware that the first response by many devices is to
545          * reply PENDING and stall for time. TVs are notorious for
546          * requiring longer than specified to complete their replies.
547          * Originally (in the DDX long ago), the delay was only ever 15ms
548          * with an additional delay of 30ms applied for TVs added later after
549          * many experiments. To accommodate both sets of delays, we do a
550          * sequence of slow checks if the device is falling behind and fails
551          * to reply within 5*15µs.
552          */
553         if (!intel_sdvo_read_byte(intel_sdvo,
554                                   SDVO_I2C_CMD_STATUS,
555                                   &status))
556                 goto log_fail;
557
558         while ((status == SDVO_CMD_STATUS_PENDING ||
559                 status == SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED) && --retry) {
560                 if (retry < 10)
561                         msleep(15);
562                 else
563                         udelay(15);
564
565                 if (!intel_sdvo_read_byte(intel_sdvo,
566                                           SDVO_I2C_CMD_STATUS,
567                                           &status))
568                         goto log_fail;
569         }
570
571 #define BUF_PRINT(args...) \
572         pos += snprintf(buffer + pos, max_t(int, BUF_LEN - pos, 0), args)
573
574         if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
575                 BUF_PRINT("(%s)", cmd_status_names[status]);
576         else
577                 BUF_PRINT("(??? %d)", status);
578
579         if (status != SDVO_CMD_STATUS_SUCCESS)
580                 goto log_fail;
581
582         /* Read the command response */
583         for (i = 0; i < response_len; i++) {
584                 if (!intel_sdvo_read_byte(intel_sdvo,
585                                           SDVO_I2C_RETURN_0 + i,
586                                           &((u8 *)response)[i]))
587                         goto log_fail;
588                 BUF_PRINT(" %02X", ((u8 *)response)[i]);
589         }
590         BUG_ON(pos >= BUF_LEN - 1);
591 #undef BUF_PRINT
592 #undef BUF_LEN
593
594         DRM_DEBUG_KMS("%s: R: %s\n", SDVO_NAME(intel_sdvo), buffer);
595         return true;
596
597 log_fail:
598         DRM_DEBUG_KMS("%s: R: ... failed\n", SDVO_NAME(intel_sdvo));
599         return false;
600 }
601
602 static int intel_sdvo_get_pixel_multiplier(const struct drm_display_mode *adjusted_mode)
603 {
604         if (adjusted_mode->crtc_clock >= 100000)
605                 return 1;
606         else if (adjusted_mode->crtc_clock >= 50000)
607                 return 2;
608         else
609                 return 4;
610 }
611
612 static bool __intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
613                                                 u8 ddc_bus)
614 {
615         /* This must be the immediately preceding write before the i2c xfer */
616         return __intel_sdvo_write_cmd(intel_sdvo,
617                                       SDVO_CMD_SET_CONTROL_BUS_SWITCH,
618                                       &ddc_bus, 1, false);
619 }
620
621 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
622 {
623         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
624                 return false;
625
626         return intel_sdvo_read_response(intel_sdvo, NULL, 0);
627 }
628
629 static bool
630 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
631 {
632         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
633                 return false;
634
635         return intel_sdvo_read_response(intel_sdvo, value, len);
636 }
637
638 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
639 {
640         struct intel_sdvo_set_target_input_args targets = {0};
641         return intel_sdvo_set_value(intel_sdvo,
642                                     SDVO_CMD_SET_TARGET_INPUT,
643                                     &targets, sizeof(targets));
644 }
645
646 /*
647  * Return whether each input is trained.
648  *
649  * This function is making an assumption about the layout of the response,
650  * which should be checked against the docs.
651  */
652 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
653 {
654         struct intel_sdvo_get_trained_inputs_response response;
655
656         BUILD_BUG_ON(sizeof(response) != 1);
657         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
658                                   &response, sizeof(response)))
659                 return false;
660
661         *input_1 = response.input0_trained;
662         *input_2 = response.input1_trained;
663         return true;
664 }
665
666 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
667                                           u16 outputs)
668 {
669         return intel_sdvo_set_value(intel_sdvo,
670                                     SDVO_CMD_SET_ACTIVE_OUTPUTS,
671                                     &outputs, sizeof(outputs));
672 }
673
674 static bool intel_sdvo_get_active_outputs(struct intel_sdvo *intel_sdvo,
675                                           u16 *outputs)
676 {
677         return intel_sdvo_get_value(intel_sdvo,
678                                     SDVO_CMD_GET_ACTIVE_OUTPUTS,
679                                     outputs, sizeof(*outputs));
680 }
681
682 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
683                                                int mode)
684 {
685         u8 state = SDVO_ENCODER_STATE_ON;
686
687         switch (mode) {
688         case DRM_MODE_DPMS_ON:
689                 state = SDVO_ENCODER_STATE_ON;
690                 break;
691         case DRM_MODE_DPMS_STANDBY:
692                 state = SDVO_ENCODER_STATE_STANDBY;
693                 break;
694         case DRM_MODE_DPMS_SUSPEND:
695                 state = SDVO_ENCODER_STATE_SUSPEND;
696                 break;
697         case DRM_MODE_DPMS_OFF:
698                 state = SDVO_ENCODER_STATE_OFF;
699                 break;
700         }
701
702         return intel_sdvo_set_value(intel_sdvo,
703                                     SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
704 }
705
706 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
707                                                    int *clock_min,
708                                                    int *clock_max)
709 {
710         struct intel_sdvo_pixel_clock_range clocks;
711
712         BUILD_BUG_ON(sizeof(clocks) != 4);
713         if (!intel_sdvo_get_value(intel_sdvo,
714                                   SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
715                                   &clocks, sizeof(clocks)))
716                 return false;
717
718         /* Convert the values from units of 10 kHz to kHz. */
719         *clock_min = clocks.min * 10;
720         *clock_max = clocks.max * 10;
721         return true;
722 }
723
724 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
725                                          u16 outputs)
726 {
727         return intel_sdvo_set_value(intel_sdvo,
728                                     SDVO_CMD_SET_TARGET_OUTPUT,
729                                     &outputs, sizeof(outputs));
730 }
731
732 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
733                                   struct intel_sdvo_dtd *dtd)
734 {
735         return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
736                 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
737 }
738
739 static bool intel_sdvo_get_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
740                                   struct intel_sdvo_dtd *dtd)
741 {
742         return intel_sdvo_get_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
743                 intel_sdvo_get_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
744 }
745
746 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
747                                          struct intel_sdvo_dtd *dtd)
748 {
749         return intel_sdvo_set_timing(intel_sdvo,
750                                      SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
751 }
752
753 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
754                                          struct intel_sdvo_dtd *dtd)
755 {
756         return intel_sdvo_set_timing(intel_sdvo,
757                                      SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
758 }
759
760 static bool intel_sdvo_get_input_timing(struct intel_sdvo *intel_sdvo,
761                                         struct intel_sdvo_dtd *dtd)
762 {
763         return intel_sdvo_get_timing(intel_sdvo,
764                                      SDVO_CMD_GET_INPUT_TIMINGS_PART1, dtd);
765 }
766
767 static bool
768 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
769                                          uint16_t clock,
770                                          uint16_t width,
771                                          uint16_t height)
772 {
773         struct intel_sdvo_preferred_input_timing_args args;
774
775         memset(&args, 0, sizeof(args));
776         args.clock = clock;
777         args.width = width;
778         args.height = height;
779         args.interlace = 0;
780
781         if (intel_sdvo->is_lvds &&
782            (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
783             intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
784                 args.scaled = 1;
785
786         return intel_sdvo_set_value(intel_sdvo,
787                                     SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
788                                     &args, sizeof(args));
789 }
790
791 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
792                                                   struct intel_sdvo_dtd *dtd)
793 {
794         BUILD_BUG_ON(sizeof(dtd->part1) != 8);
795         BUILD_BUG_ON(sizeof(dtd->part2) != 8);
796         return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
797                                     &dtd->part1, sizeof(dtd->part1)) &&
798                 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
799                                      &dtd->part2, sizeof(dtd->part2));
800 }
801
802 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
803 {
804         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
805 }
806
807 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
808                                          const struct drm_display_mode *mode)
809 {
810         uint16_t width, height;
811         uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
812         uint16_t h_sync_offset, v_sync_offset;
813         int mode_clock;
814
815         memset(dtd, 0, sizeof(*dtd));
816
817         width = mode->hdisplay;
818         height = mode->vdisplay;
819
820         /* do some mode translations */
821         h_blank_len = mode->htotal - mode->hdisplay;
822         h_sync_len = mode->hsync_end - mode->hsync_start;
823
824         v_blank_len = mode->vtotal - mode->vdisplay;
825         v_sync_len = mode->vsync_end - mode->vsync_start;
826
827         h_sync_offset = mode->hsync_start - mode->hdisplay;
828         v_sync_offset = mode->vsync_start - mode->vdisplay;
829
830         mode_clock = mode->clock;
831         mode_clock /= 10;
832         dtd->part1.clock = mode_clock;
833
834         dtd->part1.h_active = width & 0xff;
835         dtd->part1.h_blank = h_blank_len & 0xff;
836         dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
837                 ((h_blank_len >> 8) & 0xf);
838         dtd->part1.v_active = height & 0xff;
839         dtd->part1.v_blank = v_blank_len & 0xff;
840         dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
841                 ((v_blank_len >> 8) & 0xf);
842
843         dtd->part2.h_sync_off = h_sync_offset & 0xff;
844         dtd->part2.h_sync_width = h_sync_len & 0xff;
845         dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
846                 (v_sync_len & 0xf);
847         dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
848                 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
849                 ((v_sync_len & 0x30) >> 4);
850
851         dtd->part2.dtd_flags = 0x18;
852         if (mode->flags & DRM_MODE_FLAG_INTERLACE)
853                 dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE;
854         if (mode->flags & DRM_MODE_FLAG_PHSYNC)
855                 dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE;
856         if (mode->flags & DRM_MODE_FLAG_PVSYNC)
857                 dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE;
858
859         dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
860 }
861
862 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode *pmode,
863                                          const struct intel_sdvo_dtd *dtd)
864 {
865         struct drm_display_mode mode = {};
866
867         mode.hdisplay = dtd->part1.h_active;
868         mode.hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
869         mode.hsync_start = mode.hdisplay + dtd->part2.h_sync_off;
870         mode.hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
871         mode.hsync_end = mode.hsync_start + dtd->part2.h_sync_width;
872         mode.hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
873         mode.htotal = mode.hdisplay + dtd->part1.h_blank;
874         mode.htotal += (dtd->part1.h_high & 0xf) << 8;
875
876         mode.vdisplay = dtd->part1.v_active;
877         mode.vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
878         mode.vsync_start = mode.vdisplay;
879         mode.vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
880         mode.vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
881         mode.vsync_start += dtd->part2.v_sync_off_high & 0xc0;
882         mode.vsync_end = mode.vsync_start +
883                 (dtd->part2.v_sync_off_width & 0xf);
884         mode.vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
885         mode.vtotal = mode.vdisplay + dtd->part1.v_blank;
886         mode.vtotal += (dtd->part1.v_high & 0xf) << 8;
887
888         mode.clock = dtd->part1.clock * 10;
889
890         if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE)
891                 mode.flags |= DRM_MODE_FLAG_INTERLACE;
892         if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
893                 mode.flags |= DRM_MODE_FLAG_PHSYNC;
894         else
895                 mode.flags |= DRM_MODE_FLAG_NHSYNC;
896         if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
897                 mode.flags |= DRM_MODE_FLAG_PVSYNC;
898         else
899                 mode.flags |= DRM_MODE_FLAG_NVSYNC;
900
901         drm_mode_set_crtcinfo(&mode, 0);
902
903         drm_mode_copy(pmode, &mode);
904 }
905
906 static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
907 {
908         struct intel_sdvo_encode encode;
909
910         BUILD_BUG_ON(sizeof(encode) != 2);
911         return intel_sdvo_get_value(intel_sdvo,
912                                   SDVO_CMD_GET_SUPP_ENCODE,
913                                   &encode, sizeof(encode));
914 }
915
916 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
917                                   uint8_t mode)
918 {
919         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
920 }
921
922 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
923                                        uint8_t mode)
924 {
925         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
926 }
927
928 #if 0
929 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
930 {
931         int i, j;
932         uint8_t set_buf_index[2];
933         uint8_t av_split;
934         uint8_t buf_size;
935         uint8_t buf[48];
936         uint8_t *pos;
937
938         intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
939
940         for (i = 0; i <= av_split; i++) {
941                 set_buf_index[0] = i; set_buf_index[1] = 0;
942                 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
943                                      set_buf_index, 2);
944                 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
945                 intel_sdvo_read_response(encoder, &buf_size, 1);
946
947                 pos = buf;
948                 for (j = 0; j <= buf_size; j += 8) {
949                         intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
950                                              NULL, 0);
951                         intel_sdvo_read_response(encoder, pos, 8);
952                         pos += 8;
953                 }
954         }
955 }
956 #endif
957
958 static bool intel_sdvo_write_infoframe(struct intel_sdvo *intel_sdvo,
959                                        unsigned if_index, uint8_t tx_rate,
960                                        const uint8_t *data, unsigned length)
961 {
962         uint8_t set_buf_index[2] = { if_index, 0 };
963         uint8_t hbuf_size, tmp[8];
964         int i;
965
966         if (!intel_sdvo_set_value(intel_sdvo,
967                                   SDVO_CMD_SET_HBUF_INDEX,
968                                   set_buf_index, 2))
969                 return false;
970
971         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO,
972                                   &hbuf_size, 1))
973                 return false;
974
975         /* Buffer size is 0 based, hooray! */
976         hbuf_size++;
977
978         DRM_DEBUG_KMS("writing sdvo hbuf: %i, hbuf_size %i, hbuf_size: %i\n",
979                       if_index, length, hbuf_size);
980
981         for (i = 0; i < hbuf_size; i += 8) {
982                 memset(tmp, 0, 8);
983                 if (i < length)
984                         memcpy(tmp, data + i, min_t(unsigned, 8, length - i));
985
986                 if (!intel_sdvo_set_value(intel_sdvo,
987                                           SDVO_CMD_SET_HBUF_DATA,
988                                           tmp, 8))
989                         return false;
990         }
991
992         return intel_sdvo_set_value(intel_sdvo,
993                                     SDVO_CMD_SET_HBUF_TXRATE,
994                                     &tx_rate, 1);
995 }
996
997 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo,
998                                          const struct intel_crtc_state *pipe_config)
999 {
1000         uint8_t sdvo_data[HDMI_INFOFRAME_SIZE(AVI)];
1001         union hdmi_infoframe frame;
1002         int ret;
1003         ssize_t len;
1004
1005         ret = drm_hdmi_avi_infoframe_from_display_mode(&frame.avi,
1006                                                        &pipe_config->base.adjusted_mode,
1007                                                        false);
1008         if (ret < 0) {
1009                 DRM_ERROR("couldn't fill AVI infoframe\n");
1010                 return false;
1011         }
1012
1013         if (intel_sdvo->rgb_quant_range_selectable) {
1014                 if (pipe_config->limited_color_range)
1015                         frame.avi.quantization_range =
1016                                 HDMI_QUANTIZATION_RANGE_LIMITED;
1017                 else
1018                         frame.avi.quantization_range =
1019                                 HDMI_QUANTIZATION_RANGE_FULL;
1020         }
1021
1022         len = hdmi_infoframe_pack(&frame, sdvo_data, sizeof(sdvo_data));
1023         if (len < 0)
1024                 return false;
1025
1026         return intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF,
1027                                           SDVO_HBUF_TX_VSYNC,
1028                                           sdvo_data, sizeof(sdvo_data));
1029 }
1030
1031 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo,
1032                                      const struct drm_connector_state *conn_state)
1033 {
1034         struct intel_sdvo_tv_format format;
1035         uint32_t format_map;
1036
1037         format_map = 1 << conn_state->tv.mode;
1038         memset(&format, 0, sizeof(format));
1039         memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
1040
1041         BUILD_BUG_ON(sizeof(format) != 6);
1042         return intel_sdvo_set_value(intel_sdvo,
1043                                     SDVO_CMD_SET_TV_FORMAT,
1044                                     &format, sizeof(format));
1045 }
1046
1047 static bool
1048 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
1049                                         const struct drm_display_mode *mode)
1050 {
1051         struct intel_sdvo_dtd output_dtd;
1052
1053         if (!intel_sdvo_set_target_output(intel_sdvo,
1054                                           intel_sdvo->attached_output))
1055                 return false;
1056
1057         intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1058         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1059                 return false;
1060
1061         return true;
1062 }
1063
1064 /*
1065  * Asks the sdvo controller for the preferred input mode given the output mode.
1066  * Unfortunately we have to set up the full output mode to do that.
1067  */
1068 static bool
1069 intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo,
1070                                     const struct drm_display_mode *mode,
1071                                     struct drm_display_mode *adjusted_mode)
1072 {
1073         struct intel_sdvo_dtd input_dtd;
1074
1075         /* Reset the input timing to the screen. Assume always input 0. */
1076         if (!intel_sdvo_set_target_input(intel_sdvo))
1077                 return false;
1078
1079         if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
1080                                                       mode->clock / 10,
1081                                                       mode->hdisplay,
1082                                                       mode->vdisplay))
1083                 return false;
1084
1085         if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
1086                                                    &input_dtd))
1087                 return false;
1088
1089         intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd);
1090         intel_sdvo->dtd_sdvo_flags = input_dtd.part2.sdvo_flags;
1091
1092         return true;
1093 }
1094
1095 static void i9xx_adjust_sdvo_tv_clock(struct intel_crtc_state *pipe_config)
1096 {
1097         unsigned dotclock = pipe_config->port_clock;
1098         struct dpll *clock = &pipe_config->dpll;
1099
1100         /*
1101          * SDVO TV has fixed PLL values depend on its clock range,
1102          * this mirrors vbios setting.
1103          */
1104         if (dotclock >= 100000 && dotclock < 140500) {
1105                 clock->p1 = 2;
1106                 clock->p2 = 10;
1107                 clock->n = 3;
1108                 clock->m1 = 16;
1109                 clock->m2 = 8;
1110         } else if (dotclock >= 140500 && dotclock <= 200000) {
1111                 clock->p1 = 1;
1112                 clock->p2 = 10;
1113                 clock->n = 6;
1114                 clock->m1 = 12;
1115                 clock->m2 = 8;
1116         } else {
1117                 WARN(1, "SDVO TV clock out of range: %i\n", dotclock);
1118         }
1119
1120         pipe_config->clock_set = true;
1121 }
1122
1123 static bool intel_sdvo_compute_config(struct intel_encoder *encoder,
1124                                       struct intel_crtc_state *pipe_config,
1125                                       struct drm_connector_state *conn_state)
1126 {
1127         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1128         struct intel_sdvo_connector_state *intel_sdvo_state =
1129                 to_intel_sdvo_connector_state(conn_state);
1130         struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
1131         struct drm_display_mode *mode = &pipe_config->base.mode;
1132
1133         DRM_DEBUG_KMS("forcing bpc to 8 for SDVO\n");
1134         pipe_config->pipe_bpp = 8*3;
1135
1136         if (HAS_PCH_SPLIT(to_i915(encoder->base.dev)))
1137                 pipe_config->has_pch_encoder = true;
1138
1139         /*
1140          * We need to construct preferred input timings based on our
1141          * output timings.  To do that, we have to set the output
1142          * timings, even though this isn't really the right place in
1143          * the sequence to do it. Oh well.
1144          */
1145         if (intel_sdvo->is_tv) {
1146                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
1147                         return false;
1148
1149                 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1150                                                            mode,
1151                                                            adjusted_mode);
1152                 pipe_config->sdvo_tv_clock = true;
1153         } else if (intel_sdvo->is_lvds) {
1154                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
1155                                                              intel_sdvo->sdvo_lvds_fixed_mode))
1156                         return false;
1157
1158                 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1159                                                            mode,
1160                                                            adjusted_mode);
1161         }
1162
1163         if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
1164                 return false;
1165
1166         /*
1167          * Make the CRTC code factor in the SDVO pixel multiplier.  The
1168          * SDVO device will factor out the multiplier during mode_set.
1169          */
1170         pipe_config->pixel_multiplier =
1171                 intel_sdvo_get_pixel_multiplier(adjusted_mode);
1172
1173         if (intel_sdvo_state->base.force_audio != HDMI_AUDIO_OFF_DVI)
1174                 pipe_config->has_hdmi_sink = intel_sdvo->has_hdmi_monitor;
1175
1176         if (intel_sdvo_state->base.force_audio == HDMI_AUDIO_ON ||
1177             (intel_sdvo_state->base.force_audio == HDMI_AUDIO_AUTO && intel_sdvo->has_hdmi_audio))
1178                 pipe_config->has_audio = true;
1179
1180         if (intel_sdvo_state->base.broadcast_rgb == INTEL_BROADCAST_RGB_AUTO) {
1181                 /*
1182                  * See CEA-861-E - 5.1 Default Encoding Parameters
1183                  *
1184                  * FIXME: This bit is only valid when using TMDS encoding and 8
1185                  * bit per color mode.
1186                  */
1187                 if (pipe_config->has_hdmi_sink &&
1188                     drm_match_cea_mode(adjusted_mode) > 1)
1189                         pipe_config->limited_color_range = true;
1190         } else {
1191                 if (pipe_config->has_hdmi_sink &&
1192                     intel_sdvo_state->base.broadcast_rgb == INTEL_BROADCAST_RGB_LIMITED)
1193                         pipe_config->limited_color_range = true;
1194         }
1195
1196         /* Clock computation needs to happen after pixel multiplier. */
1197         if (intel_sdvo->is_tv)
1198                 i9xx_adjust_sdvo_tv_clock(pipe_config);
1199
1200         /* Set user selected PAR to incoming mode's member */
1201         if (intel_sdvo->is_hdmi)
1202                 adjusted_mode->picture_aspect_ratio = conn_state->picture_aspect_ratio;
1203
1204         return true;
1205 }
1206
1207 #define UPDATE_PROPERTY(input, NAME) \
1208         do { \
1209                 val = input; \
1210                 intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_##NAME, &val, sizeof(val)); \
1211         } while (0)
1212
1213 static void intel_sdvo_update_props(struct intel_sdvo *intel_sdvo,
1214                                     const struct intel_sdvo_connector_state *sdvo_state)
1215 {
1216         const struct drm_connector_state *conn_state = &sdvo_state->base.base;
1217         struct intel_sdvo_connector *intel_sdvo_conn =
1218                 to_intel_sdvo_connector(conn_state->connector);
1219         uint16_t val;
1220
1221         if (intel_sdvo_conn->left)
1222                 UPDATE_PROPERTY(sdvo_state->tv.overscan_h, OVERSCAN_H);
1223
1224         if (intel_sdvo_conn->top)
1225                 UPDATE_PROPERTY(sdvo_state->tv.overscan_v, OVERSCAN_V);
1226
1227         if (intel_sdvo_conn->hpos)
1228                 UPDATE_PROPERTY(sdvo_state->tv.hpos, HPOS);
1229
1230         if (intel_sdvo_conn->vpos)
1231                 UPDATE_PROPERTY(sdvo_state->tv.vpos, VPOS);
1232
1233         if (intel_sdvo_conn->saturation)
1234                 UPDATE_PROPERTY(conn_state->tv.saturation, SATURATION);
1235
1236         if (intel_sdvo_conn->contrast)
1237                 UPDATE_PROPERTY(conn_state->tv.contrast, CONTRAST);
1238
1239         if (intel_sdvo_conn->hue)
1240                 UPDATE_PROPERTY(conn_state->tv.hue, HUE);
1241
1242         if (intel_sdvo_conn->brightness)
1243                 UPDATE_PROPERTY(conn_state->tv.brightness, BRIGHTNESS);
1244
1245         if (intel_sdvo_conn->sharpness)
1246                 UPDATE_PROPERTY(sdvo_state->tv.sharpness, SHARPNESS);
1247
1248         if (intel_sdvo_conn->flicker_filter)
1249                 UPDATE_PROPERTY(sdvo_state->tv.flicker_filter, FLICKER_FILTER);
1250
1251         if (intel_sdvo_conn->flicker_filter_2d)
1252                 UPDATE_PROPERTY(sdvo_state->tv.flicker_filter_2d, FLICKER_FILTER_2D);
1253
1254         if (intel_sdvo_conn->flicker_filter_adaptive)
1255                 UPDATE_PROPERTY(sdvo_state->tv.flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
1256
1257         if (intel_sdvo_conn->tv_chroma_filter)
1258                 UPDATE_PROPERTY(sdvo_state->tv.chroma_filter, TV_CHROMA_FILTER);
1259
1260         if (intel_sdvo_conn->tv_luma_filter)
1261                 UPDATE_PROPERTY(sdvo_state->tv.luma_filter, TV_LUMA_FILTER);
1262
1263         if (intel_sdvo_conn->dot_crawl)
1264                 UPDATE_PROPERTY(sdvo_state->tv.dot_crawl, DOT_CRAWL);
1265
1266 #undef UPDATE_PROPERTY
1267 }
1268
1269 static void intel_sdvo_pre_enable(struct intel_encoder *intel_encoder,
1270                                   const struct intel_crtc_state *crtc_state,
1271                                   const struct drm_connector_state *conn_state)
1272 {
1273         struct drm_i915_private *dev_priv = to_i915(intel_encoder->base.dev);
1274         struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
1275         const struct drm_display_mode *adjusted_mode = &crtc_state->base.adjusted_mode;
1276         const struct intel_sdvo_connector_state *sdvo_state =
1277                 to_intel_sdvo_connector_state(conn_state);
1278         const struct drm_display_mode *mode = &crtc_state->base.mode;
1279         struct intel_sdvo *intel_sdvo = to_sdvo(intel_encoder);
1280         u32 sdvox;
1281         struct intel_sdvo_in_out_map in_out;
1282         struct intel_sdvo_dtd input_dtd, output_dtd;
1283         int rate;
1284
1285         intel_sdvo_update_props(intel_sdvo, sdvo_state);
1286
1287         /*
1288          * First, set the input mapping for the first input to our controlled
1289          * output. This is only correct if we're a single-input device, in
1290          * which case the first input is the output from the appropriate SDVO
1291          * channel on the motherboard.  In a two-input device, the first input
1292          * will be SDVOB and the second SDVOC.
1293          */
1294         in_out.in0 = intel_sdvo->attached_output;
1295         in_out.in1 = 0;
1296
1297         intel_sdvo_set_value(intel_sdvo,
1298                              SDVO_CMD_SET_IN_OUT_MAP,
1299                              &in_out, sizeof(in_out));
1300
1301         /* Set the output timings to the screen */
1302         if (!intel_sdvo_set_target_output(intel_sdvo,
1303                                           intel_sdvo->attached_output))
1304                 return;
1305
1306         /* lvds has a special fixed output timing. */
1307         if (intel_sdvo->is_lvds)
1308                 intel_sdvo_get_dtd_from_mode(&output_dtd,
1309                                              intel_sdvo->sdvo_lvds_fixed_mode);
1310         else
1311                 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1312         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1313                 DRM_INFO("Setting output timings on %s failed\n",
1314                          SDVO_NAME(intel_sdvo));
1315
1316         /* Set the input timing to the screen. Assume always input 0. */
1317         if (!intel_sdvo_set_target_input(intel_sdvo))
1318                 return;
1319
1320         if (crtc_state->has_hdmi_sink) {
1321                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1322                 intel_sdvo_set_colorimetry(intel_sdvo,
1323                                            SDVO_COLORIMETRY_RGB256);
1324                 intel_sdvo_set_avi_infoframe(intel_sdvo, crtc_state);
1325         } else
1326                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
1327
1328         if (intel_sdvo->is_tv &&
1329             !intel_sdvo_set_tv_format(intel_sdvo, conn_state))
1330                 return;
1331
1332         intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1333
1334         if (intel_sdvo->is_tv || intel_sdvo->is_lvds)
1335                 input_dtd.part2.sdvo_flags = intel_sdvo->dtd_sdvo_flags;
1336         if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd))
1337                 DRM_INFO("Setting input timings on %s failed\n",
1338                          SDVO_NAME(intel_sdvo));
1339
1340         switch (crtc_state->pixel_multiplier) {
1341         default:
1342                 WARN(1, "unknown pixel multiplier specified\n");
1343         case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1344         case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1345         case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1346         }
1347         if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1348                 return;
1349
1350         /* Set the SDVO control regs. */
1351         if (INTEL_GEN(dev_priv) >= 4) {
1352                 /* The real mode polarity is set by the SDVO commands, using
1353                  * struct intel_sdvo_dtd. */
1354                 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
1355                 if (!HAS_PCH_SPLIT(dev_priv) && crtc_state->limited_color_range)
1356                         sdvox |= HDMI_COLOR_RANGE_16_235;
1357                 if (INTEL_GEN(dev_priv) < 5)
1358                         sdvox |= SDVO_BORDER_ENABLE;
1359         } else {
1360                 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1361                 if (intel_sdvo->port == PORT_B)
1362                         sdvox &= SDVOB_PRESERVE_MASK;
1363                 else
1364                         sdvox &= SDVOC_PRESERVE_MASK;
1365                 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1366         }
1367
1368         if (HAS_PCH_CPT(dev_priv))
1369                 sdvox |= SDVO_PIPE_SEL_CPT(crtc->pipe);
1370         else
1371                 sdvox |= SDVO_PIPE_SEL(crtc->pipe);
1372
1373         if (crtc_state->has_audio) {
1374                 WARN_ON_ONCE(INTEL_GEN(dev_priv) < 4);
1375                 sdvox |= SDVO_AUDIO_ENABLE;
1376         }
1377
1378         if (INTEL_GEN(dev_priv) >= 4) {
1379                 /* done in crtc_mode_set as the dpll_md reg must be written early */
1380         } else if (IS_I945G(dev_priv) || IS_I945GM(dev_priv) ||
1381                    IS_G33(dev_priv) || IS_PINEVIEW(dev_priv)) {
1382                 /* done in crtc_mode_set as it lives inside the dpll register */
1383         } else {
1384                 sdvox |= (crtc_state->pixel_multiplier - 1)
1385                         << SDVO_PORT_MULTIPLY_SHIFT;
1386         }
1387
1388         if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1389             INTEL_GEN(dev_priv) < 5)
1390                 sdvox |= SDVO_STALL_SELECT;
1391         intel_sdvo_write_sdvox(intel_sdvo, sdvox);
1392 }
1393
1394 static bool intel_sdvo_connector_get_hw_state(struct intel_connector *connector)
1395 {
1396         struct intel_sdvo_connector *intel_sdvo_connector =
1397                 to_intel_sdvo_connector(&connector->base);
1398         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(&connector->base);
1399         u16 active_outputs = 0;
1400
1401         intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1402
1403         if (active_outputs & intel_sdvo_connector->output_flag)
1404                 return true;
1405         else
1406                 return false;
1407 }
1408
1409 bool intel_sdvo_port_enabled(struct drm_i915_private *dev_priv,
1410                              i915_reg_t sdvo_reg, enum pipe *pipe)
1411 {
1412         u32 val;
1413
1414         val = I915_READ(sdvo_reg);
1415
1416         /* asserts want to know the pipe even if the port is disabled */
1417         if (HAS_PCH_CPT(dev_priv))
1418                 *pipe = (val & SDVO_PIPE_SEL_MASK_CPT) >> SDVO_PIPE_SEL_SHIFT_CPT;
1419         else if (IS_CHERRYVIEW(dev_priv))
1420                 *pipe = (val & SDVO_PIPE_SEL_MASK_CHV) >> SDVO_PIPE_SEL_SHIFT_CHV;
1421         else
1422                 *pipe = (val & SDVO_PIPE_SEL_MASK) >> SDVO_PIPE_SEL_SHIFT;
1423
1424         return val & SDVO_ENABLE;
1425 }
1426
1427 static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder,
1428                                     enum pipe *pipe)
1429 {
1430         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
1431         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1432         u16 active_outputs = 0;
1433         bool ret;
1434
1435         intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1436
1437         ret = intel_sdvo_port_enabled(dev_priv, intel_sdvo->sdvo_reg, pipe);
1438
1439         return ret || active_outputs;
1440 }
1441
1442 static void intel_sdvo_get_config(struct intel_encoder *encoder,
1443                                   struct intel_crtc_state *pipe_config)
1444 {
1445         struct drm_device *dev = encoder->base.dev;
1446         struct drm_i915_private *dev_priv = to_i915(dev);
1447         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1448         struct intel_sdvo_dtd dtd;
1449         int encoder_pixel_multiplier = 0;
1450         int dotclock;
1451         u32 flags = 0, sdvox;
1452         u8 val;
1453         bool ret;
1454
1455         pipe_config->output_types |= BIT(INTEL_OUTPUT_SDVO);
1456
1457         sdvox = I915_READ(intel_sdvo->sdvo_reg);
1458
1459         ret = intel_sdvo_get_input_timing(intel_sdvo, &dtd);
1460         if (!ret) {
1461                 /*
1462                  * Some sdvo encoders are not spec compliant and don't
1463                  * implement the mandatory get_timings function.
1464                  */
1465                 DRM_DEBUG_DRIVER("failed to retrieve SDVO DTD\n");
1466                 pipe_config->quirks |= PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS;
1467         } else {
1468                 if (dtd.part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
1469                         flags |= DRM_MODE_FLAG_PHSYNC;
1470                 else
1471                         flags |= DRM_MODE_FLAG_NHSYNC;
1472
1473                 if (dtd.part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
1474                         flags |= DRM_MODE_FLAG_PVSYNC;
1475                 else
1476                         flags |= DRM_MODE_FLAG_NVSYNC;
1477         }
1478
1479         pipe_config->base.adjusted_mode.flags |= flags;
1480
1481         /*
1482          * pixel multiplier readout is tricky: Only on i915g/gm it is stored in
1483          * the sdvo port register, on all other platforms it is part of the dpll
1484          * state. Since the general pipe state readout happens before the
1485          * encoder->get_config we so already have a valid pixel multplier on all
1486          * other platfroms.
1487          */
1488         if (IS_I915G(dev_priv) || IS_I915GM(dev_priv)) {
1489                 pipe_config->pixel_multiplier =
1490                         ((sdvox & SDVO_PORT_MULTIPLY_MASK)
1491                          >> SDVO_PORT_MULTIPLY_SHIFT) + 1;
1492         }
1493
1494         dotclock = pipe_config->port_clock;
1495
1496         if (pipe_config->pixel_multiplier)
1497                 dotclock /= pipe_config->pixel_multiplier;
1498
1499         pipe_config->base.adjusted_mode.crtc_clock = dotclock;
1500
1501         /* Cross check the port pixel multiplier with the sdvo encoder state. */
1502         if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_CLOCK_RATE_MULT,
1503                                  &val, 1)) {
1504                 switch (val) {
1505                 case SDVO_CLOCK_RATE_MULT_1X:
1506                         encoder_pixel_multiplier = 1;
1507                         break;
1508                 case SDVO_CLOCK_RATE_MULT_2X:
1509                         encoder_pixel_multiplier = 2;
1510                         break;
1511                 case SDVO_CLOCK_RATE_MULT_4X:
1512                         encoder_pixel_multiplier = 4;
1513                         break;
1514                 }
1515         }
1516
1517         if (sdvox & HDMI_COLOR_RANGE_16_235)
1518                 pipe_config->limited_color_range = true;
1519
1520         if (sdvox & SDVO_AUDIO_ENABLE)
1521                 pipe_config->has_audio = true;
1522
1523         if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ENCODE,
1524                                  &val, 1)) {
1525                 if (val == SDVO_ENCODE_HDMI)
1526                         pipe_config->has_hdmi_sink = true;
1527         }
1528
1529         WARN(encoder_pixel_multiplier != pipe_config->pixel_multiplier,
1530              "SDVO pixel multiplier mismatch, port: %i, encoder: %i\n",
1531              pipe_config->pixel_multiplier, encoder_pixel_multiplier);
1532 }
1533
1534 static void intel_disable_sdvo(struct intel_encoder *encoder,
1535                                const struct intel_crtc_state *old_crtc_state,
1536                                const struct drm_connector_state *conn_state)
1537 {
1538         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
1539         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1540         struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc);
1541         u32 temp;
1542
1543         intel_sdvo_set_active_outputs(intel_sdvo, 0);
1544         if (0)
1545                 intel_sdvo_set_encoder_power_state(intel_sdvo,
1546                                                    DRM_MODE_DPMS_OFF);
1547
1548         temp = I915_READ(intel_sdvo->sdvo_reg);
1549
1550         temp &= ~SDVO_ENABLE;
1551         intel_sdvo_write_sdvox(intel_sdvo, temp);
1552
1553         /*
1554          * HW workaround for IBX, we need to move the port
1555          * to transcoder A after disabling it to allow the
1556          * matching DP port to be enabled on transcoder A.
1557          */
1558         if (HAS_PCH_IBX(dev_priv) && crtc->pipe == PIPE_B) {
1559                 /*
1560                  * We get CPU/PCH FIFO underruns on the other pipe when
1561                  * doing the workaround. Sweep them under the rug.
1562                  */
1563                 intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, false);
1564                 intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);
1565
1566                 temp &= ~SDVO_PIPE_SEL_MASK;
1567                 temp |= SDVO_ENABLE | SDVO_PIPE_SEL(PIPE_A);
1568                 intel_sdvo_write_sdvox(intel_sdvo, temp);
1569
1570                 temp &= ~SDVO_ENABLE;
1571                 intel_sdvo_write_sdvox(intel_sdvo, temp);
1572
1573                 intel_wait_for_vblank_if_active(dev_priv, PIPE_A);
1574                 intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, true);
1575                 intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true);
1576         }
1577 }
1578
1579 static void pch_disable_sdvo(struct intel_encoder *encoder,
1580                              const struct intel_crtc_state *old_crtc_state,
1581                              const struct drm_connector_state *old_conn_state)
1582 {
1583 }
1584
1585 static void pch_post_disable_sdvo(struct intel_encoder *encoder,
1586                                   const struct intel_crtc_state *old_crtc_state,
1587                                   const struct drm_connector_state *old_conn_state)
1588 {
1589         intel_disable_sdvo(encoder, old_crtc_state, old_conn_state);
1590 }
1591
1592 static void intel_enable_sdvo(struct intel_encoder *encoder,
1593                               const struct intel_crtc_state *pipe_config,
1594                               const struct drm_connector_state *conn_state)
1595 {
1596         struct drm_device *dev = encoder->base.dev;
1597         struct drm_i915_private *dev_priv = to_i915(dev);
1598         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1599         struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc);
1600         u32 temp;
1601         bool input1, input2;
1602         int i;
1603         bool success;
1604
1605         temp = I915_READ(intel_sdvo->sdvo_reg);
1606         temp |= SDVO_ENABLE;
1607         intel_sdvo_write_sdvox(intel_sdvo, temp);
1608
1609         for (i = 0; i < 2; i++)
1610                 intel_wait_for_vblank(dev_priv, intel_crtc->pipe);
1611
1612         success = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1613         /*
1614          * Warn if the device reported failure to sync.
1615          *
1616          * A lot of SDVO devices fail to notify of sync, but it's
1617          * a given it the status is a success, we succeeded.
1618          */
1619         if (success && !input1) {
1620                 DRM_DEBUG_KMS("First %s output reported failure to "
1621                                 "sync\n", SDVO_NAME(intel_sdvo));
1622         }
1623
1624         if (0)
1625                 intel_sdvo_set_encoder_power_state(intel_sdvo,
1626                                                    DRM_MODE_DPMS_ON);
1627         intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1628 }
1629
1630 static enum drm_mode_status
1631 intel_sdvo_mode_valid(struct drm_connector *connector,
1632                       struct drm_display_mode *mode)
1633 {
1634         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1635         int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
1636
1637         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1638                 return MODE_NO_DBLESCAN;
1639
1640         if (intel_sdvo->pixel_clock_min > mode->clock)
1641                 return MODE_CLOCK_LOW;
1642
1643         if (intel_sdvo->pixel_clock_max < mode->clock)
1644                 return MODE_CLOCK_HIGH;
1645
1646         if (mode->clock > max_dotclk)
1647                 return MODE_CLOCK_HIGH;
1648
1649         if (intel_sdvo->is_lvds) {
1650                 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
1651                         return MODE_PANEL;
1652
1653                 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
1654                         return MODE_PANEL;
1655         }
1656
1657         return MODE_OK;
1658 }
1659
1660 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
1661 {
1662         BUILD_BUG_ON(sizeof(*caps) != 8);
1663         if (!intel_sdvo_get_value(intel_sdvo,
1664                                   SDVO_CMD_GET_DEVICE_CAPS,
1665                                   caps, sizeof(*caps)))
1666                 return false;
1667
1668         DRM_DEBUG_KMS("SDVO capabilities:\n"
1669                       "  vendor_id: %d\n"
1670                       "  device_id: %d\n"
1671                       "  device_rev_id: %d\n"
1672                       "  sdvo_version_major: %d\n"
1673                       "  sdvo_version_minor: %d\n"
1674                       "  sdvo_inputs_mask: %d\n"
1675                       "  smooth_scaling: %d\n"
1676                       "  sharp_scaling: %d\n"
1677                       "  up_scaling: %d\n"
1678                       "  down_scaling: %d\n"
1679                       "  stall_support: %d\n"
1680                       "  output_flags: %d\n",
1681                       caps->vendor_id,
1682                       caps->device_id,
1683                       caps->device_rev_id,
1684                       caps->sdvo_version_major,
1685                       caps->sdvo_version_minor,
1686                       caps->sdvo_inputs_mask,
1687                       caps->smooth_scaling,
1688                       caps->sharp_scaling,
1689                       caps->up_scaling,
1690                       caps->down_scaling,
1691                       caps->stall_support,
1692                       caps->output_flags);
1693
1694         return true;
1695 }
1696
1697 static uint16_t intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo)
1698 {
1699         struct drm_i915_private *dev_priv = to_i915(intel_sdvo->base.base.dev);
1700         uint16_t hotplug;
1701
1702         if (!I915_HAS_HOTPLUG(dev_priv))
1703                 return 0;
1704
1705         /*
1706          * HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
1707          * on the line.
1708          */
1709         if (IS_I945G(dev_priv) || IS_I945GM(dev_priv))
1710                 return 0;
1711
1712         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1713                                         &hotplug, sizeof(hotplug)))
1714                 return 0;
1715
1716         return hotplug;
1717 }
1718
1719 static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
1720 {
1721         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1722
1723         intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG,
1724                              &intel_sdvo->hotplug_active, 2);
1725 }
1726
1727 static bool intel_sdvo_hotplug(struct intel_encoder *encoder,
1728                                struct intel_connector *connector)
1729 {
1730         intel_sdvo_enable_hotplug(encoder);
1731
1732         return intel_encoder_hotplug(encoder, connector);
1733 }
1734
1735 static bool
1736 intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
1737 {
1738         /* Is there more than one type of output? */
1739         return hweight16(intel_sdvo->caps.output_flags) > 1;
1740 }
1741
1742 static struct edid *
1743 intel_sdvo_get_edid(struct drm_connector *connector)
1744 {
1745         struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1746         return drm_get_edid(connector, &sdvo->ddc);
1747 }
1748
1749 /* Mac mini hack -- use the same DDC as the analog connector */
1750 static struct edid *
1751 intel_sdvo_get_analog_edid(struct drm_connector *connector)
1752 {
1753         struct drm_i915_private *dev_priv = to_i915(connector->dev);
1754
1755         return drm_get_edid(connector,
1756                             intel_gmbus_get_adapter(dev_priv,
1757                                                     dev_priv->vbt.crt_ddc_pin));
1758 }
1759
1760 static enum drm_connector_status
1761 intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
1762 {
1763         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1764         enum drm_connector_status status;
1765         struct edid *edid;
1766
1767         edid = intel_sdvo_get_edid(connector);
1768
1769         if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
1770                 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
1771
1772                 /*
1773                  * Don't use the 1 as the argument of DDC bus switch to get
1774                  * the EDID. It is used for SDVO SPD ROM.
1775                  */
1776                 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1777                         intel_sdvo->ddc_bus = ddc;
1778                         edid = intel_sdvo_get_edid(connector);
1779                         if (edid)
1780                                 break;
1781                 }
1782                 /*
1783                  * If we found the EDID on the other bus,
1784                  * assume that is the correct DDC bus.
1785                  */
1786                 if (edid == NULL)
1787                         intel_sdvo->ddc_bus = saved_ddc;
1788         }
1789
1790         /*
1791          * When there is no edid and no monitor is connected with VGA
1792          * port, try to use the CRT ddc to read the EDID for DVI-connector.
1793          */
1794         if (edid == NULL)
1795                 edid = intel_sdvo_get_analog_edid(connector);
1796
1797         status = connector_status_unknown;
1798         if (edid != NULL) {
1799                 /* DDC bus is shared, match EDID to connector type */
1800                 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1801                         status = connector_status_connected;
1802                         if (intel_sdvo->is_hdmi) {
1803                                 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1804                                 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1805                                 intel_sdvo->rgb_quant_range_selectable =
1806                                         drm_rgb_quant_range_selectable(edid);
1807                         }
1808                 } else
1809                         status = connector_status_disconnected;
1810                 kfree(edid);
1811         }
1812
1813         return status;
1814 }
1815
1816 static bool
1817 intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
1818                                   struct edid *edid)
1819 {
1820         bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1821         bool connector_is_digital = !!IS_DIGITAL(sdvo);
1822
1823         DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
1824                       connector_is_digital, monitor_is_digital);
1825         return connector_is_digital == monitor_is_digital;
1826 }
1827
1828 static enum drm_connector_status
1829 intel_sdvo_detect(struct drm_connector *connector, bool force)
1830 {
1831         uint16_t response;
1832         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1833         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1834         enum drm_connector_status ret;
1835
1836         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1837                       connector->base.id, connector->name);
1838
1839         if (!intel_sdvo_get_value(intel_sdvo,
1840                                   SDVO_CMD_GET_ATTACHED_DISPLAYS,
1841                                   &response, 2))
1842                 return connector_status_unknown;
1843
1844         DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1845                       response & 0xff, response >> 8,
1846                       intel_sdvo_connector->output_flag);
1847
1848         if (response == 0)
1849                 return connector_status_disconnected;
1850
1851         intel_sdvo->attached_output = response;
1852
1853         intel_sdvo->has_hdmi_monitor = false;
1854         intel_sdvo->has_hdmi_audio = false;
1855         intel_sdvo->rgb_quant_range_selectable = false;
1856
1857         if ((intel_sdvo_connector->output_flag & response) == 0)
1858                 ret = connector_status_disconnected;
1859         else if (IS_TMDS(intel_sdvo_connector))
1860                 ret = intel_sdvo_tmds_sink_detect(connector);
1861         else {
1862                 struct edid *edid;
1863
1864                 /* if we have an edid check it matches the connection */
1865                 edid = intel_sdvo_get_edid(connector);
1866                 if (edid == NULL)
1867                         edid = intel_sdvo_get_analog_edid(connector);
1868                 if (edid != NULL) {
1869                         if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
1870                                                               edid))
1871                                 ret = connector_status_connected;
1872                         else
1873                                 ret = connector_status_disconnected;
1874
1875                         kfree(edid);
1876                 } else
1877                         ret = connector_status_connected;
1878         }
1879
1880         /* May update encoder flag for like clock for SDVO TV, etc.*/
1881         if (ret == connector_status_connected) {
1882                 intel_sdvo->is_tv = false;
1883                 intel_sdvo->is_lvds = false;
1884
1885                 if (response & SDVO_TV_MASK)
1886                         intel_sdvo->is_tv = true;
1887                 if (response & SDVO_LVDS_MASK)
1888                         intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
1889         }
1890
1891         return ret;
1892 }
1893
1894 static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1895 {
1896         struct edid *edid;
1897
1898         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1899                       connector->base.id, connector->name);
1900
1901         /* set the bus switch and get the modes */
1902         edid = intel_sdvo_get_edid(connector);
1903
1904         /*
1905          * Mac mini hack.  On this device, the DVI-I connector shares one DDC
1906          * link between analog and digital outputs. So, if the regular SDVO
1907          * DDC fails, check to see if the analog output is disconnected, in
1908          * which case we'll look there for the digital DDC data.
1909          */
1910         if (edid == NULL)
1911                 edid = intel_sdvo_get_analog_edid(connector);
1912
1913         if (edid != NULL) {
1914                 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
1915                                                       edid)) {
1916                         drm_mode_connector_update_edid_property(connector, edid);
1917                         drm_add_edid_modes(connector, edid);
1918                 }
1919
1920                 kfree(edid);
1921         }
1922 }
1923
1924 /*
1925  * Set of SDVO TV modes.
1926  * Note!  This is in reply order (see loop in get_tv_modes).
1927  * XXX: all 60Hz refresh?
1928  */
1929 static const struct drm_display_mode sdvo_tv_modes[] = {
1930         { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1931                    416, 0, 200, 201, 232, 233, 0,
1932                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1933         { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1934                    416, 0, 240, 241, 272, 273, 0,
1935                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1936         { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1937                    496, 0, 300, 301, 332, 333, 0,
1938                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1939         { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1940                    736, 0, 350, 351, 382, 383, 0,
1941                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1942         { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1943                    736, 0, 400, 401, 432, 433, 0,
1944                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1945         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1946                    736, 0, 480, 481, 512, 513, 0,
1947                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1948         { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1949                    800, 0, 480, 481, 512, 513, 0,
1950                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1951         { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1952                    800, 0, 576, 577, 608, 609, 0,
1953                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1954         { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1955                    816, 0, 350, 351, 382, 383, 0,
1956                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1957         { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1958                    816, 0, 400, 401, 432, 433, 0,
1959                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1960         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1961                    816, 0, 480, 481, 512, 513, 0,
1962                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1963         { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1964                    816, 0, 540, 541, 572, 573, 0,
1965                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1966         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1967                    816, 0, 576, 577, 608, 609, 0,
1968                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1969         { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1970                    864, 0, 576, 577, 608, 609, 0,
1971                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1972         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1973                    896, 0, 600, 601, 632, 633, 0,
1974                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1975         { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1976                    928, 0, 624, 625, 656, 657, 0,
1977                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1978         { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1979                    1016, 0, 766, 767, 798, 799, 0,
1980                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1981         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1982                    1120, 0, 768, 769, 800, 801, 0,
1983                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1984         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1985                    1376, 0, 1024, 1025, 1056, 1057, 0,
1986                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1987 };
1988
1989 static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1990 {
1991         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1992         const struct drm_connector_state *conn_state = connector->state;
1993         struct intel_sdvo_sdtv_resolution_request tv_res;
1994         uint32_t reply = 0, format_map = 0;
1995         int i;
1996
1997         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1998                       connector->base.id, connector->name);
1999
2000         /*
2001          * Read the list of supported input resolutions for the selected TV
2002          * format.
2003          */
2004         format_map = 1 << conn_state->tv.mode;
2005         memcpy(&tv_res, &format_map,
2006                min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
2007
2008         if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
2009                 return;
2010
2011         BUILD_BUG_ON(sizeof(tv_res) != 3);
2012         if (!intel_sdvo_write_cmd(intel_sdvo,
2013                                   SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
2014                                   &tv_res, sizeof(tv_res)))
2015                 return;
2016         if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
2017                 return;
2018
2019         for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
2020                 if (reply & (1 << i)) {
2021                         struct drm_display_mode *nmode;
2022                         nmode = drm_mode_duplicate(connector->dev,
2023                                                    &sdvo_tv_modes[i]);
2024                         if (nmode)
2025                                 drm_mode_probed_add(connector, nmode);
2026                 }
2027 }
2028
2029 static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
2030 {
2031         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
2032         struct drm_i915_private *dev_priv = to_i915(connector->dev);
2033         struct drm_display_mode *newmode;
2034
2035         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
2036                       connector->base.id, connector->name);
2037
2038         /*
2039          * Fetch modes from VBT. For SDVO prefer the VBT mode since some
2040          * SDVO->LVDS transcoders can't cope with the EDID mode.
2041          */
2042         if (dev_priv->vbt.sdvo_lvds_vbt_mode != NULL) {
2043                 newmode = drm_mode_duplicate(connector->dev,
2044                                              dev_priv->vbt.sdvo_lvds_vbt_mode);
2045                 if (newmode != NULL) {
2046                         /* Guarantee the mode is preferred */
2047                         newmode->type = (DRM_MODE_TYPE_PREFERRED |
2048                                          DRM_MODE_TYPE_DRIVER);
2049                         drm_mode_probed_add(connector, newmode);
2050                 }
2051         }
2052
2053         /*
2054          * Attempt to get the mode list from DDC.
2055          * Assume that the preferred modes are
2056          * arranged in priority order.
2057          */
2058         intel_ddc_get_modes(connector, &intel_sdvo->ddc);
2059
2060         list_for_each_entry(newmode, &connector->probed_modes, head) {
2061                 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
2062                         intel_sdvo->sdvo_lvds_fixed_mode =
2063                                 drm_mode_duplicate(connector->dev, newmode);
2064
2065                         intel_sdvo->is_lvds = true;
2066                         break;
2067                 }
2068         }
2069 }
2070
2071 static int intel_sdvo_get_modes(struct drm_connector *connector)
2072 {
2073         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2074
2075         if (IS_TV(intel_sdvo_connector))
2076                 intel_sdvo_get_tv_modes(connector);
2077         else if (IS_LVDS(intel_sdvo_connector))
2078                 intel_sdvo_get_lvds_modes(connector);
2079         else
2080                 intel_sdvo_get_ddc_modes(connector);
2081
2082         return !list_empty(&connector->probed_modes);
2083 }
2084
2085 static void intel_sdvo_destroy(struct drm_connector *connector)
2086 {
2087         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2088
2089         drm_connector_cleanup(connector);
2090         kfree(intel_sdvo_connector);
2091 }
2092
2093 static int
2094 intel_sdvo_connector_atomic_get_property(struct drm_connector *connector,
2095                                          const struct drm_connector_state *state,
2096                                          struct drm_property *property,
2097                                          uint64_t *val)
2098 {
2099         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2100         const struct intel_sdvo_connector_state *sdvo_state = to_intel_sdvo_connector_state((void *)state);
2101
2102         if (property == intel_sdvo_connector->tv_format) {
2103                 int i;
2104
2105                 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2106                         if (state->tv.mode == intel_sdvo_connector->tv_format_supported[i]) {
2107                                 *val = i;
2108
2109                                 return 0;
2110                         }
2111
2112                 WARN_ON(1);
2113                 *val = 0;
2114         } else if (property == intel_sdvo_connector->top ||
2115                    property == intel_sdvo_connector->bottom)
2116                 *val = intel_sdvo_connector->max_vscan - sdvo_state->tv.overscan_v;
2117         else if (property == intel_sdvo_connector->left ||
2118                  property == intel_sdvo_connector->right)
2119                 *val = intel_sdvo_connector->max_hscan - sdvo_state->tv.overscan_h;
2120         else if (property == intel_sdvo_connector->hpos)
2121                 *val = sdvo_state->tv.hpos;
2122         else if (property == intel_sdvo_connector->vpos)
2123                 *val = sdvo_state->tv.vpos;
2124         else if (property == intel_sdvo_connector->saturation)
2125                 *val = state->tv.saturation;
2126         else if (property == intel_sdvo_connector->contrast)
2127                 *val = state->tv.contrast;
2128         else if (property == intel_sdvo_connector->hue)
2129                 *val = state->tv.hue;
2130         else if (property == intel_sdvo_connector->brightness)
2131                 *val = state->tv.brightness;
2132         else if (property == intel_sdvo_connector->sharpness)
2133                 *val = sdvo_state->tv.sharpness;
2134         else if (property == intel_sdvo_connector->flicker_filter)
2135                 *val = sdvo_state->tv.flicker_filter;
2136         else if (property == intel_sdvo_connector->flicker_filter_2d)
2137                 *val = sdvo_state->tv.flicker_filter_2d;
2138         else if (property == intel_sdvo_connector->flicker_filter_adaptive)
2139                 *val = sdvo_state->tv.flicker_filter_adaptive;
2140         else if (property == intel_sdvo_connector->tv_chroma_filter)
2141                 *val = sdvo_state->tv.chroma_filter;
2142         else if (property == intel_sdvo_connector->tv_luma_filter)
2143                 *val = sdvo_state->tv.luma_filter;
2144         else if (property == intel_sdvo_connector->dot_crawl)
2145                 *val = sdvo_state->tv.dot_crawl;
2146         else
2147                 return intel_digital_connector_atomic_get_property(connector, state, property, val);
2148
2149         return 0;
2150 }
2151
2152 static int
2153 intel_sdvo_connector_atomic_set_property(struct drm_connector *connector,
2154                                          struct drm_connector_state *state,
2155                                          struct drm_property *property,
2156                                          uint64_t val)
2157 {
2158         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2159         struct intel_sdvo_connector_state *sdvo_state = to_intel_sdvo_connector_state(state);
2160
2161         if (property == intel_sdvo_connector->tv_format) {
2162                 state->tv.mode = intel_sdvo_connector->tv_format_supported[val];
2163
2164                 if (state->crtc) {
2165                         struct drm_crtc_state *crtc_state =
2166                                 drm_atomic_get_new_crtc_state(state->state, state->crtc);
2167
2168                         crtc_state->connectors_changed = true;
2169                 }
2170         } else if (property == intel_sdvo_connector->top ||
2171                    property == intel_sdvo_connector->bottom)
2172                 /* Cannot set these independent from each other */
2173                 sdvo_state->tv.overscan_v = intel_sdvo_connector->max_vscan - val;
2174         else if (property == intel_sdvo_connector->left ||
2175                  property == intel_sdvo_connector->right)
2176                 /* Cannot set these independent from each other */
2177                 sdvo_state->tv.overscan_h = intel_sdvo_connector->max_hscan - val;
2178         else if (property == intel_sdvo_connector->hpos)
2179                 sdvo_state->tv.hpos = val;
2180         else if (property == intel_sdvo_connector->vpos)
2181                 sdvo_state->tv.vpos = val;
2182         else if (property == intel_sdvo_connector->saturation)
2183                 state->tv.saturation = val;
2184         else if (property == intel_sdvo_connector->contrast)
2185                 state->tv.contrast = val;
2186         else if (property == intel_sdvo_connector->hue)
2187                 state->tv.hue = val;
2188         else if (property == intel_sdvo_connector->brightness)
2189                 state->tv.brightness = val;
2190         else if (property == intel_sdvo_connector->sharpness)
2191                 sdvo_state->tv.sharpness = val;
2192         else if (property == intel_sdvo_connector->flicker_filter)
2193                 sdvo_state->tv.flicker_filter = val;
2194         else if (property == intel_sdvo_connector->flicker_filter_2d)
2195                 sdvo_state->tv.flicker_filter_2d = val;
2196         else if (property == intel_sdvo_connector->flicker_filter_adaptive)
2197                 sdvo_state->tv.flicker_filter_adaptive = val;
2198         else if (property == intel_sdvo_connector->tv_chroma_filter)
2199                 sdvo_state->tv.chroma_filter = val;
2200         else if (property == intel_sdvo_connector->tv_luma_filter)
2201                 sdvo_state->tv.luma_filter = val;
2202         else if (property == intel_sdvo_connector->dot_crawl)
2203                 sdvo_state->tv.dot_crawl = val;
2204         else
2205                 return intel_digital_connector_atomic_set_property(connector, state, property, val);
2206
2207         return 0;
2208 }
2209
2210 static int
2211 intel_sdvo_connector_register(struct drm_connector *connector)
2212 {
2213         struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
2214         int ret;
2215
2216         ret = intel_connector_register(connector);
2217         if (ret)
2218                 return ret;
2219
2220         return sysfs_create_link(&connector->kdev->kobj,
2221                                  &sdvo->ddc.dev.kobj,
2222                                  sdvo->ddc.dev.kobj.name);
2223 }
2224
2225 static void
2226 intel_sdvo_connector_unregister(struct drm_connector *connector)
2227 {
2228         struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
2229
2230         sysfs_remove_link(&connector->kdev->kobj,
2231                           sdvo->ddc.dev.kobj.name);
2232         intel_connector_unregister(connector);
2233 }
2234
2235 static struct drm_connector_state *
2236 intel_sdvo_connector_duplicate_state(struct drm_connector *connector)
2237 {
2238         struct intel_sdvo_connector_state *state;
2239
2240         state = kmemdup(connector->state, sizeof(*state), GFP_KERNEL);
2241         if (!state)
2242                 return NULL;
2243
2244         __drm_atomic_helper_connector_duplicate_state(connector, &state->base.base);
2245         return &state->base.base;
2246 }
2247
2248 static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
2249         .detect = intel_sdvo_detect,
2250         .fill_modes = drm_helper_probe_single_connector_modes,
2251         .atomic_get_property = intel_sdvo_connector_atomic_get_property,
2252         .atomic_set_property = intel_sdvo_connector_atomic_set_property,
2253         .late_register = intel_sdvo_connector_register,
2254         .early_unregister = intel_sdvo_connector_unregister,
2255         .destroy = intel_sdvo_destroy,
2256         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
2257         .atomic_duplicate_state = intel_sdvo_connector_duplicate_state,
2258 };
2259
2260 static int intel_sdvo_atomic_check(struct drm_connector *conn,
2261                                    struct drm_connector_state *new_conn_state)
2262 {
2263         struct drm_atomic_state *state = new_conn_state->state;
2264         struct drm_connector_state *old_conn_state =
2265                 drm_atomic_get_old_connector_state(state, conn);
2266         struct intel_sdvo_connector_state *old_state =
2267                 to_intel_sdvo_connector_state(old_conn_state);
2268         struct intel_sdvo_connector_state *new_state =
2269                 to_intel_sdvo_connector_state(new_conn_state);
2270
2271         if (new_conn_state->crtc &&
2272             (memcmp(&old_state->tv, &new_state->tv, sizeof(old_state->tv)) ||
2273              memcmp(&old_conn_state->tv, &new_conn_state->tv, sizeof(old_conn_state->tv)))) {
2274                 struct drm_crtc_state *crtc_state =
2275                         drm_atomic_get_new_crtc_state(new_conn_state->state,
2276                                                       new_conn_state->crtc);
2277
2278                 crtc_state->connectors_changed = true;
2279         }
2280
2281         return intel_digital_connector_atomic_check(conn, new_conn_state);
2282 }
2283
2284 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
2285         .get_modes = intel_sdvo_get_modes,
2286         .mode_valid = intel_sdvo_mode_valid,
2287         .atomic_check = intel_sdvo_atomic_check,
2288 };
2289
2290 static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
2291 {
2292         struct intel_sdvo *intel_sdvo = to_sdvo(to_intel_encoder(encoder));
2293
2294         if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
2295                 drm_mode_destroy(encoder->dev,
2296                                  intel_sdvo->sdvo_lvds_fixed_mode);
2297
2298         i2c_del_adapter(&intel_sdvo->ddc);
2299         intel_encoder_destroy(encoder);
2300 }
2301
2302 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
2303         .destroy = intel_sdvo_enc_destroy,
2304 };
2305
2306 static void
2307 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
2308 {
2309         uint16_t mask = 0;
2310         unsigned int num_bits;
2311
2312         /*
2313          * Make a mask of outputs less than or equal to our own priority in the
2314          * list.
2315          */
2316         switch (sdvo->controlled_output) {
2317         case SDVO_OUTPUT_LVDS1:
2318                 mask |= SDVO_OUTPUT_LVDS1;
2319         case SDVO_OUTPUT_LVDS0:
2320                 mask |= SDVO_OUTPUT_LVDS0;
2321         case SDVO_OUTPUT_TMDS1:
2322                 mask |= SDVO_OUTPUT_TMDS1;
2323         case SDVO_OUTPUT_TMDS0:
2324                 mask |= SDVO_OUTPUT_TMDS0;
2325         case SDVO_OUTPUT_RGB1:
2326                 mask |= SDVO_OUTPUT_RGB1;
2327         case SDVO_OUTPUT_RGB0:
2328                 mask |= SDVO_OUTPUT_RGB0;
2329                 break;
2330         }
2331
2332         /* Count bits to find what number we are in the priority list. */
2333         mask &= sdvo->caps.output_flags;
2334         num_bits = hweight16(mask);
2335         /* If more than 3 outputs, default to DDC bus 3 for now. */
2336         if (num_bits > 3)
2337                 num_bits = 3;
2338
2339         /* Corresponds to SDVO_CONTROL_BUS_DDCx */
2340         sdvo->ddc_bus = 1 << num_bits;
2341 }
2342
2343 /*
2344  * Choose the appropriate DDC bus for control bus switch command for this
2345  * SDVO output based on the controlled output.
2346  *
2347  * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
2348  * outputs, then LVDS outputs.
2349  */
2350 static void
2351 intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
2352                           struct intel_sdvo *sdvo)
2353 {
2354         struct sdvo_device_mapping *mapping;
2355
2356         if (sdvo->port == PORT_B)
2357                 mapping = &dev_priv->vbt.sdvo_mappings[0];
2358         else
2359                 mapping = &dev_priv->vbt.sdvo_mappings[1];
2360
2361         if (mapping->initialized)
2362                 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
2363         else
2364                 intel_sdvo_guess_ddc_bus(sdvo);
2365 }
2366
2367 static void
2368 intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
2369                           struct intel_sdvo *sdvo)
2370 {
2371         struct sdvo_device_mapping *mapping;
2372         u8 pin;
2373
2374         if (sdvo->port == PORT_B)
2375                 mapping = &dev_priv->vbt.sdvo_mappings[0];
2376         else
2377                 mapping = &dev_priv->vbt.sdvo_mappings[1];
2378
2379         if (mapping->initialized &&
2380             intel_gmbus_is_valid_pin(dev_priv, mapping->i2c_pin))
2381                 pin = mapping->i2c_pin;
2382         else
2383                 pin = GMBUS_PIN_DPB;
2384
2385         sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin);
2386
2387         /*
2388          * With gmbus we should be able to drive sdvo i2c at 2MHz, but somehow
2389          * our code totally fails once we start using gmbus. Hence fall back to
2390          * bit banging for now.
2391          */
2392         intel_gmbus_force_bit(sdvo->i2c, true);
2393 }
2394
2395 /* undo any changes intel_sdvo_select_i2c_bus() did to sdvo->i2c */
2396 static void
2397 intel_sdvo_unselect_i2c_bus(struct intel_sdvo *sdvo)
2398 {
2399         intel_gmbus_force_bit(sdvo->i2c, false);
2400 }
2401
2402 static bool
2403 intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
2404 {
2405         return intel_sdvo_check_supp_encode(intel_sdvo);
2406 }
2407
2408 static u8
2409 intel_sdvo_get_slave_addr(struct drm_i915_private *dev_priv,
2410                           struct intel_sdvo *sdvo)
2411 {
2412         struct sdvo_device_mapping *my_mapping, *other_mapping;
2413
2414         if (sdvo->port == PORT_B) {
2415                 my_mapping = &dev_priv->vbt.sdvo_mappings[0];
2416                 other_mapping = &dev_priv->vbt.sdvo_mappings[1];
2417         } else {
2418                 my_mapping = &dev_priv->vbt.sdvo_mappings[1];
2419                 other_mapping = &dev_priv->vbt.sdvo_mappings[0];
2420         }
2421
2422         /* If the BIOS described our SDVO device, take advantage of it. */
2423         if (my_mapping->slave_addr)
2424                 return my_mapping->slave_addr;
2425
2426         /*
2427          * If the BIOS only described a different SDVO device, use the
2428          * address that it isn't using.
2429          */
2430         if (other_mapping->slave_addr) {
2431                 if (other_mapping->slave_addr == 0x70)
2432                         return 0x72;
2433                 else
2434                         return 0x70;
2435         }
2436
2437         /*
2438          * No SDVO device info is found for another DVO port,
2439          * so use mapping assumption we had before BIOS parsing.
2440          */
2441         if (sdvo->port == PORT_B)
2442                 return 0x70;
2443         else
2444                 return 0x72;
2445 }
2446
2447 static int
2448 intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
2449                           struct intel_sdvo *encoder)
2450 {
2451         struct drm_connector *drm_connector;
2452         int ret;
2453
2454         drm_connector = &connector->base.base;
2455         ret = drm_connector_init(encoder->base.base.dev,
2456                            drm_connector,
2457                            &intel_sdvo_connector_funcs,
2458                            connector->base.base.connector_type);
2459         if (ret < 0)
2460                 return ret;
2461
2462         drm_connector_helper_add(drm_connector,
2463                                  &intel_sdvo_connector_helper_funcs);
2464
2465         connector->base.base.interlace_allowed = 1;
2466         connector->base.base.doublescan_allowed = 0;
2467         connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
2468         connector->base.get_hw_state = intel_sdvo_connector_get_hw_state;
2469
2470         intel_connector_attach_encoder(&connector->base, &encoder->base);
2471
2472         return 0;
2473 }
2474
2475 static void
2476 intel_sdvo_add_hdmi_properties(struct intel_sdvo *intel_sdvo,
2477                                struct intel_sdvo_connector *connector)
2478 {
2479         struct drm_i915_private *dev_priv = to_i915(connector->base.base.dev);
2480
2481         intel_attach_force_audio_property(&connector->base.base);
2482         if (INTEL_GEN(dev_priv) >= 4 && IS_MOBILE(dev_priv)) {
2483                 intel_attach_broadcast_rgb_property(&connector->base.base);
2484         }
2485         intel_attach_aspect_ratio_property(&connector->base.base);
2486         connector->base.base.state->picture_aspect_ratio = HDMI_PICTURE_ASPECT_NONE;
2487 }
2488
2489 static struct intel_sdvo_connector *intel_sdvo_connector_alloc(void)
2490 {
2491         struct intel_sdvo_connector *sdvo_connector;
2492         struct intel_sdvo_connector_state *conn_state;
2493
2494         sdvo_connector = kzalloc(sizeof(*sdvo_connector), GFP_KERNEL);
2495         if (!sdvo_connector)
2496                 return NULL;
2497
2498         conn_state = kzalloc(sizeof(*conn_state), GFP_KERNEL);
2499         if (!conn_state) {
2500                 kfree(sdvo_connector);
2501                 return NULL;
2502         }
2503
2504         __drm_atomic_helper_connector_reset(&sdvo_connector->base.base,
2505                                             &conn_state->base.base);
2506
2507         return sdvo_connector;
2508 }
2509
2510 static bool
2511 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
2512 {
2513         struct drm_encoder *encoder = &intel_sdvo->base.base;
2514         struct drm_i915_private *dev_priv = to_i915(encoder->dev);
2515         struct drm_connector *connector;
2516         struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
2517         struct intel_connector *intel_connector;
2518         struct intel_sdvo_connector *intel_sdvo_connector;
2519
2520         DRM_DEBUG_KMS("initialising DVI device %d\n", device);
2521
2522         intel_sdvo_connector = intel_sdvo_connector_alloc();
2523         if (!intel_sdvo_connector)
2524                 return false;
2525
2526         if (device == 0) {
2527                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
2528                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
2529         } else if (device == 1) {
2530                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
2531                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
2532         }
2533
2534         intel_connector = &intel_sdvo_connector->base;
2535         connector = &intel_connector->base;
2536         if (intel_sdvo_get_hotplug_support(intel_sdvo) &
2537                 intel_sdvo_connector->output_flag) {
2538                 intel_sdvo->hotplug_active |= intel_sdvo_connector->output_flag;
2539                 /*
2540                  * Some SDVO devices have one-shot hotplug interrupts.
2541                  * Ensure that they get re-enabled when an interrupt happens.
2542                  */
2543                 intel_encoder->hotplug = intel_sdvo_hotplug;
2544                 intel_sdvo_enable_hotplug(intel_encoder);
2545         } else {
2546                 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2547         }
2548         encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2549         connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2550
2551         /* gen3 doesn't do the hdmi bits in the SDVO register */
2552         if (INTEL_GEN(dev_priv) >= 4 &&
2553             intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
2554                 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2555                 intel_sdvo->is_hdmi = true;
2556         }
2557
2558         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2559                 kfree(intel_sdvo_connector);
2560                 return false;
2561         }
2562
2563         if (intel_sdvo->is_hdmi)
2564                 intel_sdvo_add_hdmi_properties(intel_sdvo, intel_sdvo_connector);
2565
2566         return true;
2567 }
2568
2569 static bool
2570 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
2571 {
2572         struct drm_encoder *encoder = &intel_sdvo->base.base;
2573         struct drm_connector *connector;
2574         struct intel_connector *intel_connector;
2575         struct intel_sdvo_connector *intel_sdvo_connector;
2576
2577         DRM_DEBUG_KMS("initialising TV type %d\n", type);
2578
2579         intel_sdvo_connector = intel_sdvo_connector_alloc();
2580         if (!intel_sdvo_connector)
2581                 return false;
2582
2583         intel_connector = &intel_sdvo_connector->base;
2584         connector = &intel_connector->base;
2585         encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2586         connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2587
2588         intel_sdvo->controlled_output |= type;
2589         intel_sdvo_connector->output_flag = type;
2590
2591         intel_sdvo->is_tv = true;
2592
2593         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2594                 kfree(intel_sdvo_connector);
2595                 return false;
2596         }
2597
2598         if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2599                 goto err;
2600
2601         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2602                 goto err;
2603
2604         return true;
2605
2606 err:
2607         intel_sdvo_destroy(connector);
2608         return false;
2609 }
2610
2611 static bool
2612 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
2613 {
2614         struct drm_encoder *encoder = &intel_sdvo->base.base;
2615         struct drm_connector *connector;
2616         struct intel_connector *intel_connector;
2617         struct intel_sdvo_connector *intel_sdvo_connector;
2618
2619         DRM_DEBUG_KMS("initialising analog device %d\n", device);
2620
2621         intel_sdvo_connector = intel_sdvo_connector_alloc();
2622         if (!intel_sdvo_connector)
2623                 return false;
2624
2625         intel_connector = &intel_sdvo_connector->base;
2626         connector = &intel_connector->base;
2627         intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2628         encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2629         connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2630
2631         if (device == 0) {
2632                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2633                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2634         } else if (device == 1) {
2635                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2636                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2637         }
2638
2639         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2640                 kfree(intel_sdvo_connector);
2641                 return false;
2642         }
2643
2644         return true;
2645 }
2646
2647 static bool
2648 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2649 {
2650         struct drm_encoder *encoder = &intel_sdvo->base.base;
2651         struct drm_connector *connector;
2652         struct intel_connector *intel_connector;
2653         struct intel_sdvo_connector *intel_sdvo_connector;
2654
2655         DRM_DEBUG_KMS("initialising LVDS device %d\n", device);
2656
2657         intel_sdvo_connector = intel_sdvo_connector_alloc();
2658         if (!intel_sdvo_connector)
2659                 return false;
2660
2661         intel_connector = &intel_sdvo_connector->base;
2662         connector = &intel_connector->base;
2663         encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2664         connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2665
2666         if (device == 0) {
2667                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2668                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2669         } else if (device == 1) {
2670                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2671                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2672         }
2673
2674         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2675                 kfree(intel_sdvo_connector);
2676                 return false;
2677         }
2678
2679         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2680                 goto err;
2681
2682         return true;
2683
2684 err:
2685         intel_sdvo_destroy(connector);
2686         return false;
2687 }
2688
2689 static bool
2690 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
2691 {
2692         intel_sdvo->is_tv = false;
2693         intel_sdvo->is_lvds = false;
2694
2695         /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2696
2697         if (flags & SDVO_OUTPUT_TMDS0)
2698                 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
2699                         return false;
2700
2701         if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2702                 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
2703                         return false;
2704
2705         /* TV has no XXX1 function block */
2706         if (flags & SDVO_OUTPUT_SVID0)
2707                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
2708                         return false;
2709
2710         if (flags & SDVO_OUTPUT_CVBS0)
2711                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
2712                         return false;
2713
2714         if (flags & SDVO_OUTPUT_YPRPB0)
2715                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0))
2716                         return false;
2717
2718         if (flags & SDVO_OUTPUT_RGB0)
2719                 if (!intel_sdvo_analog_init(intel_sdvo, 0))
2720                         return false;
2721
2722         if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2723                 if (!intel_sdvo_analog_init(intel_sdvo, 1))
2724                         return false;
2725
2726         if (flags & SDVO_OUTPUT_LVDS0)
2727                 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
2728                         return false;
2729
2730         if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2731                 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
2732                         return false;
2733
2734         if ((flags & SDVO_OUTPUT_MASK) == 0) {
2735                 unsigned char bytes[2];
2736
2737                 intel_sdvo->controlled_output = 0;
2738                 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
2739                 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2740                               SDVO_NAME(intel_sdvo),
2741                               bytes[0], bytes[1]);
2742                 return false;
2743         }
2744         intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
2745
2746         return true;
2747 }
2748
2749 static void intel_sdvo_output_cleanup(struct intel_sdvo *intel_sdvo)
2750 {
2751         struct drm_device *dev = intel_sdvo->base.base.dev;
2752         struct drm_connector *connector, *tmp;
2753
2754         list_for_each_entry_safe(connector, tmp,
2755                                  &dev->mode_config.connector_list, head) {
2756                 if (intel_attached_encoder(connector) == &intel_sdvo->base) {
2757                         drm_connector_unregister(connector);
2758                         intel_sdvo_destroy(connector);
2759                 }
2760         }
2761 }
2762
2763 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2764                                           struct intel_sdvo_connector *intel_sdvo_connector,
2765                                           int type)
2766 {
2767         struct drm_device *dev = intel_sdvo->base.base.dev;
2768         struct intel_sdvo_tv_format format;
2769         uint32_t format_map, i;
2770
2771         if (!intel_sdvo_set_target_output(intel_sdvo, type))
2772                 return false;
2773
2774         BUILD_BUG_ON(sizeof(format) != 6);
2775         if (!intel_sdvo_get_value(intel_sdvo,
2776                                   SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2777                                   &format, sizeof(format)))
2778                 return false;
2779
2780         memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
2781
2782         if (format_map == 0)
2783                 return false;
2784
2785         intel_sdvo_connector->format_supported_num = 0;
2786         for (i = 0 ; i < TV_FORMAT_NUM; i++)
2787                 if (format_map & (1 << i))
2788                         intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
2789
2790
2791         intel_sdvo_connector->tv_format =
2792                         drm_property_create(dev, DRM_MODE_PROP_ENUM,
2793                                             "mode", intel_sdvo_connector->format_supported_num);
2794         if (!intel_sdvo_connector->tv_format)
2795                 return false;
2796
2797         for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2798                 drm_property_add_enum(intel_sdvo_connector->tv_format, i,
2799                                       tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
2800
2801         intel_sdvo_connector->base.base.state->tv.mode = intel_sdvo_connector->tv_format_supported[0];
2802         drm_object_attach_property(&intel_sdvo_connector->base.base.base,
2803                                    intel_sdvo_connector->tv_format, 0);
2804         return true;
2805
2806 }
2807
2808 #define _ENHANCEMENT(state_assignment, name, NAME) do { \
2809         if (enhancements.name) { \
2810                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2811                     !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2812                         return false; \
2813                 intel_sdvo_connector->name = \
2814                         drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
2815                 if (!intel_sdvo_connector->name) return false; \
2816                 state_assignment = response; \
2817                 drm_object_attach_property(&connector->base, \
2818                                            intel_sdvo_connector->name, 0); \
2819                 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2820                               data_value[0], data_value[1], response); \
2821         } \
2822 } while (0)
2823
2824 #define ENHANCEMENT(state, name, NAME) _ENHANCEMENT((state)->name, name, NAME)
2825
2826 static bool
2827 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2828                                       struct intel_sdvo_connector *intel_sdvo_connector,
2829                                       struct intel_sdvo_enhancements_reply enhancements)
2830 {
2831         struct drm_device *dev = intel_sdvo->base.base.dev;
2832         struct drm_connector *connector = &intel_sdvo_connector->base.base;
2833         struct drm_connector_state *conn_state = connector->state;
2834         struct intel_sdvo_connector_state *sdvo_state =
2835                 to_intel_sdvo_connector_state(conn_state);
2836         uint16_t response, data_value[2];
2837
2838         /* when horizontal overscan is supported, Add the left/right property */
2839         if (enhancements.overscan_h) {
2840                 if (!intel_sdvo_get_value(intel_sdvo,
2841                                           SDVO_CMD_GET_MAX_OVERSCAN_H,
2842                                           &data_value, 4))
2843                         return false;
2844
2845                 if (!intel_sdvo_get_value(intel_sdvo,
2846                                           SDVO_CMD_GET_OVERSCAN_H,
2847                                           &response, 2))
2848                         return false;
2849
2850                 sdvo_state->tv.overscan_h = response;
2851
2852                 intel_sdvo_connector->max_hscan = data_value[0];
2853                 intel_sdvo_connector->left =
2854                         drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
2855                 if (!intel_sdvo_connector->left)
2856                         return false;
2857
2858                 drm_object_attach_property(&connector->base,
2859                                            intel_sdvo_connector->left, 0);
2860
2861                 intel_sdvo_connector->right =
2862                         drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
2863                 if (!intel_sdvo_connector->right)
2864                         return false;
2865
2866                 drm_object_attach_property(&connector->base,
2867                                               intel_sdvo_connector->right, 0);
2868                 DRM_DEBUG_KMS("h_overscan: max %d, "
2869                               "default %d, current %d\n",
2870                               data_value[0], data_value[1], response);
2871         }
2872
2873         if (enhancements.overscan_v) {
2874                 if (!intel_sdvo_get_value(intel_sdvo,
2875                                           SDVO_CMD_GET_MAX_OVERSCAN_V,
2876                                           &data_value, 4))
2877                         return false;
2878
2879                 if (!intel_sdvo_get_value(intel_sdvo,
2880                                           SDVO_CMD_GET_OVERSCAN_V,
2881                                           &response, 2))
2882                         return false;
2883
2884                 sdvo_state->tv.overscan_v = response;
2885
2886                 intel_sdvo_connector->max_vscan = data_value[0];
2887                 intel_sdvo_connector->top =
2888                         drm_property_create_range(dev, 0,
2889                                             "top_margin", 0, data_value[0]);
2890                 if (!intel_sdvo_connector->top)
2891                         return false;
2892
2893                 drm_object_attach_property(&connector->base,
2894                                            intel_sdvo_connector->top, 0);
2895
2896                 intel_sdvo_connector->bottom =
2897                         drm_property_create_range(dev, 0,
2898                                             "bottom_margin", 0, data_value[0]);
2899                 if (!intel_sdvo_connector->bottom)
2900                         return false;
2901
2902                 drm_object_attach_property(&connector->base,
2903                                               intel_sdvo_connector->bottom, 0);
2904                 DRM_DEBUG_KMS("v_overscan: max %d, "
2905                               "default %d, current %d\n",
2906                               data_value[0], data_value[1], response);
2907         }
2908
2909         ENHANCEMENT(&sdvo_state->tv, hpos, HPOS);
2910         ENHANCEMENT(&sdvo_state->tv, vpos, VPOS);
2911         ENHANCEMENT(&conn_state->tv, saturation, SATURATION);
2912         ENHANCEMENT(&conn_state->tv, contrast, CONTRAST);
2913         ENHANCEMENT(&conn_state->tv, hue, HUE);
2914         ENHANCEMENT(&conn_state->tv, brightness, BRIGHTNESS);
2915         ENHANCEMENT(&sdvo_state->tv, sharpness, SHARPNESS);
2916         ENHANCEMENT(&sdvo_state->tv, flicker_filter, FLICKER_FILTER);
2917         ENHANCEMENT(&sdvo_state->tv, flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2918         ENHANCEMENT(&sdvo_state->tv, flicker_filter_2d, FLICKER_FILTER_2D);
2919         _ENHANCEMENT(sdvo_state->tv.chroma_filter, tv_chroma_filter, TV_CHROMA_FILTER);
2920         _ENHANCEMENT(sdvo_state->tv.luma_filter, tv_luma_filter, TV_LUMA_FILTER);
2921
2922         if (enhancements.dot_crawl) {
2923                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2924                         return false;
2925
2926                 sdvo_state->tv.dot_crawl = response & 0x1;
2927                 intel_sdvo_connector->dot_crawl =
2928                         drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
2929                 if (!intel_sdvo_connector->dot_crawl)
2930                         return false;
2931
2932                 drm_object_attach_property(&connector->base,
2933                                            intel_sdvo_connector->dot_crawl, 0);
2934                 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2935         }
2936
2937         return true;
2938 }
2939
2940 static bool
2941 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2942                                         struct intel_sdvo_connector *intel_sdvo_connector,
2943                                         struct intel_sdvo_enhancements_reply enhancements)
2944 {
2945         struct drm_device *dev = intel_sdvo->base.base.dev;
2946         struct drm_connector *connector = &intel_sdvo_connector->base.base;
2947         uint16_t response, data_value[2];
2948
2949         ENHANCEMENT(&connector->state->tv, brightness, BRIGHTNESS);
2950
2951         return true;
2952 }
2953 #undef ENHANCEMENT
2954 #undef _ENHANCEMENT
2955
2956 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2957                                                struct intel_sdvo_connector *intel_sdvo_connector)
2958 {
2959         union {
2960                 struct intel_sdvo_enhancements_reply reply;
2961                 uint16_t response;
2962         } enhancements;
2963
2964         BUILD_BUG_ON(sizeof(enhancements) != 2);
2965
2966         if (!intel_sdvo_get_value(intel_sdvo,
2967                                   SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2968                                   &enhancements, sizeof(enhancements)) ||
2969             enhancements.response == 0) {
2970                 DRM_DEBUG_KMS("No enhancement is supported\n");
2971                 return true;
2972         }
2973
2974         if (IS_TV(intel_sdvo_connector))
2975                 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2976         else if (IS_LVDS(intel_sdvo_connector))
2977                 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2978         else
2979                 return true;
2980 }
2981
2982 static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2983                                      struct i2c_msg *msgs,
2984                                      int num)
2985 {
2986         struct intel_sdvo *sdvo = adapter->algo_data;
2987
2988         if (!__intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2989                 return -EIO;
2990
2991         return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2992 }
2993
2994 static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2995 {
2996         struct intel_sdvo *sdvo = adapter->algo_data;
2997         return sdvo->i2c->algo->functionality(sdvo->i2c);
2998 }
2999
3000 static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
3001         .master_xfer    = intel_sdvo_ddc_proxy_xfer,
3002         .functionality  = intel_sdvo_ddc_proxy_func
3003 };
3004
3005 static void proxy_lock_bus(struct i2c_adapter *adapter,
3006                            unsigned int flags)
3007 {
3008         struct intel_sdvo *sdvo = adapter->algo_data;
3009         sdvo->i2c->lock_ops->lock_bus(sdvo->i2c, flags);
3010 }
3011
3012 static int proxy_trylock_bus(struct i2c_adapter *adapter,
3013                              unsigned int flags)
3014 {
3015         struct intel_sdvo *sdvo = adapter->algo_data;
3016         return sdvo->i2c->lock_ops->trylock_bus(sdvo->i2c, flags);
3017 }
3018
3019 static void proxy_unlock_bus(struct i2c_adapter *adapter,
3020                              unsigned int flags)
3021 {
3022         struct intel_sdvo *sdvo = adapter->algo_data;
3023         sdvo->i2c->lock_ops->unlock_bus(sdvo->i2c, flags);
3024 }
3025
3026 static const struct i2c_lock_operations proxy_lock_ops = {
3027         .lock_bus =    proxy_lock_bus,
3028         .trylock_bus = proxy_trylock_bus,
3029         .unlock_bus =  proxy_unlock_bus,
3030 };
3031
3032 static bool
3033 intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
3034                           struct drm_i915_private *dev_priv)
3035 {
3036         struct pci_dev *pdev = dev_priv->drm.pdev;
3037
3038         sdvo->ddc.owner = THIS_MODULE;
3039         sdvo->ddc.class = I2C_CLASS_DDC;
3040         snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
3041         sdvo->ddc.dev.parent = &pdev->dev;
3042         sdvo->ddc.algo_data = sdvo;
3043         sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
3044         sdvo->ddc.lock_ops = &proxy_lock_ops;
3045
3046         return i2c_add_adapter(&sdvo->ddc) == 0;
3047 }
3048
3049 static void assert_sdvo_port_valid(const struct drm_i915_private *dev_priv,
3050                                    enum port port)
3051 {
3052         if (HAS_PCH_SPLIT(dev_priv))
3053                 WARN_ON(port != PORT_B);
3054         else
3055                 WARN_ON(port != PORT_B && port != PORT_C);
3056 }
3057
3058 bool intel_sdvo_init(struct drm_i915_private *dev_priv,
3059                      i915_reg_t sdvo_reg, enum port port)
3060 {
3061         struct intel_encoder *intel_encoder;
3062         struct intel_sdvo *intel_sdvo;
3063         int i;
3064
3065         assert_sdvo_port_valid(dev_priv, port);
3066
3067         intel_sdvo = kzalloc(sizeof(*intel_sdvo), GFP_KERNEL);
3068         if (!intel_sdvo)
3069                 return false;
3070
3071         intel_sdvo->sdvo_reg = sdvo_reg;
3072         intel_sdvo->port = port;
3073         intel_sdvo->slave_addr =
3074                 intel_sdvo_get_slave_addr(dev_priv, intel_sdvo) >> 1;
3075         intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo);
3076         if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev_priv))
3077                 goto err_i2c_bus;
3078
3079         /* encoder type will be decided later */
3080         intel_encoder = &intel_sdvo->base;
3081         intel_encoder->type = INTEL_OUTPUT_SDVO;
3082         intel_encoder->power_domain = POWER_DOMAIN_PORT_OTHER;
3083         intel_encoder->port = port;
3084         drm_encoder_init(&dev_priv->drm, &intel_encoder->base,
3085                          &intel_sdvo_enc_funcs, 0,
3086                          "SDVO %c", port_name(port));
3087
3088         /* Read the regs to test if we can talk to the device */
3089         for (i = 0; i < 0x40; i++) {
3090                 u8 byte;
3091
3092                 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
3093                         DRM_DEBUG_KMS("No SDVO device found on %s\n",
3094                                       SDVO_NAME(intel_sdvo));
3095                         goto err;
3096                 }
3097         }
3098
3099         intel_encoder->compute_config = intel_sdvo_compute_config;
3100         if (HAS_PCH_SPLIT(dev_priv)) {
3101                 intel_encoder->disable = pch_disable_sdvo;
3102                 intel_encoder->post_disable = pch_post_disable_sdvo;
3103         } else {
3104                 intel_encoder->disable = intel_disable_sdvo;
3105         }
3106         intel_encoder->pre_enable = intel_sdvo_pre_enable;
3107         intel_encoder->enable = intel_enable_sdvo;
3108         intel_encoder->get_hw_state = intel_sdvo_get_hw_state;
3109         intel_encoder->get_config = intel_sdvo_get_config;
3110
3111         /* In default case sdvo lvds is false */
3112         if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
3113                 goto err;
3114
3115         if (intel_sdvo_output_setup(intel_sdvo,
3116                                     intel_sdvo->caps.output_flags) != true) {
3117                 DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
3118                               SDVO_NAME(intel_sdvo));
3119                 /* Output_setup can leave behind connectors! */
3120                 goto err_output;
3121         }
3122
3123         /*
3124          * Only enable the hotplug irq if we need it, to work around noisy
3125          * hotplug lines.
3126          */
3127         if (intel_sdvo->hotplug_active) {
3128                 if (intel_sdvo->port == PORT_B)
3129                         intel_encoder->hpd_pin = HPD_SDVO_B;
3130                 else
3131                         intel_encoder->hpd_pin = HPD_SDVO_C;
3132         }
3133
3134         /*
3135          * Cloning SDVO with anything is often impossible, since the SDVO
3136          * encoder can request a special input timing mode. And even if that's
3137          * not the case we have evidence that cloning a plain unscaled mode with
3138          * VGA doesn't really work. Furthermore the cloning flags are way too
3139          * simplistic anyway to express such constraints, so just give up on
3140          * cloning for SDVO encoders.
3141          */
3142         intel_sdvo->base.cloneable = 0;
3143
3144         intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo);
3145
3146         /* Set the input timing to the screen. Assume always input 0. */
3147         if (!intel_sdvo_set_target_input(intel_sdvo))
3148                 goto err_output;
3149
3150         if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
3151                                                     &intel_sdvo->pixel_clock_min,
3152                                                     &intel_sdvo->pixel_clock_max))
3153                 goto err_output;
3154
3155         DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
3156                         "clock range %dMHz - %dMHz, "
3157                         "input 1: %c, input 2: %c, "
3158                         "output 1: %c, output 2: %c\n",
3159                         SDVO_NAME(intel_sdvo),
3160                         intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
3161                         intel_sdvo->caps.device_rev_id,
3162                         intel_sdvo->pixel_clock_min / 1000,
3163                         intel_sdvo->pixel_clock_max / 1000,
3164                         (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
3165                         (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
3166                         /* check currently supported outputs */
3167                         intel_sdvo->caps.output_flags &
3168                         (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
3169                         intel_sdvo->caps.output_flags &
3170                         (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
3171         return true;
3172
3173 err_output:
3174         intel_sdvo_output_cleanup(intel_sdvo);
3175
3176 err:
3177         drm_encoder_cleanup(&intel_encoder->base);
3178         i2c_del_adapter(&intel_sdvo->ddc);
3179 err_i2c_bus:
3180         intel_sdvo_unselect_i2c_bus(intel_sdvo);
3181         kfree(intel_sdvo);
3182
3183         return false;
3184 }