Merge tag 'iio-fixes-for-4.12a' of git://git.kernel.org/pub/scm/linux/kernel/git...
[muen/linux.git] / drivers / iio / adc / sun4i-gpadc-iio.c
1 /* ADC driver for sunxi platforms' (A10, A13 and A31) GPADC
2  *
3  * Copyright (c) 2016 Quentin Schulz <quentin.schulz@free-electrons.com>
4  *
5  * This program is free software; you can redistribute it and/or modify it under
6  * the terms of the GNU General Public License version 2 as published by the
7  * Free Software Foundation.
8  *
9  * The Allwinner SoCs all have an ADC that can also act as a touchscreen
10  * controller and a thermal sensor.
11  * The thermal sensor works only when the ADC acts as a touchscreen controller
12  * and is configured to throw an interrupt every fixed periods of time (let say
13  * every X seconds).
14  * One would be tempted to disable the IP on the hardware side rather than
15  * disabling interrupts to save some power but that resets the internal clock of
16  * the IP, resulting in having to wait X seconds every time we want to read the
17  * value of the thermal sensor.
18  * This is also the reason of using autosuspend in pm_runtime. If there was no
19  * autosuspend, the thermal sensor would need X seconds after every
20  * pm_runtime_get_sync to get a value from the ADC. The autosuspend allows the
21  * thermal sensor to be requested again in a certain time span before it gets
22  * shutdown for not being used.
23  */
24
25 #include <linux/completion.h>
26 #include <linux/interrupt.h>
27 #include <linux/io.h>
28 #include <linux/module.h>
29 #include <linux/of.h>
30 #include <linux/of_device.h>
31 #include <linux/platform_device.h>
32 #include <linux/pm_runtime.h>
33 #include <linux/regmap.h>
34 #include <linux/thermal.h>
35 #include <linux/delay.h>
36
37 #include <linux/iio/iio.h>
38 #include <linux/iio/driver.h>
39 #include <linux/iio/machine.h>
40 #include <linux/mfd/sun4i-gpadc.h>
41
42 static unsigned int sun4i_gpadc_chan_select(unsigned int chan)
43 {
44         return SUN4I_GPADC_CTRL1_ADC_CHAN_SELECT(chan);
45 }
46
47 static unsigned int sun6i_gpadc_chan_select(unsigned int chan)
48 {
49         return SUN6I_GPADC_CTRL1_ADC_CHAN_SELECT(chan);
50 }
51
52 struct gpadc_data {
53         int             temp_offset;
54         int             temp_scale;
55         unsigned int    tp_mode_en;
56         unsigned int    tp_adc_select;
57         unsigned int    (*adc_chan_select)(unsigned int chan);
58         unsigned int    adc_chan_mask;
59 };
60
61 static const struct gpadc_data sun4i_gpadc_data = {
62         .temp_offset = -1932,
63         .temp_scale = 133,
64         .tp_mode_en = SUN4I_GPADC_CTRL1_TP_MODE_EN,
65         .tp_adc_select = SUN4I_GPADC_CTRL1_TP_ADC_SELECT,
66         .adc_chan_select = &sun4i_gpadc_chan_select,
67         .adc_chan_mask = SUN4I_GPADC_CTRL1_ADC_CHAN_MASK,
68 };
69
70 static const struct gpadc_data sun5i_gpadc_data = {
71         .temp_offset = -1447,
72         .temp_scale = 100,
73         .tp_mode_en = SUN4I_GPADC_CTRL1_TP_MODE_EN,
74         .tp_adc_select = SUN4I_GPADC_CTRL1_TP_ADC_SELECT,
75         .adc_chan_select = &sun4i_gpadc_chan_select,
76         .adc_chan_mask = SUN4I_GPADC_CTRL1_ADC_CHAN_MASK,
77 };
78
79 static const struct gpadc_data sun6i_gpadc_data = {
80         .temp_offset = -1623,
81         .temp_scale = 167,
82         .tp_mode_en = SUN6I_GPADC_CTRL1_TP_MODE_EN,
83         .tp_adc_select = SUN6I_GPADC_CTRL1_TP_ADC_SELECT,
84         .adc_chan_select = &sun6i_gpadc_chan_select,
85         .adc_chan_mask = SUN6I_GPADC_CTRL1_ADC_CHAN_MASK,
86 };
87
88 static const struct gpadc_data sun8i_a33_gpadc_data = {
89         .temp_offset = -1662,
90         .temp_scale = 162,
91         .tp_mode_en = SUN8I_GPADC_CTRL1_CHOP_TEMP_EN,
92 };
93
94 struct sun4i_gpadc_iio {
95         struct iio_dev                  *indio_dev;
96         struct completion               completion;
97         int                             temp_data;
98         u32                             adc_data;
99         struct regmap                   *regmap;
100         unsigned int                    fifo_data_irq;
101         atomic_t                        ignore_fifo_data_irq;
102         unsigned int                    temp_data_irq;
103         atomic_t                        ignore_temp_data_irq;
104         const struct gpadc_data         *data;
105         bool                            no_irq;
106         /* prevents concurrent reads of temperature and ADC */
107         struct mutex                    mutex;
108         struct thermal_zone_device      *tzd;
109         struct device                   *sensor_device;
110 };
111
112 #define SUN4I_GPADC_ADC_CHANNEL(_channel, _name) {              \
113         .type = IIO_VOLTAGE,                                    \
114         .indexed = 1,                                           \
115         .channel = _channel,                                    \
116         .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),           \
117         .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),   \
118         .datasheet_name = _name,                                \
119 }
120
121 static struct iio_map sun4i_gpadc_hwmon_maps[] = {
122         {
123                 .adc_channel_label = "temp_adc",
124                 .consumer_dev_name = "iio_hwmon.0",
125         },
126         { /* sentinel */ },
127 };
128
129 static const struct iio_chan_spec sun4i_gpadc_channels[] = {
130         SUN4I_GPADC_ADC_CHANNEL(0, "adc_chan0"),
131         SUN4I_GPADC_ADC_CHANNEL(1, "adc_chan1"),
132         SUN4I_GPADC_ADC_CHANNEL(2, "adc_chan2"),
133         SUN4I_GPADC_ADC_CHANNEL(3, "adc_chan3"),
134         {
135                 .type = IIO_TEMP,
136                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
137                                       BIT(IIO_CHAN_INFO_SCALE) |
138                                       BIT(IIO_CHAN_INFO_OFFSET),
139                 .datasheet_name = "temp_adc",
140         },
141 };
142
143 static const struct iio_chan_spec sun4i_gpadc_channels_no_temp[] = {
144         SUN4I_GPADC_ADC_CHANNEL(0, "adc_chan0"),
145         SUN4I_GPADC_ADC_CHANNEL(1, "adc_chan1"),
146         SUN4I_GPADC_ADC_CHANNEL(2, "adc_chan2"),
147         SUN4I_GPADC_ADC_CHANNEL(3, "adc_chan3"),
148 };
149
150 static const struct iio_chan_spec sun8i_a33_gpadc_channels[] = {
151         {
152                 .type = IIO_TEMP,
153                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
154                                       BIT(IIO_CHAN_INFO_SCALE) |
155                                       BIT(IIO_CHAN_INFO_OFFSET),
156                 .datasheet_name = "temp_adc",
157         },
158 };
159
160 static const struct regmap_config sun4i_gpadc_regmap_config = {
161         .reg_bits = 32,
162         .val_bits = 32,
163         .reg_stride = 4,
164         .fast_io = true,
165 };
166
167 static int sun4i_prepare_for_irq(struct iio_dev *indio_dev, int channel,
168                                  unsigned int irq)
169 {
170         struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
171         int ret;
172         u32 reg;
173
174         pm_runtime_get_sync(indio_dev->dev.parent);
175
176         reinit_completion(&info->completion);
177
178         ret = regmap_write(info->regmap, SUN4I_GPADC_INT_FIFOC,
179                            SUN4I_GPADC_INT_FIFOC_TP_FIFO_TRIG_LEVEL(1) |
180                            SUN4I_GPADC_INT_FIFOC_TP_FIFO_FLUSH);
181         if (ret)
182                 return ret;
183
184         ret = regmap_read(info->regmap, SUN4I_GPADC_CTRL1, &reg);
185         if (ret)
186                 return ret;
187
188         if (irq == info->fifo_data_irq) {
189                 ret = regmap_write(info->regmap, SUN4I_GPADC_CTRL1,
190                                    info->data->tp_mode_en |
191                                    info->data->tp_adc_select |
192                                    info->data->adc_chan_select(channel));
193                 /*
194                  * When the IP changes channel, it needs a bit of time to get
195                  * correct values.
196                  */
197                 if ((reg & info->data->adc_chan_mask) !=
198                          info->data->adc_chan_select(channel))
199                         mdelay(10);
200
201         } else {
202                 /*
203                  * The temperature sensor returns valid data only when the ADC
204                  * operates in touchscreen mode.
205                  */
206                 ret = regmap_write(info->regmap, SUN4I_GPADC_CTRL1,
207                                    info->data->tp_mode_en);
208         }
209
210         if (ret)
211                 return ret;
212
213         /*
214          * When the IP changes mode between ADC or touchscreen, it
215          * needs a bit of time to get correct values.
216          */
217         if ((reg & info->data->tp_adc_select) != info->data->tp_adc_select)
218                 mdelay(100);
219
220         return 0;
221 }
222
223 static int sun4i_gpadc_read(struct iio_dev *indio_dev, int channel, int *val,
224                             unsigned int irq)
225 {
226         struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
227         int ret;
228
229         mutex_lock(&info->mutex);
230
231         ret = sun4i_prepare_for_irq(indio_dev, channel, irq);
232         if (ret)
233                 goto err;
234
235         enable_irq(irq);
236
237         /*
238          * The temperature sensor throws an interruption periodically (currently
239          * set at periods of ~0.6s in sun4i_gpadc_runtime_resume). A 1s delay
240          * makes sure an interruption occurs in normal conditions. If it doesn't
241          * occur, then there is a timeout.
242          */
243         if (!wait_for_completion_timeout(&info->completion,
244                                          msecs_to_jiffies(1000))) {
245                 ret = -ETIMEDOUT;
246                 goto err;
247         }
248
249         if (irq == info->fifo_data_irq)
250                 *val = info->adc_data;
251         else
252                 *val = info->temp_data;
253
254         ret = 0;
255         pm_runtime_mark_last_busy(indio_dev->dev.parent);
256
257 err:
258         pm_runtime_put_autosuspend(indio_dev->dev.parent);
259         mutex_unlock(&info->mutex);
260
261         return ret;
262 }
263
264 static int sun4i_gpadc_adc_read(struct iio_dev *indio_dev, int channel,
265                                 int *val)
266 {
267         struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
268
269         return sun4i_gpadc_read(indio_dev, channel, val, info->fifo_data_irq);
270 }
271
272 static int sun4i_gpadc_temp_read(struct iio_dev *indio_dev, int *val)
273 {
274         struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
275
276         if (info->no_irq) {
277                 pm_runtime_get_sync(indio_dev->dev.parent);
278
279                 regmap_read(info->regmap, SUN4I_GPADC_TEMP_DATA, val);
280
281                 pm_runtime_mark_last_busy(indio_dev->dev.parent);
282                 pm_runtime_put_autosuspend(indio_dev->dev.parent);
283
284                 return 0;
285         }
286
287         return sun4i_gpadc_read(indio_dev, 0, val, info->temp_data_irq);
288 }
289
290 static int sun4i_gpadc_temp_offset(struct iio_dev *indio_dev, int *val)
291 {
292         struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
293
294         *val = info->data->temp_offset;
295
296         return 0;
297 }
298
299 static int sun4i_gpadc_temp_scale(struct iio_dev *indio_dev, int *val)
300 {
301         struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
302
303         *val = info->data->temp_scale;
304
305         return 0;
306 }
307
308 static int sun4i_gpadc_read_raw(struct iio_dev *indio_dev,
309                                 struct iio_chan_spec const *chan, int *val,
310                                 int *val2, long mask)
311 {
312         int ret;
313
314         switch (mask) {
315         case IIO_CHAN_INFO_OFFSET:
316                 ret = sun4i_gpadc_temp_offset(indio_dev, val);
317                 if (ret)
318                         return ret;
319
320                 return IIO_VAL_INT;
321         case IIO_CHAN_INFO_RAW:
322                 if (chan->type == IIO_VOLTAGE)
323                         ret = sun4i_gpadc_adc_read(indio_dev, chan->channel,
324                                                    val);
325                 else
326                         ret = sun4i_gpadc_temp_read(indio_dev, val);
327
328                 if (ret)
329                         return ret;
330
331                 return IIO_VAL_INT;
332         case IIO_CHAN_INFO_SCALE:
333                 if (chan->type == IIO_VOLTAGE) {
334                         /* 3000mV / 4096 * raw */
335                         *val = 0;
336                         *val2 = 732421875;
337                         return IIO_VAL_INT_PLUS_NANO;
338                 }
339
340                 ret = sun4i_gpadc_temp_scale(indio_dev, val);
341                 if (ret)
342                         return ret;
343
344                 return IIO_VAL_INT;
345         default:
346                 return -EINVAL;
347         }
348
349         return -EINVAL;
350 }
351
352 static const struct iio_info sun4i_gpadc_iio_info = {
353         .read_raw = sun4i_gpadc_read_raw,
354         .driver_module = THIS_MODULE,
355 };
356
357 static irqreturn_t sun4i_gpadc_temp_data_irq_handler(int irq, void *dev_id)
358 {
359         struct sun4i_gpadc_iio *info = dev_id;
360
361         if (atomic_read(&info->ignore_temp_data_irq))
362                 goto out;
363
364         if (!regmap_read(info->regmap, SUN4I_GPADC_TEMP_DATA, &info->temp_data))
365                 complete(&info->completion);
366
367 out:
368         disable_irq_nosync(info->temp_data_irq);
369         return IRQ_HANDLED;
370 }
371
372 static irqreturn_t sun4i_gpadc_fifo_data_irq_handler(int irq, void *dev_id)
373 {
374         struct sun4i_gpadc_iio *info = dev_id;
375
376         if (atomic_read(&info->ignore_fifo_data_irq))
377                 goto out;
378
379         if (!regmap_read(info->regmap, SUN4I_GPADC_DATA, &info->adc_data))
380                 complete(&info->completion);
381
382 out:
383         disable_irq_nosync(info->fifo_data_irq);
384         return IRQ_HANDLED;
385 }
386
387 static int sun4i_gpadc_runtime_suspend(struct device *dev)
388 {
389         struct sun4i_gpadc_iio *info = iio_priv(dev_get_drvdata(dev));
390
391         /* Disable the ADC on IP */
392         regmap_write(info->regmap, SUN4I_GPADC_CTRL1, 0);
393         /* Disable temperature sensor on IP */
394         regmap_write(info->regmap, SUN4I_GPADC_TPR, 0);
395
396         return 0;
397 }
398
399 static int sun4i_gpadc_runtime_resume(struct device *dev)
400 {
401         struct sun4i_gpadc_iio *info = iio_priv(dev_get_drvdata(dev));
402
403         /* clkin = 6MHz */
404         regmap_write(info->regmap, SUN4I_GPADC_CTRL0,
405                      SUN4I_GPADC_CTRL0_ADC_CLK_DIVIDER(2) |
406                      SUN4I_GPADC_CTRL0_FS_DIV(7) |
407                      SUN4I_GPADC_CTRL0_T_ACQ(63));
408         regmap_write(info->regmap, SUN4I_GPADC_CTRL1, info->data->tp_mode_en);
409         regmap_write(info->regmap, SUN4I_GPADC_CTRL3,
410                      SUN4I_GPADC_CTRL3_FILTER_EN |
411                      SUN4I_GPADC_CTRL3_FILTER_TYPE(1));
412         /* period = SUN4I_GPADC_TPR_TEMP_PERIOD * 256 * 16 / clkin; ~0.6s */
413         regmap_write(info->regmap, SUN4I_GPADC_TPR,
414                      SUN4I_GPADC_TPR_TEMP_ENABLE |
415                      SUN4I_GPADC_TPR_TEMP_PERIOD(800));
416
417         return 0;
418 }
419
420 static int sun4i_gpadc_get_temp(void *data, int *temp)
421 {
422         struct sun4i_gpadc_iio *info = data;
423         int val, scale, offset;
424
425         if (sun4i_gpadc_temp_read(info->indio_dev, &val))
426                 return -ETIMEDOUT;
427
428         sun4i_gpadc_temp_scale(info->indio_dev, &scale);
429         sun4i_gpadc_temp_offset(info->indio_dev, &offset);
430
431         *temp = (val + offset) * scale;
432
433         return 0;
434 }
435
436 static const struct thermal_zone_of_device_ops sun4i_ts_tz_ops = {
437         .get_temp = &sun4i_gpadc_get_temp,
438 };
439
440 static const struct dev_pm_ops sun4i_gpadc_pm_ops = {
441         .runtime_suspend = &sun4i_gpadc_runtime_suspend,
442         .runtime_resume = &sun4i_gpadc_runtime_resume,
443 };
444
445 static int sun4i_irq_init(struct platform_device *pdev, const char *name,
446                           irq_handler_t handler, const char *devname,
447                           unsigned int *irq, atomic_t *atomic)
448 {
449         int ret;
450         struct sun4i_gpadc_dev *mfd_dev = dev_get_drvdata(pdev->dev.parent);
451         struct sun4i_gpadc_iio *info = iio_priv(dev_get_drvdata(&pdev->dev));
452
453         /*
454          * Once the interrupt is activated, the IP continuously performs
455          * conversions thus throws interrupts. The interrupt is activated right
456          * after being requested but we want to control when these interrupts
457          * occur thus we disable it right after being requested. However, an
458          * interrupt might occur between these two instructions and we have to
459          * make sure that does not happen, by using atomic flags. We set the
460          * flag before requesting the interrupt and unset it right after
461          * disabling the interrupt. When an interrupt occurs between these two
462          * instructions, reading the atomic flag will tell us to ignore the
463          * interrupt.
464          */
465         atomic_set(atomic, 1);
466
467         ret = platform_get_irq_byname(pdev, name);
468         if (ret < 0) {
469                 dev_err(&pdev->dev, "no %s interrupt registered\n", name);
470                 return ret;
471         }
472
473         ret = regmap_irq_get_virq(mfd_dev->regmap_irqc, ret);
474         if (ret < 0) {
475                 dev_err(&pdev->dev, "failed to get virq for irq %s\n", name);
476                 return ret;
477         }
478
479         *irq = ret;
480         ret = devm_request_any_context_irq(&pdev->dev, *irq, handler, 0,
481                                            devname, info);
482         if (ret < 0) {
483                 dev_err(&pdev->dev, "could not request %s interrupt: %d\n",
484                         name, ret);
485                 return ret;
486         }
487
488         disable_irq(*irq);
489         atomic_set(atomic, 0);
490
491         return 0;
492 }
493
494 static const struct of_device_id sun4i_gpadc_of_id[] = {
495         {
496                 .compatible = "allwinner,sun8i-a33-ths",
497                 .data = &sun8i_a33_gpadc_data,
498         },
499         { /* sentinel */ }
500 };
501
502 static int sun4i_gpadc_probe_dt(struct platform_device *pdev,
503                                 struct iio_dev *indio_dev)
504 {
505         struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
506         const struct of_device_id *of_dev;
507         struct resource *mem;
508         void __iomem *base;
509         int ret;
510
511         of_dev = of_match_device(sun4i_gpadc_of_id, &pdev->dev);
512         if (!of_dev)
513                 return -ENODEV;
514
515         info->no_irq = true;
516         info->data = (struct gpadc_data *)of_dev->data;
517         indio_dev->num_channels = ARRAY_SIZE(sun8i_a33_gpadc_channels);
518         indio_dev->channels = sun8i_a33_gpadc_channels;
519
520         mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
521         base = devm_ioremap_resource(&pdev->dev, mem);
522         if (IS_ERR(base))
523                 return PTR_ERR(base);
524
525         info->regmap = devm_regmap_init_mmio(&pdev->dev, base,
526                                              &sun4i_gpadc_regmap_config);
527         if (IS_ERR(info->regmap)) {
528                 ret = PTR_ERR(info->regmap);
529                 dev_err(&pdev->dev, "failed to init regmap: %d\n", ret);
530                 return ret;
531         }
532
533         if (!IS_ENABLED(CONFIG_THERMAL_OF))
534                 return 0;
535
536         info->sensor_device = &pdev->dev;
537         info->tzd = thermal_zone_of_sensor_register(info->sensor_device, 0,
538                                                     info, &sun4i_ts_tz_ops);
539         if (IS_ERR(info->tzd))
540                 dev_err(&pdev->dev, "could not register thermal sensor: %ld\n",
541                         PTR_ERR(info->tzd));
542
543         return PTR_ERR_OR_ZERO(info->tzd);
544 }
545
546 static int sun4i_gpadc_probe_mfd(struct platform_device *pdev,
547                                  struct iio_dev *indio_dev)
548 {
549         struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
550         struct sun4i_gpadc_dev *sun4i_gpadc_dev =
551                 dev_get_drvdata(pdev->dev.parent);
552         int ret;
553
554         info->no_irq = false;
555         info->regmap = sun4i_gpadc_dev->regmap;
556
557         indio_dev->num_channels = ARRAY_SIZE(sun4i_gpadc_channels);
558         indio_dev->channels = sun4i_gpadc_channels;
559
560         info->data = (struct gpadc_data *)platform_get_device_id(pdev)->driver_data;
561
562         /*
563          * Since the controller needs to be in touchscreen mode for its thermal
564          * sensor to operate properly, and that switching between the two modes
565          * needs a delay, always registering in the thermal framework will
566          * significantly slow down the conversion rate of the ADCs.
567          *
568          * Therefore, instead of depending on THERMAL_OF in Kconfig, we only
569          * register the sensor if that option is enabled, eventually leaving
570          * that choice to the user.
571          */
572
573         if (IS_ENABLED(CONFIG_THERMAL_OF)) {
574                 /*
575                  * This driver is a child of an MFD which has a node in the DT
576                  * but not its children, because of DT backward compatibility
577                  * for A10, A13 and A31 SoCs. Therefore, the resulting devices
578                  * of this driver do not have an of_node variable.
579                  * However, its parent (the MFD driver) has an of_node variable
580                  * and since devm_thermal_zone_of_sensor_register uses its first
581                  * argument to match the phandle defined in the node of the
582                  * thermal driver with the of_node of the device passed as first
583                  * argument and the third argument to call ops from
584                  * thermal_zone_of_device_ops, the solution is to use the parent
585                  * device as first argument to match the phandle with its
586                  * of_node, and the device from this driver as third argument to
587                  * return the temperature.
588                  */
589                 info->sensor_device = pdev->dev.parent;
590                 info->tzd = thermal_zone_of_sensor_register(info->sensor_device,
591                                                             0, info,
592                                                             &sun4i_ts_tz_ops);
593                 if (IS_ERR(info->tzd)) {
594                         dev_err(&pdev->dev,
595                                 "could not register thermal sensor: %ld\n",
596                                 PTR_ERR(info->tzd));
597                         return PTR_ERR(info->tzd);
598                 }
599         } else {
600                 indio_dev->num_channels =
601                         ARRAY_SIZE(sun4i_gpadc_channels_no_temp);
602                 indio_dev->channels = sun4i_gpadc_channels_no_temp;
603         }
604
605         if (IS_ENABLED(CONFIG_THERMAL_OF)) {
606                 ret = sun4i_irq_init(pdev, "TEMP_DATA_PENDING",
607                                      sun4i_gpadc_temp_data_irq_handler,
608                                      "temp_data", &info->temp_data_irq,
609                                      &info->ignore_temp_data_irq);
610                 if (ret < 0)
611                         return ret;
612         }
613
614         ret = sun4i_irq_init(pdev, "FIFO_DATA_PENDING",
615                              sun4i_gpadc_fifo_data_irq_handler, "fifo_data",
616                              &info->fifo_data_irq, &info->ignore_fifo_data_irq);
617         if (ret < 0)
618                 return ret;
619
620         if (IS_ENABLED(CONFIG_THERMAL_OF)) {
621                 ret = iio_map_array_register(indio_dev, sun4i_gpadc_hwmon_maps);
622                 if (ret < 0) {
623                         dev_err(&pdev->dev,
624                                 "failed to register iio map array\n");
625                         return ret;
626                 }
627         }
628
629         return 0;
630 }
631
632 static int sun4i_gpadc_probe(struct platform_device *pdev)
633 {
634         struct sun4i_gpadc_iio *info;
635         struct iio_dev *indio_dev;
636         int ret;
637
638         indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*info));
639         if (!indio_dev)
640                 return -ENOMEM;
641
642         info = iio_priv(indio_dev);
643         platform_set_drvdata(pdev, indio_dev);
644
645         mutex_init(&info->mutex);
646         info->indio_dev = indio_dev;
647         init_completion(&info->completion);
648         indio_dev->name = dev_name(&pdev->dev);
649         indio_dev->dev.parent = &pdev->dev;
650         indio_dev->dev.of_node = pdev->dev.of_node;
651         indio_dev->info = &sun4i_gpadc_iio_info;
652         indio_dev->modes = INDIO_DIRECT_MODE;
653
654         if (pdev->dev.of_node)
655                 ret = sun4i_gpadc_probe_dt(pdev, indio_dev);
656         else
657                 ret = sun4i_gpadc_probe_mfd(pdev, indio_dev);
658
659         if (ret)
660                 return ret;
661
662         pm_runtime_set_autosuspend_delay(&pdev->dev,
663                                          SUN4I_GPADC_AUTOSUSPEND_DELAY);
664         pm_runtime_use_autosuspend(&pdev->dev);
665         pm_runtime_set_suspended(&pdev->dev);
666         pm_runtime_enable(&pdev->dev);
667
668         ret = devm_iio_device_register(&pdev->dev, indio_dev);
669         if (ret < 0) {
670                 dev_err(&pdev->dev, "could not register the device\n");
671                 goto err_map;
672         }
673
674         return 0;
675
676 err_map:
677         if (!info->no_irq && IS_ENABLED(CONFIG_THERMAL_OF))
678                 iio_map_array_unregister(indio_dev);
679
680         pm_runtime_put(&pdev->dev);
681         pm_runtime_disable(&pdev->dev);
682
683         return ret;
684 }
685
686 static int sun4i_gpadc_remove(struct platform_device *pdev)
687 {
688         struct iio_dev *indio_dev = platform_get_drvdata(pdev);
689         struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
690
691         pm_runtime_put(&pdev->dev);
692         pm_runtime_disable(&pdev->dev);
693
694         if (!IS_ENABLED(CONFIG_THERMAL_OF))
695                 return 0;
696
697         thermal_zone_of_sensor_unregister(info->sensor_device, info->tzd);
698
699         if (!info->no_irq)
700                 iio_map_array_unregister(indio_dev);
701
702         return 0;
703 }
704
705 static const struct platform_device_id sun4i_gpadc_id[] = {
706         { "sun4i-a10-gpadc-iio", (kernel_ulong_t)&sun4i_gpadc_data },
707         { "sun5i-a13-gpadc-iio", (kernel_ulong_t)&sun5i_gpadc_data },
708         { "sun6i-a31-gpadc-iio", (kernel_ulong_t)&sun6i_gpadc_data },
709         { /* sentinel */ },
710 };
711 MODULE_DEVICE_TABLE(platform, sun4i_gpadc_id);
712
713 static struct platform_driver sun4i_gpadc_driver = {
714         .driver = {
715                 .name = "sun4i-gpadc-iio",
716                 .of_match_table = sun4i_gpadc_of_id,
717                 .pm = &sun4i_gpadc_pm_ops,
718         },
719         .id_table = sun4i_gpadc_id,
720         .probe = sun4i_gpadc_probe,
721         .remove = sun4i_gpadc_remove,
722 };
723 MODULE_DEVICE_TABLE(of, sun4i_gpadc_of_id);
724
725 module_platform_driver(sun4i_gpadc_driver);
726
727 MODULE_DESCRIPTION("ADC driver for sunxi platforms");
728 MODULE_AUTHOR("Quentin Schulz <quentin.schulz@free-electrons.com>");
729 MODULE_LICENSE("GPL v2");