treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152
[muen/linux.git] / drivers / media / i2c / m5mols / m5mols_controls.c
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * Controls for M-5MOLS 8M Pixel camera sensor with ISP
4  *
5  * Copyright (C) 2011 Samsung Electronics Co., Ltd.
6  * Author: HeungJun Kim <riverful.kim@samsung.com>
7  *
8  * Copyright (C) 2009 Samsung Electronics Co., Ltd.
9  * Author: Dongsoo Nathaniel Kim <dongsoo45.kim@samsung.com>
10  */
11
12 #include <linux/i2c.h>
13 #include <linux/delay.h>
14 #include <linux/videodev2.h>
15 #include <media/v4l2-ctrls.h>
16
17 #include "m5mols.h"
18 #include "m5mols_reg.h"
19
20 static struct m5mols_scenemode m5mols_default_scenemode[] = {
21         [REG_SCENE_NORMAL] = {
22                 REG_AE_CENTER, REG_AE_INDEX_00, REG_AWB_AUTO, 0,
23                 REG_CHROMA_ON, 3, REG_EDGE_ON, 5,
24                 REG_AF_NORMAL, REG_FD_OFF,
25                 REG_MCC_NORMAL, REG_LIGHT_OFF, REG_FLASH_OFF,
26                 5, REG_ISO_AUTO, REG_CAP_NONE, REG_WDR_OFF,
27         },
28         [REG_SCENE_PORTRAIT] = {
29                 REG_AE_CENTER, REG_AE_INDEX_00, REG_AWB_AUTO, 0,
30                 REG_CHROMA_ON, 3, REG_EDGE_ON, 4,
31                 REG_AF_NORMAL, BIT_FD_EN | BIT_FD_DRAW_FACE_FRAME,
32                 REG_MCC_OFF, REG_LIGHT_OFF, REG_FLASH_OFF,
33                 6, REG_ISO_AUTO, REG_CAP_NONE, REG_WDR_OFF,
34         },
35         [REG_SCENE_LANDSCAPE] = {
36                 REG_AE_ALL, REG_AE_INDEX_00, REG_AWB_AUTO, 0,
37                 REG_CHROMA_ON, 4, REG_EDGE_ON, 6,
38                 REG_AF_NORMAL, REG_FD_OFF,
39                 REG_MCC_OFF, REG_LIGHT_OFF, REG_FLASH_OFF,
40                 6, REG_ISO_AUTO, REG_CAP_NONE, REG_WDR_OFF,
41         },
42         [REG_SCENE_SPORTS] = {
43                 REG_AE_CENTER, REG_AE_INDEX_00, REG_AWB_AUTO, 0,
44                 REG_CHROMA_ON, 3, REG_EDGE_ON, 5,
45                 REG_AF_NORMAL, REG_FD_OFF,
46                 REG_MCC_OFF, REG_LIGHT_OFF, REG_FLASH_OFF,
47                 6, REG_ISO_AUTO, REG_CAP_NONE, REG_WDR_OFF,
48         },
49         [REG_SCENE_PARTY_INDOOR] = {
50                 REG_AE_CENTER, REG_AE_INDEX_00, REG_AWB_AUTO, 0,
51                 REG_CHROMA_ON, 4, REG_EDGE_ON, 5,
52                 REG_AF_NORMAL, REG_FD_OFF,
53                 REG_MCC_OFF, REG_LIGHT_OFF, REG_FLASH_OFF,
54                 6, REG_ISO_200, REG_CAP_NONE, REG_WDR_OFF,
55         },
56         [REG_SCENE_BEACH_SNOW] = {
57                 REG_AE_CENTER, REG_AE_INDEX_10_POS, REG_AWB_AUTO, 0,
58                 REG_CHROMA_ON, 4, REG_EDGE_ON, 5,
59                 REG_AF_NORMAL, REG_FD_OFF,
60                 REG_MCC_OFF, REG_LIGHT_OFF, REG_FLASH_OFF,
61                 6, REG_ISO_50, REG_CAP_NONE, REG_WDR_OFF,
62         },
63         [REG_SCENE_SUNSET] = {
64                 REG_AE_CENTER, REG_AE_INDEX_00, REG_AWB_PRESET,
65                 REG_AWB_DAYLIGHT,
66                 REG_CHROMA_ON, 3, REG_EDGE_ON, 5,
67                 REG_AF_NORMAL, REG_FD_OFF,
68                 REG_MCC_OFF, REG_LIGHT_OFF, REG_FLASH_OFF,
69                 6, REG_ISO_AUTO, REG_CAP_NONE, REG_WDR_OFF,
70         },
71         [REG_SCENE_DAWN_DUSK] = {
72                 REG_AE_CENTER, REG_AE_INDEX_00, REG_AWB_PRESET,
73                 REG_AWB_FLUORESCENT_1,
74                 REG_CHROMA_ON, 3, REG_EDGE_ON, 5,
75                 REG_AF_NORMAL, REG_FD_OFF,
76                 REG_MCC_OFF, REG_LIGHT_OFF, REG_FLASH_OFF,
77                 6, REG_ISO_AUTO, REG_CAP_NONE, REG_WDR_OFF,
78         },
79         [REG_SCENE_FALL] = {
80                 REG_AE_CENTER, REG_AE_INDEX_00, REG_AWB_AUTO, 0,
81                 REG_CHROMA_ON, 5, REG_EDGE_ON, 5,
82                 REG_AF_NORMAL, REG_FD_OFF,
83                 REG_MCC_OFF, REG_LIGHT_OFF, REG_FLASH_OFF,
84                 6, REG_ISO_AUTO, REG_CAP_NONE, REG_WDR_OFF,
85         },
86         [REG_SCENE_NIGHT] = {
87                 REG_AE_CENTER, REG_AE_INDEX_00, REG_AWB_AUTO, 0,
88                 REG_CHROMA_ON, 3, REG_EDGE_ON, 5,
89                 REG_AF_NORMAL, REG_FD_OFF,
90                 REG_MCC_OFF, REG_LIGHT_OFF, REG_FLASH_OFF,
91                 6, REG_ISO_AUTO, REG_CAP_NONE, REG_WDR_OFF,
92         },
93         [REG_SCENE_AGAINST_LIGHT] = {
94                 REG_AE_CENTER, REG_AE_INDEX_00, REG_AWB_AUTO, 0,
95                 REG_CHROMA_ON, 3, REG_EDGE_ON, 5,
96                 REG_AF_NORMAL, REG_FD_OFF,
97                 REG_MCC_OFF, REG_LIGHT_OFF, REG_FLASH_OFF,
98                 6, REG_ISO_AUTO, REG_CAP_NONE, REG_WDR_OFF,
99         },
100         [REG_SCENE_FIRE] = {
101                 REG_AE_CENTER, REG_AE_INDEX_00, REG_AWB_AUTO, 0,
102                 REG_CHROMA_ON, 3, REG_EDGE_ON, 5,
103                 REG_AF_NORMAL, REG_FD_OFF,
104                 REG_MCC_OFF, REG_LIGHT_OFF, REG_FLASH_OFF,
105                 6, REG_ISO_50, REG_CAP_NONE, REG_WDR_OFF,
106         },
107         [REG_SCENE_TEXT] = {
108                 REG_AE_CENTER, REG_AE_INDEX_00, REG_AWB_AUTO, 0,
109                 REG_CHROMA_ON, 3, REG_EDGE_ON, 7,
110                 REG_AF_MACRO, REG_FD_OFF,
111                 REG_MCC_OFF, REG_LIGHT_OFF, REG_FLASH_OFF,
112                 6, REG_ISO_AUTO, REG_CAP_ANTI_SHAKE, REG_WDR_ON,
113         },
114         [REG_SCENE_CANDLE] = {
115                 REG_AE_CENTER, REG_AE_INDEX_00, REG_AWB_AUTO, 0,
116                 REG_CHROMA_ON, 3, REG_EDGE_ON, 5,
117                 REG_AF_NORMAL, REG_FD_OFF,
118                 REG_MCC_OFF, REG_LIGHT_OFF, REG_FLASH_OFF,
119                 6, REG_ISO_AUTO, REG_CAP_NONE, REG_WDR_OFF,
120         },
121 };
122
123 /**
124  * m5mols_do_scenemode() - Change current scenemode
125  * @info: M-5MOLS driver data structure
126  * @mode:       Desired mode of the scenemode
127  *
128  * WARNING: The execution order is important. Do not change the order.
129  */
130 int m5mols_do_scenemode(struct m5mols_info *info, u8 mode)
131 {
132         struct v4l2_subdev *sd = &info->sd;
133         struct m5mols_scenemode scenemode = m5mols_default_scenemode[mode];
134         int ret;
135
136         if (mode > REG_SCENE_CANDLE)
137                 return -EINVAL;
138
139         ret = v4l2_ctrl_s_ctrl(info->lock_3a, 0);
140         if (!ret)
141                 ret = m5mols_write(sd, AE_EV_PRESET_MONITOR, mode);
142         if (!ret)
143                 ret = m5mols_write(sd, AE_EV_PRESET_CAPTURE, mode);
144         if (!ret)
145                 ret = m5mols_write(sd, AE_MODE, scenemode.metering);
146         if (!ret)
147                 ret = m5mols_write(sd, AE_INDEX, scenemode.ev_bias);
148         if (!ret)
149                 ret = m5mols_write(sd, AWB_MODE, scenemode.wb_mode);
150         if (!ret)
151                 ret = m5mols_write(sd, AWB_MANUAL, scenemode.wb_preset);
152         if (!ret)
153                 ret = m5mols_write(sd, MON_CHROMA_EN, scenemode.chroma_en);
154         if (!ret)
155                 ret = m5mols_write(sd, MON_CHROMA_LVL, scenemode.chroma_lvl);
156         if (!ret)
157                 ret = m5mols_write(sd, MON_EDGE_EN, scenemode.edge_en);
158         if (!ret)
159                 ret = m5mols_write(sd, MON_EDGE_LVL, scenemode.edge_lvl);
160         if (!ret && is_available_af(info))
161                 ret = m5mols_write(sd, AF_MODE, scenemode.af_range);
162         if (!ret && is_available_af(info))
163                 ret = m5mols_write(sd, FD_CTL, scenemode.fd_mode);
164         if (!ret)
165                 ret = m5mols_write(sd, MON_TONE_CTL, scenemode.tone);
166         if (!ret)
167                 ret = m5mols_write(sd, AE_ISO, scenemode.iso);
168         if (!ret)
169                 ret = m5mols_set_mode(info, REG_CAPTURE);
170         if (!ret)
171                 ret = m5mols_write(sd, CAPP_WDR_EN, scenemode.wdr);
172         if (!ret)
173                 ret = m5mols_write(sd, CAPP_MCC_MODE, scenemode.mcc);
174         if (!ret)
175                 ret = m5mols_write(sd, CAPP_LIGHT_CTRL, scenemode.light);
176         if (!ret)
177                 ret = m5mols_write(sd, CAPP_FLASH_CTRL, scenemode.flash);
178         if (!ret)
179                 ret = m5mols_write(sd, CAPC_MODE, scenemode.capt_mode);
180         if (!ret)
181                 ret = m5mols_set_mode(info, REG_MONITOR);
182
183         return ret;
184 }
185
186 static int m5mols_3a_lock(struct m5mols_info *info, struct v4l2_ctrl *ctrl)
187 {
188         bool af_lock = ctrl->val & V4L2_LOCK_FOCUS;
189         int ret = 0;
190
191         if ((ctrl->val ^ ctrl->cur.val) & V4L2_LOCK_EXPOSURE) {
192                 bool ae_lock = ctrl->val & V4L2_LOCK_EXPOSURE;
193
194                 ret = m5mols_write(&info->sd, AE_LOCK, ae_lock ?
195                                    REG_AE_LOCK : REG_AE_UNLOCK);
196                 if (ret)
197                         return ret;
198         }
199
200         if (((ctrl->val ^ ctrl->cur.val) & V4L2_LOCK_WHITE_BALANCE)
201             && info->auto_wb->val) {
202                 bool awb_lock = ctrl->val & V4L2_LOCK_WHITE_BALANCE;
203
204                 ret = m5mols_write(&info->sd, AWB_LOCK, awb_lock ?
205                                    REG_AWB_LOCK : REG_AWB_UNLOCK);
206                 if (ret)
207                         return ret;
208         }
209
210         if (!info->ver.af || !af_lock)
211                 return ret;
212
213         if ((ctrl->val ^ ctrl->cur.val) & V4L2_LOCK_FOCUS)
214                 ret = m5mols_write(&info->sd, AF_EXECUTE, REG_AF_STOP);
215
216         return ret;
217 }
218
219 static int m5mols_set_metering_mode(struct m5mols_info *info, int mode)
220 {
221         unsigned int metering;
222
223         switch (mode) {
224         case V4L2_EXPOSURE_METERING_CENTER_WEIGHTED:
225                 metering = REG_AE_CENTER;
226                 break;
227         case V4L2_EXPOSURE_METERING_SPOT:
228                 metering = REG_AE_SPOT;
229                 break;
230         default:
231                 metering = REG_AE_ALL;
232                 break;
233         }
234
235         return m5mols_write(&info->sd, AE_MODE, metering);
236 }
237
238 static int m5mols_set_exposure(struct m5mols_info *info, int exposure)
239 {
240         struct v4l2_subdev *sd = &info->sd;
241         int ret = 0;
242
243         if (exposure == V4L2_EXPOSURE_AUTO) {
244                 /* Unlock auto exposure */
245                 info->lock_3a->val &= ~V4L2_LOCK_EXPOSURE;
246                 m5mols_3a_lock(info, info->lock_3a);
247
248                 ret = m5mols_set_metering_mode(info, info->metering->val);
249                 if (ret < 0)
250                         return ret;
251
252                 v4l2_dbg(1, m5mols_debug, sd,
253                          "%s: exposure bias: %#x, metering: %#x\n",
254                          __func__, info->exposure_bias->val,
255                          info->metering->val);
256
257                 return m5mols_write(sd, AE_INDEX, info->exposure_bias->val);
258         }
259
260         if (exposure == V4L2_EXPOSURE_MANUAL) {
261                 ret = m5mols_write(sd, AE_MODE, REG_AE_OFF);
262                 if (ret == 0)
263                         ret = m5mols_write(sd, AE_MAN_GAIN_MON,
264                                            info->exposure->val);
265                 if (ret == 0)
266                         ret = m5mols_write(sd, AE_MAN_GAIN_CAP,
267                                            info->exposure->val);
268
269                 v4l2_dbg(1, m5mols_debug, sd, "%s: exposure: %#x\n",
270                          __func__, info->exposure->val);
271         }
272
273         return ret;
274 }
275
276 static int m5mols_set_white_balance(struct m5mols_info *info, int val)
277 {
278         static const unsigned short wb[][2] = {
279                 { V4L2_WHITE_BALANCE_INCANDESCENT,  REG_AWB_INCANDESCENT },
280                 { V4L2_WHITE_BALANCE_FLUORESCENT,   REG_AWB_FLUORESCENT_1 },
281                 { V4L2_WHITE_BALANCE_FLUORESCENT_H, REG_AWB_FLUORESCENT_2 },
282                 { V4L2_WHITE_BALANCE_HORIZON,       REG_AWB_HORIZON },
283                 { V4L2_WHITE_BALANCE_DAYLIGHT,      REG_AWB_DAYLIGHT },
284                 { V4L2_WHITE_BALANCE_FLASH,         REG_AWB_LEDLIGHT },
285                 { V4L2_WHITE_BALANCE_CLOUDY,        REG_AWB_CLOUDY },
286                 { V4L2_WHITE_BALANCE_SHADE,         REG_AWB_SHADE },
287                 { V4L2_WHITE_BALANCE_AUTO,          REG_AWB_AUTO },
288         };
289         int i;
290         struct v4l2_subdev *sd = &info->sd;
291         int ret = -EINVAL;
292
293         for (i = 0; i < ARRAY_SIZE(wb); i++) {
294                 int awb;
295                 if (wb[i][0] != val)
296                         continue;
297
298                 v4l2_dbg(1, m5mols_debug, sd,
299                          "Setting white balance to: %#x\n", wb[i][0]);
300
301                 awb = wb[i][0] == V4L2_WHITE_BALANCE_AUTO;
302                 ret = m5mols_write(sd, AWB_MODE, awb ? REG_AWB_AUTO :
303                                                  REG_AWB_PRESET);
304                 if (ret < 0)
305                         return ret;
306
307                 if (!awb)
308                         ret = m5mols_write(sd, AWB_MANUAL, wb[i][1]);
309         }
310
311         return ret;
312 }
313
314 static int m5mols_set_saturation(struct m5mols_info *info, int val)
315 {
316         int ret = m5mols_write(&info->sd, MON_CHROMA_LVL, val);
317         if (ret < 0)
318                 return ret;
319
320         return m5mols_write(&info->sd, MON_CHROMA_EN, REG_CHROMA_ON);
321 }
322
323 static int m5mols_set_color_effect(struct m5mols_info *info, int val)
324 {
325         unsigned int m_effect = REG_COLOR_EFFECT_OFF;
326         unsigned int p_effect = REG_EFFECT_OFF;
327         unsigned int cfix_r = 0, cfix_b = 0;
328         struct v4l2_subdev *sd = &info->sd;
329         int ret = 0;
330
331         switch (val) {
332         case V4L2_COLORFX_BW:
333                 m_effect = REG_COLOR_EFFECT_ON;
334                 break;
335         case V4L2_COLORFX_NEGATIVE:
336                 p_effect = REG_EFFECT_NEGA;
337                 break;
338         case V4L2_COLORFX_EMBOSS:
339                 p_effect = REG_EFFECT_EMBOSS;
340                 break;
341         case V4L2_COLORFX_SEPIA:
342                 m_effect = REG_COLOR_EFFECT_ON;
343                 cfix_r = REG_CFIXR_SEPIA;
344                 cfix_b = REG_CFIXB_SEPIA;
345                 break;
346         }
347
348         ret = m5mols_write(sd, PARM_EFFECT, p_effect);
349         if (!ret)
350                 ret = m5mols_write(sd, MON_EFFECT, m_effect);
351
352         if (ret == 0 && m_effect == REG_COLOR_EFFECT_ON) {
353                 ret = m5mols_write(sd, MON_CFIXR, cfix_r);
354                 if (!ret)
355                         ret = m5mols_write(sd, MON_CFIXB, cfix_b);
356         }
357
358         v4l2_dbg(1, m5mols_debug, sd,
359                  "p_effect: %#x, m_effect: %#x, r: %#x, b: %#x (%d)\n",
360                  p_effect, m_effect, cfix_r, cfix_b, ret);
361
362         return ret;
363 }
364
365 static int m5mols_set_iso(struct m5mols_info *info, int auto_iso)
366 {
367         u32 iso = auto_iso ? 0 : info->iso->val + 1;
368
369         return m5mols_write(&info->sd, AE_ISO, iso);
370 }
371
372 static int m5mols_set_wdr(struct m5mols_info *info, int wdr)
373 {
374         int ret;
375
376         ret = m5mols_write(&info->sd, MON_TONE_CTL, wdr ? 9 : 5);
377         if (ret < 0)
378                 return ret;
379
380         ret = m5mols_set_mode(info, REG_CAPTURE);
381         if (ret < 0)
382                 return ret;
383
384         return m5mols_write(&info->sd, CAPP_WDR_EN, wdr);
385 }
386
387 static int m5mols_set_stabilization(struct m5mols_info *info, int val)
388 {
389         struct v4l2_subdev *sd = &info->sd;
390         unsigned int evp = val ? 0xe : 0x0;
391         int ret;
392
393         ret = m5mols_write(sd, AE_EV_PRESET_MONITOR, evp);
394         if (ret < 0)
395                 return ret;
396
397         return m5mols_write(sd, AE_EV_PRESET_CAPTURE, evp);
398 }
399
400 static int m5mols_g_volatile_ctrl(struct v4l2_ctrl *ctrl)
401 {
402         struct v4l2_subdev *sd = to_sd(ctrl);
403         struct m5mols_info *info = to_m5mols(sd);
404         int ret = 0;
405         u8 status = REG_ISO_AUTO;
406
407         v4l2_dbg(1, m5mols_debug, sd, "%s: ctrl: %s (%d)\n",
408                  __func__, ctrl->name, info->isp_ready);
409
410         if (!info->isp_ready)
411                 return -EBUSY;
412
413         switch (ctrl->id) {
414         case V4L2_CID_ISO_SENSITIVITY_AUTO:
415                 ret = m5mols_read_u8(sd, AE_ISO, &status);
416                 if (ret == 0)
417                         ctrl->val = !status;
418                 if (status != REG_ISO_AUTO)
419                         info->iso->val = status - 1;
420                 break;
421
422         case V4L2_CID_3A_LOCK:
423                 ctrl->val &= ~0x7;
424
425                 ret = m5mols_read_u8(sd, AE_LOCK, &status);
426                 if (ret)
427                         return ret;
428                 if (status)
429                         info->lock_3a->val |= V4L2_LOCK_EXPOSURE;
430
431                 ret = m5mols_read_u8(sd, AWB_LOCK, &status);
432                 if (ret)
433                         return ret;
434                 if (status)
435                         info->lock_3a->val |= V4L2_LOCK_EXPOSURE;
436
437                 ret = m5mols_read_u8(sd, AF_EXECUTE, &status);
438                 if (!status)
439                         info->lock_3a->val |= V4L2_LOCK_EXPOSURE;
440                 break;
441         }
442
443         return ret;
444 }
445
446 static int m5mols_s_ctrl(struct v4l2_ctrl *ctrl)
447 {
448         unsigned int ctrl_mode = m5mols_get_ctrl_mode(ctrl);
449         struct v4l2_subdev *sd = to_sd(ctrl);
450         struct m5mols_info *info = to_m5mols(sd);
451         int last_mode = info->mode;
452         int ret = 0;
453
454         /*
455          * If needed, defer restoring the controls until
456          * the device is fully initialized.
457          */
458         if (!info->isp_ready) {
459                 info->ctrl_sync = 0;
460                 return 0;
461         }
462
463         v4l2_dbg(1, m5mols_debug, sd, "%s: %s, val: %d, priv: %p\n",
464                  __func__, ctrl->name, ctrl->val, ctrl->priv);
465
466         if (ctrl_mode && ctrl_mode != info->mode) {
467                 ret = m5mols_set_mode(info, ctrl_mode);
468                 if (ret < 0)
469                         return ret;
470         }
471
472         switch (ctrl->id) {
473         case V4L2_CID_3A_LOCK:
474                 ret = m5mols_3a_lock(info, ctrl);
475                 break;
476
477         case V4L2_CID_ZOOM_ABSOLUTE:
478                 ret = m5mols_write(sd, MON_ZOOM, ctrl->val);
479                 break;
480
481         case V4L2_CID_EXPOSURE_AUTO:
482                 ret = m5mols_set_exposure(info, ctrl->val);
483                 break;
484
485         case V4L2_CID_ISO_SENSITIVITY:
486                 ret = m5mols_set_iso(info, ctrl->val);
487                 break;
488
489         case V4L2_CID_AUTO_N_PRESET_WHITE_BALANCE:
490                 ret = m5mols_set_white_balance(info, ctrl->val);
491                 break;
492
493         case V4L2_CID_SATURATION:
494                 ret = m5mols_set_saturation(info, ctrl->val);
495                 break;
496
497         case V4L2_CID_COLORFX:
498                 ret = m5mols_set_color_effect(info, ctrl->val);
499                 break;
500
501         case V4L2_CID_WIDE_DYNAMIC_RANGE:
502                 ret = m5mols_set_wdr(info, ctrl->val);
503                 break;
504
505         case V4L2_CID_IMAGE_STABILIZATION:
506                 ret = m5mols_set_stabilization(info, ctrl->val);
507                 break;
508
509         case V4L2_CID_JPEG_COMPRESSION_QUALITY:
510                 ret = m5mols_write(sd, CAPP_JPEG_RATIO, ctrl->val);
511                 break;
512         }
513
514         if (ret == 0 && info->mode != last_mode)
515                 ret = m5mols_set_mode(info, last_mode);
516
517         return ret;
518 }
519
520 static const struct v4l2_ctrl_ops m5mols_ctrl_ops = {
521         .g_volatile_ctrl        = m5mols_g_volatile_ctrl,
522         .s_ctrl                 = m5mols_s_ctrl,
523 };
524
525 /* Supported manual ISO values */
526 static const s64 iso_qmenu[] = {
527         /* AE_ISO: 0x01...0x07 (ISO: 50...3200) */
528         50000, 100000, 200000, 400000, 800000, 1600000, 3200000
529 };
530
531 /* Supported Exposure Bias values, -2.0EV...+2.0EV */
532 static const s64 ev_bias_qmenu[] = {
533         /* AE_INDEX: 0x00...0x08 */
534         -2000, -1500, -1000, -500, 0, 500, 1000, 1500, 2000
535 };
536
537 int m5mols_init_controls(struct v4l2_subdev *sd)
538 {
539         struct m5mols_info *info = to_m5mols(sd);
540         u16 exposure_max;
541         u16 zoom_step;
542         int ret;
543
544         /* Determine the firmware dependent control range and step values */
545         ret = m5mols_read_u16(sd, AE_MAX_GAIN_MON, &exposure_max);
546         if (ret < 0)
547                 return ret;
548
549         zoom_step = is_manufacturer(info, REG_SAMSUNG_OPTICS) ? 31 : 1;
550         v4l2_ctrl_handler_init(&info->handle, 20);
551
552         info->auto_wb = v4l2_ctrl_new_std_menu(&info->handle,
553                         &m5mols_ctrl_ops, V4L2_CID_AUTO_N_PRESET_WHITE_BALANCE,
554                         9, ~0x3fe, V4L2_WHITE_BALANCE_AUTO);
555
556         /* Exposure control cluster */
557         info->auto_exposure = v4l2_ctrl_new_std_menu(&info->handle,
558                         &m5mols_ctrl_ops, V4L2_CID_EXPOSURE_AUTO,
559                         1, ~0x03, V4L2_EXPOSURE_AUTO);
560
561         info->exposure = v4l2_ctrl_new_std(&info->handle,
562                         &m5mols_ctrl_ops, V4L2_CID_EXPOSURE,
563                         0, exposure_max, 1, exposure_max / 2);
564
565         info->exposure_bias = v4l2_ctrl_new_int_menu(&info->handle,
566                         &m5mols_ctrl_ops, V4L2_CID_AUTO_EXPOSURE_BIAS,
567                         ARRAY_SIZE(ev_bias_qmenu) - 1,
568                         ARRAY_SIZE(ev_bias_qmenu)/2 - 1,
569                         ev_bias_qmenu);
570
571         info->metering = v4l2_ctrl_new_std_menu(&info->handle,
572                         &m5mols_ctrl_ops, V4L2_CID_EXPOSURE_METERING,
573                         2, ~0x7, V4L2_EXPOSURE_METERING_AVERAGE);
574
575         /* ISO control cluster */
576         info->auto_iso = v4l2_ctrl_new_std_menu(&info->handle, &m5mols_ctrl_ops,
577                         V4L2_CID_ISO_SENSITIVITY_AUTO, 1, ~0x03, 1);
578
579         info->iso = v4l2_ctrl_new_int_menu(&info->handle, &m5mols_ctrl_ops,
580                         V4L2_CID_ISO_SENSITIVITY, ARRAY_SIZE(iso_qmenu) - 1,
581                         ARRAY_SIZE(iso_qmenu)/2 - 1, iso_qmenu);
582
583         info->saturation = v4l2_ctrl_new_std(&info->handle, &m5mols_ctrl_ops,
584                         V4L2_CID_SATURATION, 1, 5, 1, 3);
585
586         info->zoom = v4l2_ctrl_new_std(&info->handle, &m5mols_ctrl_ops,
587                         V4L2_CID_ZOOM_ABSOLUTE, 1, 70, zoom_step, 1);
588
589         info->colorfx = v4l2_ctrl_new_std_menu(&info->handle, &m5mols_ctrl_ops,
590                         V4L2_CID_COLORFX, 4, 0, V4L2_COLORFX_NONE);
591
592         info->wdr = v4l2_ctrl_new_std(&info->handle, &m5mols_ctrl_ops,
593                         V4L2_CID_WIDE_DYNAMIC_RANGE, 0, 1, 1, 0);
594
595         info->stabilization = v4l2_ctrl_new_std(&info->handle, &m5mols_ctrl_ops,
596                         V4L2_CID_IMAGE_STABILIZATION, 0, 1, 1, 0);
597
598         info->jpeg_quality = v4l2_ctrl_new_std(&info->handle, &m5mols_ctrl_ops,
599                         V4L2_CID_JPEG_COMPRESSION_QUALITY, 1, 100, 1, 80);
600
601         info->lock_3a = v4l2_ctrl_new_std(&info->handle, &m5mols_ctrl_ops,
602                         V4L2_CID_3A_LOCK, 0, 0x7, 0, 0);
603
604         if (info->handle.error) {
605                 int ret = info->handle.error;
606                 v4l2_err(sd, "Failed to initialize controls: %d\n", ret);
607                 v4l2_ctrl_handler_free(&info->handle);
608                 return ret;
609         }
610
611         v4l2_ctrl_auto_cluster(4, &info->auto_exposure, 1, false);
612         info->auto_iso->flags |= V4L2_CTRL_FLAG_VOLATILE |
613                                 V4L2_CTRL_FLAG_UPDATE;
614         v4l2_ctrl_auto_cluster(2, &info->auto_iso, 0, false);
615
616         info->lock_3a->flags |= V4L2_CTRL_FLAG_VOLATILE;
617
618         m5mols_set_ctrl_mode(info->auto_exposure, REG_PARAMETER);
619         m5mols_set_ctrl_mode(info->auto_wb, REG_PARAMETER);
620         m5mols_set_ctrl_mode(info->colorfx, REG_MONITOR);
621
622         sd->ctrl_handler = &info->handle;
623
624         return 0;
625 }