mmc: sdhci-acpi: Disable write protect detection on Acer Aspire Switch 10 (SW5-012)
[muen/linux.git] / drivers / mmc / host / sdhci-acpi.c
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Secure Digital Host Controller Interface ACPI driver.
4  *
5  * Copyright (c) 2012, Intel Corporation.
6  */
7
8 #include <linux/init.h>
9 #include <linux/export.h>
10 #include <linux/module.h>
11 #include <linux/device.h>
12 #include <linux/platform_device.h>
13 #include <linux/ioport.h>
14 #include <linux/io.h>
15 #include <linux/dma-mapping.h>
16 #include <linux/compiler.h>
17 #include <linux/stddef.h>
18 #include <linux/bitops.h>
19 #include <linux/types.h>
20 #include <linux/err.h>
21 #include <linux/interrupt.h>
22 #include <linux/acpi.h>
23 #include <linux/pm.h>
24 #include <linux/pm_runtime.h>
25 #include <linux/delay.h>
26 #include <linux/dmi.h>
27
28 #include <linux/mmc/host.h>
29 #include <linux/mmc/pm.h>
30 #include <linux/mmc/slot-gpio.h>
31
32 #ifdef CONFIG_X86
33 #include <asm/cpu_device_id.h>
34 #include <asm/intel-family.h>
35 #include <asm/iosf_mbi.h>
36 #include <linux/pci.h>
37 #endif
38
39 #include "sdhci.h"
40
41 enum {
42         SDHCI_ACPI_SD_CD                = BIT(0),
43         SDHCI_ACPI_RUNTIME_PM           = BIT(1),
44         SDHCI_ACPI_SD_CD_OVERRIDE_LEVEL = BIT(2),
45 };
46
47 struct sdhci_acpi_chip {
48         const struct    sdhci_ops *ops;
49         unsigned int    quirks;
50         unsigned int    quirks2;
51         unsigned long   caps;
52         unsigned int    caps2;
53         mmc_pm_flag_t   pm_caps;
54 };
55
56 struct sdhci_acpi_slot {
57         const struct    sdhci_acpi_chip *chip;
58         unsigned int    quirks;
59         unsigned int    quirks2;
60         unsigned long   caps;
61         unsigned int    caps2;
62         mmc_pm_flag_t   pm_caps;
63         unsigned int    flags;
64         size_t          priv_size;
65         int (*probe_slot)(struct platform_device *, struct acpi_device *);
66         int (*remove_slot)(struct platform_device *);
67         int (*free_slot)(struct platform_device *pdev);
68         int (*setup_host)(struct platform_device *pdev);
69 };
70
71 struct sdhci_acpi_host {
72         struct sdhci_host               *host;
73         const struct sdhci_acpi_slot    *slot;
74         struct platform_device          *pdev;
75         bool                            use_runtime_pm;
76         bool                            is_intel;
77         bool                            reset_signal_volt_on_suspend;
78         unsigned long                   private[0] ____cacheline_aligned;
79 };
80
81 enum {
82         DMI_QUIRK_RESET_SD_SIGNAL_VOLT_ON_SUSP                  = BIT(0),
83         DMI_QUIRK_SD_NO_WRITE_PROTECT                           = BIT(1),
84 };
85
86 static inline void *sdhci_acpi_priv(struct sdhci_acpi_host *c)
87 {
88         return (void *)c->private;
89 }
90
91 static inline bool sdhci_acpi_flag(struct sdhci_acpi_host *c, unsigned int flag)
92 {
93         return c->slot && (c->slot->flags & flag);
94 }
95
96 #define INTEL_DSM_HS_CAPS_SDR25         BIT(0)
97 #define INTEL_DSM_HS_CAPS_DDR50         BIT(1)
98 #define INTEL_DSM_HS_CAPS_SDR50         BIT(2)
99 #define INTEL_DSM_HS_CAPS_SDR104        BIT(3)
100
101 enum {
102         INTEL_DSM_FNS           =  0,
103         INTEL_DSM_V18_SWITCH    =  3,
104         INTEL_DSM_V33_SWITCH    =  4,
105         INTEL_DSM_HS_CAPS       =  8,
106 };
107
108 struct intel_host {
109         u32     dsm_fns;
110         u32     hs_caps;
111 };
112
113 static const guid_t intel_dsm_guid =
114         GUID_INIT(0xF6C13EA5, 0x65CD, 0x461F,
115                   0xAB, 0x7A, 0x29, 0xF7, 0xE8, 0xD5, 0xBD, 0x61);
116
117 static int __intel_dsm(struct intel_host *intel_host, struct device *dev,
118                        unsigned int fn, u32 *result)
119 {
120         union acpi_object *obj;
121         int err = 0;
122
123         obj = acpi_evaluate_dsm(ACPI_HANDLE(dev), &intel_dsm_guid, 0, fn, NULL);
124         if (!obj)
125                 return -EOPNOTSUPP;
126
127         if (obj->type == ACPI_TYPE_INTEGER) {
128                 *result = obj->integer.value;
129         } else if (obj->type == ACPI_TYPE_BUFFER && obj->buffer.length > 0) {
130                 size_t len = min_t(size_t, obj->buffer.length, 4);
131
132                 *result = 0;
133                 memcpy(result, obj->buffer.pointer, len);
134         } else {
135                 dev_err(dev, "%s DSM fn %u obj->type %d obj->buffer.length %d\n",
136                         __func__, fn, obj->type, obj->buffer.length);
137                 err = -EINVAL;
138         }
139
140         ACPI_FREE(obj);
141
142         return err;
143 }
144
145 static int intel_dsm(struct intel_host *intel_host, struct device *dev,
146                      unsigned int fn, u32 *result)
147 {
148         if (fn > 31 || !(intel_host->dsm_fns & (1 << fn)))
149                 return -EOPNOTSUPP;
150
151         return __intel_dsm(intel_host, dev, fn, result);
152 }
153
154 static void intel_dsm_init(struct intel_host *intel_host, struct device *dev,
155                            struct mmc_host *mmc)
156 {
157         int err;
158
159         intel_host->hs_caps = ~0;
160
161         err = __intel_dsm(intel_host, dev, INTEL_DSM_FNS, &intel_host->dsm_fns);
162         if (err) {
163                 pr_debug("%s: DSM not supported, error %d\n",
164                          mmc_hostname(mmc), err);
165                 return;
166         }
167
168         pr_debug("%s: DSM function mask %#x\n",
169                  mmc_hostname(mmc), intel_host->dsm_fns);
170
171         intel_dsm(intel_host, dev, INTEL_DSM_HS_CAPS, &intel_host->hs_caps);
172 }
173
174 static int intel_start_signal_voltage_switch(struct mmc_host *mmc,
175                                              struct mmc_ios *ios)
176 {
177         struct device *dev = mmc_dev(mmc);
178         struct sdhci_acpi_host *c = dev_get_drvdata(dev);
179         struct intel_host *intel_host = sdhci_acpi_priv(c);
180         unsigned int fn;
181         u32 result = 0;
182         int err;
183
184         err = sdhci_start_signal_voltage_switch(mmc, ios);
185         if (err)
186                 return err;
187
188         switch (ios->signal_voltage) {
189         case MMC_SIGNAL_VOLTAGE_330:
190                 fn = INTEL_DSM_V33_SWITCH;
191                 break;
192         case MMC_SIGNAL_VOLTAGE_180:
193                 fn = INTEL_DSM_V18_SWITCH;
194                 break;
195         default:
196                 return 0;
197         }
198
199         err = intel_dsm(intel_host, dev, fn, &result);
200         pr_debug("%s: %s DSM fn %u error %d result %u\n",
201                  mmc_hostname(mmc), __func__, fn, err, result);
202
203         return 0;
204 }
205
206 static void sdhci_acpi_int_hw_reset(struct sdhci_host *host)
207 {
208         u8 reg;
209
210         reg = sdhci_readb(host, SDHCI_POWER_CONTROL);
211         reg |= 0x10;
212         sdhci_writeb(host, reg, SDHCI_POWER_CONTROL);
213         /* For eMMC, minimum is 1us but give it 9us for good measure */
214         udelay(9);
215         reg &= ~0x10;
216         sdhci_writeb(host, reg, SDHCI_POWER_CONTROL);
217         /* For eMMC, minimum is 200us but give it 300us for good measure */
218         usleep_range(300, 1000);
219 }
220
221 static const struct sdhci_ops sdhci_acpi_ops_dflt = {
222         .set_clock = sdhci_set_clock,
223         .set_bus_width = sdhci_set_bus_width,
224         .reset = sdhci_reset,
225         .set_uhs_signaling = sdhci_set_uhs_signaling,
226 };
227
228 static const struct sdhci_ops sdhci_acpi_ops_int = {
229         .set_clock = sdhci_set_clock,
230         .set_bus_width = sdhci_set_bus_width,
231         .reset = sdhci_reset,
232         .set_uhs_signaling = sdhci_set_uhs_signaling,
233         .hw_reset   = sdhci_acpi_int_hw_reset,
234 };
235
236 static const struct sdhci_acpi_chip sdhci_acpi_chip_int = {
237         .ops = &sdhci_acpi_ops_int,
238 };
239
240 #ifdef CONFIG_X86
241
242 static bool sdhci_acpi_byt(void)
243 {
244         static const struct x86_cpu_id byt[] = {
245                 { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_SILVERMONT },
246                 {}
247         };
248
249         return x86_match_cpu(byt);
250 }
251
252 static bool sdhci_acpi_cht(void)
253 {
254         static const struct x86_cpu_id cht[] = {
255                 { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_AIRMONT },
256                 {}
257         };
258
259         return x86_match_cpu(cht);
260 }
261
262 #define BYT_IOSF_SCCEP                  0x63
263 #define BYT_IOSF_OCP_NETCTRL0           0x1078
264 #define BYT_IOSF_OCP_TIMEOUT_BASE       GENMASK(10, 8)
265
266 static void sdhci_acpi_byt_setting(struct device *dev)
267 {
268         u32 val = 0;
269
270         if (!sdhci_acpi_byt())
271                 return;
272
273         if (iosf_mbi_read(BYT_IOSF_SCCEP, MBI_CR_READ, BYT_IOSF_OCP_NETCTRL0,
274                           &val)) {
275                 dev_err(dev, "%s read error\n", __func__);
276                 return;
277         }
278
279         if (!(val & BYT_IOSF_OCP_TIMEOUT_BASE))
280                 return;
281
282         val &= ~BYT_IOSF_OCP_TIMEOUT_BASE;
283
284         if (iosf_mbi_write(BYT_IOSF_SCCEP, MBI_CR_WRITE, BYT_IOSF_OCP_NETCTRL0,
285                            val)) {
286                 dev_err(dev, "%s write error\n", __func__);
287                 return;
288         }
289
290         dev_dbg(dev, "%s completed\n", __func__);
291 }
292
293 static bool sdhci_acpi_byt_defer(struct device *dev)
294 {
295         if (!sdhci_acpi_byt())
296                 return false;
297
298         if (!iosf_mbi_available())
299                 return true;
300
301         sdhci_acpi_byt_setting(dev);
302
303         return false;
304 }
305
306 static bool sdhci_acpi_cht_pci_wifi(unsigned int vendor, unsigned int device,
307                                     unsigned int slot, unsigned int parent_slot)
308 {
309         struct pci_dev *dev, *parent, *from = NULL;
310
311         while (1) {
312                 dev = pci_get_device(vendor, device, from);
313                 pci_dev_put(from);
314                 if (!dev)
315                         break;
316                 parent = pci_upstream_bridge(dev);
317                 if (ACPI_COMPANION(&dev->dev) && PCI_SLOT(dev->devfn) == slot &&
318                     parent && PCI_SLOT(parent->devfn) == parent_slot &&
319                     !pci_upstream_bridge(parent)) {
320                         pci_dev_put(dev);
321                         return true;
322                 }
323                 from = dev;
324         }
325
326         return false;
327 }
328
329 /*
330  * GPDwin uses PCI wifi which conflicts with SDIO's use of
331  * acpi_device_fix_up_power() on child device nodes. Identifying GPDwin is
332  * problematic, but since SDIO is only used for wifi, the presence of the PCI
333  * wifi card in the expected slot with an ACPI companion node, is used to
334  * indicate that acpi_device_fix_up_power() should be avoided.
335  */
336 static inline bool sdhci_acpi_no_fixup_child_power(struct acpi_device *adev)
337 {
338         return sdhci_acpi_cht() &&
339                acpi_dev_hid_uid_match(adev, "80860F14", "2") &&
340                sdhci_acpi_cht_pci_wifi(0x14e4, 0x43ec, 0, 28);
341 }
342
343 #else
344
345 static inline void sdhci_acpi_byt_setting(struct device *dev)
346 {
347 }
348
349 static inline bool sdhci_acpi_byt_defer(struct device *dev)
350 {
351         return false;
352 }
353
354 static inline bool sdhci_acpi_no_fixup_child_power(struct acpi_device *adev)
355 {
356         return false;
357 }
358
359 #endif
360
361 static int bxt_get_cd(struct mmc_host *mmc)
362 {
363         int gpio_cd = mmc_gpio_get_cd(mmc);
364         struct sdhci_host *host = mmc_priv(mmc);
365         unsigned long flags;
366         int ret = 0;
367
368         if (!gpio_cd)
369                 return 0;
370
371         spin_lock_irqsave(&host->lock, flags);
372
373         if (host->flags & SDHCI_DEVICE_DEAD)
374                 goto out;
375
376         ret = !!(sdhci_readl(host, SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT);
377 out:
378         spin_unlock_irqrestore(&host->lock, flags);
379
380         return ret;
381 }
382
383 static int intel_probe_slot(struct platform_device *pdev, struct acpi_device *adev)
384 {
385         struct sdhci_acpi_host *c = platform_get_drvdata(pdev);
386         struct intel_host *intel_host = sdhci_acpi_priv(c);
387         struct sdhci_host *host = c->host;
388
389         if (acpi_dev_hid_uid_match(adev, "80860F14", "1") &&
390             sdhci_readl(host, SDHCI_CAPABILITIES) == 0x446cc8b2 &&
391             sdhci_readl(host, SDHCI_CAPABILITIES_1) == 0x00000807)
392                 host->timeout_clk = 1000; /* 1000 kHz i.e. 1 MHz */
393
394         if (acpi_dev_hid_uid_match(adev, "80865ACA", NULL))
395                 host->mmc_host_ops.get_cd = bxt_get_cd;
396
397         intel_dsm_init(intel_host, &pdev->dev, host->mmc);
398
399         host->mmc_host_ops.start_signal_voltage_switch =
400                                         intel_start_signal_voltage_switch;
401
402         c->is_intel = true;
403
404         return 0;
405 }
406
407 static int intel_setup_host(struct platform_device *pdev)
408 {
409         struct sdhci_acpi_host *c = platform_get_drvdata(pdev);
410         struct intel_host *intel_host = sdhci_acpi_priv(c);
411
412         if (!(intel_host->hs_caps & INTEL_DSM_HS_CAPS_SDR25))
413                 c->host->mmc->caps &= ~MMC_CAP_UHS_SDR25;
414
415         if (!(intel_host->hs_caps & INTEL_DSM_HS_CAPS_SDR50))
416                 c->host->mmc->caps &= ~MMC_CAP_UHS_SDR50;
417
418         if (!(intel_host->hs_caps & INTEL_DSM_HS_CAPS_DDR50))
419                 c->host->mmc->caps &= ~MMC_CAP_UHS_DDR50;
420
421         if (!(intel_host->hs_caps & INTEL_DSM_HS_CAPS_SDR104))
422                 c->host->mmc->caps &= ~MMC_CAP_UHS_SDR104;
423
424         return 0;
425 }
426
427 static const struct sdhci_acpi_slot sdhci_acpi_slot_int_emmc = {
428         .chip    = &sdhci_acpi_chip_int,
429         .caps    = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE |
430                    MMC_CAP_HW_RESET | MMC_CAP_1_8V_DDR |
431                    MMC_CAP_CMD_DURING_TFR | MMC_CAP_WAIT_WHILE_BUSY,
432         .flags   = SDHCI_ACPI_RUNTIME_PM,
433         .quirks  = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC |
434                    SDHCI_QUIRK_NO_LED,
435         .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
436                    SDHCI_QUIRK2_STOP_WITH_TC |
437                    SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400,
438         .probe_slot     = intel_probe_slot,
439         .setup_host     = intel_setup_host,
440         .priv_size      = sizeof(struct intel_host),
441 };
442
443 static const struct sdhci_acpi_slot sdhci_acpi_slot_int_sdio = {
444         .quirks  = SDHCI_QUIRK_BROKEN_CARD_DETECTION |
445                    SDHCI_QUIRK_NO_LED |
446                    SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
447         .quirks2 = SDHCI_QUIRK2_HOST_OFF_CARD_ON,
448         .caps    = MMC_CAP_NONREMOVABLE | MMC_CAP_POWER_OFF_CARD |
449                    MMC_CAP_WAIT_WHILE_BUSY,
450         .flags   = SDHCI_ACPI_RUNTIME_PM,
451         .pm_caps = MMC_PM_KEEP_POWER,
452         .probe_slot     = intel_probe_slot,
453         .setup_host     = intel_setup_host,
454         .priv_size      = sizeof(struct intel_host),
455 };
456
457 static const struct sdhci_acpi_slot sdhci_acpi_slot_int_sd = {
458         .flags   = SDHCI_ACPI_SD_CD | SDHCI_ACPI_SD_CD_OVERRIDE_LEVEL |
459                    SDHCI_ACPI_RUNTIME_PM,
460         .quirks  = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC |
461                    SDHCI_QUIRK_NO_LED,
462         .quirks2 = SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON |
463                    SDHCI_QUIRK2_STOP_WITH_TC,
464         .caps    = MMC_CAP_WAIT_WHILE_BUSY | MMC_CAP_AGGRESSIVE_PM,
465         .probe_slot     = intel_probe_slot,
466         .setup_host     = intel_setup_host,
467         .priv_size      = sizeof(struct intel_host),
468 };
469
470 #define VENDOR_SPECIFIC_PWRCTL_CLEAR_REG        0x1a8
471 #define VENDOR_SPECIFIC_PWRCTL_CTL_REG          0x1ac
472 static irqreturn_t sdhci_acpi_qcom_handler(int irq, void *ptr)
473 {
474         struct sdhci_host *host = ptr;
475
476         sdhci_writel(host, 0x3, VENDOR_SPECIFIC_PWRCTL_CLEAR_REG);
477         sdhci_writel(host, 0x1, VENDOR_SPECIFIC_PWRCTL_CTL_REG);
478
479         return IRQ_HANDLED;
480 }
481
482 static int qcom_probe_slot(struct platform_device *pdev, struct acpi_device *adev)
483 {
484         struct sdhci_acpi_host *c = platform_get_drvdata(pdev);
485         struct sdhci_host *host = c->host;
486         int *irq = sdhci_acpi_priv(c);
487
488         *irq = -EINVAL;
489
490         if (!acpi_dev_hid_uid_match(adev, "QCOM8051", NULL))
491                 return 0;
492
493         *irq = platform_get_irq(pdev, 1);
494         if (*irq < 0)
495                 return 0;
496
497         return request_threaded_irq(*irq, NULL, sdhci_acpi_qcom_handler,
498                                     IRQF_ONESHOT | IRQF_TRIGGER_HIGH,
499                                     "sdhci_qcom", host);
500 }
501
502 static int qcom_free_slot(struct platform_device *pdev)
503 {
504         struct device *dev = &pdev->dev;
505         struct sdhci_acpi_host *c = platform_get_drvdata(pdev);
506         struct sdhci_host *host = c->host;
507         struct acpi_device *adev;
508         int *irq = sdhci_acpi_priv(c);
509
510         adev = ACPI_COMPANION(dev);
511         if (!adev)
512                 return -ENODEV;
513
514         if (!acpi_dev_hid_uid_match(adev, "QCOM8051", NULL))
515                 return 0;
516
517         if (*irq < 0)
518                 return 0;
519
520         free_irq(*irq, host);
521         return 0;
522 }
523
524 static const struct sdhci_acpi_slot sdhci_acpi_slot_qcom_sd_3v = {
525         .quirks  = SDHCI_QUIRK_BROKEN_CARD_DETECTION,
526         .quirks2 = SDHCI_QUIRK2_NO_1_8_V,
527         .caps    = MMC_CAP_NONREMOVABLE,
528         .priv_size      = sizeof(int),
529         .probe_slot     = qcom_probe_slot,
530         .free_slot      = qcom_free_slot,
531 };
532
533 static const struct sdhci_acpi_slot sdhci_acpi_slot_qcom_sd = {
534         .quirks  = SDHCI_QUIRK_BROKEN_CARD_DETECTION,
535         .caps    = MMC_CAP_NONREMOVABLE,
536 };
537
538 /* AMD sdhci reset dll register. */
539 #define SDHCI_AMD_RESET_DLL_REGISTER    0x908
540
541 static int amd_select_drive_strength(struct mmc_card *card,
542                                      unsigned int max_dtr, int host_drv,
543                                      int card_drv, int *drv_type)
544 {
545         return MMC_SET_DRIVER_TYPE_A;
546 }
547
548 static void sdhci_acpi_amd_hs400_dll(struct sdhci_host *host)
549 {
550         /* AMD Platform requires dll setting */
551         sdhci_writel(host, 0x40003210, SDHCI_AMD_RESET_DLL_REGISTER);
552         usleep_range(10, 20);
553         sdhci_writel(host, 0x40033210, SDHCI_AMD_RESET_DLL_REGISTER);
554 }
555
556 /*
557  * For AMD Platform it is required to disable the tuning
558  * bit first controller to bring to HS Mode from HS200
559  * mode, later enable to tune to HS400 mode.
560  */
561 static void amd_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
562 {
563         struct sdhci_host *host = mmc_priv(mmc);
564         unsigned int old_timing = host->timing;
565
566         sdhci_set_ios(mmc, ios);
567         if (old_timing == MMC_TIMING_MMC_HS200 &&
568             ios->timing == MMC_TIMING_MMC_HS)
569                 sdhci_writew(host, 0x9, SDHCI_HOST_CONTROL2);
570         if (old_timing != MMC_TIMING_MMC_HS400 &&
571             ios->timing == MMC_TIMING_MMC_HS400) {
572                 sdhci_writew(host, 0x80, SDHCI_HOST_CONTROL2);
573                 sdhci_acpi_amd_hs400_dll(host);
574         }
575 }
576
577 static const struct sdhci_ops sdhci_acpi_ops_amd = {
578         .set_clock      = sdhci_set_clock,
579         .set_bus_width  = sdhci_set_bus_width,
580         .reset          = sdhci_reset,
581         .set_uhs_signaling = sdhci_set_uhs_signaling,
582 };
583
584 static const struct sdhci_acpi_chip sdhci_acpi_chip_amd = {
585         .ops = &sdhci_acpi_ops_amd,
586 };
587
588 static int sdhci_acpi_emmc_amd_probe_slot(struct platform_device *pdev,
589                                           struct acpi_device *adev)
590 {
591         struct sdhci_acpi_host *c = platform_get_drvdata(pdev);
592         struct sdhci_host *host   = c->host;
593
594         sdhci_read_caps(host);
595         if (host->caps1 & SDHCI_SUPPORT_DDR50)
596                 host->mmc->caps = MMC_CAP_1_8V_DDR;
597
598         if ((host->caps1 & SDHCI_SUPPORT_SDR104) &&
599             (host->mmc->caps & MMC_CAP_1_8V_DDR))
600                 host->mmc->caps2 = MMC_CAP2_HS400_1_8V;
601
602         host->mmc_host_ops.select_drive_strength = amd_select_drive_strength;
603         host->mmc_host_ops.set_ios = amd_set_ios;
604         return 0;
605 }
606
607 static const struct sdhci_acpi_slot sdhci_acpi_slot_amd_emmc = {
608         .chip   = &sdhci_acpi_chip_amd,
609         .caps   = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE,
610         .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR | SDHCI_QUIRK_32BIT_DMA_SIZE |
611                         SDHCI_QUIRK_32BIT_ADMA_SIZE,
612         .probe_slot     = sdhci_acpi_emmc_amd_probe_slot,
613 };
614
615 struct sdhci_acpi_uid_slot {
616         const char *hid;
617         const char *uid;
618         const struct sdhci_acpi_slot *slot;
619 };
620
621 static const struct sdhci_acpi_uid_slot sdhci_acpi_uids[] = {
622         { "80865ACA", NULL, &sdhci_acpi_slot_int_sd },
623         { "80865ACC", NULL, &sdhci_acpi_slot_int_emmc },
624         { "80865AD0", NULL, &sdhci_acpi_slot_int_sdio },
625         { "80860F14" , "1" , &sdhci_acpi_slot_int_emmc },
626         { "80860F14" , "2" , &sdhci_acpi_slot_int_sdio },
627         { "80860F14" , "3" , &sdhci_acpi_slot_int_sd   },
628         { "80860F16" , NULL, &sdhci_acpi_slot_int_sd   },
629         { "INT33BB"  , "2" , &sdhci_acpi_slot_int_sdio },
630         { "INT33BB"  , "3" , &sdhci_acpi_slot_int_sd },
631         { "INT33C6"  , NULL, &sdhci_acpi_slot_int_sdio },
632         { "INT3436"  , NULL, &sdhci_acpi_slot_int_sdio },
633         { "INT344D"  , NULL, &sdhci_acpi_slot_int_sdio },
634         { "PNP0FFF"  , "3" , &sdhci_acpi_slot_int_sd   },
635         { "PNP0D40"  },
636         { "QCOM8051", NULL, &sdhci_acpi_slot_qcom_sd_3v },
637         { "QCOM8052", NULL, &sdhci_acpi_slot_qcom_sd },
638         { "AMDI0040", NULL, &sdhci_acpi_slot_amd_emmc },
639         { },
640 };
641
642 static const struct acpi_device_id sdhci_acpi_ids[] = {
643         { "80865ACA" },
644         { "80865ACC" },
645         { "80865AD0" },
646         { "80860F14" },
647         { "80860F16" },
648         { "INT33BB"  },
649         { "INT33C6"  },
650         { "INT3436"  },
651         { "INT344D"  },
652         { "PNP0D40"  },
653         { "QCOM8051" },
654         { "QCOM8052" },
655         { "AMDI0040" },
656         { },
657 };
658 MODULE_DEVICE_TABLE(acpi, sdhci_acpi_ids);
659
660 static const struct dmi_system_id sdhci_acpi_quirks[] = {
661         {
662                 /*
663                  * The Lenovo Miix 320-10ICR has a bug in the _PS0 method of
664                  * the SHC1 ACPI device, this bug causes it to reprogram the
665                  * wrong LDO (DLDO3) to 1.8V if 1.8V modes are used and the
666                  * card is (runtime) suspended + resumed. DLDO3 is used for
667                  * the LCD and setting it to 1.8V causes the LCD to go black.
668                  */
669                 .matches = {
670                         DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
671                         DMI_MATCH(DMI_PRODUCT_VERSION, "Lenovo MIIX 320-10ICR"),
672                 },
673                 .driver_data = (void *)DMI_QUIRK_RESET_SD_SIGNAL_VOLT_ON_SUSP,
674         },
675         {
676                 /*
677                  * The Acer Aspire Switch 10 (SW5-012) microSD slot always
678                  * reports the card being write-protected even though microSD
679                  * cards do not have a write-protect switch at all.
680                  */
681                 .matches = {
682                         DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
683                         DMI_MATCH(DMI_PRODUCT_NAME, "Aspire SW5-012"),
684                 },
685                 .driver_data = (void *)DMI_QUIRK_SD_NO_WRITE_PROTECT,
686         },
687         {} /* Terminating entry */
688 };
689
690 static const struct sdhci_acpi_slot *sdhci_acpi_get_slot(struct acpi_device *adev)
691 {
692         const struct sdhci_acpi_uid_slot *u;
693
694         for (u = sdhci_acpi_uids; u->hid; u++) {
695                 if (acpi_dev_hid_uid_match(adev, u->hid, u->uid))
696                         return u->slot;
697         }
698         return NULL;
699 }
700
701 static int sdhci_acpi_probe(struct platform_device *pdev)
702 {
703         struct device *dev = &pdev->dev;
704         const struct sdhci_acpi_slot *slot;
705         struct acpi_device *device, *child;
706         const struct dmi_system_id *id;
707         struct sdhci_acpi_host *c;
708         struct sdhci_host *host;
709         struct resource *iomem;
710         resource_size_t len;
711         size_t priv_size;
712         int quirks = 0;
713         int err;
714
715         device = ACPI_COMPANION(dev);
716         if (!device)
717                 return -ENODEV;
718
719         id = dmi_first_match(sdhci_acpi_quirks);
720         if (id)
721                 quirks = (long)id->driver_data;
722
723         slot = sdhci_acpi_get_slot(device);
724
725         /* Power on the SDHCI controller and its children */
726         acpi_device_fix_up_power(device);
727         if (!sdhci_acpi_no_fixup_child_power(device)) {
728                 list_for_each_entry(child, &device->children, node)
729                         if (child->status.present && child->status.enabled)
730                                 acpi_device_fix_up_power(child);
731         }
732
733         if (sdhci_acpi_byt_defer(dev))
734                 return -EPROBE_DEFER;
735
736         iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
737         if (!iomem)
738                 return -ENOMEM;
739
740         len = resource_size(iomem);
741         if (len < 0x100)
742                 dev_err(dev, "Invalid iomem size!\n");
743
744         if (!devm_request_mem_region(dev, iomem->start, len, dev_name(dev)))
745                 return -ENOMEM;
746
747         priv_size = slot ? slot->priv_size : 0;
748         host = sdhci_alloc_host(dev, sizeof(struct sdhci_acpi_host) + priv_size);
749         if (IS_ERR(host))
750                 return PTR_ERR(host);
751
752         c = sdhci_priv(host);
753         c->host = host;
754         c->slot = slot;
755         c->pdev = pdev;
756         c->use_runtime_pm = sdhci_acpi_flag(c, SDHCI_ACPI_RUNTIME_PM);
757
758         platform_set_drvdata(pdev, c);
759
760         host->hw_name   = "ACPI";
761         host->ops       = &sdhci_acpi_ops_dflt;
762         host->irq       = platform_get_irq(pdev, 0);
763         if (host->irq < 0) {
764                 err = -EINVAL;
765                 goto err_free;
766         }
767
768         host->ioaddr = devm_ioremap(dev, iomem->start,
769                                             resource_size(iomem));
770         if (host->ioaddr == NULL) {
771                 err = -ENOMEM;
772                 goto err_free;
773         }
774
775         if (c->slot) {
776                 if (c->slot->probe_slot) {
777                         err = c->slot->probe_slot(pdev, device);
778                         if (err)
779                                 goto err_free;
780                 }
781                 if (c->slot->chip) {
782                         host->ops            = c->slot->chip->ops;
783                         host->quirks        |= c->slot->chip->quirks;
784                         host->quirks2       |= c->slot->chip->quirks2;
785                         host->mmc->caps     |= c->slot->chip->caps;
786                         host->mmc->caps2    |= c->slot->chip->caps2;
787                         host->mmc->pm_caps  |= c->slot->chip->pm_caps;
788                 }
789                 host->quirks        |= c->slot->quirks;
790                 host->quirks2       |= c->slot->quirks2;
791                 host->mmc->caps     |= c->slot->caps;
792                 host->mmc->caps2    |= c->slot->caps2;
793                 host->mmc->pm_caps  |= c->slot->pm_caps;
794         }
795
796         host->mmc->caps2 |= MMC_CAP2_NO_PRESCAN_POWERUP;
797
798         if (sdhci_acpi_flag(c, SDHCI_ACPI_SD_CD)) {
799                 bool v = sdhci_acpi_flag(c, SDHCI_ACPI_SD_CD_OVERRIDE_LEVEL);
800
801                 err = mmc_gpiod_request_cd(host->mmc, NULL, 0, v, 0);
802                 if (err) {
803                         if (err == -EPROBE_DEFER)
804                                 goto err_free;
805                         dev_warn(dev, "failed to setup card detect gpio\n");
806                         c->use_runtime_pm = false;
807                 }
808
809                 if (quirks & DMI_QUIRK_RESET_SD_SIGNAL_VOLT_ON_SUSP)
810                         c->reset_signal_volt_on_suspend = true;
811
812                 if (quirks & DMI_QUIRK_SD_NO_WRITE_PROTECT)
813                         host->mmc->caps2 |= MMC_CAP2_NO_WRITE_PROTECT;
814         }
815
816         err = sdhci_setup_host(host);
817         if (err)
818                 goto err_free;
819
820         if (c->slot && c->slot->setup_host) {
821                 err = c->slot->setup_host(pdev);
822                 if (err)
823                         goto err_cleanup;
824         }
825
826         err = __sdhci_add_host(host);
827         if (err)
828                 goto err_cleanup;
829
830         if (c->use_runtime_pm) {
831                 pm_runtime_set_active(dev);
832                 pm_suspend_ignore_children(dev, 1);
833                 pm_runtime_set_autosuspend_delay(dev, 50);
834                 pm_runtime_use_autosuspend(dev);
835                 pm_runtime_enable(dev);
836         }
837
838         device_enable_async_suspend(dev);
839
840         return 0;
841
842 err_cleanup:
843         sdhci_cleanup_host(c->host);
844 err_free:
845         if (c->slot && c->slot->free_slot)
846                 c->slot->free_slot(pdev);
847
848         sdhci_free_host(c->host);
849         return err;
850 }
851
852 static int sdhci_acpi_remove(struct platform_device *pdev)
853 {
854         struct sdhci_acpi_host *c = platform_get_drvdata(pdev);
855         struct device *dev = &pdev->dev;
856         int dead;
857
858         if (c->use_runtime_pm) {
859                 pm_runtime_get_sync(dev);
860                 pm_runtime_disable(dev);
861                 pm_runtime_put_noidle(dev);
862         }
863
864         if (c->slot && c->slot->remove_slot)
865                 c->slot->remove_slot(pdev);
866
867         dead = (sdhci_readl(c->host, SDHCI_INT_STATUS) == ~0);
868         sdhci_remove_host(c->host, dead);
869
870         if (c->slot && c->slot->free_slot)
871                 c->slot->free_slot(pdev);
872
873         sdhci_free_host(c->host);
874
875         return 0;
876 }
877
878 static void __maybe_unused sdhci_acpi_reset_signal_voltage_if_needed(
879         struct device *dev)
880 {
881         struct sdhci_acpi_host *c = dev_get_drvdata(dev);
882         struct sdhci_host *host = c->host;
883
884         if (c->is_intel && c->reset_signal_volt_on_suspend &&
885             host->mmc->ios.signal_voltage != MMC_SIGNAL_VOLTAGE_330) {
886                 struct intel_host *intel_host = sdhci_acpi_priv(c);
887                 unsigned int fn = INTEL_DSM_V33_SWITCH;
888                 u32 result = 0;
889
890                 intel_dsm(intel_host, dev, fn, &result);
891         }
892 }
893
894 #ifdef CONFIG_PM_SLEEP
895
896 static int sdhci_acpi_suspend(struct device *dev)
897 {
898         struct sdhci_acpi_host *c = dev_get_drvdata(dev);
899         struct sdhci_host *host = c->host;
900         int ret;
901
902         if (host->tuning_mode != SDHCI_TUNING_MODE_3)
903                 mmc_retune_needed(host->mmc);
904
905         ret = sdhci_suspend_host(host);
906         if (ret)
907                 return ret;
908
909         sdhci_acpi_reset_signal_voltage_if_needed(dev);
910         return 0;
911 }
912
913 static int sdhci_acpi_resume(struct device *dev)
914 {
915         struct sdhci_acpi_host *c = dev_get_drvdata(dev);
916
917         sdhci_acpi_byt_setting(&c->pdev->dev);
918
919         return sdhci_resume_host(c->host);
920 }
921
922 #endif
923
924 #ifdef CONFIG_PM
925
926 static int sdhci_acpi_runtime_suspend(struct device *dev)
927 {
928         struct sdhci_acpi_host *c = dev_get_drvdata(dev);
929         struct sdhci_host *host = c->host;
930         int ret;
931
932         if (host->tuning_mode != SDHCI_TUNING_MODE_3)
933                 mmc_retune_needed(host->mmc);
934
935         ret = sdhci_runtime_suspend_host(host);
936         if (ret)
937                 return ret;
938
939         sdhci_acpi_reset_signal_voltage_if_needed(dev);
940         return 0;
941 }
942
943 static int sdhci_acpi_runtime_resume(struct device *dev)
944 {
945         struct sdhci_acpi_host *c = dev_get_drvdata(dev);
946
947         sdhci_acpi_byt_setting(&c->pdev->dev);
948
949         return sdhci_runtime_resume_host(c->host, 0);
950 }
951
952 #endif
953
954 static const struct dev_pm_ops sdhci_acpi_pm_ops = {
955         SET_SYSTEM_SLEEP_PM_OPS(sdhci_acpi_suspend, sdhci_acpi_resume)
956         SET_RUNTIME_PM_OPS(sdhci_acpi_runtime_suspend,
957                         sdhci_acpi_runtime_resume, NULL)
958 };
959
960 static struct platform_driver sdhci_acpi_driver = {
961         .driver = {
962                 .name                   = "sdhci-acpi",
963                 .acpi_match_table       = sdhci_acpi_ids,
964                 .pm                     = &sdhci_acpi_pm_ops,
965         },
966         .probe  = sdhci_acpi_probe,
967         .remove = sdhci_acpi_remove,
968 };
969
970 module_platform_driver(sdhci_acpi_driver);
971
972 MODULE_DESCRIPTION("Secure Digital Host Controller Interface ACPI driver");
973 MODULE_AUTHOR("Adrian Hunter");
974 MODULE_LICENSE("GPL v2");