mmc: sdhci-acpi: Fix IRQ 0
[muen/linux.git] / drivers / mmc / host / sdhci-acpi.c
1 /*
2  * Secure Digital Host Controller Interface ACPI driver.
3  *
4  * Copyright (c) 2012, Intel Corporation.
5  *
6  * This program is free software; you can redistribute it and/or modify it
7  * under the terms and conditions of the GNU General Public License,
8  * version 2, as published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13  * more details.
14  *
15  * You should have received a copy of the GNU General Public License along with
16  * this program; if not, write to the Free Software Foundation, Inc.,
17  * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18  *
19  */
20
21 #include <linux/init.h>
22 #include <linux/export.h>
23 #include <linux/module.h>
24 #include <linux/device.h>
25 #include <linux/platform_device.h>
26 #include <linux/ioport.h>
27 #include <linux/io.h>
28 #include <linux/dma-mapping.h>
29 #include <linux/compiler.h>
30 #include <linux/stddef.h>
31 #include <linux/bitops.h>
32 #include <linux/types.h>
33 #include <linux/err.h>
34 #include <linux/interrupt.h>
35 #include <linux/acpi.h>
36 #include <linux/pm.h>
37 #include <linux/pm_runtime.h>
38 #include <linux/delay.h>
39
40 #include <linux/mmc/host.h>
41 #include <linux/mmc/pm.h>
42 #include <linux/mmc/slot-gpio.h>
43
44 #ifdef CONFIG_X86
45 #include <asm/cpu_device_id.h>
46 #include <asm/intel-family.h>
47 #include <asm/iosf_mbi.h>
48 #include <linux/pci.h>
49 #endif
50
51 #include "sdhci.h"
52
53 enum {
54         SDHCI_ACPI_SD_CD                = BIT(0),
55         SDHCI_ACPI_RUNTIME_PM           = BIT(1),
56         SDHCI_ACPI_SD_CD_OVERRIDE_LEVEL = BIT(2),
57 };
58
59 struct sdhci_acpi_chip {
60         const struct    sdhci_ops *ops;
61         unsigned int    quirks;
62         unsigned int    quirks2;
63         unsigned long   caps;
64         unsigned int    caps2;
65         mmc_pm_flag_t   pm_caps;
66 };
67
68 struct sdhci_acpi_slot {
69         const struct    sdhci_acpi_chip *chip;
70         unsigned int    quirks;
71         unsigned int    quirks2;
72         unsigned long   caps;
73         unsigned int    caps2;
74         mmc_pm_flag_t   pm_caps;
75         unsigned int    flags;
76         size_t          priv_size;
77         int (*probe_slot)(struct platform_device *, const char *, const char *);
78         int (*remove_slot)(struct platform_device *);
79         int (*setup_host)(struct platform_device *pdev);
80 };
81
82 struct sdhci_acpi_host {
83         struct sdhci_host               *host;
84         const struct sdhci_acpi_slot    *slot;
85         struct platform_device          *pdev;
86         bool                            use_runtime_pm;
87         unsigned long                   private[0] ____cacheline_aligned;
88 };
89
90 static inline void *sdhci_acpi_priv(struct sdhci_acpi_host *c)
91 {
92         return (void *)c->private;
93 }
94
95 static inline bool sdhci_acpi_flag(struct sdhci_acpi_host *c, unsigned int flag)
96 {
97         return c->slot && (c->slot->flags & flag);
98 }
99
100 #define INTEL_DSM_HS_CAPS_SDR25         BIT(0)
101 #define INTEL_DSM_HS_CAPS_DDR50         BIT(1)
102 #define INTEL_DSM_HS_CAPS_SDR50         BIT(2)
103 #define INTEL_DSM_HS_CAPS_SDR104        BIT(3)
104
105 enum {
106         INTEL_DSM_FNS           =  0,
107         INTEL_DSM_V18_SWITCH    =  3,
108         INTEL_DSM_V33_SWITCH    =  4,
109         INTEL_DSM_HS_CAPS       =  8,
110 };
111
112 struct intel_host {
113         u32     dsm_fns;
114         u32     hs_caps;
115 };
116
117 static const guid_t intel_dsm_guid =
118         GUID_INIT(0xF6C13EA5, 0x65CD, 0x461F,
119                   0xAB, 0x7A, 0x29, 0xF7, 0xE8, 0xD5, 0xBD, 0x61);
120
121 static int __intel_dsm(struct intel_host *intel_host, struct device *dev,
122                        unsigned int fn, u32 *result)
123 {
124         union acpi_object *obj;
125         int err = 0;
126
127         obj = acpi_evaluate_dsm(ACPI_HANDLE(dev), &intel_dsm_guid, 0, fn, NULL);
128         if (!obj)
129                 return -EOPNOTSUPP;
130
131         if (obj->type == ACPI_TYPE_INTEGER) {
132                 *result = obj->integer.value;
133         } else if (obj->type == ACPI_TYPE_BUFFER && obj->buffer.length > 0) {
134                 size_t len = min_t(size_t, obj->buffer.length, 4);
135
136                 *result = 0;
137                 memcpy(result, obj->buffer.pointer, len);
138         } else {
139                 dev_err(dev, "%s DSM fn %u obj->type %d obj->buffer.length %d\n",
140                         __func__, fn, obj->type, obj->buffer.length);
141                 err = -EINVAL;
142         }
143
144         ACPI_FREE(obj);
145
146         return err;
147 }
148
149 static int intel_dsm(struct intel_host *intel_host, struct device *dev,
150                      unsigned int fn, u32 *result)
151 {
152         if (fn > 31 || !(intel_host->dsm_fns & (1 << fn)))
153                 return -EOPNOTSUPP;
154
155         return __intel_dsm(intel_host, dev, fn, result);
156 }
157
158 static void intel_dsm_init(struct intel_host *intel_host, struct device *dev,
159                            struct mmc_host *mmc)
160 {
161         int err;
162
163         intel_host->hs_caps = ~0;
164
165         err = __intel_dsm(intel_host, dev, INTEL_DSM_FNS, &intel_host->dsm_fns);
166         if (err) {
167                 pr_debug("%s: DSM not supported, error %d\n",
168                          mmc_hostname(mmc), err);
169                 return;
170         }
171
172         pr_debug("%s: DSM function mask %#x\n",
173                  mmc_hostname(mmc), intel_host->dsm_fns);
174
175         intel_dsm(intel_host, dev, INTEL_DSM_HS_CAPS, &intel_host->hs_caps);
176 }
177
178 static int intel_start_signal_voltage_switch(struct mmc_host *mmc,
179                                              struct mmc_ios *ios)
180 {
181         struct device *dev = mmc_dev(mmc);
182         struct sdhci_acpi_host *c = dev_get_drvdata(dev);
183         struct intel_host *intel_host = sdhci_acpi_priv(c);
184         unsigned int fn;
185         u32 result = 0;
186         int err;
187
188         err = sdhci_start_signal_voltage_switch(mmc, ios);
189         if (err)
190                 return err;
191
192         switch (ios->signal_voltage) {
193         case MMC_SIGNAL_VOLTAGE_330:
194                 fn = INTEL_DSM_V33_SWITCH;
195                 break;
196         case MMC_SIGNAL_VOLTAGE_180:
197                 fn = INTEL_DSM_V18_SWITCH;
198                 break;
199         default:
200                 return 0;
201         }
202
203         err = intel_dsm(intel_host, dev, fn, &result);
204         pr_debug("%s: %s DSM fn %u error %d result %u\n",
205                  mmc_hostname(mmc), __func__, fn, err, result);
206
207         return 0;
208 }
209
210 static void sdhci_acpi_int_hw_reset(struct sdhci_host *host)
211 {
212         u8 reg;
213
214         reg = sdhci_readb(host, SDHCI_POWER_CONTROL);
215         reg |= 0x10;
216         sdhci_writeb(host, reg, SDHCI_POWER_CONTROL);
217         /* For eMMC, minimum is 1us but give it 9us for good measure */
218         udelay(9);
219         reg &= ~0x10;
220         sdhci_writeb(host, reg, SDHCI_POWER_CONTROL);
221         /* For eMMC, minimum is 200us but give it 300us for good measure */
222         usleep_range(300, 1000);
223 }
224
225 static const struct sdhci_ops sdhci_acpi_ops_dflt = {
226         .set_clock = sdhci_set_clock,
227         .set_bus_width = sdhci_set_bus_width,
228         .reset = sdhci_reset,
229         .set_uhs_signaling = sdhci_set_uhs_signaling,
230 };
231
232 static const struct sdhci_ops sdhci_acpi_ops_int = {
233         .set_clock = sdhci_set_clock,
234         .set_bus_width = sdhci_set_bus_width,
235         .reset = sdhci_reset,
236         .set_uhs_signaling = sdhci_set_uhs_signaling,
237         .hw_reset   = sdhci_acpi_int_hw_reset,
238 };
239
240 static const struct sdhci_acpi_chip sdhci_acpi_chip_int = {
241         .ops = &sdhci_acpi_ops_int,
242 };
243
244 #ifdef CONFIG_X86
245
246 static bool sdhci_acpi_byt(void)
247 {
248         static const struct x86_cpu_id byt[] = {
249                 { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_SILVERMONT1 },
250                 {}
251         };
252
253         return x86_match_cpu(byt);
254 }
255
256 static bool sdhci_acpi_cht(void)
257 {
258         static const struct x86_cpu_id cht[] = {
259                 { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_AIRMONT },
260                 {}
261         };
262
263         return x86_match_cpu(cht);
264 }
265
266 #define BYT_IOSF_SCCEP                  0x63
267 #define BYT_IOSF_OCP_NETCTRL0           0x1078
268 #define BYT_IOSF_OCP_TIMEOUT_BASE       GENMASK(10, 8)
269
270 static void sdhci_acpi_byt_setting(struct device *dev)
271 {
272         u32 val = 0;
273
274         if (!sdhci_acpi_byt())
275                 return;
276
277         if (iosf_mbi_read(BYT_IOSF_SCCEP, MBI_CR_READ, BYT_IOSF_OCP_NETCTRL0,
278                           &val)) {
279                 dev_err(dev, "%s read error\n", __func__);
280                 return;
281         }
282
283         if (!(val & BYT_IOSF_OCP_TIMEOUT_BASE))
284                 return;
285
286         val &= ~BYT_IOSF_OCP_TIMEOUT_BASE;
287
288         if (iosf_mbi_write(BYT_IOSF_SCCEP, MBI_CR_WRITE, BYT_IOSF_OCP_NETCTRL0,
289                            val)) {
290                 dev_err(dev, "%s write error\n", __func__);
291                 return;
292         }
293
294         dev_dbg(dev, "%s completed\n", __func__);
295 }
296
297 static bool sdhci_acpi_byt_defer(struct device *dev)
298 {
299         if (!sdhci_acpi_byt())
300                 return false;
301
302         if (!iosf_mbi_available())
303                 return true;
304
305         sdhci_acpi_byt_setting(dev);
306
307         return false;
308 }
309
310 static bool sdhci_acpi_cht_pci_wifi(unsigned int vendor, unsigned int device,
311                                     unsigned int slot, unsigned int parent_slot)
312 {
313         struct pci_dev *dev, *parent, *from = NULL;
314
315         while (1) {
316                 dev = pci_get_device(vendor, device, from);
317                 pci_dev_put(from);
318                 if (!dev)
319                         break;
320                 parent = pci_upstream_bridge(dev);
321                 if (ACPI_COMPANION(&dev->dev) && PCI_SLOT(dev->devfn) == slot &&
322                     parent && PCI_SLOT(parent->devfn) == parent_slot &&
323                     !pci_upstream_bridge(parent)) {
324                         pci_dev_put(dev);
325                         return true;
326                 }
327                 from = dev;
328         }
329
330         return false;
331 }
332
333 /*
334  * GPDwin uses PCI wifi which conflicts with SDIO's use of
335  * acpi_device_fix_up_power() on child device nodes. Identifying GPDwin is
336  * problematic, but since SDIO is only used for wifi, the presence of the PCI
337  * wifi card in the expected slot with an ACPI companion node, is used to
338  * indicate that acpi_device_fix_up_power() should be avoided.
339  */
340 static inline bool sdhci_acpi_no_fixup_child_power(const char *hid,
341                                                    const char *uid)
342 {
343         return sdhci_acpi_cht() &&
344                !strcmp(hid, "80860F14") &&
345                !strcmp(uid, "2") &&
346                sdhci_acpi_cht_pci_wifi(0x14e4, 0x43ec, 0, 28);
347 }
348
349 #else
350
351 static inline void sdhci_acpi_byt_setting(struct device *dev)
352 {
353 }
354
355 static inline bool sdhci_acpi_byt_defer(struct device *dev)
356 {
357         return false;
358 }
359
360 static inline bool sdhci_acpi_no_fixup_child_power(const char *hid,
361                                                    const char *uid)
362 {
363         return false;
364 }
365
366 #endif
367
368 static int bxt_get_cd(struct mmc_host *mmc)
369 {
370         int gpio_cd = mmc_gpio_get_cd(mmc);
371         struct sdhci_host *host = mmc_priv(mmc);
372         unsigned long flags;
373         int ret = 0;
374
375         if (!gpio_cd)
376                 return 0;
377
378         spin_lock_irqsave(&host->lock, flags);
379
380         if (host->flags & SDHCI_DEVICE_DEAD)
381                 goto out;
382
383         ret = !!(sdhci_readl(host, SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT);
384 out:
385         spin_unlock_irqrestore(&host->lock, flags);
386
387         return ret;
388 }
389
390 static int intel_probe_slot(struct platform_device *pdev, const char *hid,
391                             const char *uid)
392 {
393         struct sdhci_acpi_host *c = platform_get_drvdata(pdev);
394         struct intel_host *intel_host = sdhci_acpi_priv(c);
395         struct sdhci_host *host = c->host;
396
397         if (hid && uid && !strcmp(hid, "80860F14") && !strcmp(uid, "1") &&
398             sdhci_readl(host, SDHCI_CAPABILITIES) == 0x446cc8b2 &&
399             sdhci_readl(host, SDHCI_CAPABILITIES_1) == 0x00000807)
400                 host->timeout_clk = 1000; /* 1000 kHz i.e. 1 MHz */
401
402         if (hid && !strcmp(hid, "80865ACA"))
403                 host->mmc_host_ops.get_cd = bxt_get_cd;
404
405         intel_dsm_init(intel_host, &pdev->dev, host->mmc);
406
407         host->mmc_host_ops.start_signal_voltage_switch =
408                                         intel_start_signal_voltage_switch;
409
410         return 0;
411 }
412
413 static int intel_setup_host(struct platform_device *pdev)
414 {
415         struct sdhci_acpi_host *c = platform_get_drvdata(pdev);
416         struct intel_host *intel_host = sdhci_acpi_priv(c);
417
418         if (!(intel_host->hs_caps & INTEL_DSM_HS_CAPS_SDR25))
419                 c->host->mmc->caps &= ~MMC_CAP_UHS_SDR25;
420
421         if (!(intel_host->hs_caps & INTEL_DSM_HS_CAPS_SDR50))
422                 c->host->mmc->caps &= ~MMC_CAP_UHS_SDR50;
423
424         if (!(intel_host->hs_caps & INTEL_DSM_HS_CAPS_DDR50))
425                 c->host->mmc->caps &= ~MMC_CAP_UHS_DDR50;
426
427         if (!(intel_host->hs_caps & INTEL_DSM_HS_CAPS_SDR104))
428                 c->host->mmc->caps &= ~MMC_CAP_UHS_SDR104;
429
430         return 0;
431 }
432
433 static const struct sdhci_acpi_slot sdhci_acpi_slot_int_emmc = {
434         .chip    = &sdhci_acpi_chip_int,
435         .caps    = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE |
436                    MMC_CAP_HW_RESET | MMC_CAP_1_8V_DDR |
437                    MMC_CAP_CMD_DURING_TFR | MMC_CAP_WAIT_WHILE_BUSY,
438         .flags   = SDHCI_ACPI_RUNTIME_PM,
439         .quirks  = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
440         .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
441                    SDHCI_QUIRK2_STOP_WITH_TC |
442                    SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400,
443         .probe_slot     = intel_probe_slot,
444         .setup_host     = intel_setup_host,
445         .priv_size      = sizeof(struct intel_host),
446 };
447
448 static const struct sdhci_acpi_slot sdhci_acpi_slot_int_sdio = {
449         .quirks  = SDHCI_QUIRK_BROKEN_CARD_DETECTION |
450                    SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
451         .quirks2 = SDHCI_QUIRK2_HOST_OFF_CARD_ON,
452         .caps    = MMC_CAP_NONREMOVABLE | MMC_CAP_POWER_OFF_CARD |
453                    MMC_CAP_WAIT_WHILE_BUSY,
454         .flags   = SDHCI_ACPI_RUNTIME_PM,
455         .pm_caps = MMC_PM_KEEP_POWER,
456         .probe_slot     = intel_probe_slot,
457         .setup_host     = intel_setup_host,
458         .priv_size      = sizeof(struct intel_host),
459 };
460
461 static const struct sdhci_acpi_slot sdhci_acpi_slot_int_sd = {
462         .flags   = SDHCI_ACPI_SD_CD | SDHCI_ACPI_SD_CD_OVERRIDE_LEVEL |
463                    SDHCI_ACPI_RUNTIME_PM,
464         .quirks  = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
465         .quirks2 = SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON |
466                    SDHCI_QUIRK2_STOP_WITH_TC,
467         .caps    = MMC_CAP_WAIT_WHILE_BUSY | MMC_CAP_AGGRESSIVE_PM,
468         .probe_slot     = intel_probe_slot,
469         .setup_host     = intel_setup_host,
470         .priv_size      = sizeof(struct intel_host),
471 };
472
473 static const struct sdhci_acpi_slot sdhci_acpi_slot_qcom_sd_3v = {
474         .quirks  = SDHCI_QUIRK_BROKEN_CARD_DETECTION,
475         .quirks2 = SDHCI_QUIRK2_NO_1_8_V,
476         .caps    = MMC_CAP_NONREMOVABLE,
477 };
478
479 static const struct sdhci_acpi_slot sdhci_acpi_slot_qcom_sd = {
480         .quirks  = SDHCI_QUIRK_BROKEN_CARD_DETECTION,
481         .caps    = MMC_CAP_NONREMOVABLE,
482 };
483
484 /* AMD sdhci reset dll register. */
485 #define SDHCI_AMD_RESET_DLL_REGISTER    0x908
486
487 static int amd_select_drive_strength(struct mmc_card *card,
488                                      unsigned int max_dtr, int host_drv,
489                                      int card_drv, int *drv_type)
490 {
491         return MMC_SET_DRIVER_TYPE_A;
492 }
493
494 static void sdhci_acpi_amd_hs400_dll(struct sdhci_host *host)
495 {
496         /* AMD Platform requires dll setting */
497         sdhci_writel(host, 0x40003210, SDHCI_AMD_RESET_DLL_REGISTER);
498         usleep_range(10, 20);
499         sdhci_writel(host, 0x40033210, SDHCI_AMD_RESET_DLL_REGISTER);
500 }
501
502 /*
503  * For AMD Platform it is required to disable the tuning
504  * bit first controller to bring to HS Mode from HS200
505  * mode, later enable to tune to HS400 mode.
506  */
507 static void amd_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
508 {
509         struct sdhci_host *host = mmc_priv(mmc);
510         unsigned int old_timing = host->timing;
511
512         sdhci_set_ios(mmc, ios);
513         if (old_timing == MMC_TIMING_MMC_HS200 &&
514             ios->timing == MMC_TIMING_MMC_HS)
515                 sdhci_writew(host, 0x9, SDHCI_HOST_CONTROL2);
516         if (old_timing != MMC_TIMING_MMC_HS400 &&
517             ios->timing == MMC_TIMING_MMC_HS400) {
518                 sdhci_writew(host, 0x80, SDHCI_HOST_CONTROL2);
519                 sdhci_acpi_amd_hs400_dll(host);
520         }
521 }
522
523 static const struct sdhci_ops sdhci_acpi_ops_amd = {
524         .set_clock      = sdhci_set_clock,
525         .set_bus_width  = sdhci_set_bus_width,
526         .reset          = sdhci_reset,
527         .set_uhs_signaling = sdhci_set_uhs_signaling,
528 };
529
530 static const struct sdhci_acpi_chip sdhci_acpi_chip_amd = {
531         .ops = &sdhci_acpi_ops_amd,
532 };
533
534 static int sdhci_acpi_emmc_amd_probe_slot(struct platform_device *pdev,
535                                           const char *hid, const char *uid)
536 {
537         struct sdhci_acpi_host *c = platform_get_drvdata(pdev);
538         struct sdhci_host *host   = c->host;
539
540         sdhci_read_caps(host);
541         if (host->caps1 & SDHCI_SUPPORT_DDR50)
542                 host->mmc->caps = MMC_CAP_1_8V_DDR;
543
544         if ((host->caps1 & SDHCI_SUPPORT_SDR104) &&
545             (host->mmc->caps & MMC_CAP_1_8V_DDR))
546                 host->mmc->caps2 = MMC_CAP2_HS400_1_8V;
547
548         host->mmc_host_ops.select_drive_strength = amd_select_drive_strength;
549         host->mmc_host_ops.set_ios = amd_set_ios;
550         return 0;
551 }
552
553 static const struct sdhci_acpi_slot sdhci_acpi_slot_amd_emmc = {
554         .chip   = &sdhci_acpi_chip_amd,
555         .caps   = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE,
556         .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR | SDHCI_QUIRK_32BIT_DMA_SIZE |
557                         SDHCI_QUIRK_32BIT_ADMA_SIZE,
558         .probe_slot     = sdhci_acpi_emmc_amd_probe_slot,
559 };
560
561 struct sdhci_acpi_uid_slot {
562         const char *hid;
563         const char *uid;
564         const struct sdhci_acpi_slot *slot;
565 };
566
567 static const struct sdhci_acpi_uid_slot sdhci_acpi_uids[] = {
568         { "80865ACA", NULL, &sdhci_acpi_slot_int_sd },
569         { "80865ACC", NULL, &sdhci_acpi_slot_int_emmc },
570         { "80865AD0", NULL, &sdhci_acpi_slot_int_sdio },
571         { "80860F14" , "1" , &sdhci_acpi_slot_int_emmc },
572         { "80860F14" , "2" , &sdhci_acpi_slot_int_sdio },
573         { "80860F14" , "3" , &sdhci_acpi_slot_int_sd   },
574         { "80860F16" , NULL, &sdhci_acpi_slot_int_sd   },
575         { "INT33BB"  , "2" , &sdhci_acpi_slot_int_sdio },
576         { "INT33BB"  , "3" , &sdhci_acpi_slot_int_sd },
577         { "INT33C6"  , NULL, &sdhci_acpi_slot_int_sdio },
578         { "INT3436"  , NULL, &sdhci_acpi_slot_int_sdio },
579         { "INT344D"  , NULL, &sdhci_acpi_slot_int_sdio },
580         { "PNP0FFF"  , "3" , &sdhci_acpi_slot_int_sd   },
581         { "PNP0D40"  },
582         { "QCOM8051", NULL, &sdhci_acpi_slot_qcom_sd_3v },
583         { "QCOM8052", NULL, &sdhci_acpi_slot_qcom_sd },
584         { "AMDI0040", NULL, &sdhci_acpi_slot_amd_emmc },
585         { },
586 };
587
588 static const struct acpi_device_id sdhci_acpi_ids[] = {
589         { "80865ACA" },
590         { "80865ACC" },
591         { "80865AD0" },
592         { "80860F14" },
593         { "80860F16" },
594         { "INT33BB"  },
595         { "INT33C6"  },
596         { "INT3436"  },
597         { "INT344D"  },
598         { "PNP0D40"  },
599         { "QCOM8051" },
600         { "QCOM8052" },
601         { "AMDI0040" },
602         { },
603 };
604 MODULE_DEVICE_TABLE(acpi, sdhci_acpi_ids);
605
606 static const struct sdhci_acpi_slot *sdhci_acpi_get_slot(const char *hid,
607                                                          const char *uid)
608 {
609         const struct sdhci_acpi_uid_slot *u;
610
611         for (u = sdhci_acpi_uids; u->hid; u++) {
612                 if (strcmp(u->hid, hid))
613                         continue;
614                 if (!u->uid)
615                         return u->slot;
616                 if (uid && !strcmp(u->uid, uid))
617                         return u->slot;
618         }
619         return NULL;
620 }
621
622 static int sdhci_acpi_probe(struct platform_device *pdev)
623 {
624         struct device *dev = &pdev->dev;
625         const struct sdhci_acpi_slot *slot;
626         struct acpi_device *device, *child;
627         struct sdhci_acpi_host *c;
628         struct sdhci_host *host;
629         struct resource *iomem;
630         resource_size_t len;
631         size_t priv_size;
632         const char *hid;
633         const char *uid;
634         int err;
635
636         device = ACPI_COMPANION(dev);
637         if (!device)
638                 return -ENODEV;
639
640         hid = acpi_device_hid(device);
641         uid = acpi_device_uid(device);
642
643         slot = sdhci_acpi_get_slot(hid, uid);
644
645         /* Power on the SDHCI controller and its children */
646         acpi_device_fix_up_power(device);
647         if (!sdhci_acpi_no_fixup_child_power(hid, uid)) {
648                 list_for_each_entry(child, &device->children, node)
649                         if (child->status.present && child->status.enabled)
650                                 acpi_device_fix_up_power(child);
651         }
652
653         if (sdhci_acpi_byt_defer(dev))
654                 return -EPROBE_DEFER;
655
656         iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
657         if (!iomem)
658                 return -ENOMEM;
659
660         len = resource_size(iomem);
661         if (len < 0x100)
662                 dev_err(dev, "Invalid iomem size!\n");
663
664         if (!devm_request_mem_region(dev, iomem->start, len, dev_name(dev)))
665                 return -ENOMEM;
666
667         priv_size = slot ? slot->priv_size : 0;
668         host = sdhci_alloc_host(dev, sizeof(struct sdhci_acpi_host) + priv_size);
669         if (IS_ERR(host))
670                 return PTR_ERR(host);
671
672         c = sdhci_priv(host);
673         c->host = host;
674         c->slot = slot;
675         c->pdev = pdev;
676         c->use_runtime_pm = sdhci_acpi_flag(c, SDHCI_ACPI_RUNTIME_PM);
677
678         platform_set_drvdata(pdev, c);
679
680         host->hw_name   = "ACPI";
681         host->ops       = &sdhci_acpi_ops_dflt;
682         host->irq       = platform_get_irq(pdev, 0);
683         if (host->irq < 0) {
684                 err = -EINVAL;
685                 goto err_free;
686         }
687
688         host->ioaddr = devm_ioremap_nocache(dev, iomem->start,
689                                             resource_size(iomem));
690         if (host->ioaddr == NULL) {
691                 err = -ENOMEM;
692                 goto err_free;
693         }
694
695         if (c->slot) {
696                 if (c->slot->probe_slot) {
697                         err = c->slot->probe_slot(pdev, hid, uid);
698                         if (err)
699                                 goto err_free;
700                 }
701                 if (c->slot->chip) {
702                         host->ops            = c->slot->chip->ops;
703                         host->quirks        |= c->slot->chip->quirks;
704                         host->quirks2       |= c->slot->chip->quirks2;
705                         host->mmc->caps     |= c->slot->chip->caps;
706                         host->mmc->caps2    |= c->slot->chip->caps2;
707                         host->mmc->pm_caps  |= c->slot->chip->pm_caps;
708                 }
709                 host->quirks        |= c->slot->quirks;
710                 host->quirks2       |= c->slot->quirks2;
711                 host->mmc->caps     |= c->slot->caps;
712                 host->mmc->caps2    |= c->slot->caps2;
713                 host->mmc->pm_caps  |= c->slot->pm_caps;
714         }
715
716         host->mmc->caps2 |= MMC_CAP2_NO_PRESCAN_POWERUP;
717
718         if (sdhci_acpi_flag(c, SDHCI_ACPI_SD_CD)) {
719                 bool v = sdhci_acpi_flag(c, SDHCI_ACPI_SD_CD_OVERRIDE_LEVEL);
720
721                 err = mmc_gpiod_request_cd(host->mmc, NULL, 0, v, 0, NULL);
722                 if (err) {
723                         if (err == -EPROBE_DEFER)
724                                 goto err_free;
725                         dev_warn(dev, "failed to setup card detect gpio\n");
726                         c->use_runtime_pm = false;
727                 }
728         }
729
730         err = sdhci_setup_host(host);
731         if (err)
732                 goto err_free;
733
734         if (c->slot && c->slot->setup_host) {
735                 err = c->slot->setup_host(pdev);
736                 if (err)
737                         goto err_cleanup;
738         }
739
740         err = __sdhci_add_host(host);
741         if (err)
742                 goto err_cleanup;
743
744         if (c->use_runtime_pm) {
745                 pm_runtime_set_active(dev);
746                 pm_suspend_ignore_children(dev, 1);
747                 pm_runtime_set_autosuspend_delay(dev, 50);
748                 pm_runtime_use_autosuspend(dev);
749                 pm_runtime_enable(dev);
750         }
751
752         device_enable_async_suspend(dev);
753
754         return 0;
755
756 err_cleanup:
757         sdhci_cleanup_host(c->host);
758 err_free:
759         sdhci_free_host(c->host);
760         return err;
761 }
762
763 static int sdhci_acpi_remove(struct platform_device *pdev)
764 {
765         struct sdhci_acpi_host *c = platform_get_drvdata(pdev);
766         struct device *dev = &pdev->dev;
767         int dead;
768
769         if (c->use_runtime_pm) {
770                 pm_runtime_get_sync(dev);
771                 pm_runtime_disable(dev);
772                 pm_runtime_put_noidle(dev);
773         }
774
775         if (c->slot && c->slot->remove_slot)
776                 c->slot->remove_slot(pdev);
777
778         dead = (sdhci_readl(c->host, SDHCI_INT_STATUS) == ~0);
779         sdhci_remove_host(c->host, dead);
780         sdhci_free_host(c->host);
781
782         return 0;
783 }
784
785 #ifdef CONFIG_PM_SLEEP
786
787 static int sdhci_acpi_suspend(struct device *dev)
788 {
789         struct sdhci_acpi_host *c = dev_get_drvdata(dev);
790         struct sdhci_host *host = c->host;
791
792         if (host->tuning_mode != SDHCI_TUNING_MODE_3)
793                 mmc_retune_needed(host->mmc);
794
795         return sdhci_suspend_host(host);
796 }
797
798 static int sdhci_acpi_resume(struct device *dev)
799 {
800         struct sdhci_acpi_host *c = dev_get_drvdata(dev);
801
802         sdhci_acpi_byt_setting(&c->pdev->dev);
803
804         return sdhci_resume_host(c->host);
805 }
806
807 #endif
808
809 #ifdef CONFIG_PM
810
811 static int sdhci_acpi_runtime_suspend(struct device *dev)
812 {
813         struct sdhci_acpi_host *c = dev_get_drvdata(dev);
814         struct sdhci_host *host = c->host;
815
816         if (host->tuning_mode != SDHCI_TUNING_MODE_3)
817                 mmc_retune_needed(host->mmc);
818
819         return sdhci_runtime_suspend_host(host);
820 }
821
822 static int sdhci_acpi_runtime_resume(struct device *dev)
823 {
824         struct sdhci_acpi_host *c = dev_get_drvdata(dev);
825
826         sdhci_acpi_byt_setting(&c->pdev->dev);
827
828         return sdhci_runtime_resume_host(c->host);
829 }
830
831 #endif
832
833 static const struct dev_pm_ops sdhci_acpi_pm_ops = {
834         SET_SYSTEM_SLEEP_PM_OPS(sdhci_acpi_suspend, sdhci_acpi_resume)
835         SET_RUNTIME_PM_OPS(sdhci_acpi_runtime_suspend,
836                         sdhci_acpi_runtime_resume, NULL)
837 };
838
839 static struct platform_driver sdhci_acpi_driver = {
840         .driver = {
841                 .name                   = "sdhci-acpi",
842                 .acpi_match_table       = sdhci_acpi_ids,
843                 .pm                     = &sdhci_acpi_pm_ops,
844         },
845         .probe  = sdhci_acpi_probe,
846         .remove = sdhci_acpi_remove,
847 };
848
849 module_platform_driver(sdhci_acpi_driver);
850
851 MODULE_DESCRIPTION("Secure Digital Host Controller Interface ACPI driver");
852 MODULE_AUTHOR("Adrian Hunter");
853 MODULE_LICENSE("GPL v2");