2 * Copyright © 2005-2009 Samsung Electronics
3 * Copyright © 2007 Nokia Corporation
5 * Kyungmin Park <kyungmin.park@samsung.com>
8 * Adrian Hunter <ext-adrian.hunter@nokia.com>:
9 * auto-placement support, read-while load support, various fixes
11 * Vishak G <vishak.g at samsung.com>, Rohit Hagargundgi <h.rohit at samsung.com>
12 * Flex-OneNAND support
13 * Amul Kumar Saha <amul.saha at samsung.com>
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License version 2 as
18 * published by the Free Software Foundation.
21 #include <linux/kernel.h>
22 #include <linux/module.h>
23 #include <linux/moduleparam.h>
24 #include <linux/slab.h>
25 #include <linux/sched.h>
26 #include <linux/delay.h>
27 #include <linux/interrupt.h>
28 #include <linux/jiffies.h>
29 #include <linux/mtd/mtd.h>
30 #include <linux/mtd/onenand.h>
31 #include <linux/mtd/partitions.h>
36 * Multiblock erase if number of blocks to erase is 2 or more.
37 * Maximum number of blocks for simultaneous erase is 64.
39 #define MB_ERASE_MIN_BLK_COUNT 2
40 #define MB_ERASE_MAX_BLK_COUNT 64
42 /* Default Flex-OneNAND boundary and lock respectively */
43 static int flex_bdry[MAX_DIES * 2] = { -1, 0, -1, 0 };
45 module_param_array(flex_bdry, int, NULL, 0400);
46 MODULE_PARM_DESC(flex_bdry, "SLC Boundary information for Flex-OneNAND"
47 "Syntax:flex_bdry=DIE_BDRY,LOCK,..."
48 "DIE_BDRY: SLC boundary of the die"
49 "LOCK: Locking information for SLC boundary"
50 " : 0->Set boundary in unlocked status"
51 " : 1->Set boundary in locked status");
53 /* Default OneNAND/Flex-OneNAND OTP options*/
56 module_param(otp, int, 0400);
57 MODULE_PARM_DESC(otp, "Corresponding behaviour of OneNAND in OTP"
58 "Syntax : otp=LOCK_TYPE"
59 "LOCK_TYPE : Keys issued, for specific OTP Lock type"
60 " : 0 -> Default (No Blocks Locked)"
61 " : 1 -> OTP Block lock"
62 " : 2 -> 1st Block lock"
63 " : 3 -> BOTH OTP Block and 1st Block lock");
66 * flexonenand_oob_128 - oob info for Flex-Onenand with 4KB page
67 * For now, we expose only 64 out of 80 ecc bytes
69 static int flexonenand_ooblayout_ecc(struct mtd_info *mtd, int section,
70 struct mtd_oob_region *oobregion)
75 oobregion->offset = (section * 16) + 6;
76 oobregion->length = 10;
81 static int flexonenand_ooblayout_free(struct mtd_info *mtd, int section,
82 struct mtd_oob_region *oobregion)
87 oobregion->offset = (section * 16) + 2;
88 oobregion->length = 4;
93 static const struct mtd_ooblayout_ops flexonenand_ooblayout_ops = {
94 .ecc = flexonenand_ooblayout_ecc,
95 .free = flexonenand_ooblayout_free,
99 * onenand_oob_128 - oob info for OneNAND with 4KB page
101 * Based on specification:
102 * 4Gb M-die OneNAND Flash (KFM4G16Q4M, KFN8G16Q4M). Rev. 1.3, Apr. 2010
105 static int onenand_ooblayout_128_ecc(struct mtd_info *mtd, int section,
106 struct mtd_oob_region *oobregion)
111 oobregion->offset = (section * 16) + 7;
112 oobregion->length = 9;
117 static int onenand_ooblayout_128_free(struct mtd_info *mtd, int section,
118 struct mtd_oob_region *oobregion)
124 * free bytes are using the spare area fields marked as
125 * "Managed by internal ECC logic for Logical Sector Number area"
127 oobregion->offset = (section * 16) + 2;
128 oobregion->length = 3;
133 static const struct mtd_ooblayout_ops onenand_oob_128_ooblayout_ops = {
134 .ecc = onenand_ooblayout_128_ecc,
135 .free = onenand_ooblayout_128_free,
139 * onenand_oob_32_64 - oob info for large (2KB) page
141 static int onenand_ooblayout_32_64_ecc(struct mtd_info *mtd, int section,
142 struct mtd_oob_region *oobregion)
147 oobregion->offset = (section * 16) + 8;
148 oobregion->length = 5;
153 static int onenand_ooblayout_32_64_free(struct mtd_info *mtd, int section,
154 struct mtd_oob_region *oobregion)
156 int sections = (mtd->oobsize / 32) * 2;
158 if (section >= sections)
162 oobregion->offset = ((section - 1) * 16) + 14;
163 oobregion->length = 2;
165 oobregion->offset = (section * 16) + 2;
166 oobregion->length = 3;
172 static const struct mtd_ooblayout_ops onenand_oob_32_64_ooblayout_ops = {
173 .ecc = onenand_ooblayout_32_64_ecc,
174 .free = onenand_ooblayout_32_64_free,
177 static const unsigned char ffchars[] = {
178 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
179 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */
180 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
181 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */
182 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
183 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */
184 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
185 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */
186 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
187 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 80 */
188 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
189 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 96 */
190 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
191 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 112 */
192 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
193 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 128 */
197 * onenand_readw - [OneNAND Interface] Read OneNAND register
198 * @param addr address to read
200 * Read OneNAND register
202 static unsigned short onenand_readw(void __iomem *addr)
208 * onenand_writew - [OneNAND Interface] Write OneNAND register with value
209 * @param value value to write
210 * @param addr address to write
212 * Write OneNAND register with value
214 static void onenand_writew(unsigned short value, void __iomem *addr)
220 * onenand_block_address - [DEFAULT] Get block address
221 * @param this onenand chip data structure
222 * @param block the block
223 * @return translated block address if DDP, otherwise same
225 * Setup Start Address 1 Register (F100h)
227 static int onenand_block_address(struct onenand_chip *this, int block)
229 /* Device Flash Core select, NAND Flash Block Address */
230 if (block & this->density_mask)
231 return ONENAND_DDP_CHIP1 | (block ^ this->density_mask);
237 * onenand_bufferram_address - [DEFAULT] Get bufferram address
238 * @param this onenand chip data structure
239 * @param block the block
240 * @return set DBS value if DDP, otherwise 0
242 * Setup Start Address 2 Register (F101h) for DDP
244 static int onenand_bufferram_address(struct onenand_chip *this, int block)
246 /* Device BufferRAM Select */
247 if (block & this->density_mask)
248 return ONENAND_DDP_CHIP1;
250 return ONENAND_DDP_CHIP0;
254 * onenand_page_address - [DEFAULT] Get page address
255 * @param page the page address
256 * @param sector the sector address
257 * @return combined page and sector address
259 * Setup Start Address 8 Register (F107h)
261 static int onenand_page_address(int page, int sector)
263 /* Flash Page Address, Flash Sector Address */
266 fpa = page & ONENAND_FPA_MASK;
267 fsa = sector & ONENAND_FSA_MASK;
269 return ((fpa << ONENAND_FPA_SHIFT) | fsa);
273 * onenand_buffer_address - [DEFAULT] Get buffer address
274 * @param dataram1 DataRAM index
275 * @param sectors the sector address
276 * @param count the number of sectors
277 * @return the start buffer value
279 * Setup Start Buffer Register (F200h)
281 static int onenand_buffer_address(int dataram1, int sectors, int count)
285 /* BufferRAM Sector Address */
286 bsa = sectors & ONENAND_BSA_MASK;
289 bsa |= ONENAND_BSA_DATARAM1; /* DataRAM1 */
291 bsa |= ONENAND_BSA_DATARAM0; /* DataRAM0 */
293 /* BufferRAM Sector Count */
294 bsc = count & ONENAND_BSC_MASK;
296 return ((bsa << ONENAND_BSA_SHIFT) | bsc);
300 * flexonenand_block- For given address return block number
301 * @param this - OneNAND device structure
302 * @param addr - Address for which block number is needed
304 static unsigned flexonenand_block(struct onenand_chip *this, loff_t addr)
306 unsigned boundary, blk, die = 0;
308 if (ONENAND_IS_DDP(this) && addr >= this->diesize[0]) {
310 addr -= this->diesize[0];
313 boundary = this->boundary[die];
315 blk = addr >> (this->erase_shift - 1);
317 blk = (blk + boundary + 1) >> 1;
319 blk += die ? this->density_mask : 0;
323 inline unsigned onenand_block(struct onenand_chip *this, loff_t addr)
325 if (!FLEXONENAND(this))
326 return addr >> this->erase_shift;
327 return flexonenand_block(this, addr);
331 * flexonenand_addr - Return address of the block
332 * @this: OneNAND device structure
333 * @block: Block number on Flex-OneNAND
335 * Return address of the block
337 static loff_t flexonenand_addr(struct onenand_chip *this, int block)
340 int die = 0, boundary;
342 if (ONENAND_IS_DDP(this) && block >= this->density_mask) {
343 block -= this->density_mask;
345 ofs = this->diesize[0];
348 boundary = this->boundary[die];
349 ofs += (loff_t)block << (this->erase_shift - 1);
350 if (block > (boundary + 1))
351 ofs += (loff_t)(block - boundary - 1) << (this->erase_shift - 1);
355 loff_t onenand_addr(struct onenand_chip *this, int block)
357 if (!FLEXONENAND(this))
358 return (loff_t)block << this->erase_shift;
359 return flexonenand_addr(this, block);
361 EXPORT_SYMBOL(onenand_addr);
364 * onenand_get_density - [DEFAULT] Get OneNAND density
365 * @param dev_id OneNAND device ID
367 * Get OneNAND density from device ID
369 static inline int onenand_get_density(int dev_id)
371 int density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
372 return (density & ONENAND_DEVICE_DENSITY_MASK);
376 * flexonenand_region - [Flex-OneNAND] Return erase region of addr
377 * @param mtd MTD device structure
378 * @param addr address whose erase region needs to be identified
380 int flexonenand_region(struct mtd_info *mtd, loff_t addr)
384 for (i = 0; i < mtd->numeraseregions; i++)
385 if (addr < mtd->eraseregions[i].offset)
389 EXPORT_SYMBOL(flexonenand_region);
392 * onenand_command - [DEFAULT] Send command to OneNAND device
393 * @param mtd MTD device structure
394 * @param cmd the command to be sent
395 * @param addr offset to read from or write to
396 * @param len number of bytes to read or write
398 * Send command to OneNAND device. This function is used for middle/large page
399 * devices (1KB/2KB Bytes per page)
401 static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t len)
403 struct onenand_chip *this = mtd->priv;
404 int value, block, page;
406 /* Address translation */
408 case ONENAND_CMD_UNLOCK:
409 case ONENAND_CMD_LOCK:
410 case ONENAND_CMD_LOCK_TIGHT:
411 case ONENAND_CMD_UNLOCK_ALL:
416 case FLEXONENAND_CMD_PI_ACCESS:
417 /* addr contains die index */
418 block = addr * this->density_mask;
422 case ONENAND_CMD_ERASE:
423 case ONENAND_CMD_MULTIBLOCK_ERASE:
424 case ONENAND_CMD_ERASE_VERIFY:
425 case ONENAND_CMD_BUFFERRAM:
426 case ONENAND_CMD_OTP_ACCESS:
427 block = onenand_block(this, addr);
431 case FLEXONENAND_CMD_READ_PI:
432 cmd = ONENAND_CMD_READ;
433 block = addr * this->density_mask;
438 block = onenand_block(this, addr);
439 if (FLEXONENAND(this))
440 page = (int) (addr - onenand_addr(this, block))>>\
443 page = (int) (addr >> this->page_shift);
444 if (ONENAND_IS_2PLANE(this)) {
445 /* Make the even block number */
447 /* Is it the odd plane? */
448 if (addr & this->writesize)
452 page &= this->page_mask;
456 /* NOTE: The setting order of the registers is very important! */
457 if (cmd == ONENAND_CMD_BUFFERRAM) {
458 /* Select DataRAM for DDP */
459 value = onenand_bufferram_address(this, block);
460 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
462 if (ONENAND_IS_2PLANE(this) || ONENAND_IS_4KB_PAGE(this))
463 /* It is always BufferRAM0 */
464 ONENAND_SET_BUFFERRAM0(this);
466 /* Switch to the next data buffer */
467 ONENAND_SET_NEXT_BUFFERRAM(this);
473 /* Write 'DFS, FBA' of Flash */
474 value = onenand_block_address(this, block);
475 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
477 /* Select DataRAM for DDP */
478 value = onenand_bufferram_address(this, block);
479 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
483 /* Now we use page size operation */
484 int sectors = 0, count = 0;
488 case FLEXONENAND_CMD_RECOVER_LSB:
489 case ONENAND_CMD_READ:
490 case ONENAND_CMD_READOOB:
491 if (ONENAND_IS_4KB_PAGE(this))
492 /* It is always BufferRAM0 */
493 dataram = ONENAND_SET_BUFFERRAM0(this);
495 dataram = ONENAND_SET_NEXT_BUFFERRAM(this);
499 if (ONENAND_IS_2PLANE(this) && cmd == ONENAND_CMD_PROG)
500 cmd = ONENAND_CMD_2X_PROG;
501 dataram = ONENAND_CURRENT_BUFFERRAM(this);
505 /* Write 'FPA, FSA' of Flash */
506 value = onenand_page_address(page, sectors);
507 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS8);
509 /* Write 'BSA, BSC' of DataRAM */
510 value = onenand_buffer_address(dataram, sectors, count);
511 this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
514 /* Interrupt clear */
515 this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
518 this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
524 * onenand_read_ecc - return ecc status
525 * @param this onenand chip structure
527 static inline int onenand_read_ecc(struct onenand_chip *this)
529 int ecc, i, result = 0;
531 if (!FLEXONENAND(this) && !ONENAND_IS_4KB_PAGE(this))
532 return this->read_word(this->base + ONENAND_REG_ECC_STATUS);
534 for (i = 0; i < 4; i++) {
535 ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS + i*2);
538 if (ecc & FLEXONENAND_UNCORRECTABLE_ERROR)
539 return ONENAND_ECC_2BIT_ALL;
541 result = ONENAND_ECC_1BIT_ALL;
548 * onenand_wait - [DEFAULT] wait until the command is done
549 * @param mtd MTD device structure
550 * @param state state to select the max. timeout value
552 * Wait for command done. This applies to all OneNAND command
553 * Read can take up to 30us, erase up to 2ms and program up to 350us
554 * according to general OneNAND specs
556 static int onenand_wait(struct mtd_info *mtd, int state)
558 struct onenand_chip * this = mtd->priv;
559 unsigned long timeout;
560 unsigned int flags = ONENAND_INT_MASTER;
561 unsigned int interrupt = 0;
564 /* The 20 msec is enough */
565 timeout = jiffies + msecs_to_jiffies(20);
566 while (time_before(jiffies, timeout)) {
567 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
569 if (interrupt & flags)
572 if (state != FL_READING && state != FL_PREPARING_ERASE)
575 /* To get correct interrupt status in timeout case */
576 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
578 ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
581 * In the Spec. it checks the controller status first
582 * However if you get the correct information in case of
583 * power off recovery (POR) test, it should read ECC status first
585 if (interrupt & ONENAND_INT_READ) {
586 int ecc = onenand_read_ecc(this);
588 if (ecc & ONENAND_ECC_2BIT_ALL) {
589 printk(KERN_ERR "%s: ECC error = 0x%04x\n",
591 mtd->ecc_stats.failed++;
593 } else if (ecc & ONENAND_ECC_1BIT_ALL) {
594 printk(KERN_DEBUG "%s: correctable ECC error = 0x%04x\n",
596 mtd->ecc_stats.corrected++;
599 } else if (state == FL_READING) {
600 printk(KERN_ERR "%s: read timeout! ctrl=0x%04x intr=0x%04x\n",
601 __func__, ctrl, interrupt);
605 if (state == FL_PREPARING_ERASE && !(interrupt & ONENAND_INT_ERASE)) {
606 printk(KERN_ERR "%s: mb erase timeout! ctrl=0x%04x intr=0x%04x\n",
607 __func__, ctrl, interrupt);
611 if (!(interrupt & ONENAND_INT_MASTER)) {
612 printk(KERN_ERR "%s: timeout! ctrl=0x%04x intr=0x%04x\n",
613 __func__, ctrl, interrupt);
617 /* If there's controller error, it's a real error */
618 if (ctrl & ONENAND_CTRL_ERROR) {
619 printk(KERN_ERR "%s: controller error = 0x%04x\n",
621 if (ctrl & ONENAND_CTRL_LOCK)
622 printk(KERN_ERR "%s: it's locked error.\n", __func__);
630 * onenand_interrupt - [DEFAULT] onenand interrupt handler
631 * @param irq onenand interrupt number
632 * @param dev_id interrupt data
636 static irqreturn_t onenand_interrupt(int irq, void *data)
638 struct onenand_chip *this = data;
640 /* To handle shared interrupt */
641 if (!this->complete.done)
642 complete(&this->complete);
648 * onenand_interrupt_wait - [DEFAULT] wait until the command is done
649 * @param mtd MTD device structure
650 * @param state state to select the max. timeout value
652 * Wait for command done.
654 static int onenand_interrupt_wait(struct mtd_info *mtd, int state)
656 struct onenand_chip *this = mtd->priv;
658 wait_for_completion(&this->complete);
660 return onenand_wait(mtd, state);
664 * onenand_try_interrupt_wait - [DEFAULT] try interrupt wait
665 * @param mtd MTD device structure
666 * @param state state to select the max. timeout value
668 * Try interrupt based wait (It is used one-time)
670 static int onenand_try_interrupt_wait(struct mtd_info *mtd, int state)
672 struct onenand_chip *this = mtd->priv;
673 unsigned long remain, timeout;
675 /* We use interrupt wait first */
676 this->wait = onenand_interrupt_wait;
678 timeout = msecs_to_jiffies(100);
679 remain = wait_for_completion_timeout(&this->complete, timeout);
681 printk(KERN_INFO "OneNAND: There's no interrupt. "
682 "We use the normal wait\n");
684 /* Release the irq */
685 free_irq(this->irq, this);
687 this->wait = onenand_wait;
690 return onenand_wait(mtd, state);
694 * onenand_setup_wait - [OneNAND Interface] setup onenand wait method
695 * @param mtd MTD device structure
697 * There's two method to wait onenand work
698 * 1. polling - read interrupt status register
699 * 2. interrupt - use the kernel interrupt method
701 static void onenand_setup_wait(struct mtd_info *mtd)
703 struct onenand_chip *this = mtd->priv;
706 init_completion(&this->complete);
708 if (this->irq <= 0) {
709 this->wait = onenand_wait;
713 if (request_irq(this->irq, &onenand_interrupt,
714 IRQF_SHARED, "onenand", this)) {
715 /* If we can't get irq, use the normal wait */
716 this->wait = onenand_wait;
720 /* Enable interrupt */
721 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
722 syscfg |= ONENAND_SYS_CFG1_IOBE;
723 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
725 this->wait = onenand_try_interrupt_wait;
729 * onenand_bufferram_offset - [DEFAULT] BufferRAM offset
730 * @param mtd MTD data structure
731 * @param area BufferRAM area
732 * @return offset given area
734 * Return BufferRAM offset given area
736 static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)
738 struct onenand_chip *this = mtd->priv;
740 if (ONENAND_CURRENT_BUFFERRAM(this)) {
741 /* Note: the 'this->writesize' is a real page size */
742 if (area == ONENAND_DATARAM)
743 return this->writesize;
744 if (area == ONENAND_SPARERAM)
752 * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area
753 * @param mtd MTD data structure
754 * @param area BufferRAM area
755 * @param buffer the databuffer to put/get data
756 * @param offset offset to read from or write to
757 * @param count number of bytes to read/write
759 * Read the BufferRAM area
761 static int onenand_read_bufferram(struct mtd_info *mtd, int area,
762 unsigned char *buffer, int offset, size_t count)
764 struct onenand_chip *this = mtd->priv;
765 void __iomem *bufferram;
767 bufferram = this->base + area;
769 bufferram += onenand_bufferram_offset(mtd, area);
771 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
774 /* Align with word(16-bit) size */
777 /* Read word and save byte */
778 word = this->read_word(bufferram + offset + count);
779 buffer[count] = (word & 0xff);
782 memcpy(buffer, bufferram + offset, count);
788 * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode
789 * @param mtd MTD data structure
790 * @param area BufferRAM area
791 * @param buffer the databuffer to put/get data
792 * @param offset offset to read from or write to
793 * @param count number of bytes to read/write
795 * Read the BufferRAM area with Sync. Burst Mode
797 static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area,
798 unsigned char *buffer, int offset, size_t count)
800 struct onenand_chip *this = mtd->priv;
801 void __iomem *bufferram;
803 bufferram = this->base + area;
805 bufferram += onenand_bufferram_offset(mtd, area);
807 this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ);
809 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
812 /* Align with word(16-bit) size */
815 /* Read word and save byte */
816 word = this->read_word(bufferram + offset + count);
817 buffer[count] = (word & 0xff);
820 memcpy(buffer, bufferram + offset, count);
822 this->mmcontrol(mtd, 0);
828 * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area
829 * @param mtd MTD data structure
830 * @param area BufferRAM area
831 * @param buffer the databuffer to put/get data
832 * @param offset offset to read from or write to
833 * @param count number of bytes to read/write
835 * Write the BufferRAM area
837 static int onenand_write_bufferram(struct mtd_info *mtd, int area,
838 const unsigned char *buffer, int offset, size_t count)
840 struct onenand_chip *this = mtd->priv;
841 void __iomem *bufferram;
843 bufferram = this->base + area;
845 bufferram += onenand_bufferram_offset(mtd, area);
847 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
851 /* Align with word(16-bit) size */
854 /* Calculate byte access offset */
855 byte_offset = offset + count;
857 /* Read word and save byte */
858 word = this->read_word(bufferram + byte_offset);
859 word = (word & ~0xff) | buffer[count];
860 this->write_word(word, bufferram + byte_offset);
863 memcpy(bufferram + offset, buffer, count);
869 * onenand_get_2x_blockpage - [GENERIC] Get blockpage at 2x program mode
870 * @param mtd MTD data structure
871 * @param addr address to check
872 * @return blockpage address
874 * Get blockpage address at 2x program mode
876 static int onenand_get_2x_blockpage(struct mtd_info *mtd, loff_t addr)
878 struct onenand_chip *this = mtd->priv;
879 int blockpage, block, page;
881 /* Calculate the even block number */
882 block = (int) (addr >> this->erase_shift) & ~1;
883 /* Is it the odd plane? */
884 if (addr & this->writesize)
886 page = (int) (addr >> (this->page_shift + 1)) & this->page_mask;
887 blockpage = (block << 7) | page;
893 * onenand_check_bufferram - [GENERIC] Check BufferRAM information
894 * @param mtd MTD data structure
895 * @param addr address to check
896 * @return 1 if there are valid data, otherwise 0
898 * Check bufferram if there is data we required
900 static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr)
902 struct onenand_chip *this = mtd->priv;
903 int blockpage, found = 0;
906 if (ONENAND_IS_2PLANE(this))
907 blockpage = onenand_get_2x_blockpage(mtd, addr);
909 blockpage = (int) (addr >> this->page_shift);
911 /* Is there valid data? */
912 i = ONENAND_CURRENT_BUFFERRAM(this);
913 if (this->bufferram[i].blockpage == blockpage)
916 /* Check another BufferRAM */
917 i = ONENAND_NEXT_BUFFERRAM(this);
918 if (this->bufferram[i].blockpage == blockpage) {
919 ONENAND_SET_NEXT_BUFFERRAM(this);
924 if (found && ONENAND_IS_DDP(this)) {
925 /* Select DataRAM for DDP */
926 int block = onenand_block(this, addr);
927 int value = onenand_bufferram_address(this, block);
928 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
935 * onenand_update_bufferram - [GENERIC] Update BufferRAM information
936 * @param mtd MTD data structure
937 * @param addr address to update
938 * @param valid valid flag
940 * Update BufferRAM information
942 static void onenand_update_bufferram(struct mtd_info *mtd, loff_t addr,
945 struct onenand_chip *this = mtd->priv;
949 if (ONENAND_IS_2PLANE(this))
950 blockpage = onenand_get_2x_blockpage(mtd, addr);
952 blockpage = (int) (addr >> this->page_shift);
954 /* Invalidate another BufferRAM */
955 i = ONENAND_NEXT_BUFFERRAM(this);
956 if (this->bufferram[i].blockpage == blockpage)
957 this->bufferram[i].blockpage = -1;
959 /* Update BufferRAM */
960 i = ONENAND_CURRENT_BUFFERRAM(this);
962 this->bufferram[i].blockpage = blockpage;
964 this->bufferram[i].blockpage = -1;
968 * onenand_invalidate_bufferram - [GENERIC] Invalidate BufferRAM information
969 * @param mtd MTD data structure
970 * @param addr start address to invalidate
971 * @param len length to invalidate
973 * Invalidate BufferRAM information
975 static void onenand_invalidate_bufferram(struct mtd_info *mtd, loff_t addr,
978 struct onenand_chip *this = mtd->priv;
980 loff_t end_addr = addr + len;
982 /* Invalidate BufferRAM */
983 for (i = 0; i < MAX_BUFFERRAM; i++) {
984 loff_t buf_addr = this->bufferram[i].blockpage << this->page_shift;
985 if (buf_addr >= addr && buf_addr < end_addr)
986 this->bufferram[i].blockpage = -1;
991 * onenand_get_device - [GENERIC] Get chip for selected access
992 * @param mtd MTD device structure
993 * @param new_state the state which is requested
995 * Get the device and lock it for exclusive access
997 static int onenand_get_device(struct mtd_info *mtd, int new_state)
999 struct onenand_chip *this = mtd->priv;
1000 DECLARE_WAITQUEUE(wait, current);
1003 * Grab the lock and see if the device is available
1006 spin_lock(&this->chip_lock);
1007 if (this->state == FL_READY) {
1008 this->state = new_state;
1009 spin_unlock(&this->chip_lock);
1010 if (new_state != FL_PM_SUSPENDED && this->enable)
1014 if (new_state == FL_PM_SUSPENDED) {
1015 spin_unlock(&this->chip_lock);
1016 return (this->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN;
1018 set_current_state(TASK_UNINTERRUPTIBLE);
1019 add_wait_queue(&this->wq, &wait);
1020 spin_unlock(&this->chip_lock);
1022 remove_wait_queue(&this->wq, &wait);
1029 * onenand_release_device - [GENERIC] release chip
1030 * @param mtd MTD device structure
1032 * Deselect, release chip lock and wake up anyone waiting on the device
1034 static void onenand_release_device(struct mtd_info *mtd)
1036 struct onenand_chip *this = mtd->priv;
1038 if (this->state != FL_PM_SUSPENDED && this->disable)
1040 /* Release the chip */
1041 spin_lock(&this->chip_lock);
1042 this->state = FL_READY;
1044 spin_unlock(&this->chip_lock);
1048 * onenand_transfer_auto_oob - [INTERN] oob auto-placement transfer
1049 * @param mtd MTD device structure
1050 * @param buf destination address
1051 * @param column oob offset to read from
1052 * @param thislen oob length to read
1054 static int onenand_transfer_auto_oob(struct mtd_info *mtd, uint8_t *buf, int column,
1057 struct onenand_chip *this = mtd->priv;
1060 this->read_bufferram(mtd, ONENAND_SPARERAM, this->oob_buf, 0,
1062 ret = mtd_ooblayout_get_databytes(mtd, buf, this->oob_buf,
1071 * onenand_recover_lsb - [Flex-OneNAND] Recover LSB page data
1072 * @param mtd MTD device structure
1073 * @param addr address to recover
1074 * @param status return value from onenand_wait / onenand_bbt_wait
1076 * MLC NAND Flash cell has paired pages - LSB page and MSB page. LSB page has
1077 * lower page address and MSB page has higher page address in paired pages.
1078 * If power off occurs during MSB page program, the paired LSB page data can
1079 * become corrupt. LSB page recovery read is a way to read LSB page though page
1080 * data are corrupted. When uncorrectable error occurs as a result of LSB page
1081 * read after power up, issue LSB page recovery read.
1083 static int onenand_recover_lsb(struct mtd_info *mtd, loff_t addr, int status)
1085 struct onenand_chip *this = mtd->priv;
1088 /* Recovery is only for Flex-OneNAND */
1089 if (!FLEXONENAND(this))
1092 /* check if we failed due to uncorrectable error */
1093 if (!mtd_is_eccerr(status) && status != ONENAND_BBT_READ_ECC_ERROR)
1096 /* check if address lies in MLC region */
1097 i = flexonenand_region(mtd, addr);
1098 if (mtd->eraseregions[i].erasesize < (1 << this->erase_shift))
1101 /* We are attempting to reread, so decrement stats.failed
1102 * which was incremented by onenand_wait due to read failure
1104 printk(KERN_INFO "%s: Attempting to recover from uncorrectable read\n",
1106 mtd->ecc_stats.failed--;
1108 /* Issue the LSB page recovery command */
1109 this->command(mtd, FLEXONENAND_CMD_RECOVER_LSB, addr, this->writesize);
1110 return this->wait(mtd, FL_READING);
1114 * onenand_mlc_read_ops_nolock - MLC OneNAND read main and/or out-of-band
1115 * @param mtd MTD device structure
1116 * @param from offset to read from
1117 * @param ops: oob operation description structure
1119 * MLC OneNAND / Flex-OneNAND has 4KB page size and 4KB dataram.
1120 * So, read-while-load is not present.
1122 static int onenand_mlc_read_ops_nolock(struct mtd_info *mtd, loff_t from,
1123 struct mtd_oob_ops *ops)
1125 struct onenand_chip *this = mtd->priv;
1126 struct mtd_ecc_stats stats;
1127 size_t len = ops->len;
1128 size_t ooblen = ops->ooblen;
1129 u_char *buf = ops->datbuf;
1130 u_char *oobbuf = ops->oobbuf;
1131 int read = 0, column, thislen;
1132 int oobread = 0, oobcolumn, thisooblen, oobsize;
1134 int writesize = this->writesize;
1136 pr_debug("%s: from = 0x%08x, len = %i\n", __func__, (unsigned int)from,
1139 oobsize = mtd_oobavail(mtd, ops);
1140 oobcolumn = from & (mtd->oobsize - 1);
1142 /* Do not allow reads past end of device */
1143 if (from + len > mtd->size) {
1144 printk(KERN_ERR "%s: Attempt read beyond end of device\n",
1151 stats = mtd->ecc_stats;
1153 while (read < len) {
1156 thislen = min_t(int, writesize, len - read);
1158 column = from & (writesize - 1);
1159 if (column + thislen > writesize)
1160 thislen = writesize - column;
1162 if (!onenand_check_bufferram(mtd, from)) {
1163 this->command(mtd, ONENAND_CMD_READ, from, writesize);
1165 ret = this->wait(mtd, FL_READING);
1167 ret = onenand_recover_lsb(mtd, from, ret);
1168 onenand_update_bufferram(mtd, from, !ret);
1169 if (mtd_is_eccerr(ret))
1175 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
1177 thisooblen = oobsize - oobcolumn;
1178 thisooblen = min_t(int, thisooblen, ooblen - oobread);
1180 if (ops->mode == MTD_OPS_AUTO_OOB)
1181 onenand_transfer_auto_oob(mtd, oobbuf, oobcolumn, thisooblen);
1183 this->read_bufferram(mtd, ONENAND_SPARERAM, oobbuf, oobcolumn, thisooblen);
1184 oobread += thisooblen;
1185 oobbuf += thisooblen;
1198 * Return success, if no ECC failures, else -EBADMSG
1199 * fs driver will take care of that, because
1200 * retlen == desired len and result == -EBADMSG
1203 ops->oobretlen = oobread;
1208 if (mtd->ecc_stats.failed - stats.failed)
1211 /* return max bitflips per ecc step; ONENANDs correct 1 bit only */
1212 return mtd->ecc_stats.corrected != stats.corrected ? 1 : 0;
1216 * onenand_read_ops_nolock - [OneNAND Interface] OneNAND read main and/or out-of-band
1217 * @param mtd MTD device structure
1218 * @param from offset to read from
1219 * @param ops: oob operation description structure
1221 * OneNAND read main and/or out-of-band data
1223 static int onenand_read_ops_nolock(struct mtd_info *mtd, loff_t from,
1224 struct mtd_oob_ops *ops)
1226 struct onenand_chip *this = mtd->priv;
1227 struct mtd_ecc_stats stats;
1228 size_t len = ops->len;
1229 size_t ooblen = ops->ooblen;
1230 u_char *buf = ops->datbuf;
1231 u_char *oobbuf = ops->oobbuf;
1232 int read = 0, column, thislen;
1233 int oobread = 0, oobcolumn, thisooblen, oobsize;
1234 int ret = 0, boundary = 0;
1235 int writesize = this->writesize;
1237 pr_debug("%s: from = 0x%08x, len = %i\n", __func__, (unsigned int)from,
1240 oobsize = mtd_oobavail(mtd, ops);
1241 oobcolumn = from & (mtd->oobsize - 1);
1243 /* Do not allow reads past end of device */
1244 if ((from + len) > mtd->size) {
1245 printk(KERN_ERR "%s: Attempt read beyond end of device\n",
1252 stats = mtd->ecc_stats;
1254 /* Read-while-load method */
1256 /* Do first load to bufferRAM */
1258 if (!onenand_check_bufferram(mtd, from)) {
1259 this->command(mtd, ONENAND_CMD_READ, from, writesize);
1260 ret = this->wait(mtd, FL_READING);
1261 onenand_update_bufferram(mtd, from, !ret);
1262 if (mtd_is_eccerr(ret))
1267 thislen = min_t(int, writesize, len - read);
1268 column = from & (writesize - 1);
1269 if (column + thislen > writesize)
1270 thislen = writesize - column;
1273 /* If there is more to load then start next load */
1275 if (read + thislen < len) {
1276 this->command(mtd, ONENAND_CMD_READ, from, writesize);
1278 * Chip boundary handling in DDP
1279 * Now we issued chip 1 read and pointed chip 1
1280 * bufferram so we have to point chip 0 bufferram.
1282 if (ONENAND_IS_DDP(this) &&
1283 unlikely(from == (this->chipsize >> 1))) {
1284 this->write_word(ONENAND_DDP_CHIP0, this->base + ONENAND_REG_START_ADDRESS2);
1288 ONENAND_SET_PREV_BUFFERRAM(this);
1290 /* While load is going, read from last bufferRAM */
1291 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
1293 /* Read oob area if needed */
1295 thisooblen = oobsize - oobcolumn;
1296 thisooblen = min_t(int, thisooblen, ooblen - oobread);
1298 if (ops->mode == MTD_OPS_AUTO_OOB)
1299 onenand_transfer_auto_oob(mtd, oobbuf, oobcolumn, thisooblen);
1301 this->read_bufferram(mtd, ONENAND_SPARERAM, oobbuf, oobcolumn, thisooblen);
1302 oobread += thisooblen;
1303 oobbuf += thisooblen;
1307 /* See if we are done */
1311 /* Set up for next read from bufferRAM */
1312 if (unlikely(boundary))
1313 this->write_word(ONENAND_DDP_CHIP1, this->base + ONENAND_REG_START_ADDRESS2);
1314 ONENAND_SET_NEXT_BUFFERRAM(this);
1316 thislen = min_t(int, writesize, len - read);
1319 /* Now wait for load */
1320 ret = this->wait(mtd, FL_READING);
1321 onenand_update_bufferram(mtd, from, !ret);
1322 if (mtd_is_eccerr(ret))
1327 * Return success, if no ECC failures, else -EBADMSG
1328 * fs driver will take care of that, because
1329 * retlen == desired len and result == -EBADMSG
1332 ops->oobretlen = oobread;
1337 if (mtd->ecc_stats.failed - stats.failed)
1340 /* return max bitflips per ecc step; ONENANDs correct 1 bit only */
1341 return mtd->ecc_stats.corrected != stats.corrected ? 1 : 0;
1345 * onenand_read_oob_nolock - [MTD Interface] OneNAND read out-of-band
1346 * @param mtd MTD device structure
1347 * @param from offset to read from
1348 * @param ops: oob operation description structure
1350 * OneNAND read out-of-band data from the spare area
1352 static int onenand_read_oob_nolock(struct mtd_info *mtd, loff_t from,
1353 struct mtd_oob_ops *ops)
1355 struct onenand_chip *this = mtd->priv;
1356 struct mtd_ecc_stats stats;
1357 int read = 0, thislen, column, oobsize;
1358 size_t len = ops->ooblen;
1359 unsigned int mode = ops->mode;
1360 u_char *buf = ops->oobbuf;
1361 int ret = 0, readcmd;
1363 from += ops->ooboffs;
1365 pr_debug("%s: from = 0x%08x, len = %i\n", __func__, (unsigned int)from,
1368 /* Initialize return length value */
1371 if (mode == MTD_OPS_AUTO_OOB)
1372 oobsize = mtd->oobavail;
1374 oobsize = mtd->oobsize;
1376 column = from & (mtd->oobsize - 1);
1378 if (unlikely(column >= oobsize)) {
1379 printk(KERN_ERR "%s: Attempted to start read outside oob\n",
1384 stats = mtd->ecc_stats;
1386 readcmd = ONENAND_IS_4KB_PAGE(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB;
1388 while (read < len) {
1391 thislen = oobsize - column;
1392 thislen = min_t(int, thislen, len);
1394 this->command(mtd, readcmd, from, mtd->oobsize);
1396 onenand_update_bufferram(mtd, from, 0);
1398 ret = this->wait(mtd, FL_READING);
1400 ret = onenand_recover_lsb(mtd, from, ret);
1402 if (ret && !mtd_is_eccerr(ret)) {
1403 printk(KERN_ERR "%s: read failed = 0x%x\n",
1408 if (mode == MTD_OPS_AUTO_OOB)
1409 onenand_transfer_auto_oob(mtd, buf, column, thislen);
1411 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
1423 from += mtd->writesize;
1428 ops->oobretlen = read;
1433 if (mtd->ecc_stats.failed - stats.failed)
1440 * onenand_read_oob - [MTD Interface] Read main and/or out-of-band
1441 * @param mtd: MTD device structure
1442 * @param from: offset to read from
1443 * @param ops: oob operation description structure
1445 * Read main and/or out-of-band
1447 static int onenand_read_oob(struct mtd_info *mtd, loff_t from,
1448 struct mtd_oob_ops *ops)
1450 struct onenand_chip *this = mtd->priv;
1453 switch (ops->mode) {
1454 case MTD_OPS_PLACE_OOB:
1455 case MTD_OPS_AUTO_OOB:
1458 /* Not implemented yet */
1463 onenand_get_device(mtd, FL_READING);
1465 ret = ONENAND_IS_4KB_PAGE(this) ?
1466 onenand_mlc_read_ops_nolock(mtd, from, ops) :
1467 onenand_read_ops_nolock(mtd, from, ops);
1469 ret = onenand_read_oob_nolock(mtd, from, ops);
1470 onenand_release_device(mtd);
1476 * onenand_bbt_wait - [DEFAULT] wait until the command is done
1477 * @param mtd MTD device structure
1478 * @param state state to select the max. timeout value
1480 * Wait for command done.
1482 static int onenand_bbt_wait(struct mtd_info *mtd, int state)
1484 struct onenand_chip *this = mtd->priv;
1485 unsigned long timeout;
1486 unsigned int interrupt, ctrl, ecc, addr1, addr8;
1488 /* The 20 msec is enough */
1489 timeout = jiffies + msecs_to_jiffies(20);
1490 while (time_before(jiffies, timeout)) {
1491 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
1492 if (interrupt & ONENAND_INT_MASTER)
1495 /* To get correct interrupt status in timeout case */
1496 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
1497 ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
1498 addr1 = this->read_word(this->base + ONENAND_REG_START_ADDRESS1);
1499 addr8 = this->read_word(this->base + ONENAND_REG_START_ADDRESS8);
1501 if (interrupt & ONENAND_INT_READ) {
1502 ecc = onenand_read_ecc(this);
1503 if (ecc & ONENAND_ECC_2BIT_ALL) {
1504 printk(KERN_DEBUG "%s: ecc 0x%04x ctrl 0x%04x "
1505 "intr 0x%04x addr1 %#x addr8 %#x\n",
1506 __func__, ecc, ctrl, interrupt, addr1, addr8);
1507 return ONENAND_BBT_READ_ECC_ERROR;
1510 printk(KERN_ERR "%s: read timeout! ctrl 0x%04x "
1511 "intr 0x%04x addr1 %#x addr8 %#x\n",
1512 __func__, ctrl, interrupt, addr1, addr8);
1513 return ONENAND_BBT_READ_FATAL_ERROR;
1516 /* Initial bad block case: 0x2400 or 0x0400 */
1517 if (ctrl & ONENAND_CTRL_ERROR) {
1518 printk(KERN_DEBUG "%s: ctrl 0x%04x intr 0x%04x addr1 %#x "
1519 "addr8 %#x\n", __func__, ctrl, interrupt, addr1, addr8);
1520 return ONENAND_BBT_READ_ERROR;
1527 * onenand_bbt_read_oob - [MTD Interface] OneNAND read out-of-band for bbt scan
1528 * @param mtd MTD device structure
1529 * @param from offset to read from
1530 * @param ops oob operation description structure
1532 * OneNAND read out-of-band data from the spare area for bbt scan
1534 int onenand_bbt_read_oob(struct mtd_info *mtd, loff_t from,
1535 struct mtd_oob_ops *ops)
1537 struct onenand_chip *this = mtd->priv;
1538 int read = 0, thislen, column;
1539 int ret = 0, readcmd;
1540 size_t len = ops->ooblen;
1541 u_char *buf = ops->oobbuf;
1543 pr_debug("%s: from = 0x%08x, len = %zi\n", __func__, (unsigned int)from,
1546 /* Initialize return value */
1549 /* Do not allow reads past end of device */
1550 if (unlikely((from + len) > mtd->size)) {
1551 printk(KERN_ERR "%s: Attempt read beyond end of device\n",
1553 return ONENAND_BBT_READ_FATAL_ERROR;
1556 /* Grab the lock and see if the device is available */
1557 onenand_get_device(mtd, FL_READING);
1559 column = from & (mtd->oobsize - 1);
1561 readcmd = ONENAND_IS_4KB_PAGE(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB;
1563 while (read < len) {
1566 thislen = mtd->oobsize - column;
1567 thislen = min_t(int, thislen, len);
1569 this->command(mtd, readcmd, from, mtd->oobsize);
1571 onenand_update_bufferram(mtd, from, 0);
1573 ret = this->bbt_wait(mtd, FL_READING);
1575 ret = onenand_recover_lsb(mtd, from, ret);
1580 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
1589 /* Update Page size */
1590 from += this->writesize;
1595 /* Deselect and wake up anyone waiting on the device */
1596 onenand_release_device(mtd);
1598 ops->oobretlen = read;
1602 #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
1604 * onenand_verify_oob - [GENERIC] verify the oob contents after a write
1605 * @param mtd MTD device structure
1606 * @param buf the databuffer to verify
1607 * @param to offset to read from
1609 static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to)
1611 struct onenand_chip *this = mtd->priv;
1612 u_char *oob_buf = this->oob_buf;
1613 int status, i, readcmd;
1615 readcmd = ONENAND_IS_4KB_PAGE(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB;
1617 this->command(mtd, readcmd, to, mtd->oobsize);
1618 onenand_update_bufferram(mtd, to, 0);
1619 status = this->wait(mtd, FL_READING);
1623 this->read_bufferram(mtd, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize);
1624 for (i = 0; i < mtd->oobsize; i++)
1625 if (buf[i] != 0xFF && buf[i] != oob_buf[i])
1632 * onenand_verify - [GENERIC] verify the chip contents after a write
1633 * @param mtd MTD device structure
1634 * @param buf the databuffer to verify
1635 * @param addr offset to read from
1636 * @param len number of bytes to read and compare
1638 static int onenand_verify(struct mtd_info *mtd, const u_char *buf, loff_t addr, size_t len)
1640 struct onenand_chip *this = mtd->priv;
1642 int thislen, column;
1644 column = addr & (this->writesize - 1);
1647 thislen = min_t(int, this->writesize - column, len);
1649 this->command(mtd, ONENAND_CMD_READ, addr, this->writesize);
1651 onenand_update_bufferram(mtd, addr, 0);
1653 ret = this->wait(mtd, FL_READING);
1657 onenand_update_bufferram(mtd, addr, 1);
1659 this->read_bufferram(mtd, ONENAND_DATARAM, this->verify_buf, 0, mtd->writesize);
1661 if (memcmp(buf, this->verify_buf + column, thislen))
1673 #define onenand_verify(...) (0)
1674 #define onenand_verify_oob(...) (0)
1677 #define NOTALIGNED(x) ((x & (this->subpagesize - 1)) != 0)
1679 static void onenand_panic_wait(struct mtd_info *mtd)
1681 struct onenand_chip *this = mtd->priv;
1682 unsigned int interrupt;
1685 for (i = 0; i < 2000; i++) {
1686 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
1687 if (interrupt & ONENAND_INT_MASTER)
1694 * onenand_panic_write - [MTD Interface] write buffer to FLASH in a panic context
1695 * @param mtd MTD device structure
1696 * @param to offset to write to
1697 * @param len number of bytes to write
1698 * @param retlen pointer to variable to store the number of written bytes
1699 * @param buf the data to write
1703 static int onenand_panic_write(struct mtd_info *mtd, loff_t to, size_t len,
1704 size_t *retlen, const u_char *buf)
1706 struct onenand_chip *this = mtd->priv;
1707 int column, subpage;
1710 if (this->state == FL_PM_SUSPENDED)
1713 /* Wait for any existing operation to clear */
1714 onenand_panic_wait(mtd);
1716 pr_debug("%s: to = 0x%08x, len = %i\n", __func__, (unsigned int)to,
1719 /* Reject writes, which are not page aligned */
1720 if (unlikely(NOTALIGNED(to) || NOTALIGNED(len))) {
1721 printk(KERN_ERR "%s: Attempt to write not page aligned data\n",
1726 column = to & (mtd->writesize - 1);
1728 /* Loop until all data write */
1729 while (written < len) {
1730 int thislen = min_t(int, mtd->writesize - column, len - written);
1731 u_char *wbuf = (u_char *) buf;
1733 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen);
1735 /* Partial page write */
1736 subpage = thislen < mtd->writesize;
1738 memset(this->page_buf, 0xff, mtd->writesize);
1739 memcpy(this->page_buf + column, buf, thislen);
1740 wbuf = this->page_buf;
1743 this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, mtd->writesize);
1744 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize);
1746 this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize);
1748 onenand_panic_wait(mtd);
1750 /* In partial page write we don't update bufferram */
1751 onenand_update_bufferram(mtd, to, !subpage);
1752 if (ONENAND_IS_2PLANE(this)) {
1753 ONENAND_SET_BUFFERRAM1(this);
1754 onenand_update_bufferram(mtd, to + this->writesize, !subpage);
1772 * onenand_fill_auto_oob - [INTERN] oob auto-placement transfer
1773 * @param mtd MTD device structure
1774 * @param oob_buf oob buffer
1775 * @param buf source address
1776 * @param column oob offset to write to
1777 * @param thislen oob length to write
1779 static int onenand_fill_auto_oob(struct mtd_info *mtd, u_char *oob_buf,
1780 const u_char *buf, int column, int thislen)
1782 return mtd_ooblayout_set_databytes(mtd, buf, oob_buf, column, thislen);
1786 * onenand_write_ops_nolock - [OneNAND Interface] write main and/or out-of-band
1787 * @param mtd MTD device structure
1788 * @param to offset to write to
1789 * @param ops oob operation description structure
1791 * Write main and/or oob with ECC
1793 static int onenand_write_ops_nolock(struct mtd_info *mtd, loff_t to,
1794 struct mtd_oob_ops *ops)
1796 struct onenand_chip *this = mtd->priv;
1797 int written = 0, column, thislen = 0, subpage = 0;
1798 int prev = 0, prevlen = 0, prev_subpage = 0, first = 1;
1799 int oobwritten = 0, oobcolumn, thisooblen, oobsize;
1800 size_t len = ops->len;
1801 size_t ooblen = ops->ooblen;
1802 const u_char *buf = ops->datbuf;
1803 const u_char *oob = ops->oobbuf;
1807 pr_debug("%s: to = 0x%08x, len = %i\n", __func__, (unsigned int)to,
1810 /* Initialize retlen, in case of early exit */
1814 /* Reject writes, which are not page aligned */
1815 if (unlikely(NOTALIGNED(to) || NOTALIGNED(len))) {
1816 printk(KERN_ERR "%s: Attempt to write not page aligned data\n",
1821 /* Check zero length */
1824 oobsize = mtd_oobavail(mtd, ops);
1825 oobcolumn = to & (mtd->oobsize - 1);
1827 column = to & (mtd->writesize - 1);
1829 /* Loop until all data write */
1831 if (written < len) {
1832 u_char *wbuf = (u_char *) buf;
1834 thislen = min_t(int, mtd->writesize - column, len - written);
1835 thisooblen = min_t(int, oobsize - oobcolumn, ooblen - oobwritten);
1839 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen);
1841 /* Partial page write */
1842 subpage = thislen < mtd->writesize;
1844 memset(this->page_buf, 0xff, mtd->writesize);
1845 memcpy(this->page_buf + column, buf, thislen);
1846 wbuf = this->page_buf;
1849 this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, mtd->writesize);
1852 oobbuf = this->oob_buf;
1854 /* We send data to spare ram with oobsize
1855 * to prevent byte access */
1856 memset(oobbuf, 0xff, mtd->oobsize);
1857 if (ops->mode == MTD_OPS_AUTO_OOB)
1858 onenand_fill_auto_oob(mtd, oobbuf, oob, oobcolumn, thisooblen);
1860 memcpy(oobbuf + oobcolumn, oob, thisooblen);
1862 oobwritten += thisooblen;
1866 oobbuf = (u_char *) ffchars;
1868 this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
1870 ONENAND_SET_NEXT_BUFFERRAM(this);
1873 * 2 PLANE, MLC, and Flex-OneNAND do not support
1874 * write-while-program feature.
1876 if (!ONENAND_IS_2PLANE(this) && !ONENAND_IS_4KB_PAGE(this) && !first) {
1877 ONENAND_SET_PREV_BUFFERRAM(this);
1879 ret = this->wait(mtd, FL_WRITING);
1881 /* In partial page write we don't update bufferram */
1882 onenand_update_bufferram(mtd, prev, !ret && !prev_subpage);
1885 printk(KERN_ERR "%s: write failed %d\n",
1890 if (written == len) {
1891 /* Only check verify write turn on */
1892 ret = onenand_verify(mtd, buf - len, to - len, len);
1894 printk(KERN_ERR "%s: verify failed %d\n",
1899 ONENAND_SET_NEXT_BUFFERRAM(this);
1903 cmd = ONENAND_CMD_PROG;
1905 /* Exclude 1st OTP and OTP blocks for cache program feature */
1906 if (ONENAND_IS_CACHE_PROGRAM(this) &&
1907 likely(onenand_block(this, to) != 0) &&
1908 ONENAND_IS_4KB_PAGE(this) &&
1909 ((written + thislen) < len)) {
1910 cmd = ONENAND_CMD_2X_CACHE_PROG;
1914 this->command(mtd, cmd, to, mtd->writesize);
1917 * 2 PLANE, MLC, and Flex-OneNAND wait here
1919 if (ONENAND_IS_2PLANE(this) || ONENAND_IS_4KB_PAGE(this)) {
1920 ret = this->wait(mtd, FL_WRITING);
1922 /* In partial page write we don't update bufferram */
1923 onenand_update_bufferram(mtd, to, !ret && !subpage);
1925 printk(KERN_ERR "%s: write failed %d\n",
1930 /* Only check verify write turn on */
1931 ret = onenand_verify(mtd, buf, to, thislen);
1933 printk(KERN_ERR "%s: verify failed %d\n",
1947 prev_subpage = subpage;
1955 /* In error case, clear all bufferrams */
1957 onenand_invalidate_bufferram(mtd, 0, -1);
1959 ops->retlen = written;
1960 ops->oobretlen = oobwritten;
1967 * onenand_write_oob_nolock - [INTERN] OneNAND write out-of-band
1968 * @param mtd MTD device structure
1969 * @param to offset to write to
1970 * @param len number of bytes to write
1971 * @param retlen pointer to variable to store the number of written bytes
1972 * @param buf the data to write
1973 * @param mode operation mode
1975 * OneNAND write out-of-band
1977 static int onenand_write_oob_nolock(struct mtd_info *mtd, loff_t to,
1978 struct mtd_oob_ops *ops)
1980 struct onenand_chip *this = mtd->priv;
1981 int column, ret = 0, oobsize;
1982 int written = 0, oobcmd;
1984 size_t len = ops->ooblen;
1985 const u_char *buf = ops->oobbuf;
1986 unsigned int mode = ops->mode;
1990 pr_debug("%s: to = 0x%08x, len = %i\n", __func__, (unsigned int)to,
1993 /* Initialize retlen, in case of early exit */
1996 if (mode == MTD_OPS_AUTO_OOB)
1997 oobsize = mtd->oobavail;
1999 oobsize = mtd->oobsize;
2001 column = to & (mtd->oobsize - 1);
2003 if (unlikely(column >= oobsize)) {
2004 printk(KERN_ERR "%s: Attempted to start write outside oob\n",
2009 /* For compatibility with NAND: Do not allow write past end of page */
2010 if (unlikely(column + len > oobsize)) {
2011 printk(KERN_ERR "%s: Attempt to write past end of page\n",
2016 oobbuf = this->oob_buf;
2018 oobcmd = ONENAND_IS_4KB_PAGE(this) ? ONENAND_CMD_PROG : ONENAND_CMD_PROGOOB;
2020 /* Loop until all data write */
2021 while (written < len) {
2022 int thislen = min_t(int, oobsize, len - written);
2026 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize);
2028 /* We send data to spare ram with oobsize
2029 * to prevent byte access */
2030 memset(oobbuf, 0xff, mtd->oobsize);
2031 if (mode == MTD_OPS_AUTO_OOB)
2032 onenand_fill_auto_oob(mtd, oobbuf, buf, column, thislen);
2034 memcpy(oobbuf + column, buf, thislen);
2035 this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
2037 if (ONENAND_IS_4KB_PAGE(this)) {
2038 /* Set main area of DataRAM to 0xff*/
2039 memset(this->page_buf, 0xff, mtd->writesize);
2040 this->write_bufferram(mtd, ONENAND_DATARAM,
2041 this->page_buf, 0, mtd->writesize);
2044 this->command(mtd, oobcmd, to, mtd->oobsize);
2046 onenand_update_bufferram(mtd, to, 0);
2047 if (ONENAND_IS_2PLANE(this)) {
2048 ONENAND_SET_BUFFERRAM1(this);
2049 onenand_update_bufferram(mtd, to + this->writesize, 0);
2052 ret = this->wait(mtd, FL_WRITING);
2054 printk(KERN_ERR "%s: write failed %d\n", __func__, ret);
2058 ret = onenand_verify_oob(mtd, oobbuf, to);
2060 printk(KERN_ERR "%s: verify failed %d\n",
2069 to += mtd->writesize;
2074 ops->oobretlen = written;
2080 * onenand_write_oob - [MTD Interface] NAND write data and/or out-of-band
2081 * @param mtd: MTD device structure
2082 * @param to: offset to write
2083 * @param ops: oob operation description structure
2085 static int onenand_write_oob(struct mtd_info *mtd, loff_t to,
2086 struct mtd_oob_ops *ops)
2090 switch (ops->mode) {
2091 case MTD_OPS_PLACE_OOB:
2092 case MTD_OPS_AUTO_OOB:
2095 /* Not implemented yet */
2100 onenand_get_device(mtd, FL_WRITING);
2102 ret = onenand_write_ops_nolock(mtd, to, ops);
2104 ret = onenand_write_oob_nolock(mtd, to, ops);
2105 onenand_release_device(mtd);
2111 * onenand_block_isbad_nolock - [GENERIC] Check if a block is marked bad
2112 * @param mtd MTD device structure
2113 * @param ofs offset from device start
2114 * @param allowbbt 1, if its allowed to access the bbt area
2116 * Check, if the block is bad. Either by reading the bad block table or
2117 * calling of the scan function.
2119 static int onenand_block_isbad_nolock(struct mtd_info *mtd, loff_t ofs, int allowbbt)
2121 struct onenand_chip *this = mtd->priv;
2122 struct bbm_info *bbm = this->bbm;
2124 /* Return info from the table */
2125 return bbm->isbad_bbt(mtd, ofs, allowbbt);
2129 static int onenand_multiblock_erase_verify(struct mtd_info *mtd,
2130 struct erase_info *instr)
2132 struct onenand_chip *this = mtd->priv;
2133 loff_t addr = instr->addr;
2134 int len = instr->len;
2135 unsigned int block_size = (1 << this->erase_shift);
2139 this->command(mtd, ONENAND_CMD_ERASE_VERIFY, addr, block_size);
2140 ret = this->wait(mtd, FL_VERIFYING_ERASE);
2142 printk(KERN_ERR "%s: Failed verify, block %d\n",
2143 __func__, onenand_block(this, addr));
2144 instr->fail_addr = addr;
2154 * onenand_multiblock_erase - [INTERN] erase block(s) using multiblock erase
2155 * @param mtd MTD device structure
2156 * @param instr erase instruction
2157 * @param region erase region
2159 * Erase one or more blocks up to 64 block at a time
2161 static int onenand_multiblock_erase(struct mtd_info *mtd,
2162 struct erase_info *instr,
2163 unsigned int block_size)
2165 struct onenand_chip *this = mtd->priv;
2166 loff_t addr = instr->addr;
2167 int len = instr->len;
2172 if (ONENAND_IS_DDP(this)) {
2173 loff_t bdry_addr = this->chipsize >> 1;
2174 if (addr < bdry_addr && (addr + len) > bdry_addr)
2175 bdry_block = bdry_addr >> this->erase_shift;
2180 /* Check if we have a bad block, we do not erase bad blocks */
2181 if (onenand_block_isbad_nolock(mtd, addr, 0)) {
2182 printk(KERN_WARNING "%s: attempt to erase a bad block "
2183 "at addr 0x%012llx\n",
2184 __func__, (unsigned long long) addr);
2194 /* loop over 64 eb batches */
2196 struct erase_info verify_instr = *instr;
2197 int max_eb_count = MB_ERASE_MAX_BLK_COUNT;
2199 verify_instr.addr = addr;
2200 verify_instr.len = 0;
2202 /* do not cross chip boundary */
2204 int this_block = (addr >> this->erase_shift);
2206 if (this_block < bdry_block) {
2207 max_eb_count = min(max_eb_count,
2208 (bdry_block - this_block));
2214 while (len > block_size && eb_count < (max_eb_count - 1)) {
2215 this->command(mtd, ONENAND_CMD_MULTIBLOCK_ERASE,
2217 onenand_invalidate_bufferram(mtd, addr, block_size);
2219 ret = this->wait(mtd, FL_PREPARING_ERASE);
2221 printk(KERN_ERR "%s: Failed multiblock erase, "
2222 "block %d\n", __func__,
2223 onenand_block(this, addr));
2224 instr->fail_addr = MTD_FAIL_ADDR_UNKNOWN;
2233 /* last block of 64-eb series */
2235 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
2236 onenand_invalidate_bufferram(mtd, addr, block_size);
2238 ret = this->wait(mtd, FL_ERASING);
2239 /* Check if it is write protected */
2241 printk(KERN_ERR "%s: Failed erase, block %d\n",
2242 __func__, onenand_block(this, addr));
2243 instr->fail_addr = MTD_FAIL_ADDR_UNKNOWN;
2252 verify_instr.len = eb_count * block_size;
2253 if (onenand_multiblock_erase_verify(mtd, &verify_instr)) {
2254 instr->fail_addr = verify_instr.fail_addr;
2264 * onenand_block_by_block_erase - [INTERN] erase block(s) using regular erase
2265 * @param mtd MTD device structure
2266 * @param instr erase instruction
2267 * @param region erase region
2268 * @param block_size erase block size
2270 * Erase one or more blocks one block at a time
2272 static int onenand_block_by_block_erase(struct mtd_info *mtd,
2273 struct erase_info *instr,
2274 struct mtd_erase_region_info *region,
2275 unsigned int block_size)
2277 struct onenand_chip *this = mtd->priv;
2278 loff_t addr = instr->addr;
2279 int len = instr->len;
2280 loff_t region_end = 0;
2284 /* region is set for Flex-OneNAND */
2285 region_end = region->offset + region->erasesize * region->numblocks;
2288 /* Loop through the blocks */
2292 /* Check if we have a bad block, we do not erase bad blocks */
2293 if (onenand_block_isbad_nolock(mtd, addr, 0)) {
2294 printk(KERN_WARNING "%s: attempt to erase a bad block "
2295 "at addr 0x%012llx\n",
2296 __func__, (unsigned long long) addr);
2300 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
2302 onenand_invalidate_bufferram(mtd, addr, block_size);
2304 ret = this->wait(mtd, FL_ERASING);
2305 /* Check, if it is write protected */
2307 printk(KERN_ERR "%s: Failed erase, block %d\n",
2308 __func__, onenand_block(this, addr));
2309 instr->fail_addr = addr;
2316 if (region && addr == region_end) {
2321 block_size = region->erasesize;
2322 region_end = region->offset + region->erasesize * region->numblocks;
2324 if (len & (block_size - 1)) {
2325 /* FIXME: This should be handled at MTD partitioning level. */
2326 printk(KERN_ERR "%s: Unaligned address\n",
2336 * onenand_erase - [MTD Interface] erase block(s)
2337 * @param mtd MTD device structure
2338 * @param instr erase instruction
2340 * Erase one or more blocks
2342 static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
2344 struct onenand_chip *this = mtd->priv;
2345 unsigned int block_size;
2346 loff_t addr = instr->addr;
2347 loff_t len = instr->len;
2349 struct mtd_erase_region_info *region = NULL;
2350 loff_t region_offset = 0;
2352 pr_debug("%s: start=0x%012llx, len=%llu\n", __func__,
2353 (unsigned long long)instr->addr,
2354 (unsigned long long)instr->len);
2356 if (FLEXONENAND(this)) {
2357 /* Find the eraseregion of this address */
2358 int i = flexonenand_region(mtd, addr);
2360 region = &mtd->eraseregions[i];
2361 block_size = region->erasesize;
2363 /* Start address within region must align on block boundary.
2364 * Erase region's start offset is always block start address.
2366 region_offset = region->offset;
2368 block_size = 1 << this->erase_shift;
2370 /* Start address must align on block boundary */
2371 if (unlikely((addr - region_offset) & (block_size - 1))) {
2372 printk(KERN_ERR "%s: Unaligned address\n", __func__);
2376 /* Length must align on block boundary */
2377 if (unlikely(len & (block_size - 1))) {
2378 printk(KERN_ERR "%s: Length not block aligned\n", __func__);
2382 /* Grab the lock and see if the device is available */
2383 onenand_get_device(mtd, FL_ERASING);
2385 if (ONENAND_IS_4KB_PAGE(this) || region ||
2386 instr->len < MB_ERASE_MIN_BLK_COUNT * block_size) {
2387 /* region is set for Flex-OneNAND (no mb erase) */
2388 ret = onenand_block_by_block_erase(mtd, instr,
2389 region, block_size);
2391 ret = onenand_multiblock_erase(mtd, instr, block_size);
2394 /* Deselect and wake up anyone waiting on the device */
2395 onenand_release_device(mtd);
2401 * onenand_sync - [MTD Interface] sync
2402 * @param mtd MTD device structure
2404 * Sync is actually a wait for chip ready function
2406 static void onenand_sync(struct mtd_info *mtd)
2408 pr_debug("%s: called\n", __func__);
2410 /* Grab the lock and see if the device is available */
2411 onenand_get_device(mtd, FL_SYNCING);
2413 /* Release it and go back */
2414 onenand_release_device(mtd);
2418 * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
2419 * @param mtd MTD device structure
2420 * @param ofs offset relative to mtd start
2422 * Check whether the block is bad
2424 static int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs)
2428 onenand_get_device(mtd, FL_READING);
2429 ret = onenand_block_isbad_nolock(mtd, ofs, 0);
2430 onenand_release_device(mtd);
2435 * onenand_default_block_markbad - [DEFAULT] mark a block bad
2436 * @param mtd MTD device structure
2437 * @param ofs offset from device start
2439 * This is the default implementation, which can be overridden by
2440 * a hardware specific driver.
2442 static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
2444 struct onenand_chip *this = mtd->priv;
2445 struct bbm_info *bbm = this->bbm;
2446 u_char buf[2] = {0, 0};
2447 struct mtd_oob_ops ops = {
2448 .mode = MTD_OPS_PLACE_OOB,
2455 /* Get block number */
2456 block = onenand_block(this, ofs);
2458 bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
2460 /* We write two bytes, so we don't have to mess with 16-bit access */
2461 ofs += mtd->oobsize + (bbm->badblockpos & ~0x01);
2462 /* FIXME : What to do when marking SLC block in partition
2463 * with MLC erasesize? For now, it is not advisable to
2464 * create partitions containing both SLC and MLC regions.
2466 return onenand_write_oob_nolock(mtd, ofs, &ops);
2470 * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
2471 * @param mtd MTD device structure
2472 * @param ofs offset relative to mtd start
2474 * Mark the block as bad
2476 static int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs)
2478 struct onenand_chip *this = mtd->priv;
2481 ret = onenand_block_isbad(mtd, ofs);
2483 /* If it was bad already, return success and do nothing */
2489 onenand_get_device(mtd, FL_WRITING);
2490 ret = this->block_markbad(mtd, ofs);
2491 onenand_release_device(mtd);
2496 * onenand_do_lock_cmd - [OneNAND Interface] Lock or unlock block(s)
2497 * @param mtd MTD device structure
2498 * @param ofs offset relative to mtd start
2499 * @param len number of bytes to lock or unlock
2500 * @param cmd lock or unlock command
2502 * Lock or unlock one or more blocks
2504 static int onenand_do_lock_cmd(struct mtd_info *mtd, loff_t ofs, size_t len, int cmd)
2506 struct onenand_chip *this = mtd->priv;
2507 int start, end, block, value, status;
2510 start = onenand_block(this, ofs);
2511 end = onenand_block(this, ofs + len) - 1;
2513 if (cmd == ONENAND_CMD_LOCK)
2514 wp_status_mask = ONENAND_WP_LS;
2516 wp_status_mask = ONENAND_WP_US;
2518 /* Continuous lock scheme */
2519 if (this->options & ONENAND_HAS_CONT_LOCK) {
2520 /* Set start block address */
2521 this->write_word(start, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
2522 /* Set end block address */
2523 this->write_word(end, this->base + ONENAND_REG_END_BLOCK_ADDRESS);
2524 /* Write lock command */
2525 this->command(mtd, cmd, 0, 0);
2527 /* There's no return value */
2528 this->wait(mtd, FL_LOCKING);
2531 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
2532 & ONENAND_CTRL_ONGO)
2535 /* Check lock status */
2536 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
2537 if (!(status & wp_status_mask))
2538 printk(KERN_ERR "%s: wp status = 0x%x\n",
2544 /* Block lock scheme */
2545 for (block = start; block < end + 1; block++) {
2546 /* Set block address */
2547 value = onenand_block_address(this, block);
2548 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
2549 /* Select DataRAM for DDP */
2550 value = onenand_bufferram_address(this, block);
2551 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
2552 /* Set start block address */
2553 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
2554 /* Write lock command */
2555 this->command(mtd, cmd, 0, 0);
2557 /* There's no return value */
2558 this->wait(mtd, FL_LOCKING);
2561 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
2562 & ONENAND_CTRL_ONGO)
2565 /* Check lock status */
2566 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
2567 if (!(status & wp_status_mask))
2568 printk(KERN_ERR "%s: block = %d, wp status = 0x%x\n",
2569 __func__, block, status);
2576 * onenand_lock - [MTD Interface] Lock block(s)
2577 * @param mtd MTD device structure
2578 * @param ofs offset relative to mtd start
2579 * @param len number of bytes to unlock
2581 * Lock one or more blocks
2583 static int onenand_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
2587 onenand_get_device(mtd, FL_LOCKING);
2588 ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_LOCK);
2589 onenand_release_device(mtd);
2594 * onenand_unlock - [MTD Interface] Unlock block(s)
2595 * @param mtd MTD device structure
2596 * @param ofs offset relative to mtd start
2597 * @param len number of bytes to unlock
2599 * Unlock one or more blocks
2601 static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
2605 onenand_get_device(mtd, FL_LOCKING);
2606 ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
2607 onenand_release_device(mtd);
2612 * onenand_check_lock_status - [OneNAND Interface] Check lock status
2613 * @param this onenand chip data structure
2617 static int onenand_check_lock_status(struct onenand_chip *this)
2619 unsigned int value, block, status;
2622 end = this->chipsize >> this->erase_shift;
2623 for (block = 0; block < end; block++) {
2624 /* Set block address */
2625 value = onenand_block_address(this, block);
2626 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
2627 /* Select DataRAM for DDP */
2628 value = onenand_bufferram_address(this, block);
2629 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
2630 /* Set start block address */
2631 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
2633 /* Check lock status */
2634 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
2635 if (!(status & ONENAND_WP_US)) {
2636 printk(KERN_ERR "%s: block = %d, wp status = 0x%x\n",
2637 __func__, block, status);
2646 * onenand_unlock_all - [OneNAND Interface] unlock all blocks
2647 * @param mtd MTD device structure
2651 static void onenand_unlock_all(struct mtd_info *mtd)
2653 struct onenand_chip *this = mtd->priv;
2655 loff_t len = mtd->size;
2657 if (this->options & ONENAND_HAS_UNLOCK_ALL) {
2658 /* Set start block address */
2659 this->write_word(0, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
2660 /* Write unlock command */
2661 this->command(mtd, ONENAND_CMD_UNLOCK_ALL, 0, 0);
2663 /* There's no return value */
2664 this->wait(mtd, FL_LOCKING);
2667 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
2668 & ONENAND_CTRL_ONGO)
2671 /* Don't check lock status */
2672 if (this->options & ONENAND_SKIP_UNLOCK_CHECK)
2675 /* Check lock status */
2676 if (onenand_check_lock_status(this))
2679 /* Workaround for all block unlock in DDP */
2680 if (ONENAND_IS_DDP(this) && !FLEXONENAND(this)) {
2681 /* All blocks on another chip */
2682 ofs = this->chipsize >> 1;
2683 len = this->chipsize >> 1;
2687 onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
2690 #ifdef CONFIG_MTD_ONENAND_OTP
2693 * onenand_otp_command - Send OTP specific command to OneNAND device
2694 * @param mtd MTD device structure
2695 * @param cmd the command to be sent
2696 * @param addr offset to read from or write to
2697 * @param len number of bytes to read or write
2699 static int onenand_otp_command(struct mtd_info *mtd, int cmd, loff_t addr,
2702 struct onenand_chip *this = mtd->priv;
2703 int value, block, page;
2705 /* Address translation */
2707 case ONENAND_CMD_OTP_ACCESS:
2708 block = (int) (addr >> this->erase_shift);
2713 block = (int) (addr >> this->erase_shift);
2714 page = (int) (addr >> this->page_shift);
2716 if (ONENAND_IS_2PLANE(this)) {
2717 /* Make the even block number */
2719 /* Is it the odd plane? */
2720 if (addr & this->writesize)
2724 page &= this->page_mask;
2729 /* Write 'DFS, FBA' of Flash */
2730 value = onenand_block_address(this, block);
2731 this->write_word(value, this->base +
2732 ONENAND_REG_START_ADDRESS1);
2736 /* Now we use page size operation */
2737 int sectors = 4, count = 4;
2742 if (ONENAND_IS_2PLANE(this) && cmd == ONENAND_CMD_PROG)
2743 cmd = ONENAND_CMD_2X_PROG;
2744 dataram = ONENAND_CURRENT_BUFFERRAM(this);
2748 /* Write 'FPA, FSA' of Flash */
2749 value = onenand_page_address(page, sectors);
2750 this->write_word(value, this->base +
2751 ONENAND_REG_START_ADDRESS8);
2753 /* Write 'BSA, BSC' of DataRAM */
2754 value = onenand_buffer_address(dataram, sectors, count);
2755 this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
2758 /* Interrupt clear */
2759 this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
2762 this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
2768 * onenand_otp_write_oob_nolock - [INTERN] OneNAND write out-of-band, specific to OTP
2769 * @param mtd MTD device structure
2770 * @param to offset to write to
2771 * @param len number of bytes to write
2772 * @param retlen pointer to variable to store the number of written bytes
2773 * @param buf the data to write
2775 * OneNAND write out-of-band only for OTP
2777 static int onenand_otp_write_oob_nolock(struct mtd_info *mtd, loff_t to,
2778 struct mtd_oob_ops *ops)
2780 struct onenand_chip *this = mtd->priv;
2781 int column, ret = 0, oobsize;
2784 size_t len = ops->ooblen;
2785 const u_char *buf = ops->oobbuf;
2786 int block, value, status;
2790 /* Initialize retlen, in case of early exit */
2793 oobsize = mtd->oobsize;
2795 column = to & (mtd->oobsize - 1);
2797 oobbuf = this->oob_buf;
2799 /* Loop until all data write */
2800 while (written < len) {
2801 int thislen = min_t(int, oobsize, len - written);
2805 block = (int) (to >> this->erase_shift);
2807 * Write 'DFS, FBA' of Flash
2808 * Add: F100h DQ=DFS, FBA
2811 value = onenand_block_address(this, block);
2812 this->write_word(value, this->base +
2813 ONENAND_REG_START_ADDRESS1);
2816 * Select DataRAM for DDP
2820 value = onenand_bufferram_address(this, block);
2821 this->write_word(value, this->base +
2822 ONENAND_REG_START_ADDRESS2);
2823 ONENAND_SET_NEXT_BUFFERRAM(this);
2826 * Enter OTP access mode
2828 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
2829 this->wait(mtd, FL_OTPING);
2831 /* We send data to spare ram with oobsize
2832 * to prevent byte access */
2833 memcpy(oobbuf + column, buf, thislen);
2836 * Write Data into DataRAM
2838 * in sector0/spare/page0
2841 this->write_bufferram(mtd, ONENAND_SPARERAM,
2842 oobbuf, 0, mtd->oobsize);
2844 onenand_otp_command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize);
2845 onenand_update_bufferram(mtd, to, 0);
2846 if (ONENAND_IS_2PLANE(this)) {
2847 ONENAND_SET_BUFFERRAM1(this);
2848 onenand_update_bufferram(mtd, to + this->writesize, 0);
2851 ret = this->wait(mtd, FL_WRITING);
2853 printk(KERN_ERR "%s: write failed %d\n", __func__, ret);
2857 /* Exit OTP access mode */
2858 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
2859 this->wait(mtd, FL_RESETING);
2861 status = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
2864 if (status == 0x60) {
2865 printk(KERN_DEBUG "\nBLOCK\tSTATUS\n");
2866 printk(KERN_DEBUG "1st Block\tLOCKED\n");
2867 printk(KERN_DEBUG "OTP Block\tLOCKED\n");
2868 } else if (status == 0x20) {
2869 printk(KERN_DEBUG "\nBLOCK\tSTATUS\n");
2870 printk(KERN_DEBUG "1st Block\tLOCKED\n");
2871 printk(KERN_DEBUG "OTP Block\tUN-LOCKED\n");
2872 } else if (status == 0x40) {
2873 printk(KERN_DEBUG "\nBLOCK\tSTATUS\n");
2874 printk(KERN_DEBUG "1st Block\tUN-LOCKED\n");
2875 printk(KERN_DEBUG "OTP Block\tLOCKED\n");
2877 printk(KERN_DEBUG "Reboot to check\n");
2884 to += mtd->writesize;
2889 ops->oobretlen = written;
2894 /* Internal OTP operation */
2895 typedef int (*otp_op_t)(struct mtd_info *mtd, loff_t form, size_t len,
2896 size_t *retlen, u_char *buf);
2899 * do_otp_read - [DEFAULT] Read OTP block area
2900 * @param mtd MTD device structure
2901 * @param from The offset to read
2902 * @param len number of bytes to read
2903 * @param retlen pointer to variable to store the number of readbytes
2904 * @param buf the databuffer to put/get data
2906 * Read OTP block area.
2908 static int do_otp_read(struct mtd_info *mtd, loff_t from, size_t len,
2909 size_t *retlen, u_char *buf)
2911 struct onenand_chip *this = mtd->priv;
2912 struct mtd_oob_ops ops = {
2920 /* Enter OTP access mode */
2921 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
2922 this->wait(mtd, FL_OTPING);
2924 ret = ONENAND_IS_4KB_PAGE(this) ?
2925 onenand_mlc_read_ops_nolock(mtd, from, &ops) :
2926 onenand_read_ops_nolock(mtd, from, &ops);
2928 /* Exit OTP access mode */
2929 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
2930 this->wait(mtd, FL_RESETING);
2936 * do_otp_write - [DEFAULT] Write OTP block area
2937 * @param mtd MTD device structure
2938 * @param to The offset to write
2939 * @param len number of bytes to write
2940 * @param retlen pointer to variable to store the number of write bytes
2941 * @param buf the databuffer to put/get data
2943 * Write OTP block area.
2945 static int do_otp_write(struct mtd_info *mtd, loff_t to, size_t len,
2946 size_t *retlen, u_char *buf)
2948 struct onenand_chip *this = mtd->priv;
2949 unsigned char *pbuf = buf;
2951 struct mtd_oob_ops ops;
2953 /* Force buffer page aligned */
2954 if (len < mtd->writesize) {
2955 memcpy(this->page_buf, buf, len);
2956 memset(this->page_buf + len, 0xff, mtd->writesize - len);
2957 pbuf = this->page_buf;
2958 len = mtd->writesize;
2961 /* Enter OTP access mode */
2962 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
2963 this->wait(mtd, FL_OTPING);
2969 ret = onenand_write_ops_nolock(mtd, to, &ops);
2970 *retlen = ops.retlen;
2972 /* Exit OTP access mode */
2973 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
2974 this->wait(mtd, FL_RESETING);
2980 * do_otp_lock - [DEFAULT] Lock OTP block area
2981 * @param mtd MTD device structure
2982 * @param from The offset to lock
2983 * @param len number of bytes to lock
2984 * @param retlen pointer to variable to store the number of lock bytes
2985 * @param buf the databuffer to put/get data
2987 * Lock OTP block area.
2989 static int do_otp_lock(struct mtd_info *mtd, loff_t from, size_t len,
2990 size_t *retlen, u_char *buf)
2992 struct onenand_chip *this = mtd->priv;
2993 struct mtd_oob_ops ops;
2996 if (FLEXONENAND(this)) {
2998 /* Enter OTP access mode */
2999 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
3000 this->wait(mtd, FL_OTPING);
3002 * For Flex-OneNAND, we write lock mark to 1st word of sector 4 of
3003 * main area of page 49.
3005 ops.len = mtd->writesize;
3009 ret = onenand_write_ops_nolock(mtd, mtd->writesize * 49, &ops);
3010 *retlen = ops.retlen;
3012 /* Exit OTP access mode */
3013 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
3014 this->wait(mtd, FL_RESETING);
3016 ops.mode = MTD_OPS_PLACE_OOB;
3020 ret = onenand_otp_write_oob_nolock(mtd, from, &ops);
3021 *retlen = ops.oobretlen;
3028 * onenand_otp_walk - [DEFAULT] Handle OTP operation
3029 * @param mtd MTD device structure
3030 * @param from The offset to read/write
3031 * @param len number of bytes to read/write
3032 * @param retlen pointer to variable to store the number of read bytes
3033 * @param buf the databuffer to put/get data
3034 * @param action do given action
3035 * @param mode specify user and factory
3037 * Handle OTP operation.
3039 static int onenand_otp_walk(struct mtd_info *mtd, loff_t from, size_t len,
3040 size_t *retlen, u_char *buf,
3041 otp_op_t action, int mode)
3043 struct onenand_chip *this = mtd->priv;
3050 density = onenand_get_density(this->device_id);
3051 if (density < ONENAND_DEVICE_DENSITY_512Mb)
3056 if (mode == MTD_OTP_FACTORY) {
3057 from += mtd->writesize * otp_pages;
3058 otp_pages = ONENAND_PAGES_PER_BLOCK - otp_pages;
3061 /* Check User/Factory boundary */
3062 if (mode == MTD_OTP_USER) {
3063 if (mtd->writesize * otp_pages < from + len)
3066 if (mtd->writesize * otp_pages < len)
3070 onenand_get_device(mtd, FL_OTPING);
3071 while (len > 0 && otp_pages > 0) {
3072 if (!action) { /* OTP Info functions */
3073 struct otp_info *otpinfo;
3075 len -= sizeof(struct otp_info);
3081 otpinfo = (struct otp_info *) buf;
3082 otpinfo->start = from;
3083 otpinfo->length = mtd->writesize;
3084 otpinfo->locked = 0;
3086 from += mtd->writesize;
3087 buf += sizeof(struct otp_info);
3088 *retlen += sizeof(struct otp_info);
3092 ret = action(mtd, from, len, &tmp_retlen, buf);
3098 *retlen += tmp_retlen;
3103 onenand_release_device(mtd);
3109 * onenand_get_fact_prot_info - [MTD Interface] Read factory OTP info
3110 * @param mtd MTD device structure
3111 * @param len number of bytes to read
3112 * @param retlen pointer to variable to store the number of read bytes
3113 * @param buf the databuffer to put/get data
3115 * Read factory OTP info.
3117 static int onenand_get_fact_prot_info(struct mtd_info *mtd, size_t len,
3118 size_t *retlen, struct otp_info *buf)
3120 return onenand_otp_walk(mtd, 0, len, retlen, (u_char *) buf, NULL,
3125 * onenand_read_fact_prot_reg - [MTD Interface] Read factory OTP area
3126 * @param mtd MTD device structure
3127 * @param from The offset to read
3128 * @param len number of bytes to read
3129 * @param retlen pointer to variable to store the number of read bytes
3130 * @param buf the databuffer to put/get data
3132 * Read factory OTP area.
3134 static int onenand_read_fact_prot_reg(struct mtd_info *mtd, loff_t from,
3135 size_t len, size_t *retlen, u_char *buf)
3137 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_FACTORY);
3141 * onenand_get_user_prot_info - [MTD Interface] Read user OTP info
3142 * @param mtd MTD device structure
3143 * @param retlen pointer to variable to store the number of read bytes
3144 * @param len number of bytes to read
3145 * @param buf the databuffer to put/get data
3147 * Read user OTP info.
3149 static int onenand_get_user_prot_info(struct mtd_info *mtd, size_t len,
3150 size_t *retlen, struct otp_info *buf)
3152 return onenand_otp_walk(mtd, 0, len, retlen, (u_char *) buf, NULL,
3157 * onenand_read_user_prot_reg - [MTD Interface] Read user OTP area
3158 * @param mtd MTD device structure
3159 * @param from The offset to read
3160 * @param len number of bytes to read
3161 * @param retlen pointer to variable to store the number of read bytes
3162 * @param buf the databuffer to put/get data
3164 * Read user OTP area.
3166 static int onenand_read_user_prot_reg(struct mtd_info *mtd, loff_t from,
3167 size_t len, size_t *retlen, u_char *buf)
3169 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_USER);
3173 * onenand_write_user_prot_reg - [MTD Interface] Write user OTP area
3174 * @param mtd MTD device structure
3175 * @param from The offset to write
3176 * @param len number of bytes to write
3177 * @param retlen pointer to variable to store the number of write bytes
3178 * @param buf the databuffer to put/get data
3180 * Write user OTP area.
3182 static int onenand_write_user_prot_reg(struct mtd_info *mtd, loff_t from,
3183 size_t len, size_t *retlen, u_char *buf)
3185 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_write, MTD_OTP_USER);
3189 * onenand_lock_user_prot_reg - [MTD Interface] Lock user OTP area
3190 * @param mtd MTD device structure
3191 * @param from The offset to lock
3192 * @param len number of bytes to unlock
3194 * Write lock mark on spare area in page 0 in OTP block
3196 static int onenand_lock_user_prot_reg(struct mtd_info *mtd, loff_t from,
3199 struct onenand_chip *this = mtd->priv;
3200 u_char *buf = FLEXONENAND(this) ? this->page_buf : this->oob_buf;
3203 unsigned int otp_lock_offset = ONENAND_OTP_LOCK_OFFSET;
3205 memset(buf, 0xff, FLEXONENAND(this) ? this->writesize
3208 * Write lock mark to 8th word of sector0 of page0 of the spare0.
3209 * We write 16 bytes spare area instead of 2 bytes.
3210 * For Flex-OneNAND, we write lock mark to 1st word of sector 4 of
3211 * main area of page 49.
3215 len = FLEXONENAND(this) ? mtd->writesize : 16;