Merge tag 'acpi-5.1-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael...
[muen/linux.git] / drivers / usb / host / xhci-ring.c
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * xHCI host controller driver
4  *
5  * Copyright (C) 2008 Intel Corp.
6  *
7  * Author: Sarah Sharp
8  * Some code borrowed from the Linux EHCI driver.
9  */
10
11 /*
12  * Ring initialization rules:
13  * 1. Each segment is initialized to zero, except for link TRBs.
14  * 2. Ring cycle state = 0.  This represents Producer Cycle State (PCS) or
15  *    Consumer Cycle State (CCS), depending on ring function.
16  * 3. Enqueue pointer = dequeue pointer = address of first TRB in the segment.
17  *
18  * Ring behavior rules:
19  * 1. A ring is empty if enqueue == dequeue.  This means there will always be at
20  *    least one free TRB in the ring.  This is useful if you want to turn that
21  *    into a link TRB and expand the ring.
22  * 2. When incrementing an enqueue or dequeue pointer, if the next TRB is a
23  *    link TRB, then load the pointer with the address in the link TRB.  If the
24  *    link TRB had its toggle bit set, you may need to update the ring cycle
25  *    state (see cycle bit rules).  You may have to do this multiple times
26  *    until you reach a non-link TRB.
27  * 3. A ring is full if enqueue++ (for the definition of increment above)
28  *    equals the dequeue pointer.
29  *
30  * Cycle bit rules:
31  * 1. When a consumer increments a dequeue pointer and encounters a toggle bit
32  *    in a link TRB, it must toggle the ring cycle state.
33  * 2. When a producer increments an enqueue pointer and encounters a toggle bit
34  *    in a link TRB, it must toggle the ring cycle state.
35  *
36  * Producer rules:
37  * 1. Check if ring is full before you enqueue.
38  * 2. Write the ring cycle state to the cycle bit in the TRB you're enqueuing.
39  *    Update enqueue pointer between each write (which may update the ring
40  *    cycle state).
41  * 3. Notify consumer.  If SW is producer, it rings the doorbell for command
42  *    and endpoint rings.  If HC is the producer for the event ring,
43  *    and it generates an interrupt according to interrupt modulation rules.
44  *
45  * Consumer rules:
46  * 1. Check if TRB belongs to you.  If the cycle bit == your ring cycle state,
47  *    the TRB is owned by the consumer.
48  * 2. Update dequeue pointer (which may update the ring cycle state) and
49  *    continue processing TRBs until you reach a TRB which is not owned by you.
50  * 3. Notify the producer.  SW is the consumer for the event ring, and it
51  *   updates event ring dequeue pointer.  HC is the consumer for the command and
52  *   endpoint rings; it generates events on the event ring for these.
53  */
54
55 #include <linux/scatterlist.h>
56 #include <linux/slab.h>
57 #include <linux/dma-mapping.h>
58 #include "xhci.h"
59 #include "xhci-trace.h"
60 #include "xhci-mtk.h"
61
62 /*
63  * Returns zero if the TRB isn't in this segment, otherwise it returns the DMA
64  * address of the TRB.
65  */
66 dma_addr_t xhci_trb_virt_to_dma(struct xhci_segment *seg,
67                 union xhci_trb *trb)
68 {
69         unsigned long segment_offset;
70
71         if (!seg || !trb || trb < seg->trbs)
72                 return 0;
73         /* offset in TRBs */
74         segment_offset = trb - seg->trbs;
75         if (segment_offset >= TRBS_PER_SEGMENT)
76                 return 0;
77         return seg->dma + (segment_offset * sizeof(*trb));
78 }
79
80 static bool trb_is_noop(union xhci_trb *trb)
81 {
82         return TRB_TYPE_NOOP_LE32(trb->generic.field[3]);
83 }
84
85 static bool trb_is_link(union xhci_trb *trb)
86 {
87         return TRB_TYPE_LINK_LE32(trb->link.control);
88 }
89
90 static bool last_trb_on_seg(struct xhci_segment *seg, union xhci_trb *trb)
91 {
92         return trb == &seg->trbs[TRBS_PER_SEGMENT - 1];
93 }
94
95 static bool last_trb_on_ring(struct xhci_ring *ring,
96                         struct xhci_segment *seg, union xhci_trb *trb)
97 {
98         return last_trb_on_seg(seg, trb) && (seg->next == ring->first_seg);
99 }
100
101 static bool link_trb_toggles_cycle(union xhci_trb *trb)
102 {
103         return le32_to_cpu(trb->link.control) & LINK_TOGGLE;
104 }
105
106 static bool last_td_in_urb(struct xhci_td *td)
107 {
108         struct urb_priv *urb_priv = td->urb->hcpriv;
109
110         return urb_priv->num_tds_done == urb_priv->num_tds;
111 }
112
113 static void inc_td_cnt(struct urb *urb)
114 {
115         struct urb_priv *urb_priv = urb->hcpriv;
116
117         urb_priv->num_tds_done++;
118 }
119
120 static void trb_to_noop(union xhci_trb *trb, u32 noop_type)
121 {
122         if (trb_is_link(trb)) {
123                 /* unchain chained link TRBs */
124                 trb->link.control &= cpu_to_le32(~TRB_CHAIN);
125         } else {
126                 trb->generic.field[0] = 0;
127                 trb->generic.field[1] = 0;
128                 trb->generic.field[2] = 0;
129                 /* Preserve only the cycle bit of this TRB */
130                 trb->generic.field[3] &= cpu_to_le32(TRB_CYCLE);
131                 trb->generic.field[3] |= cpu_to_le32(TRB_TYPE(noop_type));
132         }
133 }
134
135 /* Updates trb to point to the next TRB in the ring, and updates seg if the next
136  * TRB is in a new segment.  This does not skip over link TRBs, and it does not
137  * effect the ring dequeue or enqueue pointers.
138  */
139 static void next_trb(struct xhci_hcd *xhci,
140                 struct xhci_ring *ring,
141                 struct xhci_segment **seg,
142                 union xhci_trb **trb)
143 {
144         if (trb_is_link(*trb)) {
145                 *seg = (*seg)->next;
146                 *trb = ((*seg)->trbs);
147         } else {
148                 (*trb)++;
149         }
150 }
151
152 /*
153  * See Cycle bit rules. SW is the consumer for the event ring only.
154  * Don't make a ring full of link TRBs.  That would be dumb and this would loop.
155  */
156 void inc_deq(struct xhci_hcd *xhci, struct xhci_ring *ring)
157 {
158         /* event ring doesn't have link trbs, check for last trb */
159         if (ring->type == TYPE_EVENT) {
160                 if (!last_trb_on_seg(ring->deq_seg, ring->dequeue)) {
161                         ring->dequeue++;
162                         goto out;
163                 }
164                 if (last_trb_on_ring(ring, ring->deq_seg, ring->dequeue))
165                         ring->cycle_state ^= 1;
166                 ring->deq_seg = ring->deq_seg->next;
167                 ring->dequeue = ring->deq_seg->trbs;
168                 goto out;
169         }
170
171         /* All other rings have link trbs */
172         if (!trb_is_link(ring->dequeue)) {
173                 ring->dequeue++;
174                 ring->num_trbs_free++;
175         }
176         while (trb_is_link(ring->dequeue)) {
177                 ring->deq_seg = ring->deq_seg->next;
178                 ring->dequeue = ring->deq_seg->trbs;
179         }
180
181 out:
182         trace_xhci_inc_deq(ring);
183
184         return;
185 }
186
187 /*
188  * See Cycle bit rules. SW is the consumer for the event ring only.
189  * Don't make a ring full of link TRBs.  That would be dumb and this would loop.
190  *
191  * If we've just enqueued a TRB that is in the middle of a TD (meaning the
192  * chain bit is set), then set the chain bit in all the following link TRBs.
193  * If we've enqueued the last TRB in a TD, make sure the following link TRBs
194  * have their chain bit cleared (so that each Link TRB is a separate TD).
195  *
196  * Section 6.4.4.1 of the 0.95 spec says link TRBs cannot have the chain bit
197  * set, but other sections talk about dealing with the chain bit set.  This was
198  * fixed in the 0.96 specification errata, but we have to assume that all 0.95
199  * xHCI hardware can't handle the chain bit being cleared on a link TRB.
200  *
201  * @more_trbs_coming:   Will you enqueue more TRBs before calling
202  *                      prepare_transfer()?
203  */
204 static void inc_enq(struct xhci_hcd *xhci, struct xhci_ring *ring,
205                         bool more_trbs_coming)
206 {
207         u32 chain;
208         union xhci_trb *next;
209
210         chain = le32_to_cpu(ring->enqueue->generic.field[3]) & TRB_CHAIN;
211         /* If this is not event ring, there is one less usable TRB */
212         if (!trb_is_link(ring->enqueue))
213                 ring->num_trbs_free--;
214         next = ++(ring->enqueue);
215
216         /* Update the dequeue pointer further if that was a link TRB */
217         while (trb_is_link(next)) {
218
219                 /*
220                  * If the caller doesn't plan on enqueueing more TDs before
221                  * ringing the doorbell, then we don't want to give the link TRB
222                  * to the hardware just yet. We'll give the link TRB back in
223                  * prepare_ring() just before we enqueue the TD at the top of
224                  * the ring.
225                  */
226                 if (!chain && !more_trbs_coming)
227                         break;
228
229                 /* If we're not dealing with 0.95 hardware or isoc rings on
230                  * AMD 0.96 host, carry over the chain bit of the previous TRB
231                  * (which may mean the chain bit is cleared).
232                  */
233                 if (!(ring->type == TYPE_ISOC &&
234                       (xhci->quirks & XHCI_AMD_0x96_HOST)) &&
235                     !xhci_link_trb_quirk(xhci)) {
236                         next->link.control &= cpu_to_le32(~TRB_CHAIN);
237                         next->link.control |= cpu_to_le32(chain);
238                 }
239                 /* Give this link TRB to the hardware */
240                 wmb();
241                 next->link.control ^= cpu_to_le32(TRB_CYCLE);
242
243                 /* Toggle the cycle bit after the last ring segment. */
244                 if (link_trb_toggles_cycle(next))
245                         ring->cycle_state ^= 1;
246
247                 ring->enq_seg = ring->enq_seg->next;
248                 ring->enqueue = ring->enq_seg->trbs;
249                 next = ring->enqueue;
250         }
251
252         trace_xhci_inc_enq(ring);
253 }
254
255 /*
256  * Check to see if there's room to enqueue num_trbs on the ring and make sure
257  * enqueue pointer will not advance into dequeue segment. See rules above.
258  */
259 static inline int room_on_ring(struct xhci_hcd *xhci, struct xhci_ring *ring,
260                 unsigned int num_trbs)
261 {
262         int num_trbs_in_deq_seg;
263
264         if (ring->num_trbs_free < num_trbs)
265                 return 0;
266
267         if (ring->type != TYPE_COMMAND && ring->type != TYPE_EVENT) {
268                 num_trbs_in_deq_seg = ring->dequeue - ring->deq_seg->trbs;
269                 if (ring->num_trbs_free < num_trbs + num_trbs_in_deq_seg)
270                         return 0;
271         }
272
273         return 1;
274 }
275
276 /* Ring the host controller doorbell after placing a command on the ring */
277 void xhci_ring_cmd_db(struct xhci_hcd *xhci)
278 {
279         if (!(xhci->cmd_ring_state & CMD_RING_STATE_RUNNING))
280                 return;
281
282         xhci_dbg(xhci, "// Ding dong!\n");
283         writel(DB_VALUE_HOST, &xhci->dba->doorbell[0]);
284         /* Flush PCI posted writes */
285         readl(&xhci->dba->doorbell[0]);
286 }
287
288 static bool xhci_mod_cmd_timer(struct xhci_hcd *xhci, unsigned long delay)
289 {
290         return mod_delayed_work(system_wq, &xhci->cmd_timer, delay);
291 }
292
293 static struct xhci_command *xhci_next_queued_cmd(struct xhci_hcd *xhci)
294 {
295         return list_first_entry_or_null(&xhci->cmd_list, struct xhci_command,
296                                         cmd_list);
297 }
298
299 /*
300  * Turn all commands on command ring with status set to "aborted" to no-op trbs.
301  * If there are other commands waiting then restart the ring and kick the timer.
302  * This must be called with command ring stopped and xhci->lock held.
303  */
304 static void xhci_handle_stopped_cmd_ring(struct xhci_hcd *xhci,
305                                          struct xhci_command *cur_cmd)
306 {
307         struct xhci_command *i_cmd;
308
309         /* Turn all aborted commands in list to no-ops, then restart */
310         list_for_each_entry(i_cmd, &xhci->cmd_list, cmd_list) {
311
312                 if (i_cmd->status != COMP_COMMAND_ABORTED)
313                         continue;
314
315                 i_cmd->status = COMP_COMMAND_RING_STOPPED;
316
317                 xhci_dbg(xhci, "Turn aborted command %p to no-op\n",
318                          i_cmd->command_trb);
319
320                 trb_to_noop(i_cmd->command_trb, TRB_CMD_NOOP);
321
322                 /*
323                  * caller waiting for completion is called when command
324                  *  completion event is received for these no-op commands
325                  */
326         }
327
328         xhci->cmd_ring_state = CMD_RING_STATE_RUNNING;
329
330         /* ring command ring doorbell to restart the command ring */
331         if ((xhci->cmd_ring->dequeue != xhci->cmd_ring->enqueue) &&
332             !(xhci->xhc_state & XHCI_STATE_DYING)) {
333                 xhci->current_cmd = cur_cmd;
334                 xhci_mod_cmd_timer(xhci, XHCI_CMD_DEFAULT_TIMEOUT);
335                 xhci_ring_cmd_db(xhci);
336         }
337 }
338
339 /* Must be called with xhci->lock held, releases and aquires lock back */
340 static int xhci_abort_cmd_ring(struct xhci_hcd *xhci, unsigned long flags)
341 {
342         u64 temp_64;
343         int ret;
344
345         xhci_dbg(xhci, "Abort command ring\n");
346
347         reinit_completion(&xhci->cmd_ring_stop_completion);
348
349         temp_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
350         xhci_write_64(xhci, temp_64 | CMD_RING_ABORT,
351                         &xhci->op_regs->cmd_ring);
352
353         /* Section 4.6.1.2 of xHCI 1.0 spec says software should also time the
354          * completion of the Command Abort operation. If CRR is not negated in 5
355          * seconds then driver handles it as if host died (-ENODEV).
356          * In the future we should distinguish between -ENODEV and -ETIMEDOUT
357          * and try to recover a -ETIMEDOUT with a host controller reset.
358          */
359         ret = xhci_handshake(&xhci->op_regs->cmd_ring,
360                         CMD_RING_RUNNING, 0, 5 * 1000 * 1000);
361         if (ret < 0) {
362                 xhci_err(xhci, "Abort failed to stop command ring: %d\n", ret);
363                 xhci_halt(xhci);
364                 xhci_hc_died(xhci);
365                 return ret;
366         }
367         /*
368          * Writing the CMD_RING_ABORT bit should cause a cmd completion event,
369          * however on some host hw the CMD_RING_RUNNING bit is correctly cleared
370          * but the completion event in never sent. Wait 2 secs (arbitrary
371          * number) to handle those cases after negation of CMD_RING_RUNNING.
372          */
373         spin_unlock_irqrestore(&xhci->lock, flags);
374         ret = wait_for_completion_timeout(&xhci->cmd_ring_stop_completion,
375                                           msecs_to_jiffies(2000));
376         spin_lock_irqsave(&xhci->lock, flags);
377         if (!ret) {
378                 xhci_dbg(xhci, "No stop event for abort, ring start fail?\n");
379                 xhci_cleanup_command_queue(xhci);
380         } else {
381                 xhci_handle_stopped_cmd_ring(xhci, xhci_next_queued_cmd(xhci));
382         }
383         return 0;
384 }
385
386 void xhci_ring_ep_doorbell(struct xhci_hcd *xhci,
387                 unsigned int slot_id,
388                 unsigned int ep_index,
389                 unsigned int stream_id)
390 {
391         __le32 __iomem *db_addr = &xhci->dba->doorbell[slot_id];
392         struct xhci_virt_ep *ep = &xhci->devs[slot_id]->eps[ep_index];
393         unsigned int ep_state = ep->ep_state;
394
395         /* Don't ring the doorbell for this endpoint if there are pending
396          * cancellations because we don't want to interrupt processing.
397          * We don't want to restart any stream rings if there's a set dequeue
398          * pointer command pending because the device can choose to start any
399          * stream once the endpoint is on the HW schedule.
400          */
401         if ((ep_state & EP_STOP_CMD_PENDING) || (ep_state & SET_DEQ_PENDING) ||
402             (ep_state & EP_HALTED))
403                 return;
404         writel(DB_VALUE(ep_index, stream_id), db_addr);
405         /* The CPU has better things to do at this point than wait for a
406          * write-posting flush.  It'll get there soon enough.
407          */
408 }
409
410 /* Ring the doorbell for any rings with pending URBs */
411 static void ring_doorbell_for_active_rings(struct xhci_hcd *xhci,
412                 unsigned int slot_id,
413                 unsigned int ep_index)
414 {
415         unsigned int stream_id;
416         struct xhci_virt_ep *ep;
417
418         ep = &xhci->devs[slot_id]->eps[ep_index];
419
420         /* A ring has pending URBs if its TD list is not empty */
421         if (!(ep->ep_state & EP_HAS_STREAMS)) {
422                 if (ep->ring && !(list_empty(&ep->ring->td_list)))
423                         xhci_ring_ep_doorbell(xhci, slot_id, ep_index, 0);
424                 return;
425         }
426
427         for (stream_id = 1; stream_id < ep->stream_info->num_streams;
428                         stream_id++) {
429                 struct xhci_stream_info *stream_info = ep->stream_info;
430                 if (!list_empty(&stream_info->stream_rings[stream_id]->td_list))
431                         xhci_ring_ep_doorbell(xhci, slot_id, ep_index,
432                                                 stream_id);
433         }
434 }
435
436 /* Get the right ring for the given slot_id, ep_index and stream_id.
437  * If the endpoint supports streams, boundary check the URB's stream ID.
438  * If the endpoint doesn't support streams, return the singular endpoint ring.
439  */
440 struct xhci_ring *xhci_triad_to_transfer_ring(struct xhci_hcd *xhci,
441                 unsigned int slot_id, unsigned int ep_index,
442                 unsigned int stream_id)
443 {
444         struct xhci_virt_ep *ep;
445
446         ep = &xhci->devs[slot_id]->eps[ep_index];
447         /* Common case: no streams */
448         if (!(ep->ep_state & EP_HAS_STREAMS))
449                 return ep->ring;
450
451         if (stream_id == 0) {
452                 xhci_warn(xhci,
453                                 "WARN: Slot ID %u, ep index %u has streams, "
454                                 "but URB has no stream ID.\n",
455                                 slot_id, ep_index);
456                 return NULL;
457         }
458
459         if (stream_id < ep->stream_info->num_streams)
460                 return ep->stream_info->stream_rings[stream_id];
461
462         xhci_warn(xhci,
463                         "WARN: Slot ID %u, ep index %u has "
464                         "stream IDs 1 to %u allocated, "
465                         "but stream ID %u is requested.\n",
466                         slot_id, ep_index,
467                         ep->stream_info->num_streams - 1,
468                         stream_id);
469         return NULL;
470 }
471
472
473 /*
474  * Get the hw dequeue pointer xHC stopped on, either directly from the
475  * endpoint context, or if streams are in use from the stream context.
476  * The returned hw_dequeue contains the lowest four bits with cycle state
477  * and possbile stream context type.
478  */
479 static u64 xhci_get_hw_deq(struct xhci_hcd *xhci, struct xhci_virt_device *vdev,
480                            unsigned int ep_index, unsigned int stream_id)
481 {
482         struct xhci_ep_ctx *ep_ctx;
483         struct xhci_stream_ctx *st_ctx;
484         struct xhci_virt_ep *ep;
485
486         ep = &vdev->eps[ep_index];
487
488         if (ep->ep_state & EP_HAS_STREAMS) {
489                 st_ctx = &ep->stream_info->stream_ctx_array[stream_id];
490                 return le64_to_cpu(st_ctx->stream_ring);
491         }
492         ep_ctx = xhci_get_ep_ctx(xhci, vdev->out_ctx, ep_index);
493         return le64_to_cpu(ep_ctx->deq);
494 }
495
496 /*
497  * Move the xHC's endpoint ring dequeue pointer past cur_td.
498  * Record the new state of the xHC's endpoint ring dequeue segment,
499  * dequeue pointer, stream id, and new consumer cycle state in state.
500  * Update our internal representation of the ring's dequeue pointer.
501  *
502  * We do this in three jumps:
503  *  - First we update our new ring state to be the same as when the xHC stopped.
504  *  - Then we traverse the ring to find the segment that contains
505  *    the last TRB in the TD.  We toggle the xHC's new cycle state when we pass
506  *    any link TRBs with the toggle cycle bit set.
507  *  - Finally we move the dequeue state one TRB further, toggling the cycle bit
508  *    if we've moved it past a link TRB with the toggle cycle bit set.
509  *
510  * Some of the uses of xhci_generic_trb are grotty, but if they're done
511  * with correct __le32 accesses they should work fine.  Only users of this are
512  * in here.
513  */
514 void xhci_find_new_dequeue_state(struct xhci_hcd *xhci,
515                 unsigned int slot_id, unsigned int ep_index,
516                 unsigned int stream_id, struct xhci_td *cur_td,
517                 struct xhci_dequeue_state *state)
518 {
519         struct xhci_virt_device *dev = xhci->devs[slot_id];
520         struct xhci_virt_ep *ep = &dev->eps[ep_index];
521         struct xhci_ring *ep_ring;
522         struct xhci_segment *new_seg;
523         union xhci_trb *new_deq;
524         dma_addr_t addr;
525         u64 hw_dequeue;
526         bool cycle_found = false;
527         bool td_last_trb_found = false;
528
529         ep_ring = xhci_triad_to_transfer_ring(xhci, slot_id,
530                         ep_index, stream_id);
531         if (!ep_ring) {
532                 xhci_warn(xhci, "WARN can't find new dequeue state "
533                                 "for invalid stream ID %u.\n",
534                                 stream_id);
535                 return;
536         }
537         /* Dig out the cycle state saved by the xHC during the stop ep cmd */
538         xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
539                         "Finding endpoint context");
540
541         hw_dequeue = xhci_get_hw_deq(xhci, dev, ep_index, stream_id);
542         new_seg = ep_ring->deq_seg;
543         new_deq = ep_ring->dequeue;
544         state->new_cycle_state = hw_dequeue & 0x1;
545         state->stream_id = stream_id;
546
547         /*
548          * We want to find the pointer, segment and cycle state of the new trb
549          * (the one after current TD's last_trb). We know the cycle state at
550          * hw_dequeue, so walk the ring until both hw_dequeue and last_trb are
551          * found.
552          */
553         do {
554                 if (!cycle_found && xhci_trb_virt_to_dma(new_seg, new_deq)
555                     == (dma_addr_t)(hw_dequeue & ~0xf)) {
556                         cycle_found = true;
557                         if (td_last_trb_found)
558                                 break;
559                 }
560                 if (new_deq == cur_td->last_trb)
561                         td_last_trb_found = true;
562
563                 if (cycle_found && trb_is_link(new_deq) &&
564                     link_trb_toggles_cycle(new_deq))
565                         state->new_cycle_state ^= 0x1;
566
567                 next_trb(xhci, ep_ring, &new_seg, &new_deq);
568
569                 /* Search wrapped around, bail out */
570                 if (new_deq == ep->ring->dequeue) {
571                         xhci_err(xhci, "Error: Failed finding new dequeue state\n");
572                         state->new_deq_seg = NULL;
573                         state->new_deq_ptr = NULL;
574                         return;
575                 }
576
577         } while (!cycle_found || !td_last_trb_found);
578
579         state->new_deq_seg = new_seg;
580         state->new_deq_ptr = new_deq;
581
582         /* Don't update the ring cycle state for the producer (us). */
583         xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
584                         "Cycle state = 0x%x", state->new_cycle_state);
585
586         xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
587                         "New dequeue segment = %p (virtual)",
588                         state->new_deq_seg);
589         addr = xhci_trb_virt_to_dma(state->new_deq_seg, state->new_deq_ptr);
590         xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
591                         "New dequeue pointer = 0x%llx (DMA)",
592                         (unsigned long long) addr);
593 }
594
595 /* flip_cycle means flip the cycle bit of all but the first and last TRB.
596  * (The last TRB actually points to the ring enqueue pointer, which is not part
597  * of this TD.)  This is used to remove partially enqueued isoc TDs from a ring.
598  */
599 static void td_to_noop(struct xhci_hcd *xhci, struct xhci_ring *ep_ring,
600                        struct xhci_td *td, bool flip_cycle)
601 {
602         struct xhci_segment *seg        = td->start_seg;
603         union xhci_trb *trb             = td->first_trb;
604
605         while (1) {
606                 trb_to_noop(trb, TRB_TR_NOOP);
607
608                 /* flip cycle if asked to */
609                 if (flip_cycle && trb != td->first_trb && trb != td->last_trb)
610                         trb->generic.field[3] ^= cpu_to_le32(TRB_CYCLE);
611
612                 if (trb == td->last_trb)
613                         break;
614
615                 next_trb(xhci, ep_ring, &seg, &trb);
616         }
617 }
618
619 static void xhci_stop_watchdog_timer_in_irq(struct xhci_hcd *xhci,
620                 struct xhci_virt_ep *ep)
621 {
622         ep->ep_state &= ~EP_STOP_CMD_PENDING;
623         /* Can't del_timer_sync in interrupt */
624         del_timer(&ep->stop_cmd_timer);
625 }
626
627 /*
628  * Must be called with xhci->lock held in interrupt context,
629  * releases and re-acquires xhci->lock
630  */
631 static void xhci_giveback_urb_in_irq(struct xhci_hcd *xhci,
632                                      struct xhci_td *cur_td, int status)
633 {
634         struct urb      *urb            = cur_td->urb;
635         struct urb_priv *urb_priv       = urb->hcpriv;
636         struct usb_hcd  *hcd            = bus_to_hcd(urb->dev->bus);
637
638         if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
639                 xhci_to_hcd(xhci)->self.bandwidth_isoc_reqs--;
640                 if (xhci_to_hcd(xhci)->self.bandwidth_isoc_reqs == 0) {
641                         if (xhci->quirks & XHCI_AMD_PLL_FIX)
642                                 usb_amd_quirk_pll_enable();
643                 }
644         }
645         xhci_urb_free_priv(urb_priv);
646         usb_hcd_unlink_urb_from_ep(hcd, urb);
647         spin_unlock(&xhci->lock);
648         trace_xhci_urb_giveback(urb);
649         usb_hcd_giveback_urb(hcd, urb, status);
650         spin_lock(&xhci->lock);
651 }
652
653 static void xhci_unmap_td_bounce_buffer(struct xhci_hcd *xhci,
654                 struct xhci_ring *ring, struct xhci_td *td)
655 {
656         struct device *dev = xhci_to_hcd(xhci)->self.controller;
657         struct xhci_segment *seg = td->bounce_seg;
658         struct urb *urb = td->urb;
659
660         if (!ring || !seg || !urb)
661                 return;
662
663         if (usb_urb_dir_out(urb)) {
664                 dma_unmap_single(dev, seg->bounce_dma, ring->bounce_buf_len,
665                                  DMA_TO_DEVICE);
666                 return;
667         }
668
669         /* for in tranfers we need to copy the data from bounce to sg */
670         sg_pcopy_from_buffer(urb->sg, urb->num_mapped_sgs, seg->bounce_buf,
671                              seg->bounce_len, seg->bounce_offs);
672         dma_unmap_single(dev, seg->bounce_dma, ring->bounce_buf_len,
673                          DMA_FROM_DEVICE);
674         seg->bounce_len = 0;
675         seg->bounce_offs = 0;
676 }
677
678 /*
679  * When we get a command completion for a Stop Endpoint Command, we need to
680  * unlink any cancelled TDs from the ring.  There are two ways to do that:
681  *
682  *  1. If the HW was in the middle of processing the TD that needs to be
683  *     cancelled, then we must move the ring's dequeue pointer past the last TRB
684  *     in the TD with a Set Dequeue Pointer Command.
685  *  2. Otherwise, we turn all the TRBs in the TD into No-op TRBs (with the chain
686  *     bit cleared) so that the HW will skip over them.
687  */
688 static void xhci_handle_cmd_stop_ep(struct xhci_hcd *xhci, int slot_id,
689                 union xhci_trb *trb, struct xhci_event_cmd *event)
690 {
691         unsigned int ep_index;
692         struct xhci_ring *ep_ring;
693         struct xhci_virt_ep *ep;
694         struct xhci_td *cur_td = NULL;
695         struct xhci_td *last_unlinked_td;
696         struct xhci_ep_ctx *ep_ctx;
697         struct xhci_virt_device *vdev;
698         u64 hw_deq;
699         struct xhci_dequeue_state deq_state;
700
701         if (unlikely(TRB_TO_SUSPEND_PORT(le32_to_cpu(trb->generic.field[3])))) {
702                 if (!xhci->devs[slot_id])
703                         xhci_warn(xhci, "Stop endpoint command "
704                                 "completion for disabled slot %u\n",
705                                 slot_id);
706                 return;
707         }
708
709         memset(&deq_state, 0, sizeof(deq_state));
710         ep_index = TRB_TO_EP_INDEX(le32_to_cpu(trb->generic.field[3]));
711
712         vdev = xhci->devs[slot_id];
713         ep_ctx = xhci_get_ep_ctx(xhci, vdev->out_ctx, ep_index);
714         trace_xhci_handle_cmd_stop_ep(ep_ctx);
715
716         ep = &xhci->devs[slot_id]->eps[ep_index];
717         last_unlinked_td = list_last_entry(&ep->cancelled_td_list,
718                         struct xhci_td, cancelled_td_list);
719
720         if (list_empty(&ep->cancelled_td_list)) {
721                 xhci_stop_watchdog_timer_in_irq(xhci, ep);
722                 ring_doorbell_for_active_rings(xhci, slot_id, ep_index);
723                 return;
724         }
725
726         /* Fix up the ep ring first, so HW stops executing cancelled TDs.
727          * We have the xHCI lock, so nothing can modify this list until we drop
728          * it.  We're also in the event handler, so we can't get re-interrupted
729          * if another Stop Endpoint command completes
730          */
731         list_for_each_entry(cur_td, &ep->cancelled_td_list, cancelled_td_list) {
732                 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
733                                 "Removing canceled TD starting at 0x%llx (dma).",
734                                 (unsigned long long)xhci_trb_virt_to_dma(
735                                         cur_td->start_seg, cur_td->first_trb));
736                 ep_ring = xhci_urb_to_transfer_ring(xhci, cur_td->urb);
737                 if (!ep_ring) {
738                         /* This shouldn't happen unless a driver is mucking
739                          * with the stream ID after submission.  This will
740                          * leave the TD on the hardware ring, and the hardware
741                          * will try to execute it, and may access a buffer
742                          * that has already been freed.  In the best case, the
743                          * hardware will execute it, and the event handler will
744                          * ignore the completion event for that TD, since it was
745                          * removed from the td_list for that endpoint.  In
746                          * short, don't muck with the stream ID after
747                          * submission.
748                          */
749                         xhci_warn(xhci, "WARN Cancelled URB %p "
750                                         "has invalid stream ID %u.\n",
751                                         cur_td->urb,
752                                         cur_td->urb->stream_id);
753                         goto remove_finished_td;
754                 }
755                 /*
756                  * If we stopped on the TD we need to cancel, then we have to
757                  * move the xHC endpoint ring dequeue pointer past this TD.
758                  */
759                 hw_deq = xhci_get_hw_deq(xhci, vdev, ep_index,
760                                          cur_td->urb->stream_id);
761                 hw_deq &= ~0xf;
762
763                 if (trb_in_td(xhci, cur_td->start_seg, cur_td->first_trb,
764                               cur_td->last_trb, hw_deq, false)) {
765                         xhci_find_new_dequeue_state(xhci, slot_id, ep_index,
766                                                     cur_td->urb->stream_id,
767                                                     cur_td, &deq_state);
768                 } else {
769                         td_to_noop(xhci, ep_ring, cur_td, false);
770                 }
771
772 remove_finished_td:
773                 /*
774                  * The event handler won't see a completion for this TD anymore,
775                  * so remove it from the endpoint ring's TD list.  Keep it in
776                  * the cancelled TD list for URB completion later.
777                  */
778                 list_del_init(&cur_td->td_list);
779         }
780
781         xhci_stop_watchdog_timer_in_irq(xhci, ep);
782
783         /* If necessary, queue a Set Transfer Ring Dequeue Pointer command */
784         if (deq_state.new_deq_ptr && deq_state.new_deq_seg) {
785                 xhci_queue_new_dequeue_state(xhci, slot_id, ep_index,
786                                              &deq_state);
787                 xhci_ring_cmd_db(xhci);
788         } else {
789                 /* Otherwise ring the doorbell(s) to restart queued transfers */
790                 ring_doorbell_for_active_rings(xhci, slot_id, ep_index);
791         }
792
793         /*
794          * Drop the lock and complete the URBs in the cancelled TD list.
795          * New TDs to be cancelled might be added to the end of the list before
796          * we can complete all the URBs for the TDs we already unlinked.
797          * So stop when we've completed the URB for the last TD we unlinked.
798          */
799         do {
800                 cur_td = list_first_entry(&ep->cancelled_td_list,
801                                 struct xhci_td, cancelled_td_list);
802                 list_del_init(&cur_td->cancelled_td_list);
803
804                 /* Clean up the cancelled URB */
805                 /* Doesn't matter what we pass for status, since the core will
806                  * just overwrite it (because the URB has been unlinked).
807                  */
808                 ep_ring = xhci_urb_to_transfer_ring(xhci, cur_td->urb);
809                 xhci_unmap_td_bounce_buffer(xhci, ep_ring, cur_td);
810                 inc_td_cnt(cur_td->urb);
811                 if (last_td_in_urb(cur_td))
812                         xhci_giveback_urb_in_irq(xhci, cur_td, 0);
813
814                 /* Stop processing the cancelled list if the watchdog timer is
815                  * running.
816                  */
817                 if (xhci->xhc_state & XHCI_STATE_DYING)
818                         return;
819         } while (cur_td != last_unlinked_td);
820
821         /* Return to the event handler with xhci->lock re-acquired */
822 }
823
824 static void xhci_kill_ring_urbs(struct xhci_hcd *xhci, struct xhci_ring *ring)
825 {
826         struct xhci_td *cur_td;
827         struct xhci_td *tmp;
828
829         list_for_each_entry_safe(cur_td, tmp, &ring->td_list, td_list) {
830                 list_del_init(&cur_td->td_list);
831
832                 if (!list_empty(&cur_td->cancelled_td_list))
833                         list_del_init(&cur_td->cancelled_td_list);
834
835                 xhci_unmap_td_bounce_buffer(xhci, ring, cur_td);
836
837                 inc_td_cnt(cur_td->urb);
838                 if (last_td_in_urb(cur_td))
839                         xhci_giveback_urb_in_irq(xhci, cur_td, -ESHUTDOWN);
840         }
841 }
842
843 static void xhci_kill_endpoint_urbs(struct xhci_hcd *xhci,
844                 int slot_id, int ep_index)
845 {
846         struct xhci_td *cur_td;
847         struct xhci_td *tmp;
848         struct xhci_virt_ep *ep;
849         struct xhci_ring *ring;
850
851         ep = &xhci->devs[slot_id]->eps[ep_index];
852         if ((ep->ep_state & EP_HAS_STREAMS) ||
853                         (ep->ep_state & EP_GETTING_NO_STREAMS)) {
854                 int stream_id;
855
856                 for (stream_id = 1; stream_id < ep->stream_info->num_streams;
857                                 stream_id++) {
858                         ring = ep->stream_info->stream_rings[stream_id];
859                         if (!ring)
860                                 continue;
861
862                         xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
863                                         "Killing URBs for slot ID %u, ep index %u, stream %u",
864                                         slot_id, ep_index, stream_id);
865                         xhci_kill_ring_urbs(xhci, ring);
866                 }
867         } else {
868                 ring = ep->ring;
869                 if (!ring)
870                         return;
871                 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
872                                 "Killing URBs for slot ID %u, ep index %u",
873                                 slot_id, ep_index);
874                 xhci_kill_ring_urbs(xhci, ring);
875         }
876
877         list_for_each_entry_safe(cur_td, tmp, &ep->cancelled_td_list,
878                         cancelled_td_list) {
879                 list_del_init(&cur_td->cancelled_td_list);
880                 inc_td_cnt(cur_td->urb);
881
882                 if (last_td_in_urb(cur_td))
883                         xhci_giveback_urb_in_irq(xhci, cur_td, -ESHUTDOWN);
884         }
885 }
886
887 /*
888  * host controller died, register read returns 0xffffffff
889  * Complete pending commands, mark them ABORTED.
890  * URBs need to be given back as usb core might be waiting with device locks
891  * held for the URBs to finish during device disconnect, blocking host remove.
892  *
893  * Call with xhci->lock held.
894  * lock is relased and re-acquired while giving back urb.
895  */
896 void xhci_hc_died(struct xhci_hcd *xhci)
897 {
898         int i, j;
899
900         if (xhci->xhc_state & XHCI_STATE_DYING)
901                 return;
902
903         xhci_err(xhci, "xHCI host controller not responding, assume dead\n");
904         xhci->xhc_state |= XHCI_STATE_DYING;
905
906         xhci_cleanup_command_queue(xhci);
907
908         /* return any pending urbs, remove may be waiting for them */
909         for (i = 0; i <= HCS_MAX_SLOTS(xhci->hcs_params1); i++) {
910                 if (!xhci->devs[i])
911                         continue;
912                 for (j = 0; j < 31; j++)
913                         xhci_kill_endpoint_urbs(xhci, i, j);
914         }
915
916         /* inform usb core hc died if PCI remove isn't already handling it */
917         if (!(xhci->xhc_state & XHCI_STATE_REMOVING))
918                 usb_hc_died(xhci_to_hcd(xhci));
919 }
920
921 /* Watchdog timer function for when a stop endpoint command fails to complete.
922  * In this case, we assume the host controller is broken or dying or dead.  The
923  * host may still be completing some other events, so we have to be careful to
924  * let the event ring handler and the URB dequeueing/enqueueing functions know
925  * through xhci->state.
926  *
927  * The timer may also fire if the host takes a very long time to respond to the
928  * command, and the stop endpoint command completion handler cannot delete the
929  * timer before the timer function is called.  Another endpoint cancellation may
930  * sneak in before the timer function can grab the lock, and that may queue
931  * another stop endpoint command and add the timer back.  So we cannot use a
932  * simple flag to say whether there is a pending stop endpoint command for a
933  * particular endpoint.
934  *
935  * Instead we use a combination of that flag and checking if a new timer is
936  * pending.
937  */
938 void xhci_stop_endpoint_command_watchdog(struct timer_list *t)
939 {
940         struct xhci_virt_ep *ep = from_timer(ep, t, stop_cmd_timer);
941         struct xhci_hcd *xhci = ep->xhci;
942         unsigned long flags;
943
944         spin_lock_irqsave(&xhci->lock, flags);
945
946         /* bail out if cmd completed but raced with stop ep watchdog timer.*/
947         if (!(ep->ep_state & EP_STOP_CMD_PENDING) ||
948             timer_pending(&ep->stop_cmd_timer)) {
949                 spin_unlock_irqrestore(&xhci->lock, flags);
950                 xhci_dbg(xhci, "Stop EP timer raced with cmd completion, exit");
951                 return;
952         }
953
954         xhci_warn(xhci, "xHCI host not responding to stop endpoint command.\n");
955         ep->ep_state &= ~EP_STOP_CMD_PENDING;
956
957         xhci_halt(xhci);
958
959         /*
960          * handle a stop endpoint cmd timeout as if host died (-ENODEV).
961          * In the future we could distinguish between -ENODEV and -ETIMEDOUT
962          * and try to recover a -ETIMEDOUT with a host controller reset
963          */
964         xhci_hc_died(xhci);
965
966         spin_unlock_irqrestore(&xhci->lock, flags);
967         xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
968                         "xHCI host controller is dead.");
969 }
970
971 static void update_ring_for_set_deq_completion(struct xhci_hcd *xhci,
972                 struct xhci_virt_device *dev,
973                 struct xhci_ring *ep_ring,
974                 unsigned int ep_index)
975 {
976         union xhci_trb *dequeue_temp;
977         int num_trbs_free_temp;
978         bool revert = false;
979
980         num_trbs_free_temp = ep_ring->num_trbs_free;
981         dequeue_temp = ep_ring->dequeue;
982
983         /* If we get two back-to-back stalls, and the first stalled transfer
984          * ends just before a link TRB, the dequeue pointer will be left on
985          * the link TRB by the code in the while loop.  So we have to update
986          * the dequeue pointer one segment further, or we'll jump off
987          * the segment into la-la-land.
988          */
989         if (trb_is_link(ep_ring->dequeue)) {
990                 ep_ring->deq_seg = ep_ring->deq_seg->next;
991                 ep_ring->dequeue = ep_ring->deq_seg->trbs;
992         }
993
994         while (ep_ring->dequeue != dev->eps[ep_index].queued_deq_ptr) {
995                 /* We have more usable TRBs */
996                 ep_ring->num_trbs_free++;
997                 ep_ring->dequeue++;
998                 if (trb_is_link(ep_ring->dequeue)) {
999                         if (ep_ring->dequeue ==
1000                                         dev->eps[ep_index].queued_deq_ptr)
1001                                 break;
1002                         ep_ring->deq_seg = ep_ring->deq_seg->next;
1003                         ep_ring->dequeue = ep_ring->deq_seg->trbs;
1004                 }
1005                 if (ep_ring->dequeue == dequeue_temp) {
1006                         revert = true;
1007                         break;
1008                 }
1009         }
1010
1011         if (revert) {
1012                 xhci_dbg(xhci, "Unable to find new dequeue pointer\n");
1013                 ep_ring->num_trbs_free = num_trbs_free_temp;
1014         }
1015 }
1016
1017 /*
1018  * When we get a completion for a Set Transfer Ring Dequeue Pointer command,
1019  * we need to clear the set deq pending flag in the endpoint ring state, so that
1020  * the TD queueing code can ring the doorbell again.  We also need to ring the
1021  * endpoint doorbell to restart the ring, but only if there aren't more
1022  * cancellations pending.
1023  */
1024 static void xhci_handle_cmd_set_deq(struct xhci_hcd *xhci, int slot_id,
1025                 union xhci_trb *trb, u32 cmd_comp_code)
1026 {
1027         unsigned int ep_index;
1028         unsigned int stream_id;
1029         struct xhci_ring *ep_ring;
1030         struct xhci_virt_device *dev;
1031         struct xhci_virt_ep *ep;
1032         struct xhci_ep_ctx *ep_ctx;
1033         struct xhci_slot_ctx *slot_ctx;
1034
1035         ep_index = TRB_TO_EP_INDEX(le32_to_cpu(trb->generic.field[3]));
1036         stream_id = TRB_TO_STREAM_ID(le32_to_cpu(trb->generic.field[2]));
1037         dev = xhci->devs[slot_id];
1038         ep = &dev->eps[ep_index];
1039
1040         ep_ring = xhci_stream_id_to_ring(dev, ep_index, stream_id);
1041         if (!ep_ring) {
1042                 xhci_warn(xhci, "WARN Set TR deq ptr command for freed stream ID %u\n",
1043                                 stream_id);
1044                 /* XXX: Harmless??? */
1045                 goto cleanup;
1046         }
1047
1048         ep_ctx = xhci_get_ep_ctx(xhci, dev->out_ctx, ep_index);
1049         slot_ctx = xhci_get_slot_ctx(xhci, dev->out_ctx);
1050         trace_xhci_handle_cmd_set_deq(slot_ctx);
1051         trace_xhci_handle_cmd_set_deq_ep(ep_ctx);
1052
1053         if (cmd_comp_code != COMP_SUCCESS) {
1054                 unsigned int ep_state;
1055                 unsigned int slot_state;
1056
1057                 switch (cmd_comp_code) {
1058                 case COMP_TRB_ERROR:
1059                         xhci_warn(xhci, "WARN Set TR Deq Ptr cmd invalid because of stream ID configuration\n");
1060                         break;
1061                 case COMP_CONTEXT_STATE_ERROR:
1062                         xhci_warn(xhci, "WARN Set TR Deq Ptr cmd failed due to incorrect slot or ep state.\n");
1063                         ep_state = GET_EP_CTX_STATE(ep_ctx);
1064                         slot_state = le32_to_cpu(slot_ctx->dev_state);
1065                         slot_state = GET_SLOT_STATE(slot_state);
1066                         xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1067                                         "Slot state = %u, EP state = %u",
1068                                         slot_state, ep_state);
1069                         break;
1070                 case COMP_SLOT_NOT_ENABLED_ERROR:
1071                         xhci_warn(xhci, "WARN Set TR Deq Ptr cmd failed because slot %u was not enabled.\n",
1072                                         slot_id);
1073                         break;
1074                 default:
1075                         xhci_warn(xhci, "WARN Set TR Deq Ptr cmd with unknown completion code of %u.\n",
1076                                         cmd_comp_code);
1077                         break;
1078                 }
1079                 /* OK what do we do now?  The endpoint state is hosed, and we
1080                  * should never get to this point if the synchronization between
1081                  * queueing, and endpoint state are correct.  This might happen
1082                  * if the device gets disconnected after we've finished
1083                  * cancelling URBs, which might not be an error...
1084                  */
1085         } else {
1086                 u64 deq;
1087                 /* 4.6.10 deq ptr is written to the stream ctx for streams */
1088                 if (ep->ep_state & EP_HAS_STREAMS) {
1089                         struct xhci_stream_ctx *ctx =
1090                                 &ep->stream_info->stream_ctx_array[stream_id];
1091                         deq = le64_to_cpu(ctx->stream_ring) & SCTX_DEQ_MASK;
1092                 } else {
1093                         deq = le64_to_cpu(ep_ctx->deq) & ~EP_CTX_CYCLE_MASK;
1094                 }
1095                 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1096                         "Successful Set TR Deq Ptr cmd, deq = @%08llx", deq);
1097                 if (xhci_trb_virt_to_dma(ep->queued_deq_seg,
1098                                          ep->queued_deq_ptr) == deq) {
1099                         /* Update the ring's dequeue segment and dequeue pointer
1100                          * to reflect the new position.
1101                          */
1102                         update_ring_for_set_deq_completion(xhci, dev,
1103                                 ep_ring, ep_index);
1104                 } else {
1105                         xhci_warn(xhci, "Mismatch between completed Set TR Deq Ptr command & xHCI internal state.\n");
1106                         xhci_warn(xhci, "ep deq seg = %p, deq ptr = %p\n",
1107                                   ep->queued_deq_seg, ep->queued_deq_ptr);
1108                 }
1109         }
1110
1111 cleanup:
1112         dev->eps[ep_index].ep_state &= ~SET_DEQ_PENDING;
1113         dev->eps[ep_index].queued_deq_seg = NULL;
1114         dev->eps[ep_index].queued_deq_ptr = NULL;
1115         /* Restart any rings with pending URBs */
1116         ring_doorbell_for_active_rings(xhci, slot_id, ep_index);
1117 }
1118
1119 static void xhci_handle_cmd_reset_ep(struct xhci_hcd *xhci, int slot_id,
1120                 union xhci_trb *trb, u32 cmd_comp_code)
1121 {
1122         struct xhci_virt_device *vdev;
1123         struct xhci_ep_ctx *ep_ctx;
1124         unsigned int ep_index;
1125
1126         ep_index = TRB_TO_EP_INDEX(le32_to_cpu(trb->generic.field[3]));
1127         vdev = xhci->devs[slot_id];
1128         ep_ctx = xhci_get_ep_ctx(xhci, vdev->out_ctx, ep_index);
1129         trace_xhci_handle_cmd_reset_ep(ep_ctx);
1130
1131         /* This command will only fail if the endpoint wasn't halted,
1132          * but we don't care.
1133          */
1134         xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
1135                 "Ignoring reset ep completion code of %u", cmd_comp_code);
1136
1137         /* HW with the reset endpoint quirk needs to have a configure endpoint
1138          * command complete before the endpoint can be used.  Queue that here
1139          * because the HW can't handle two commands being queued in a row.
1140          */
1141         if (xhci->quirks & XHCI_RESET_EP_QUIRK) {
1142                 struct xhci_command *command;
1143
1144                 command = xhci_alloc_command(xhci, false, GFP_ATOMIC);
1145                 if (!command)
1146                         return;
1147
1148                 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1149                                 "Queueing configure endpoint command");
1150                 xhci_queue_configure_endpoint(xhci, command,
1151                                 xhci->devs[slot_id]->in_ctx->dma, slot_id,
1152                                 false);
1153                 xhci_ring_cmd_db(xhci);
1154         } else {
1155                 /* Clear our internal halted state */
1156                 xhci->devs[slot_id]->eps[ep_index].ep_state &= ~EP_HALTED;
1157         }
1158
1159         /* if this was a soft reset, then restart */
1160         if ((le32_to_cpu(trb->generic.field[3])) & TRB_TSP)
1161                 ring_doorbell_for_active_rings(xhci, slot_id, ep_index);
1162 }
1163
1164 static void xhci_handle_cmd_enable_slot(struct xhci_hcd *xhci, int slot_id,
1165                 struct xhci_command *command, u32 cmd_comp_code)
1166 {
1167         if (cmd_comp_code == COMP_SUCCESS)
1168                 command->slot_id = slot_id;
1169         else
1170                 command->slot_id = 0;
1171 }
1172
1173 static void xhci_handle_cmd_disable_slot(struct xhci_hcd *xhci, int slot_id)
1174 {
1175         struct xhci_virt_device *virt_dev;
1176         struct xhci_slot_ctx *slot_ctx;
1177
1178         virt_dev = xhci->devs[slot_id];
1179         if (!virt_dev)
1180                 return;
1181
1182         slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
1183         trace_xhci_handle_cmd_disable_slot(slot_ctx);
1184
1185         if (xhci->quirks & XHCI_EP_LIMIT_QUIRK)
1186                 /* Delete default control endpoint resources */
1187                 xhci_free_device_endpoint_resources(xhci, virt_dev, true);
1188         xhci_free_virt_device(xhci, slot_id);
1189 }
1190
1191 static void xhci_handle_cmd_config_ep(struct xhci_hcd *xhci, int slot_id,
1192                 struct xhci_event_cmd *event, u32 cmd_comp_code)
1193 {
1194         struct xhci_virt_device *virt_dev;
1195         struct xhci_input_control_ctx *ctrl_ctx;
1196         struct xhci_ep_ctx *ep_ctx;
1197         unsigned int ep_index;
1198         unsigned int ep_state;
1199         u32 add_flags, drop_flags;
1200
1201         /*
1202          * Configure endpoint commands can come from the USB core
1203          * configuration or alt setting changes, or because the HW
1204          * needed an extra configure endpoint command after a reset
1205          * endpoint command or streams were being configured.
1206          * If the command was for a halted endpoint, the xHCI driver
1207          * is not waiting on the configure endpoint command.
1208          */
1209         virt_dev = xhci->devs[slot_id];
1210         ctrl_ctx = xhci_get_input_control_ctx(virt_dev->in_ctx);
1211         if (!ctrl_ctx) {
1212                 xhci_warn(xhci, "Could not get input context, bad type.\n");
1213                 return;
1214         }
1215
1216         add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1217         drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1218         /* Input ctx add_flags are the endpoint index plus one */
1219         ep_index = xhci_last_valid_endpoint(add_flags) - 1;
1220
1221         ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->out_ctx, ep_index);
1222         trace_xhci_handle_cmd_config_ep(ep_ctx);
1223
1224         /* A usb_set_interface() call directly after clearing a halted
1225          * condition may race on this quirky hardware.  Not worth
1226          * worrying about, since this is prototype hardware.  Not sure
1227          * if this will work for streams, but streams support was
1228          * untested on this prototype.
1229          */
1230         if (xhci->quirks & XHCI_RESET_EP_QUIRK &&
1231                         ep_index != (unsigned int) -1 &&
1232                         add_flags - SLOT_FLAG == drop_flags) {
1233                 ep_state = virt_dev->eps[ep_index].ep_state;
1234                 if (!(ep_state & EP_HALTED))
1235                         return;
1236                 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1237                                 "Completed config ep cmd - "
1238                                 "last ep index = %d, state = %d",
1239                                 ep_index, ep_state);
1240                 /* Clear internal halted state and restart ring(s) */
1241                 virt_dev->eps[ep_index].ep_state &= ~EP_HALTED;
1242                 ring_doorbell_for_active_rings(xhci, slot_id, ep_index);
1243                 return;
1244         }
1245         return;
1246 }
1247
1248 static void xhci_handle_cmd_addr_dev(struct xhci_hcd *xhci, int slot_id)
1249 {
1250         struct xhci_virt_device *vdev;
1251         struct xhci_slot_ctx *slot_ctx;
1252
1253         vdev = xhci->devs[slot_id];
1254         slot_ctx = xhci_get_slot_ctx(xhci, vdev->out_ctx);
1255         trace_xhci_handle_cmd_addr_dev(slot_ctx);
1256 }
1257
1258 static void xhci_handle_cmd_reset_dev(struct xhci_hcd *xhci, int slot_id,
1259                 struct xhci_event_cmd *event)
1260 {
1261         struct xhci_virt_device *vdev;
1262         struct xhci_slot_ctx *slot_ctx;
1263
1264         vdev = xhci->devs[slot_id];
1265         slot_ctx = xhci_get_slot_ctx(xhci, vdev->out_ctx);
1266         trace_xhci_handle_cmd_reset_dev(slot_ctx);
1267
1268         xhci_dbg(xhci, "Completed reset device command.\n");
1269         if (!xhci->devs[slot_id])
1270                 xhci_warn(xhci, "Reset device command completion "
1271                                 "for disabled slot %u\n", slot_id);
1272 }
1273
1274 static void xhci_handle_cmd_nec_get_fw(struct xhci_hcd *xhci,
1275                 struct xhci_event_cmd *event)
1276 {
1277         if (!(xhci->quirks & XHCI_NEC_HOST)) {
1278                 xhci_warn(xhci, "WARN NEC_GET_FW command on non-NEC host\n");
1279                 return;
1280         }
1281         xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1282                         "NEC firmware version %2x.%02x",
1283                         NEC_FW_MAJOR(le32_to_cpu(event->status)),
1284                         NEC_FW_MINOR(le32_to_cpu(event->status)));
1285 }
1286
1287 static void xhci_complete_del_and_free_cmd(struct xhci_command *cmd, u32 status)
1288 {
1289         list_del(&cmd->cmd_list);
1290
1291         if (cmd->completion) {
1292                 cmd->status = status;
1293                 complete(cmd->completion);
1294         } else {
1295                 kfree(cmd);
1296         }
1297 }
1298
1299 void xhci_cleanup_command_queue(struct xhci_hcd *xhci)
1300 {
1301         struct xhci_command *cur_cmd, *tmp_cmd;
1302         xhci->current_cmd = NULL;
1303         list_for_each_entry_safe(cur_cmd, tmp_cmd, &xhci->cmd_list, cmd_list)
1304                 xhci_complete_del_and_free_cmd(cur_cmd, COMP_COMMAND_ABORTED);
1305 }
1306
1307 void xhci_handle_command_timeout(struct work_struct *work)
1308 {
1309         struct xhci_hcd *xhci;
1310         unsigned long flags;
1311         u64 hw_ring_state;
1312
1313         xhci = container_of(to_delayed_work(work), struct xhci_hcd, cmd_timer);
1314
1315         spin_lock_irqsave(&xhci->lock, flags);
1316
1317         /*
1318          * If timeout work is pending, or current_cmd is NULL, it means we
1319          * raced with command completion. Command is handled so just return.
1320          */
1321         if (!xhci->current_cmd || delayed_work_pending(&xhci->cmd_timer)) {
1322                 spin_unlock_irqrestore(&xhci->lock, flags);
1323                 return;
1324         }
1325         /* mark this command to be cancelled */
1326         xhci->current_cmd->status = COMP_COMMAND_ABORTED;
1327
1328         /* Make sure command ring is running before aborting it */
1329         hw_ring_state = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
1330         if (hw_ring_state == ~(u64)0) {
1331                 xhci_hc_died(xhci);
1332                 goto time_out_completed;
1333         }
1334
1335         if ((xhci->cmd_ring_state & CMD_RING_STATE_RUNNING) &&
1336             (hw_ring_state & CMD_RING_RUNNING))  {
1337                 /* Prevent new doorbell, and start command abort */
1338                 xhci->cmd_ring_state = CMD_RING_STATE_ABORTED;
1339                 xhci_dbg(xhci, "Command timeout\n");
1340                 xhci_abort_cmd_ring(xhci, flags);
1341                 goto time_out_completed;
1342         }
1343
1344         /* host removed. Bail out */
1345         if (xhci->xhc_state & XHCI_STATE_REMOVING) {
1346                 xhci_dbg(xhci, "host removed, ring start fail?\n");
1347                 xhci_cleanup_command_queue(xhci);
1348
1349                 goto time_out_completed;
1350         }
1351
1352         /* command timeout on stopped ring, ring can't be aborted */
1353         xhci_dbg(xhci, "Command timeout on stopped ring\n");
1354         xhci_handle_stopped_cmd_ring(xhci, xhci->current_cmd);
1355
1356 time_out_completed:
1357         spin_unlock_irqrestore(&xhci->lock, flags);
1358         return;
1359 }
1360
1361 static void handle_cmd_completion(struct xhci_hcd *xhci,
1362                 struct xhci_event_cmd *event)
1363 {
1364         int slot_id = TRB_TO_SLOT_ID(le32_to_cpu(event->flags));
1365         u64 cmd_dma;
1366         dma_addr_t cmd_dequeue_dma;
1367         u32 cmd_comp_code;
1368         union xhci_trb *cmd_trb;
1369         struct xhci_command *cmd;
1370         u32 cmd_type;
1371
1372         cmd_dma = le64_to_cpu(event->cmd_trb);
1373         cmd_trb = xhci->cmd_ring->dequeue;
1374
1375         trace_xhci_handle_command(xhci->cmd_ring, &cmd_trb->generic);
1376
1377         cmd_dequeue_dma = xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg,
1378                         cmd_trb);
1379         /*
1380          * Check whether the completion event is for our internal kept
1381          * command.
1382          */
1383         if (!cmd_dequeue_dma || cmd_dma != (u64)cmd_dequeue_dma) {
1384                 xhci_warn(xhci,
1385                           "ERROR mismatched command completion event\n");
1386                 return;
1387         }
1388
1389         cmd = list_first_entry(&xhci->cmd_list, struct xhci_command, cmd_list);
1390
1391         cancel_delayed_work(&xhci->cmd_timer);
1392
1393         cmd_comp_code = GET_COMP_CODE(le32_to_cpu(event->status));
1394
1395         /* If CMD ring stopped we own the trbs between enqueue and dequeue */
1396         if (cmd_comp_code == COMP_COMMAND_RING_STOPPED) {
1397                 complete_all(&xhci->cmd_ring_stop_completion);
1398                 return;
1399         }
1400
1401         if (cmd->command_trb != xhci->cmd_ring->dequeue) {
1402                 xhci_err(xhci,
1403                          "Command completion event does not match command\n");
1404                 return;
1405         }
1406
1407         /*
1408          * Host aborted the command ring, check if the current command was
1409          * supposed to be aborted, otherwise continue normally.
1410          * The command ring is stopped now, but the xHC will issue a Command
1411          * Ring Stopped event which will cause us to restart it.
1412          */
1413         if (cmd_comp_code == COMP_COMMAND_ABORTED) {
1414                 xhci->cmd_ring_state = CMD_RING_STATE_STOPPED;
1415                 if (cmd->status == COMP_COMMAND_ABORTED) {
1416                         if (xhci->current_cmd == cmd)
1417                                 xhci->current_cmd = NULL;
1418                         goto event_handled;
1419                 }
1420         }
1421
1422         cmd_type = TRB_FIELD_TO_TYPE(le32_to_cpu(cmd_trb->generic.field[3]));
1423         switch (cmd_type) {
1424         case TRB_ENABLE_SLOT:
1425                 xhci_handle_cmd_enable_slot(xhci, slot_id, cmd, cmd_comp_code);
1426                 break;
1427         case TRB_DISABLE_SLOT:
1428                 xhci_handle_cmd_disable_slot(xhci, slot_id);
1429                 break;
1430         case TRB_CONFIG_EP:
1431                 if (!cmd->completion)
1432                         xhci_handle_cmd_config_ep(xhci, slot_id, event,
1433                                                   cmd_comp_code);
1434                 break;
1435         case TRB_EVAL_CONTEXT:
1436                 break;
1437         case TRB_ADDR_DEV:
1438                 xhci_handle_cmd_addr_dev(xhci, slot_id);
1439                 break;
1440         case TRB_STOP_RING:
1441                 WARN_ON(slot_id != TRB_TO_SLOT_ID(
1442                                 le32_to_cpu(cmd_trb->generic.field[3])));
1443                 if (!cmd->completion)
1444                         xhci_handle_cmd_stop_ep(xhci, slot_id, cmd_trb, event);
1445                 break;
1446         case TRB_SET_DEQ:
1447                 WARN_ON(slot_id != TRB_TO_SLOT_ID(
1448                                 le32_to_cpu(cmd_trb->generic.field[3])));
1449                 xhci_handle_cmd_set_deq(xhci, slot_id, cmd_trb, cmd_comp_code);
1450                 break;
1451         case TRB_CMD_NOOP:
1452                 /* Is this an aborted command turned to NO-OP? */
1453                 if (cmd->status == COMP_COMMAND_RING_STOPPED)
1454                         cmd_comp_code = COMP_COMMAND_RING_STOPPED;
1455                 break;
1456         case TRB_RESET_EP:
1457                 WARN_ON(slot_id != TRB_TO_SLOT_ID(
1458                                 le32_to_cpu(cmd_trb->generic.field[3])));
1459                 xhci_handle_cmd_reset_ep(xhci, slot_id, cmd_trb, cmd_comp_code);
1460                 break;
1461         case TRB_RESET_DEV:
1462                 /* SLOT_ID field in reset device cmd completion event TRB is 0.
1463                  * Use the SLOT_ID from the command TRB instead (xhci 4.6.11)
1464                  */
1465                 slot_id = TRB_TO_SLOT_ID(
1466                                 le32_to_cpu(cmd_trb->generic.field[3]));
1467                 xhci_handle_cmd_reset_dev(xhci, slot_id, event);
1468                 break;
1469         case TRB_NEC_GET_FW:
1470                 xhci_handle_cmd_nec_get_fw(xhci, event);
1471                 break;
1472         default:
1473                 /* Skip over unknown commands on the event ring */
1474                 xhci_info(xhci, "INFO unknown command type %d\n", cmd_type);
1475                 break;
1476         }
1477
1478         /* restart timer if this wasn't the last command */
1479         if (!list_is_singular(&xhci->cmd_list)) {
1480                 xhci->current_cmd = list_first_entry(&cmd->cmd_list,
1481                                                 struct xhci_command, cmd_list);
1482                 xhci_mod_cmd_timer(xhci, XHCI_CMD_DEFAULT_TIMEOUT);
1483         } else if (xhci->current_cmd == cmd) {
1484                 xhci->current_cmd = NULL;
1485         }
1486
1487 event_handled:
1488         xhci_complete_del_and_free_cmd(cmd, cmd_comp_code);
1489
1490         inc_deq(xhci, xhci->cmd_ring);
1491 }
1492
1493 static void handle_vendor_event(struct xhci_hcd *xhci,
1494                 union xhci_trb *event)
1495 {
1496         u32 trb_type;
1497
1498         trb_type = TRB_FIELD_TO_TYPE(le32_to_cpu(event->generic.field[3]));
1499         xhci_dbg(xhci, "Vendor specific event TRB type = %u\n", trb_type);
1500         if (trb_type == TRB_NEC_CMD_COMP && (xhci->quirks & XHCI_NEC_HOST))
1501                 handle_cmd_completion(xhci, &event->event_cmd);
1502 }
1503
1504 static void handle_device_notification(struct xhci_hcd *xhci,
1505                 union xhci_trb *event)
1506 {
1507         u32 slot_id;
1508         struct usb_device *udev;
1509
1510         slot_id = TRB_TO_SLOT_ID(le32_to_cpu(event->generic.field[3]));
1511         if (!xhci->devs[slot_id]) {
1512                 xhci_warn(xhci, "Device Notification event for "
1513                                 "unused slot %u\n", slot_id);
1514                 return;
1515         }
1516
1517         xhci_dbg(xhci, "Device Wake Notification event for slot ID %u\n",
1518                         slot_id);
1519         udev = xhci->devs[slot_id]->udev;
1520         if (udev && udev->parent)
1521                 usb_wakeup_notification(udev->parent, udev->portnum);
1522 }
1523
1524 /*
1525  * Quirk hanlder for errata seen on Cavium ThunderX2 processor XHCI
1526  * Controller.
1527  * As per ThunderX2errata-129 USB 2 device may come up as USB 1
1528  * If a connection to a USB 1 device is followed by another connection
1529  * to a USB 2 device.
1530  *
1531  * Reset the PHY after the USB device is disconnected if device speed
1532  * is less than HCD_USB3.
1533  * Retry the reset sequence max of 4 times checking the PLL lock status.
1534  *
1535  */
1536 static void xhci_cavium_reset_phy_quirk(struct xhci_hcd *xhci)
1537 {
1538         struct usb_hcd *hcd = xhci_to_hcd(xhci);
1539         u32 pll_lock_check;
1540         u32 retry_count = 4;
1541
1542         do {
1543                 /* Assert PHY reset */
1544                 writel(0x6F, hcd->regs + 0x1048);
1545                 udelay(10);
1546                 /* De-assert the PHY reset */
1547                 writel(0x7F, hcd->regs + 0x1048);
1548                 udelay(200);
1549                 pll_lock_check = readl(hcd->regs + 0x1070);
1550         } while (!(pll_lock_check & 0x1) && --retry_count);
1551 }
1552
1553 static void handle_port_status(struct xhci_hcd *xhci,
1554                 union xhci_trb *event)
1555 {
1556         struct usb_hcd *hcd;
1557         u32 port_id;
1558         u32 portsc, cmd_reg;
1559         int max_ports;
1560         int slot_id;
1561         unsigned int hcd_portnum;
1562         struct xhci_bus_state *bus_state;
1563         bool bogus_port_status = false;
1564         struct xhci_port *port;
1565
1566         /* Port status change events always have a successful completion code */
1567         if (GET_COMP_CODE(le32_to_cpu(event->generic.field[2])) != COMP_SUCCESS)
1568                 xhci_warn(xhci,
1569                           "WARN: xHC returned failed port status event\n");
1570
1571         port_id = GET_PORT_ID(le32_to_cpu(event->generic.field[0]));
1572         xhci_dbg(xhci, "Port Status Change Event for port %d\n", port_id);
1573
1574         max_ports = HCS_MAX_PORTS(xhci->hcs_params1);
1575         if ((port_id <= 0) || (port_id > max_ports)) {
1576                 xhci_warn(xhci, "Invalid port id %d\n", port_id);
1577                 inc_deq(xhci, xhci->event_ring);
1578                 return;
1579         }
1580
1581         port = &xhci->hw_ports[port_id - 1];
1582         if (!port || !port->rhub || port->hcd_portnum == DUPLICATE_ENTRY) {
1583                 xhci_warn(xhci, "Event for invalid port %u\n", port_id);
1584                 bogus_port_status = true;
1585                 goto cleanup;
1586         }
1587
1588         /* We might get interrupts after shared_hcd is removed */
1589         if (port->rhub == &xhci->usb3_rhub && xhci->shared_hcd == NULL) {
1590                 xhci_dbg(xhci, "ignore port event for removed USB3 hcd\n");
1591                 bogus_port_status = true;
1592                 goto cleanup;
1593         }
1594
1595         hcd = port->rhub->hcd;
1596         bus_state = &port->rhub->bus_state;
1597         hcd_portnum = port->hcd_portnum;
1598         portsc = readl(port->addr);
1599
1600         trace_xhci_handle_port_status(hcd_portnum, portsc);
1601
1602         if (hcd->state == HC_STATE_SUSPENDED) {
1603                 xhci_dbg(xhci, "resume root hub\n");
1604                 usb_hcd_resume_root_hub(hcd);
1605         }
1606
1607         if (hcd->speed >= HCD_USB3 && (portsc & PORT_PLS_MASK) == XDEV_INACTIVE)
1608                 bus_state->port_remote_wakeup &= ~(1 << hcd_portnum);
1609
1610         if ((portsc & PORT_PLC) && (portsc & PORT_PLS_MASK) == XDEV_RESUME) {
1611                 xhci_dbg(xhci, "port resume event for port %d\n", port_id);
1612
1613                 cmd_reg = readl(&xhci->op_regs->command);
1614                 if (!(cmd_reg & CMD_RUN)) {
1615                         xhci_warn(xhci, "xHC is not running.\n");
1616                         goto cleanup;
1617                 }
1618
1619                 if (DEV_SUPERSPEED_ANY(portsc)) {
1620                         xhci_dbg(xhci, "remote wake SS port %d\n", port_id);
1621                         /* Set a flag to say the port signaled remote wakeup,
1622                          * so we can tell the difference between the end of
1623                          * device and host initiated resume.
1624                          */
1625                         bus_state->port_remote_wakeup |= 1 << hcd_portnum;
1626                         xhci_test_and_clear_bit(xhci, port, PORT_PLC);
1627                         xhci_set_link_state(xhci, port, XDEV_U0);
1628                         /* Need to wait until the next link state change
1629                          * indicates the device is actually in U0.
1630                          */
1631                         bogus_port_status = true;
1632                         goto cleanup;
1633                 } else if (!test_bit(hcd_portnum, &bus_state->resuming_ports)) {
1634                         xhci_dbg(xhci, "resume HS port %d\n", port_id);
1635                         bus_state->resume_done[hcd_portnum] = jiffies +
1636                                 msecs_to_jiffies(USB_RESUME_TIMEOUT);
1637                         set_bit(hcd_portnum, &bus_state->resuming_ports);
1638                         /* Do the rest in GetPortStatus after resume time delay.
1639                          * Avoid polling roothub status before that so that a
1640                          * usb device auto-resume latency around ~40ms.
1641                          */
1642                         set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
1643                         mod_timer(&hcd->rh_timer,
1644                                   bus_state->resume_done[hcd_portnum]);
1645                         usb_hcd_start_port_resume(&hcd->self, hcd_portnum);
1646                         bogus_port_status = true;
1647                 }
1648         }
1649
1650         if ((portsc & PORT_PLC) && (portsc & PORT_PLS_MASK) == XDEV_U0 &&
1651                         DEV_SUPERSPEED_ANY(portsc)) {
1652                 xhci_dbg(xhci, "resume SS port %d finished\n", port_id);
1653                 /* We've just brought the device into U0 through either the
1654                  * Resume state after a device remote wakeup, or through the
1655                  * U3Exit state after a host-initiated resume.  If it's a device
1656                  * initiated remote wake, don't pass up the link state change,
1657                  * so the roothub behavior is consistent with external
1658                  * USB 3.0 hub behavior.
1659                  */
1660                 slot_id = xhci_find_slot_id_by_port(hcd, xhci, hcd_portnum + 1);
1661                 if (slot_id && xhci->devs[slot_id])
1662                         xhci_ring_device(xhci, slot_id);
1663                 if (bus_state->port_remote_wakeup & (1 << hcd_portnum)) {
1664                         bus_state->port_remote_wakeup &= ~(1 << hcd_portnum);
1665                         xhci_test_and_clear_bit(xhci, port, PORT_PLC);
1666                         usb_wakeup_notification(hcd->self.root_hub,
1667                                         hcd_portnum + 1);
1668                         bogus_port_status = true;
1669                         goto cleanup;
1670                 }
1671         }
1672
1673         /*
1674          * Check to see if xhci-hub.c is waiting on RExit to U0 transition (or
1675          * RExit to a disconnect state).  If so, let the the driver know it's
1676          * out of the RExit state.
1677          */
1678         if (!DEV_SUPERSPEED_ANY(portsc) && hcd->speed < HCD_USB3 &&
1679                         test_and_clear_bit(hcd_portnum,
1680                                 &bus_state->rexit_ports)) {
1681                 complete(&bus_state->rexit_done[hcd_portnum]);
1682                 bogus_port_status = true;
1683                 goto cleanup;
1684         }
1685
1686         if (hcd->speed < HCD_USB3) {
1687                 xhci_test_and_clear_bit(xhci, port, PORT_PLC);
1688                 if ((xhci->quirks & XHCI_RESET_PLL_ON_DISCONNECT) &&
1689                     (portsc & PORT_CSC) && !(portsc & PORT_CONNECT))
1690                         xhci_cavium_reset_phy_quirk(xhci);
1691         }
1692
1693 cleanup:
1694         /* Update event ring dequeue pointer before dropping the lock */
1695         inc_deq(xhci, xhci->event_ring);
1696
1697         /* Don't make the USB core poll the roothub if we got a bad port status
1698          * change event.  Besides, at that point we can't tell which roothub
1699          * (USB 2.0 or USB 3.0) to kick.
1700          */
1701         if (bogus_port_status)
1702                 return;
1703
1704         /*
1705          * xHCI port-status-change events occur when the "or" of all the
1706          * status-change bits in the portsc register changes from 0 to 1.
1707          * New status changes won't cause an event if any other change
1708          * bits are still set.  When an event occurs, switch over to
1709          * polling to avoid losing status changes.
1710          */
1711         xhci_dbg(xhci, "%s: starting port polling.\n", __func__);
1712         set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
1713         spin_unlock(&xhci->lock);
1714         /* Pass this up to the core */
1715         usb_hcd_poll_rh_status(hcd);
1716         spin_lock(&xhci->lock);
1717 }
1718
1719 /*
1720  * This TD is defined by the TRBs starting at start_trb in start_seg and ending
1721  * at end_trb, which may be in another segment.  If the suspect DMA address is a
1722  * TRB in this TD, this function returns that TRB's segment.  Otherwise it
1723  * returns 0.
1724  */
1725 struct xhci_segment *trb_in_td(struct xhci_hcd *xhci,
1726                 struct xhci_segment *start_seg,
1727                 union xhci_trb  *start_trb,
1728                 union xhci_trb  *end_trb,
1729                 dma_addr_t      suspect_dma,
1730                 bool            debug)
1731 {
1732         dma_addr_t start_dma;
1733         dma_addr_t end_seg_dma;
1734         dma_addr_t end_trb_dma;
1735         struct xhci_segment *cur_seg;
1736
1737         start_dma = xhci_trb_virt_to_dma(start_seg, start_trb);
1738         cur_seg = start_seg;
1739
1740         do {
1741                 if (start_dma == 0)
1742                         return NULL;
1743                 /* We may get an event for a Link TRB in the middle of a TD */
1744                 end_seg_dma = xhci_trb_virt_to_dma(cur_seg,
1745                                 &cur_seg->trbs[TRBS_PER_SEGMENT - 1]);
1746                 /* If the end TRB isn't in this segment, this is set to 0 */
1747                 end_trb_dma = xhci_trb_virt_to_dma(cur_seg, end_trb);
1748
1749                 if (debug)
1750                         xhci_warn(xhci,
1751                                 "Looking for event-dma %016llx trb-start %016llx trb-end %016llx seg-start %016llx seg-end %016llx\n",
1752                                 (unsigned long long)suspect_dma,
1753                                 (unsigned long long)start_dma,
1754                                 (unsigned long long)end_trb_dma,
1755                                 (unsigned long long)cur_seg->dma,
1756                                 (unsigned long long)end_seg_dma);
1757
1758                 if (end_trb_dma > 0) {
1759                         /* The end TRB is in this segment, so suspect should be here */
1760                         if (start_dma <= end_trb_dma) {
1761                                 if (suspect_dma >= start_dma && suspect_dma <= end_trb_dma)
1762                                         return cur_seg;
1763                         } else {
1764                                 /* Case for one segment with
1765                                  * a TD wrapped around to the top
1766                                  */
1767                                 if ((suspect_dma >= start_dma &&
1768                                                         suspect_dma <= end_seg_dma) ||
1769                                                 (suspect_dma >= cur_seg->dma &&
1770                                                  suspect_dma <= end_trb_dma))
1771                                         return cur_seg;
1772                         }
1773                         return NULL;
1774                 } else {
1775                         /* Might still be somewhere in this segment */
1776                         if (suspect_dma >= start_dma && suspect_dma <= end_seg_dma)
1777                                 return cur_seg;
1778                 }
1779                 cur_seg = cur_seg->next;
1780                 start_dma = xhci_trb_virt_to_dma(cur_seg, &cur_seg->trbs[0]);
1781         } while (cur_seg != start_seg);
1782
1783         return NULL;
1784 }
1785
1786 static void xhci_cleanup_halted_endpoint(struct xhci_hcd *xhci,
1787                 unsigned int slot_id, unsigned int ep_index,
1788                 unsigned int stream_id, struct xhci_td *td,
1789                 enum xhci_ep_reset_type reset_type)
1790 {
1791         struct xhci_virt_ep *ep = &xhci->devs[slot_id]->eps[ep_index];
1792         struct xhci_command *command;
1793         command = xhci_alloc_command(xhci, false, GFP_ATOMIC);
1794         if (!command)
1795                 return;
1796
1797         ep->ep_state |= EP_HALTED;
1798
1799         xhci_queue_reset_ep(xhci, command, slot_id, ep_index, reset_type);
1800
1801         if (reset_type == EP_HARD_RESET) {
1802                 ep->ep_state |= EP_HARD_CLEAR_TOGGLE;
1803                 xhci_cleanup_stalled_ring(xhci, ep_index, stream_id, td);
1804         }
1805         xhci_ring_cmd_db(xhci);
1806 }
1807
1808 /* Check if an error has halted the endpoint ring.  The class driver will
1809  * cleanup the halt for a non-default control endpoint if we indicate a stall.
1810  * However, a babble and other errors also halt the endpoint ring, and the class
1811  * driver won't clear the halt in that case, so we need to issue a Set Transfer
1812  * Ring Dequeue Pointer command manually.
1813  */
1814 static int xhci_requires_manual_halt_cleanup(struct xhci_hcd *xhci,
1815                 struct xhci_ep_ctx *ep_ctx,
1816                 unsigned int trb_comp_code)
1817 {
1818         /* TRB completion codes that may require a manual halt cleanup */
1819         if (trb_comp_code == COMP_USB_TRANSACTION_ERROR ||
1820                         trb_comp_code == COMP_BABBLE_DETECTED_ERROR ||
1821                         trb_comp_code == COMP_SPLIT_TRANSACTION_ERROR)
1822                 /* The 0.95 spec says a babbling control endpoint
1823                  * is not halted. The 0.96 spec says it is.  Some HW
1824                  * claims to be 0.95 compliant, but it halts the control
1825                  * endpoint anyway.  Check if a babble halted the
1826                  * endpoint.
1827                  */
1828                 if (GET_EP_CTX_STATE(ep_ctx) == EP_STATE_HALTED)
1829                         return 1;
1830
1831         return 0;
1832 }
1833
1834 int xhci_is_vendor_info_code(struct xhci_hcd *xhci, unsigned int trb_comp_code)
1835 {
1836         if (trb_comp_code >= 224 && trb_comp_code <= 255) {
1837                 /* Vendor defined "informational" completion code,
1838                  * treat as not-an-error.
1839                  */
1840                 xhci_dbg(xhci, "Vendor defined info completion code %u\n",
1841                                 trb_comp_code);
1842                 xhci_dbg(xhci, "Treating code as success.\n");
1843                 return 1;
1844         }
1845         return 0;
1846 }
1847
1848 static int xhci_td_cleanup(struct xhci_hcd *xhci, struct xhci_td *td,
1849                 struct xhci_ring *ep_ring, int *status)
1850 {
1851         struct urb *urb = NULL;
1852
1853         /* Clean up the endpoint's TD list */
1854         urb = td->urb;
1855
1856         /* if a bounce buffer was used to align this td then unmap it */
1857         xhci_unmap_td_bounce_buffer(xhci, ep_ring, td);
1858
1859         /* Do one last check of the actual transfer length.
1860          * If the host controller said we transferred more data than the buffer
1861          * length, urb->actual_length will be a very big number (since it's
1862          * unsigned).  Play it safe and say we didn't transfer anything.
1863          */
1864         if (urb->actual_length > urb->transfer_buffer_length) {
1865                 xhci_warn(xhci, "URB req %u and actual %u transfer length mismatch\n",
1866                           urb->transfer_buffer_length, urb->actual_length);
1867                 urb->actual_length = 0;
1868                 *status = 0;
1869         }
1870         list_del_init(&td->td_list);
1871         /* Was this TD slated to be cancelled but completed anyway? */
1872         if (!list_empty(&td->cancelled_td_list))
1873                 list_del_init(&td->cancelled_td_list);
1874
1875         inc_td_cnt(urb);
1876         /* Giveback the urb when all the tds are completed */
1877         if (last_td_in_urb(td)) {
1878                 if ((urb->actual_length != urb->transfer_buffer_length &&
1879                      (urb->transfer_flags & URB_SHORT_NOT_OK)) ||
1880                     (*status != 0 && !usb_endpoint_xfer_isoc(&urb->ep->desc)))
1881                         xhci_dbg(xhci, "Giveback URB %p, len = %d, expected = %d, status = %d\n",
1882                                  urb, urb->actual_length,
1883                                  urb->transfer_buffer_length, *status);
1884
1885                 /* set isoc urb status to 0 just as EHCI, UHCI, and OHCI */
1886                 if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS)
1887                         *status = 0;
1888                 xhci_giveback_urb_in_irq(xhci, td, *status);
1889         }
1890
1891         return 0;
1892 }
1893
1894 static int finish_td(struct xhci_hcd *xhci, struct xhci_td *td,
1895         struct xhci_transfer_event *event,
1896         struct xhci_virt_ep *ep, int *status)
1897 {
1898         struct xhci_virt_device *xdev;
1899         struct xhci_ep_ctx *ep_ctx;
1900         struct xhci_ring *ep_ring;
1901         unsigned int slot_id;
1902         u32 trb_comp_code;
1903         int ep_index;
1904
1905         slot_id = TRB_TO_SLOT_ID(le32_to_cpu(event->flags));
1906         xdev = xhci->devs[slot_id];
1907         ep_index = TRB_TO_EP_ID(le32_to_cpu(event->flags)) - 1;
1908         ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer));
1909         ep_ctx = xhci_get_ep_ctx(xhci, xdev->out_ctx, ep_index);
1910         trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len));
1911
1912         if (trb_comp_code == COMP_STOPPED_LENGTH_INVALID ||
1913                         trb_comp_code == COMP_STOPPED ||
1914                         trb_comp_code == COMP_STOPPED_SHORT_PACKET) {
1915                 /* The Endpoint Stop Command completion will take care of any
1916                  * stopped TDs.  A stopped TD may be restarted, so don't update
1917                  * the ring dequeue pointer or take this TD off any lists yet.
1918                  */
1919                 return 0;
1920         }
1921         if (trb_comp_code == COMP_STALL_ERROR ||
1922                 xhci_requires_manual_halt_cleanup(xhci, ep_ctx,
1923                                                 trb_comp_code)) {
1924                 /* Issue a reset endpoint command to clear the host side
1925                  * halt, followed by a set dequeue command to move the
1926                  * dequeue pointer past the TD.
1927                  * The class driver clears the device side halt later.
1928                  */
1929                 xhci_cleanup_halted_endpoint(xhci, slot_id, ep_index,
1930                                         ep_ring->stream_id, td, EP_HARD_RESET);
1931         } else {
1932                 /* Update ring dequeue pointer */
1933                 while (ep_ring->dequeue != td->last_trb)
1934                         inc_deq(xhci, ep_ring);
1935                 inc_deq(xhci, ep_ring);
1936         }
1937
1938         return xhci_td_cleanup(xhci, td, ep_ring, status);
1939 }
1940
1941 /* sum trb lengths from ring dequeue up to stop_trb, _excluding_ stop_trb */
1942 static int sum_trb_lengths(struct xhci_hcd *xhci, struct xhci_ring *ring,
1943                            union xhci_trb *stop_trb)
1944 {
1945         u32 sum;
1946         union xhci_trb *trb = ring->dequeue;
1947         struct xhci_segment *seg = ring->deq_seg;
1948
1949         for (sum = 0; trb != stop_trb; next_trb(xhci, ring, &seg, &trb)) {
1950                 if (!trb_is_noop(trb) && !trb_is_link(trb))
1951                         sum += TRB_LEN(le32_to_cpu(trb->generic.field[2]));
1952         }
1953         return sum;
1954 }
1955
1956 /*
1957  * Process control tds, update urb status and actual_length.
1958  */
1959 static int process_ctrl_td(struct xhci_hcd *xhci, struct xhci_td *td,
1960         union xhci_trb *ep_trb, struct xhci_transfer_event *event,
1961         struct xhci_virt_ep *ep, int *status)
1962 {
1963         struct xhci_virt_device *xdev;
1964         unsigned int slot_id;
1965         int ep_index;
1966         struct xhci_ep_ctx *ep_ctx;
1967         u32 trb_comp_code;
1968         u32 remaining, requested;
1969         u32 trb_type;
1970
1971         trb_type = TRB_FIELD_TO_TYPE(le32_to_cpu(ep_trb->generic.field[3]));
1972         slot_id = TRB_TO_SLOT_ID(le32_to_cpu(event->flags));
1973         xdev = xhci->devs[slot_id];
1974         ep_index = TRB_TO_EP_ID(le32_to_cpu(event->flags)) - 1;
1975         ep_ctx = xhci_get_ep_ctx(xhci, xdev->out_ctx, ep_index);
1976         trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len));
1977         requested = td->urb->transfer_buffer_length;
1978         remaining = EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
1979
1980         switch (trb_comp_code) {
1981         case COMP_SUCCESS:
1982                 if (trb_type != TRB_STATUS) {
1983                         xhci_warn(xhci, "WARN: Success on ctrl %s TRB without IOC set?\n",
1984                                   (trb_type == TRB_DATA) ? "data" : "setup");
1985                         *status = -ESHUTDOWN;
1986                         break;
1987                 }
1988                 *status = 0;
1989                 break;
1990         case COMP_SHORT_PACKET:
1991                 *status = 0;
1992                 break;
1993         case COMP_STOPPED_SHORT_PACKET:
1994                 if (trb_type == TRB_DATA || trb_type == TRB_NORMAL)
1995                         td->urb->actual_length = remaining;
1996                 else
1997                         xhci_warn(xhci, "WARN: Stopped Short Packet on ctrl setup or status TRB\n");
1998                 goto finish_td;
1999         case COMP_STOPPED:
2000                 switch (trb_type) {
2001                 case TRB_SETUP:
2002                         td->urb->actual_length = 0;
2003                         goto finish_td;
2004                 case TRB_DATA:
2005                 case TRB_NORMAL:
2006                         td->urb->actual_length = requested - remaining;
2007                         goto finish_td;
2008                 case TRB_STATUS:
2009                         td->urb->actual_length = requested;
2010                         goto finish_td;
2011                 default:
2012                         xhci_warn(xhci, "WARN: unexpected TRB Type %d\n",
2013                                   trb_type);
2014                         goto finish_td;
2015                 }
2016         case COMP_STOPPED_LENGTH_INVALID:
2017                 goto finish_td;
2018         default:
2019                 if (!xhci_requires_manual_halt_cleanup(xhci,
2020                                                        ep_ctx, trb_comp_code))
2021                         break;
2022                 xhci_dbg(xhci, "TRB error %u, halted endpoint index = %u\n",
2023                          trb_comp_code, ep_index);
2024                 /* else fall through */
2025         case COMP_STALL_ERROR:
2026                 /* Did we transfer part of the data (middle) phase? */
2027                 if (trb_type == TRB_DATA || trb_type == TRB_NORMAL)
2028                         td->urb->actual_length = requested - remaining;
2029                 else if (!td->urb_length_set)
2030                         td->urb->actual_length = 0;
2031                 goto finish_td;
2032         }
2033
2034         /* stopped at setup stage, no data transferred */
2035         if (trb_type == TRB_SETUP)
2036                 goto finish_td;
2037
2038         /*
2039          * if on data stage then update the actual_length of the URB and flag it
2040          * as set, so it won't be overwritten in the event for the last TRB.
2041          */
2042         if (trb_type == TRB_DATA ||
2043                 trb_type == TRB_NORMAL) {
2044                 td->urb_length_set = true;
2045                 td->urb->actual_length = requested - remaining;
2046                 xhci_dbg(xhci, "Waiting for status stage event\n");
2047                 return 0;
2048         }
2049
2050         /* at status stage */
2051         if (!td->urb_length_set)
2052                 td->urb->actual_length = requested;
2053
2054 finish_td:
2055         return finish_td(xhci, td, event, ep, status);
2056 }
2057
2058 /*
2059  * Process isochronous tds, update urb packet status and actual_length.
2060  */
2061 static int process_isoc_td(struct xhci_hcd *xhci, struct xhci_td *td,
2062         union xhci_trb *ep_trb, struct xhci_transfer_event *event,
2063         struct xhci_virt_ep *ep, int *status)
2064 {
2065         struct xhci_ring *ep_ring;
2066         struct urb_priv *urb_priv;
2067         int idx;
2068         struct usb_iso_packet_descriptor *frame;
2069         u32 trb_comp_code;
2070         bool sum_trbs_for_length = false;
2071         u32 remaining, requested, ep_trb_len;
2072         int short_framestatus;
2073
2074         ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer));
2075         trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len));
2076         urb_priv = td->urb->hcpriv;
2077         idx = urb_priv->num_tds_done;
2078         frame = &td->urb->iso_frame_desc[idx];
2079         requested = frame->length;
2080         remaining = EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
2081         ep_trb_len = TRB_LEN(le32_to_cpu(ep_trb->generic.field[2]));
2082         short_framestatus = td->urb->transfer_flags & URB_SHORT_NOT_OK ?
2083                 -EREMOTEIO : 0;
2084
2085         /* handle completion code */
2086         switch (trb_comp_code) {
2087         case COMP_SUCCESS:
2088                 if (remaining) {
2089                         frame->status = short_framestatus;
2090                         if (xhci->quirks & XHCI_TRUST_TX_LENGTH)
2091                                 sum_trbs_for_length = true;
2092                         break;
2093                 }
2094                 frame->status = 0;
2095                 break;
2096         case COMP_SHORT_PACKET:
2097                 frame->status = short_framestatus;
2098                 sum_trbs_for_length = true;
2099                 break;
2100         case COMP_BANDWIDTH_OVERRUN_ERROR:
2101                 frame->status = -ECOMM;
2102                 break;
2103         case COMP_ISOCH_BUFFER_OVERRUN:
2104         case COMP_BABBLE_DETECTED_ERROR:
2105                 frame->status = -EOVERFLOW;
2106                 break;
2107         case COMP_INCOMPATIBLE_DEVICE_ERROR:
2108         case COMP_STALL_ERROR:
2109                 frame->status = -EPROTO;
2110                 break;
2111         case COMP_USB_TRANSACTION_ERROR:
2112                 frame->status = -EPROTO;
2113                 if (ep_trb != td->last_trb)
2114                         return 0;
2115                 break;
2116         case COMP_STOPPED:
2117                 sum_trbs_for_length = true;
2118                 break;
2119         case COMP_STOPPED_SHORT_PACKET:
2120                 /* field normally containing residue now contains tranferred */
2121                 frame->status = short_framestatus;
2122                 requested = remaining;
2123                 break;
2124         case COMP_STOPPED_LENGTH_INVALID:
2125                 requested = 0;
2126                 remaining = 0;
2127                 break;
2128         default:
2129                 sum_trbs_for_length = true;
2130                 frame->status = -1;
2131                 break;
2132         }
2133
2134         if (sum_trbs_for_length)
2135                 frame->actual_length = sum_trb_lengths(xhci, ep_ring, ep_trb) +
2136                         ep_trb_len - remaining;
2137         else
2138                 frame->actual_length = requested;
2139
2140         td->urb->actual_length += frame->actual_length;
2141
2142         return finish_td(xhci, td, event, ep, status);
2143 }
2144
2145 static int skip_isoc_td(struct xhci_hcd *xhci, struct xhci_td *td,
2146                         struct xhci_transfer_event *event,
2147                         struct xhci_virt_ep *ep, int *status)
2148 {
2149         struct xhci_ring *ep_ring;
2150         struct urb_priv *urb_priv;
2151         struct usb_iso_packet_descriptor *frame;
2152         int idx;
2153
2154         ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer));
2155         urb_priv = td->urb->hcpriv;
2156         idx = urb_priv->num_tds_done;
2157         frame = &td->urb->iso_frame_desc[idx];
2158
2159         /* The transfer is partly done. */
2160         frame->status = -EXDEV;
2161
2162         /* calc actual length */
2163         frame->actual_length = 0;
2164
2165         /* Update ring dequeue pointer */
2166         while (ep_ring->dequeue != td->last_trb)
2167                 inc_deq(xhci, ep_ring);
2168         inc_deq(xhci, ep_ring);
2169
2170         return xhci_td_cleanup(xhci, td, ep_ring, status);
2171 }
2172
2173 /*
2174  * Process bulk and interrupt tds, update urb status and actual_length.
2175  */
2176 static int process_bulk_intr_td(struct xhci_hcd *xhci, struct xhci_td *td,
2177         union xhci_trb *ep_trb, struct xhci_transfer_event *event,
2178         struct xhci_virt_ep *ep, int *status)
2179 {
2180         struct xhci_slot_ctx *slot_ctx;
2181         struct xhci_ring *ep_ring;
2182         u32 trb_comp_code;
2183         u32 remaining, requested, ep_trb_len;
2184         unsigned int slot_id;
2185         int ep_index;
2186
2187         slot_id = TRB_TO_SLOT_ID(le32_to_cpu(event->flags));
2188         slot_ctx = xhci_get_slot_ctx(xhci, xhci->devs[slot_id]->out_ctx);
2189         ep_index = TRB_TO_EP_ID(le32_to_cpu(event->flags)) - 1;
2190         ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer));
2191         trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len));
2192         remaining = EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
2193         ep_trb_len = TRB_LEN(le32_to_cpu(ep_trb->generic.field[2]));
2194         requested = td->urb->transfer_buffer_length;
2195
2196         switch (trb_comp_code) {
2197         case COMP_SUCCESS:
2198                 ep_ring->err_count = 0;
2199                 /* handle success with untransferred data as short packet */
2200                 if (ep_trb != td->last_trb || remaining) {
2201                         xhci_warn(xhci, "WARN Successful completion on short TX\n");
2202                         xhci_dbg(xhci, "ep %#x - asked for %d bytes, %d bytes untransferred\n",
2203                                  td->urb->ep->desc.bEndpointAddress,
2204                                  requested, remaining);
2205                 }
2206                 *status = 0;
2207                 break;
2208         case COMP_SHORT_PACKET:
2209                 xhci_dbg(xhci, "ep %#x - asked for %d bytes, %d bytes untransferred\n",
2210                          td->urb->ep->desc.bEndpointAddress,
2211                          requested, remaining);
2212                 *status = 0;
2213                 break;
2214         case COMP_STOPPED_SHORT_PACKET:
2215                 td->urb->actual_length = remaining;
2216                 goto finish_td;
2217         case COMP_STOPPED_LENGTH_INVALID:
2218                 /* stopped on ep trb with invalid length, exclude it */
2219                 ep_trb_len      = 0;
2220                 remaining       = 0;
2221                 break;
2222         case COMP_USB_TRANSACTION_ERROR:
2223                 if ((ep_ring->err_count++ > MAX_SOFT_RETRY) ||
2224                     le32_to_cpu(slot_ctx->tt_info) & TT_SLOT)
2225                         break;
2226                 *status = 0;
2227                 xhci_cleanup_halted_endpoint(xhci, slot_id, ep_index,
2228                                         ep_ring->stream_id, td, EP_SOFT_RESET);
2229                 return 0;
2230         default:
2231                 /* do nothing */
2232                 break;
2233         }
2234
2235         if (ep_trb == td->last_trb)
2236                 td->urb->actual_length = requested - remaining;
2237         else
2238                 td->urb->actual_length =
2239                         sum_trb_lengths(xhci, ep_ring, ep_trb) +
2240                         ep_trb_len - remaining;
2241 finish_td:
2242         if (remaining > requested) {
2243                 xhci_warn(xhci, "bad transfer trb length %d in event trb\n",
2244                           remaining);
2245                 td->urb->actual_length = 0;
2246         }
2247         return finish_td(xhci, td, event, ep, status);
2248 }
2249
2250 /*
2251  * If this function returns an error condition, it means it got a Transfer
2252  * event with a corrupted Slot ID, Endpoint ID, or TRB DMA address.
2253  * At this point, the host controller is probably hosed and should be reset.
2254  */
2255 static int handle_tx_event(struct xhci_hcd *xhci,
2256                 struct xhci_transfer_event *event)
2257 {
2258         struct xhci_virt_device *xdev;
2259         struct xhci_virt_ep *ep;
2260         struct xhci_ring *ep_ring;
2261         unsigned int slot_id;
2262         int ep_index;
2263         struct xhci_td *td = NULL;
2264         dma_addr_t ep_trb_dma;
2265         struct xhci_segment *ep_seg;
2266         union xhci_trb *ep_trb;
2267         int status = -EINPROGRESS;
2268         struct xhci_ep_ctx *ep_ctx;
2269         struct list_head *tmp;
2270         u32 trb_comp_code;
2271         int td_num = 0;
2272         bool handling_skipped_tds = false;
2273
2274         slot_id = TRB_TO_SLOT_ID(le32_to_cpu(event->flags));
2275         ep_index = TRB_TO_EP_ID(le32_to_cpu(event->flags)) - 1;
2276         trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len));
2277         ep_trb_dma = le64_to_cpu(event->buffer);
2278
2279         xdev = xhci->devs[slot_id];
2280         if (!xdev) {
2281                 xhci_err(xhci, "ERROR Transfer event pointed to bad slot %u\n",
2282                          slot_id);
2283                 goto err_out;
2284         }
2285
2286         ep = &xdev->eps[ep_index];
2287         ep_ring = xhci_dma_to_transfer_ring(ep, ep_trb_dma);
2288         ep_ctx = xhci_get_ep_ctx(xhci, xdev->out_ctx, ep_index);
2289
2290         if (GET_EP_CTX_STATE(ep_ctx) == EP_STATE_DISABLED) {
2291                 xhci_err(xhci,
2292                          "ERROR Transfer event for disabled endpoint slot %u ep %u\n",
2293                           slot_id, ep_index);
2294                 goto err_out;
2295         }
2296
2297         /* Some transfer events don't always point to a trb, see xhci 4.17.4 */
2298         if (!ep_ring) {
2299                 switch (trb_comp_code) {
2300                 case COMP_STALL_ERROR:
2301                 case COMP_USB_TRANSACTION_ERROR:
2302                 case COMP_INVALID_STREAM_TYPE_ERROR:
2303                 case COMP_INVALID_STREAM_ID_ERROR:
2304                         xhci_cleanup_halted_endpoint(xhci, slot_id, ep_index, 0,
2305                                                      NULL, EP_SOFT_RESET);
2306                         goto cleanup;
2307                 case COMP_RING_UNDERRUN:
2308                 case COMP_RING_OVERRUN:
2309                 case COMP_STOPPED_LENGTH_INVALID:
2310                         goto cleanup;
2311                 default:
2312                         xhci_err(xhci, "ERROR Transfer event for unknown stream ring slot %u ep %u\n",
2313                                  slot_id, ep_index);
2314                         goto err_out;
2315                 }
2316         }
2317
2318         /* Count current td numbers if ep->skip is set */
2319         if (ep->skip) {
2320                 list_for_each(tmp, &ep_ring->td_list)
2321                         td_num++;
2322         }
2323
2324         /* Look for common error cases */
2325         switch (trb_comp_code) {
2326         /* Skip codes that require special handling depending on
2327          * transfer type
2328          */
2329         case COMP_SUCCESS:
2330                 if (EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)) == 0)
2331                         break;
2332                 if (xhci->quirks & XHCI_TRUST_TX_LENGTH)
2333                         trb_comp_code = COMP_SHORT_PACKET;
2334                 else
2335                         xhci_warn_ratelimited(xhci,
2336                                               "WARN Successful completion on short TX for slot %u ep %u: needs XHCI_TRUST_TX_LENGTH quirk?\n",
2337                                               slot_id, ep_index);
2338         case COMP_SHORT_PACKET:
2339                 break;
2340         /* Completion codes for endpoint stopped state */
2341         case COMP_STOPPED:
2342                 xhci_dbg(xhci, "Stopped on Transfer TRB for slot %u ep %u\n",
2343                          slot_id, ep_index);
2344                 break;
2345         case COMP_STOPPED_LENGTH_INVALID:
2346                 xhci_dbg(xhci,
2347                          "Stopped on No-op or Link TRB for slot %u ep %u\n",
2348                          slot_id, ep_index);
2349                 break;
2350         case COMP_STOPPED_SHORT_PACKET:
2351                 xhci_dbg(xhci,
2352                          "Stopped with short packet transfer detected for slot %u ep %u\n",
2353                          slot_id, ep_index);
2354                 break;
2355         /* Completion codes for endpoint halted state */
2356         case COMP_STALL_ERROR:
2357                 xhci_dbg(xhci, "Stalled endpoint for slot %u ep %u\n", slot_id,
2358                          ep_index);
2359                 ep->ep_state |= EP_HALTED;
2360                 status = -EPIPE;
2361                 break;
2362         case COMP_SPLIT_TRANSACTION_ERROR:
2363         case COMP_USB_TRANSACTION_ERROR:
2364                 xhci_dbg(xhci, "Transfer error for slot %u ep %u on endpoint\n",
2365                          slot_id, ep_index);
2366                 status = -EPROTO;
2367                 break;
2368         case COMP_BABBLE_DETECTED_ERROR:
2369                 xhci_dbg(xhci, "Babble error for slot %u ep %u on endpoint\n",
2370                          slot_id, ep_index);
2371                 status = -EOVERFLOW;
2372                 break;
2373         /* Completion codes for endpoint error state */
2374         case COMP_TRB_ERROR:
2375                 xhci_warn(xhci,
2376                           "WARN: TRB error for slot %u ep %u on endpoint\n",
2377                           slot_id, ep_index);
2378                 status = -EILSEQ;
2379                 break;
2380         /* completion codes not indicating endpoint state change */
2381         case COMP_DATA_BUFFER_ERROR:
2382                 xhci_warn(xhci,
2383                           "WARN: HC couldn't access mem fast enough for slot %u ep %u\n",
2384                           slot_id, ep_index);
2385                 status = -ENOSR;
2386                 break;
2387         case COMP_BANDWIDTH_OVERRUN_ERROR:
2388                 xhci_warn(xhci,
2389                           "WARN: bandwidth overrun event for slot %u ep %u on endpoint\n",
2390                           slot_id, ep_index);
2391                 break;
2392         case COMP_ISOCH_BUFFER_OVERRUN:
2393                 xhci_warn(xhci,
2394                           "WARN: buffer overrun event for slot %u ep %u on endpoint",
2395                           slot_id, ep_index);
2396                 break;
2397         case COMP_RING_UNDERRUN:
2398                 /*
2399                  * When the Isoch ring is empty, the xHC will generate
2400                  * a Ring Overrun Event for IN Isoch endpoint or Ring
2401                  * Underrun Event for OUT Isoch endpoint.
2402                  */
2403                 xhci_dbg(xhci, "underrun event on endpoint\n");
2404                 if (!list_empty(&ep_ring->td_list))
2405                         xhci_dbg(xhci, "Underrun Event for slot %d ep %d "
2406                                         "still with TDs queued?\n",
2407                                  TRB_TO_SLOT_ID(le32_to_cpu(event->flags)),
2408                                  ep_index);
2409                 goto cleanup;
2410         case COMP_RING_OVERRUN:
2411                 xhci_dbg(xhci, "overrun event on endpoint\n");
2412                 if (!list_empty(&ep_ring->td_list))
2413                         xhci_dbg(xhci, "Overrun Event for slot %d ep %d "
2414                                         "still with TDs queued?\n",
2415                                  TRB_TO_SLOT_ID(le32_to_cpu(event->flags)),
2416                                  ep_index);
2417                 goto cleanup;
2418         case COMP_MISSED_SERVICE_ERROR:
2419                 /*
2420                  * When encounter missed service error, one or more isoc tds
2421                  * may be missed by xHC.
2422                  * Set skip flag of the ep_ring; Complete the missed tds as
2423                  * short transfer when process the ep_ring next time.
2424                  */
2425                 ep->skip = true;
2426                 xhci_dbg(xhci,
2427                          "Miss service interval error for slot %u ep %u, set skip flag\n",
2428                          slot_id, ep_index);
2429                 goto cleanup;
2430         case COMP_NO_PING_RESPONSE_ERROR:
2431                 ep->skip = true;
2432                 xhci_dbg(xhci,
2433                          "No Ping response error for slot %u ep %u, Skip one Isoc TD\n",
2434                          slot_id, ep_index);
2435                 goto cleanup;
2436
2437         case COMP_INCOMPATIBLE_DEVICE_ERROR:
2438                 /* needs disable slot command to recover */
2439                 xhci_warn(xhci,
2440                           "WARN: detect an incompatible device for slot %u ep %u",
2441                           slot_id, ep_index);
2442                 status = -EPROTO;
2443                 break;
2444         default:
2445                 if (xhci_is_vendor_info_code(xhci, trb_comp_code)) {
2446                         status = 0;
2447                         break;
2448                 }
2449                 xhci_warn(xhci,
2450                           "ERROR Unknown event condition %u for slot %u ep %u , HC probably busted\n",
2451                           trb_comp_code, slot_id, ep_index);
2452                 goto cleanup;
2453         }
2454
2455         do {
2456                 /* This TRB should be in the TD at the head of this ring's
2457                  * TD list.
2458                  */
2459                 if (list_empty(&ep_ring->td_list)) {
2460                         /*
2461                          * Don't print wanings if it's due to a stopped endpoint
2462                          * generating an extra completion event if the device
2463                          * was suspended. Or, a event for the last TRB of a
2464                          * short TD we already got a short event for.
2465                          * The short TD is already removed from the TD list.
2466                          */
2467
2468                         if (!(trb_comp_code == COMP_STOPPED ||
2469                               trb_comp_code == COMP_STOPPED_LENGTH_INVALID ||
2470                               ep_ring->last_td_was_short)) {
2471                                 xhci_warn(xhci, "WARN Event TRB for slot %d ep %d with no TDs queued?\n",
2472                                                 TRB_TO_SLOT_ID(le32_to_cpu(event->flags)),
2473                                                 ep_index);
2474                         }
2475                         if (ep->skip) {
2476                                 ep->skip = false;
2477                                 xhci_dbg(xhci, "td_list is empty while skip flag set. Clear skip flag for slot %u ep %u.\n",
2478                                          slot_id, ep_index);
2479                         }
2480                         goto cleanup;
2481                 }
2482
2483                 /* We've skipped all the TDs on the ep ring when ep->skip set */
2484                 if (ep->skip && td_num == 0) {
2485                         ep->skip = false;
2486                         xhci_dbg(xhci, "All tds on the ep_ring skipped. Clear skip flag for slot %u ep %u.\n",
2487                                  slot_id, ep_index);
2488                         goto cleanup;
2489                 }
2490
2491                 td = list_first_entry(&ep_ring->td_list, struct xhci_td,
2492                                       td_list);
2493                 if (ep->skip)
2494                         td_num--;
2495
2496                 /* Is this a TRB in the currently executing TD? */
2497                 ep_seg = trb_in_td(xhci, ep_ring->deq_seg, ep_ring->dequeue,
2498                                 td->last_trb, ep_trb_dma, false);
2499
2500                 /*
2501                  * Skip the Force Stopped Event. The event_trb(event_dma) of FSE
2502                  * is not in the current TD pointed by ep_ring->dequeue because
2503                  * that the hardware dequeue pointer still at the previous TRB
2504                  * of the current TD. The previous TRB maybe a Link TD or the
2505                  * last TRB of the previous TD. The command completion handle
2506                  * will take care the rest.
2507                  */
2508                 if (!ep_seg && (trb_comp_code == COMP_STOPPED ||
2509                            trb_comp_code == COMP_STOPPED_LENGTH_INVALID)) {
2510                         goto cleanup;
2511                 }
2512
2513                 if (!ep_seg) {
2514                         if (!ep->skip ||
2515                             !usb_endpoint_xfer_isoc(&td->urb->ep->desc)) {
2516                                 /* Some host controllers give a spurious
2517                                  * successful event after a short transfer.
2518                                  * Ignore it.
2519                                  */
2520                                 if ((xhci->quirks & XHCI_SPURIOUS_SUCCESS) &&
2521                                                 ep_ring->last_td_was_short) {
2522                                         ep_ring->last_td_was_short = false;
2523                                         goto cleanup;
2524                                 }
2525                                 /* HC is busted, give up! */
2526                                 xhci_err(xhci,
2527                                         "ERROR Transfer event TRB DMA ptr not "
2528                                         "part of current TD ep_index %d "
2529                                         "comp_code %u\n", ep_index,
2530                                         trb_comp_code);
2531                                 trb_in_td(xhci, ep_ring->deq_seg,
2532                                           ep_ring->dequeue, td->last_trb,
2533                                           ep_trb_dma, true);
2534                                 return -ESHUTDOWN;
2535                         }
2536
2537                         skip_isoc_td(xhci, td, event, ep, &status);
2538                         goto cleanup;
2539                 }
2540                 if (trb_comp_code == COMP_SHORT_PACKET)
2541                         ep_ring->last_td_was_short = true;
2542                 else
2543                         ep_ring->last_td_was_short = false;
2544
2545                 if (ep->skip) {
2546                         xhci_dbg(xhci,
2547                                  "Found td. Clear skip flag for slot %u ep %u.\n",
2548                                  slot_id, ep_index);
2549                         ep->skip = false;
2550                 }
2551
2552                 ep_trb = &ep_seg->trbs[(ep_trb_dma - ep_seg->dma) /
2553                                                 sizeof(*ep_trb)];
2554
2555                 trace_xhci_handle_transfer(ep_ring,
2556                                 (struct xhci_generic_trb *) ep_trb);
2557
2558                 /*
2559                  * No-op TRB could trigger interrupts in a case where
2560                  * a URB was killed and a STALL_ERROR happens right
2561                  * after the endpoint ring stopped. Reset the halted
2562                  * endpoint. Otherwise, the endpoint remains stalled
2563                  * indefinitely.
2564                  */
2565                 if (trb_is_noop(ep_trb)) {
2566                         if (trb_comp_code == COMP_STALL_ERROR ||
2567                             xhci_requires_manual_halt_cleanup(xhci, ep_ctx,
2568                                                               trb_comp_code))
2569                                 xhci_cleanup_halted_endpoint(xhci, slot_id,
2570                                                              ep_index,
2571                                                              ep_ring->stream_id,
2572                                                              td, EP_HARD_RESET);
2573                         goto cleanup;
2574                 }
2575
2576                 /* update the urb's actual_length and give back to the core */
2577                 if (usb_endpoint_xfer_control(&td->urb->ep->desc))
2578                         process_ctrl_td(xhci, td, ep_trb, event, ep, &status);
2579                 else if (usb_endpoint_xfer_isoc(&td->urb->ep->desc))
2580                         process_isoc_td(xhci, td, ep_trb, event, ep, &status);
2581                 else
2582                         process_bulk_intr_td(xhci, td, ep_trb, event, ep,
2583                                              &status);
2584 cleanup:
2585                 handling_skipped_tds = ep->skip &&
2586                         trb_comp_code != COMP_MISSED_SERVICE_ERROR &&
2587                         trb_comp_code != COMP_NO_PING_RESPONSE_ERROR;
2588
2589                 /*
2590                  * Do not update event ring dequeue pointer if we're in a loop
2591                  * processing missed tds.
2592                  */
2593                 if (!handling_skipped_tds)
2594                         inc_deq(xhci, xhci->event_ring);
2595
2596         /*
2597          * If ep->skip is set, it means there are missed tds on the
2598          * endpoint ring need to take care of.
2599          * Process them as short transfer until reach the td pointed by
2600          * the event.
2601          */
2602         } while (handling_skipped_tds);
2603
2604         return 0;
2605
2606 err_out:
2607         xhci_err(xhci, "@%016llx %08x %08x %08x %08x\n",
2608                  (unsigned long long) xhci_trb_virt_to_dma(
2609                          xhci->event_ring->deq_seg,
2610                          xhci->event_ring->dequeue),
2611                  lower_32_bits(le64_to_cpu(event->buffer)),
2612                  upper_32_bits(le64_to_cpu(event->buffer)),
2613                  le32_to_cpu(event->transfer_len),
2614                  le32_to_cpu(event->flags));
2615         return -ENODEV;
2616 }
2617
2618 /*
2619  * This function handles all OS-owned events on the event ring.  It may drop
2620  * xhci->lock between event processing (e.g. to pass up port status changes).
2621  * Returns >0 for "possibly more events to process" (caller should call again),
2622  * otherwise 0 if done.  In future, <0 returns should indicate error code.
2623  */
2624 static int xhci_handle_event(struct xhci_hcd *xhci)
2625 {
2626         union xhci_trb *event;
2627         int update_ptrs = 1;
2628         int ret;
2629
2630         /* Event ring hasn't been allocated yet. */
2631         if (!xhci->event_ring || !xhci->event_ring->dequeue) {
2632                 xhci_err(xhci, "ERROR event ring not ready\n");
2633                 return -ENOMEM;
2634         }
2635
2636         event = xhci->event_ring->dequeue;
2637         /* Does the HC or OS own the TRB? */
2638         if ((le32_to_cpu(event->event_cmd.flags) & TRB_CYCLE) !=
2639             xhci->event_ring->cycle_state)
2640                 return 0;
2641
2642         trace_xhci_handle_event(xhci->event_ring, &event->generic);
2643
2644         /*
2645          * Barrier between reading the TRB_CYCLE (valid) flag above and any
2646          * speculative reads of the event's flags/data below.
2647          */
2648         rmb();
2649         /* FIXME: Handle more event types. */
2650         switch (le32_to_cpu(event->event_cmd.flags) & TRB_TYPE_BITMASK) {
2651         case TRB_TYPE(TRB_COMPLETION):
2652                 handle_cmd_completion(xhci, &event->event_cmd);
2653                 break;
2654         case TRB_TYPE(TRB_PORT_STATUS):
2655                 handle_port_status(xhci, event);
2656                 update_ptrs = 0;
2657                 break;
2658         case TRB_TYPE(TRB_TRANSFER):
2659                 ret = handle_tx_event(xhci, &event->trans_event);
2660                 if (ret >= 0)
2661                         update_ptrs = 0;
2662                 break;
2663         case TRB_TYPE(TRB_DEV_NOTE):
2664                 handle_device_notification(xhci, event);
2665                 break;
2666         default:
2667                 if ((le32_to_cpu(event->event_cmd.flags) & TRB_TYPE_BITMASK) >=
2668                     TRB_TYPE(48))
2669                         handle_vendor_event(xhci, event);
2670                 else
2671                         xhci_warn(xhci, "ERROR unknown event type %d\n",
2672                                   TRB_FIELD_TO_TYPE(
2673                                   le32_to_cpu(event->event_cmd.flags)));
2674         }
2675         /* Any of the above functions may drop and re-acquire the lock, so check
2676          * to make sure a watchdog timer didn't mark the host as non-responsive.
2677          */
2678         if (xhci->xhc_state & XHCI_STATE_DYING) {
2679                 xhci_dbg(xhci, "xHCI host dying, returning from "
2680                                 "event handler.\n");
2681                 return 0;
2682         }
2683
2684         if (update_ptrs)
2685                 /* Update SW event ring dequeue pointer */
2686                 inc_deq(xhci, xhci->event_ring);
2687
2688         /* Are there more items on the event ring?  Caller will call us again to
2689          * check.
2690          */
2691         return 1;
2692 }
2693
2694 /*
2695  * xHCI spec says we can get an interrupt, and if the HC has an error condition,
2696  * we might get bad data out of the event ring.  Section 4.10.2.7 has a list of
2697  * indicators of an event TRB error, but we check the status *first* to be safe.
2698  */
2699 irqreturn_t xhci_irq(struct usb_hcd *hcd)
2700 {
2701         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
2702         union xhci_trb *event_ring_deq;
2703         irqreturn_t ret = IRQ_NONE;
2704         unsigned long flags;
2705         dma_addr_t deq;
2706         u64 temp_64;
2707         u32 status;
2708
2709         spin_lock_irqsave(&xhci->lock, flags);
2710         /* Check if the xHC generated the interrupt, or the irq is shared */
2711         status = readl(&xhci->op_regs->status);
2712         if (status == ~(u32)0) {
2713                 xhci_hc_died(xhci);
2714                 ret = IRQ_HANDLED;
2715                 goto out;
2716         }
2717
2718         if (!(status & STS_EINT))
2719                 goto out;
2720
2721         if (status & STS_FATAL) {
2722                 xhci_warn(xhci, "WARNING: Host System Error\n");
2723                 xhci_halt(xhci);
2724                 ret = IRQ_HANDLED;
2725                 goto out;
2726         }
2727
2728         /*
2729          * Clear the op reg interrupt status first,
2730          * so we can receive interrupts from other MSI-X interrupters.
2731          * Write 1 to clear the interrupt status.
2732          */
2733         status |= STS_EINT;
2734         writel(status, &xhci->op_regs->status);
2735
2736         if (!hcd->msi_enabled) {
2737                 u32 irq_pending;
2738                 irq_pending = readl(&xhci->ir_set->irq_pending);
2739                 irq_pending |= IMAN_IP;
2740                 writel(irq_pending, &xhci->ir_set->irq_pending);
2741         }
2742
2743         if (xhci->xhc_state & XHCI_STATE_DYING ||
2744             xhci->xhc_state & XHCI_STATE_HALTED) {
2745                 xhci_dbg(xhci, "xHCI dying, ignoring interrupt. "
2746                                 "Shouldn't IRQs be disabled?\n");
2747                 /* Clear the event handler busy flag (RW1C);
2748                  * the event ring should be empty.
2749                  */
2750                 temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
2751                 xhci_write_64(xhci, temp_64 | ERST_EHB,
2752                                 &xhci->ir_set->erst_dequeue);
2753                 ret = IRQ_HANDLED;
2754                 goto out;
2755         }
2756
2757         event_ring_deq = xhci->event_ring->dequeue;
2758         /* FIXME this should be a delayed service routine
2759          * that clears the EHB.
2760          */
2761         while (xhci_handle_event(xhci) > 0) {}
2762
2763         temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
2764         /* If necessary, update the HW's version of the event ring deq ptr. */
2765         if (event_ring_deq != xhci->event_ring->dequeue) {
2766                 deq = xhci_trb_virt_to_dma(xhci->event_ring->deq_seg,
2767                                 xhci->event_ring->dequeue);
2768                 if (deq == 0)
2769                         xhci_warn(xhci, "WARN something wrong with SW event "
2770                                         "ring dequeue ptr.\n");
2771                 /* Update HC event ring dequeue pointer */
2772                 temp_64 &= ERST_PTR_MASK;
2773                 temp_64 |= ((u64) deq & (u64) ~ERST_PTR_MASK);
2774         }
2775
2776         /* Clear the event handler busy flag (RW1C); event ring is empty. */
2777         temp_64 |= ERST_EHB;
2778         xhci_write_64(xhci, temp_64, &xhci->ir_set->erst_dequeue);
2779         ret = IRQ_HANDLED;
2780
2781 out:
2782         spin_unlock_irqrestore(&xhci->lock, flags);
2783
2784         return ret;
2785 }
2786
2787 irqreturn_t xhci_msi_irq(int irq, void *hcd)
2788 {
2789         return xhci_irq(hcd);
2790 }
2791
2792 /****           Endpoint Ring Operations        ****/
2793
2794 /*
2795  * Generic function for queueing a TRB on a ring.
2796  * The caller must have checked to make sure there's room on the ring.
2797  *
2798  * @more_trbs_coming:   Will you enqueue more TRBs before calling
2799  *                      prepare_transfer()?
2800  */
2801 static void queue_trb(struct xhci_hcd *xhci, struct xhci_ring *ring,
2802                 bool more_trbs_coming,
2803                 u32 field1, u32 field2, u32 field3, u32 field4)
2804 {
2805         struct xhci_generic_trb *trb;
2806
2807         trb = &ring->enqueue->generic;
2808         trb->field[0] = cpu_to_le32(field1);
2809         trb->field[1] = cpu_to_le32(field2);
2810         trb->field[2] = cpu_to_le32(field3);
2811         trb->field[3] = cpu_to_le32(field4);
2812
2813         trace_xhci_queue_trb(ring, trb);
2814
2815         inc_enq(xhci, ring, more_trbs_coming);
2816 }
2817
2818 /*
2819  * Does various checks on the endpoint ring, and makes it ready to queue num_trbs.
2820  * FIXME allocate segments if the ring is full.
2821  */
2822 static int prepare_ring(struct xhci_hcd *xhci, struct xhci_ring *ep_ring,
2823                 u32 ep_state, unsigned int num_trbs, gfp_t mem_flags)
2824 {
2825         unsigned int num_trbs_needed;
2826
2827         /* Make sure the endpoint has been added to xHC schedule */
2828         switch (ep_state) {
2829         case EP_STATE_DISABLED:
2830                 /*
2831                  * USB core changed config/interfaces without notifying us,
2832                  * or hardware is reporting the wrong state.
2833                  */
2834                 xhci_warn(xhci, "WARN urb submitted to disabled ep\n");
2835                 return -ENOENT;
2836         case EP_STATE_ERROR:
2837                 xhci_warn(xhci, "WARN waiting for error on ep to be cleared\n");
2838                 /* FIXME event handling code for error needs to clear it */
2839                 /* XXX not sure if this should be -ENOENT or not */
2840                 return -EINVAL;
2841         case EP_STATE_HALTED:
2842                 xhci_dbg(xhci, "WARN halted endpoint, queueing URB anyway.\n");
2843         case EP_STATE_STOPPED:
2844         case EP_STATE_RUNNING:
2845                 break;
2846         default:
2847                 xhci_err(xhci, "ERROR unknown endpoint state for ep\n");
2848                 /*
2849                  * FIXME issue Configure Endpoint command to try to get the HC
2850                  * back into a known state.
2851                  */
2852                 return -EINVAL;
2853         }
2854
2855         while (1) {
2856                 if (room_on_ring(xhci, ep_ring, num_trbs))
2857                         break;
2858
2859                 if (ep_ring == xhci->cmd_ring) {
2860                         xhci_err(xhci, "Do not support expand command ring\n");
2861                         return -ENOMEM;
2862                 }
2863
2864                 xhci_dbg_trace(xhci, trace_xhci_dbg_ring_expansion,
2865                                 "ERROR no room on ep ring, try ring expansion");
2866                 num_trbs_needed = num_trbs - ep_ring->num_trbs_free;
2867                 if (xhci_ring_expansion(xhci, ep_ring, num_trbs_needed,
2868                                         mem_flags)) {
2869                         xhci_err(xhci, "Ring expansion failed\n");
2870                         return -ENOMEM;
2871                 }
2872         }
2873
2874         while (trb_is_link(ep_ring->enqueue)) {
2875                 /* If we're not dealing with 0.95 hardware or isoc rings
2876                  * on AMD 0.96 host, clear the chain bit.
2877                  */
2878                 if (!xhci_link_trb_quirk(xhci) &&
2879                     !(ep_ring->type == TYPE_ISOC &&
2880                       (xhci->quirks & XHCI_AMD_0x96_HOST)))
2881                         ep_ring->enqueue->link.control &=
2882                                 cpu_to_le32(~TRB_CHAIN);
2883                 else
2884                         ep_ring->enqueue->link.control |=
2885                                 cpu_to_le32(TRB_CHAIN);
2886
2887                 wmb();
2888                 ep_ring->enqueue->link.control ^= cpu_to_le32(TRB_CYCLE);
2889
2890                 /* Toggle the cycle bit after the last ring segment. */
2891                 if (link_trb_toggles_cycle(ep_ring->enqueue))
2892                         ep_ring->cycle_state ^= 1;
2893
2894                 ep_ring->enq_seg = ep_ring->enq_seg->next;
2895                 ep_ring->enqueue = ep_ring->enq_seg->trbs;
2896         }
2897         return 0;
2898 }
2899
2900 static int prepare_transfer(struct xhci_hcd *xhci,
2901                 struct xhci_virt_device *xdev,
2902                 unsigned int ep_index,
2903                 unsigned int stream_id,
2904                 unsigned int num_trbs,
2905                 struct urb *urb,
2906                 unsigned int td_index,
2907                 gfp_t mem_flags)
2908 {
2909         int ret;
2910         struct urb_priv *urb_priv;
2911         struct xhci_td  *td;
2912         struct xhci_ring *ep_ring;
2913         struct xhci_ep_ctx *ep_ctx = xhci_get_ep_ctx(xhci, xdev->out_ctx, ep_index);
2914
2915         ep_ring = xhci_stream_id_to_ring(xdev, ep_index, stream_id);
2916         if (!ep_ring) {
2917                 xhci_dbg(xhci, "Can't prepare ring for bad stream ID %u\n",
2918                                 stream_id);
2919                 return -EINVAL;
2920         }
2921
2922         ret = prepare_ring(xhci, ep_ring, GET_EP_CTX_STATE(ep_ctx),
2923                            num_trbs, mem_flags);
2924         if (ret)
2925                 return ret;
2926
2927         urb_priv = urb->hcpriv;
2928         td = &urb_priv->td[td_index];
2929
2930         INIT_LIST_HEAD(&td->td_list);
2931         INIT_LIST_HEAD(&td->cancelled_td_list);
2932
2933         if (td_index == 0) {
2934                 ret = usb_hcd_link_urb_to_ep(bus_to_hcd(urb->dev->bus), urb);
2935                 if (unlikely(ret))
2936                         return ret;
2937         }
2938
2939         td->urb = urb;
2940         /* Add this TD to the tail of the endpoint ring's TD list */
2941         list_add_tail(&td->td_list, &ep_ring->td_list);
2942         td->start_seg = ep_ring->enq_seg;
2943         td->first_trb = ep_ring->enqueue;
2944
2945         return 0;
2946 }
2947
2948 unsigned int count_trbs(u64 addr, u64 len)
2949 {
2950         unsigned int num_trbs;
2951
2952         num_trbs = DIV_ROUND_UP(len + (addr & (TRB_MAX_BUFF_SIZE - 1)),
2953                         TRB_MAX_BUFF_SIZE);
2954         if (num_trbs == 0)
2955                 num_trbs++;
2956
2957         return num_trbs;
2958 }
2959
2960 static inline unsigned int count_trbs_needed(struct urb *urb)
2961 {
2962         return count_trbs(urb->transfer_dma, urb->transfer_buffer_length);
2963 }
2964
2965 static unsigned int count_sg_trbs_needed(struct urb *urb)
2966 {
2967         struct scatterlist *sg;
2968         unsigned int i, len, full_len, num_trbs = 0;
2969
2970         full_len = urb->transfer_buffer_length;
2971
2972         for_each_sg(urb->sg, sg, urb->num_mapped_sgs, i) {
2973                 len = sg_dma_len(sg);
2974                 num_trbs += count_trbs(sg_dma_address(sg), len);
2975                 len = min_t(unsigned int, len, full_len);
2976                 full_len -= len;
2977                 if (full_len == 0)
2978                         break;
2979         }
2980
2981         return num_trbs;
2982 }
2983
2984 static unsigned int count_isoc_trbs_needed(struct urb *urb, int i)
2985 {
2986         u64 addr, len;
2987
2988         addr = (u64) (urb->transfer_dma + urb->iso_frame_desc[i].offset);
2989         len = urb->iso_frame_desc[i].length;
2990
2991         return count_trbs(addr, len);
2992 }
2993
2994 static void check_trb_math(struct urb *urb, int running_total)
2995 {
2996         if (unlikely(running_total != urb->transfer_buffer_length))
2997                 dev_err(&urb->dev->dev, "%s - ep %#x - Miscalculated tx length, "
2998                                 "queued %#x (%d), asked for %#x (%d)\n",
2999                                 __func__,
3000                                 urb->ep->desc.bEndpointAddress,
3001                                 running_total, running_total,
3002                                 urb->transfer_buffer_length,
3003                                 urb->transfer_buffer_length);
3004 }
3005
3006 static void giveback_first_trb(struct xhci_hcd *xhci, int slot_id,
3007                 unsigned int ep_index, unsigned int stream_id, int start_cycle,
3008                 struct xhci_generic_trb *start_trb)
3009 {
3010         /*
3011          * Pass all the TRBs to the hardware at once and make sure this write
3012          * isn't reordered.
3013          */
3014         wmb();
3015         if (start_cycle)
3016                 start_trb->field[3] |= cpu_to_le32(start_cycle);
3017         else
3018                 start_trb->field[3] &= cpu_to_le32(~TRB_CYCLE);
3019         xhci_ring_ep_doorbell(xhci, slot_id, ep_index, stream_id);
3020 }
3021
3022 static void check_interval(struct xhci_hcd *xhci, struct urb *urb,
3023                                                 struct xhci_ep_ctx *ep_ctx)
3024 {
3025         int xhci_interval;
3026         int ep_interval;
3027
3028         xhci_interval = EP_INTERVAL_TO_UFRAMES(le32_to_cpu(ep_ctx->ep_info));
3029         ep_interval = urb->interval;
3030
3031         /* Convert to microframes */
3032         if (urb->dev->speed == USB_SPEED_LOW ||
3033                         urb->dev->speed == USB_SPEED_FULL)
3034                 ep_interval *= 8;
3035
3036         /* FIXME change this to a warning and a suggestion to use the new API
3037          * to set the polling interval (once the API is added).
3038          */
3039         if (xhci_interval != ep_interval) {
3040                 dev_dbg_ratelimited(&urb->dev->dev,
3041                                 "Driver uses different interval (%d microframe%s) than xHCI (%d microframe%s)\n",
3042                                 ep_interval, ep_interval == 1 ? "" : "s",
3043                                 xhci_interval, xhci_interval == 1 ? "" : "s");
3044                 urb->interval = xhci_interval;
3045                 /* Convert back to frames for LS/FS devices */
3046                 if (urb->dev->speed == USB_SPEED_LOW ||
3047                                 urb->dev->speed == USB_SPEED_FULL)
3048                         urb->interval /= 8;
3049         }
3050 }
3051
3052 /*
3053  * xHCI uses normal TRBs for both bulk and interrupt.  When the interrupt
3054  * endpoint is to be serviced, the xHC will consume (at most) one TD.  A TD
3055  * (comprised of sg list entries) can take several service intervals to
3056  * transmit.
3057  */
3058 int xhci_queue_intr_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
3059                 struct urb *urb, int slot_id, unsigned int ep_index)
3060 {
3061         struct xhci_ep_ctx *ep_ctx;
3062
3063         ep_ctx = xhci_get_ep_ctx(xhci, xhci->devs[slot_id]->out_ctx, ep_index);
3064         check_interval(xhci, urb, ep_ctx);
3065
3066         return xhci_queue_bulk_tx(xhci, mem_flags, urb, slot_id, ep_index);
3067 }
3068
3069 /*
3070  * For xHCI 1.0 host controllers, TD size is the number of max packet sized
3071  * packets remaining in the TD (*not* including this TRB).
3072  *
3073  * Total TD packet count = total_packet_count =
3074  *     DIV_ROUND_UP(TD size in bytes / wMaxPacketSize)
3075  *
3076  * Packets transferred up to and including this TRB = packets_transferred =
3077  *     rounddown(total bytes transferred including this TRB / wMaxPacketSize)
3078  *
3079  * TD size = total_packet_count - packets_transferred
3080  *
3081  * For xHCI 0.96 and older, TD size field should be the remaining bytes
3082  * including this TRB, right shifted by 10
3083  *
3084  * For all hosts it must fit in bits 21:17, so it can't be bigger than 31.
3085  * This is taken care of in the TRB_TD_SIZE() macro
3086  *
3087  * The last TRB in a TD must have the TD size set to zero.
3088  */
3089 static u32 xhci_td_remainder(struct xhci_hcd *xhci, int transferred,
3090                               int trb_buff_len, unsigned int td_total_len,
3091                               struct urb *urb, bool more_trbs_coming)
3092 {
3093         u32 maxp, total_packet_count;
3094
3095         /* MTK xHCI 0.96 contains some features from 1.0 */
3096         if (xhci->hci_version < 0x100 && !(xhci->quirks & XHCI_MTK_HOST))
3097                 return ((td_total_len - transferred) >> 10);
3098
3099         /* One TRB with a zero-length data packet. */
3100         if (!more_trbs_coming || (transferred == 0 && trb_buff_len == 0) ||
3101             trb_buff_len == td_total_len)
3102                 return 0;
3103
3104         /* for MTK xHCI 0.96, TD size include this TRB, but not in 1.x */
3105         if ((xhci->quirks & XHCI_MTK_HOST) && (xhci->hci_version < 0x100))
3106                 trb_buff_len = 0;
3107
3108         maxp = usb_endpoint_maxp(&urb->ep->desc);
3109         total_packet_count = DIV_ROUND_UP(td_total_len, maxp);
3110
3111         /* Queueing functions don't count the current TRB into transferred */
3112         return (total_packet_count - ((transferred + trb_buff_len) / maxp));
3113 }
3114
3115
3116 static int xhci_align_td(struct xhci_hcd *xhci, struct urb *urb, u32 enqd_len,
3117                          u32 *trb_buff_len, struct xhci_segment *seg)
3118 {
3119         struct device *dev = xhci_to_hcd(xhci)->self.controller;
3120         unsigned int unalign;
3121         unsigned int max_pkt;
3122         u32 new_buff_len;
3123
3124         max_pkt = usb_endpoint_maxp(&urb->ep->desc);
3125         unalign = (enqd_len + *trb_buff_len) % max_pkt;
3126
3127         /* we got lucky, last normal TRB data on segment is packet aligned */
3128         if (unalign == 0)
3129                 return 0;
3130
3131         xhci_dbg(xhci, "Unaligned %d bytes, buff len %d\n",
3132                  unalign, *trb_buff_len);
3133
3134         /* is the last nornal TRB alignable by splitting it */
3135         if (*trb_buff_len > unalign) {
3136                 *trb_buff_len -= unalign;
3137                 xhci_dbg(xhci, "split align, new buff len %d\n", *trb_buff_len);
3138                 return 0;
3139         }
3140
3141         /*
3142          * We want enqd_len + trb_buff_len to sum up to a number aligned to
3143          * number which is divisible by the endpoint's wMaxPacketSize. IOW:
3144          * (size of currently enqueued TRBs + remainder) % wMaxPacketSize == 0.
3145          */
3146         new_buff_len = max_pkt - (enqd_len % max_pkt);
3147
3148         if (new_buff_len > (urb->transfer_buffer_length - enqd_len))
3149                 new_buff_len = (urb->transfer_buffer_length - enqd_len);
3150
3151         /* create a max max_pkt sized bounce buffer pointed to by last trb */
3152         if (usb_urb_dir_out(urb)) {
3153                 sg_pcopy_to_buffer(urb->sg, urb->num_mapped_sgs,
3154                                    seg->bounce_buf, new_buff_len, enqd_len);
3155                 seg->bounce_dma = dma_map_single(dev, seg->bounce_buf,
3156                                                  max_pkt, DMA_TO_DEVICE);
3157         } else {
3158                 seg->bounce_dma = dma_map_single(dev, seg->bounce_buf,
3159                                                  max_pkt, DMA_FROM_DEVICE);
3160         }
3161
3162         if (dma_mapping_error(dev, seg->bounce_dma)) {
3163                 /* try without aligning. Some host controllers survive */
3164                 xhci_warn(xhci, "Failed mappin