1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _LINUX_DMA_MAPPING_H
3 #define _LINUX_DMA_MAPPING_H
5 #include <linux/sizes.h>
6 #include <linux/string.h>
7 #include <linux/device.h>
9 #include <linux/dma-debug.h>
10 #include <linux/dma-direction.h>
11 #include <linux/scatterlist.h>
12 #include <linux/kmemcheck.h>
13 #include <linux/bug.h>
14 #include <linux/mem_encrypt.h>
17 * List of possible attributes associated with a DMA mapping. The semantics
18 * of each attribute should be defined in Documentation/DMA-attributes.txt.
20 * DMA_ATTR_WRITE_BARRIER: DMA to a memory region with this attribute
21 * forces all pending DMA writes to complete.
23 #define DMA_ATTR_WRITE_BARRIER (1UL << 0)
25 * DMA_ATTR_WEAK_ORDERING: Specifies that reads and writes to the mapping
26 * may be weakly ordered, that is that reads and writes may pass each other.
28 #define DMA_ATTR_WEAK_ORDERING (1UL << 1)
30 * DMA_ATTR_WRITE_COMBINE: Specifies that writes to the mapping may be
31 * buffered to improve performance.
33 #define DMA_ATTR_WRITE_COMBINE (1UL << 2)
35 * DMA_ATTR_NON_CONSISTENT: Lets the platform to choose to return either
36 * consistent or non-consistent memory as it sees fit.
38 #define DMA_ATTR_NON_CONSISTENT (1UL << 3)
40 * DMA_ATTR_NO_KERNEL_MAPPING: Lets the platform to avoid creating a kernel
41 * virtual mapping for the allocated buffer.
43 #define DMA_ATTR_NO_KERNEL_MAPPING (1UL << 4)
45 * DMA_ATTR_SKIP_CPU_SYNC: Allows platform code to skip synchronization of
46 * the CPU cache for the given buffer assuming that it has been already
47 * transferred to 'device' domain.
49 #define DMA_ATTR_SKIP_CPU_SYNC (1UL << 5)
51 * DMA_ATTR_FORCE_CONTIGUOUS: Forces contiguous allocation of the buffer
54 #define DMA_ATTR_FORCE_CONTIGUOUS (1UL << 6)
56 * DMA_ATTR_ALLOC_SINGLE_PAGES: This is a hint to the DMA-mapping subsystem
57 * that it's probably not worth the time to try to allocate memory to in a way
58 * that gives better TLB efficiency.
60 #define DMA_ATTR_ALLOC_SINGLE_PAGES (1UL << 7)
62 * DMA_ATTR_NO_WARN: This tells the DMA-mapping subsystem to suppress
63 * allocation failure reports (similarly to __GFP_NOWARN).
65 #define DMA_ATTR_NO_WARN (1UL << 8)
68 * DMA_ATTR_PRIVILEGED: used to indicate that the buffer is fully
69 * accessible at an elevated privilege level (and ideally inaccessible or
70 * at least read-only at lesser-privileged levels).
72 #define DMA_ATTR_PRIVILEGED (1UL << 9)
75 * A dma_addr_t can hold any valid DMA or bus address for the platform.
76 * It can be given to a device to use as a DMA source or target. A CPU cannot
77 * reference a dma_addr_t directly because there may be translation between
78 * its physical address space and the bus address space.
81 void* (*alloc)(struct device *dev, size_t size,
82 dma_addr_t *dma_handle, gfp_t gfp,
84 void (*free)(struct device *dev, size_t size,
85 void *vaddr, dma_addr_t dma_handle,
87 int (*mmap)(struct device *, struct vm_area_struct *,
88 void *, dma_addr_t, size_t,
91 int (*get_sgtable)(struct device *dev, struct sg_table *sgt, void *,
92 dma_addr_t, size_t, unsigned long attrs);
94 dma_addr_t (*map_page)(struct device *dev, struct page *page,
95 unsigned long offset, size_t size,
96 enum dma_data_direction dir,
98 void (*unmap_page)(struct device *dev, dma_addr_t dma_handle,
99 size_t size, enum dma_data_direction dir,
100 unsigned long attrs);
102 * map_sg returns 0 on error and a value > 0 on success.
103 * It should never return a value < 0.
105 int (*map_sg)(struct device *dev, struct scatterlist *sg,
106 int nents, enum dma_data_direction dir,
107 unsigned long attrs);
108 void (*unmap_sg)(struct device *dev,
109 struct scatterlist *sg, int nents,
110 enum dma_data_direction dir,
111 unsigned long attrs);
112 dma_addr_t (*map_resource)(struct device *dev, phys_addr_t phys_addr,
113 size_t size, enum dma_data_direction dir,
114 unsigned long attrs);
115 void (*unmap_resource)(struct device *dev, dma_addr_t dma_handle,
116 size_t size, enum dma_data_direction dir,
117 unsigned long attrs);
118 void (*sync_single_for_cpu)(struct device *dev,
119 dma_addr_t dma_handle, size_t size,
120 enum dma_data_direction dir);
121 void (*sync_single_for_device)(struct device *dev,
122 dma_addr_t dma_handle, size_t size,
123 enum dma_data_direction dir);
124 void (*sync_sg_for_cpu)(struct device *dev,
125 struct scatterlist *sg, int nents,
126 enum dma_data_direction dir);
127 void (*sync_sg_for_device)(struct device *dev,
128 struct scatterlist *sg, int nents,
129 enum dma_data_direction dir);
130 void (*cache_sync)(struct device *dev, void *vaddr, size_t size,
131 enum dma_data_direction direction);
132 int (*mapping_error)(struct device *dev, dma_addr_t dma_addr);
133 int (*dma_supported)(struct device *dev, u64 mask);
134 #ifdef ARCH_HAS_DMA_GET_REQUIRED_MASK
135 u64 (*get_required_mask)(struct device *dev);
140 extern const struct dma_map_ops dma_noop_ops;
141 extern const struct dma_map_ops dma_virt_ops;
143 #define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1))
145 #define DMA_MASK_NONE 0x0ULL
147 static inline int valid_dma_direction(int dma_direction)
149 return ((dma_direction == DMA_BIDIRECTIONAL) ||
150 (dma_direction == DMA_TO_DEVICE) ||
151 (dma_direction == DMA_FROM_DEVICE));
154 static inline int is_device_dma_capable(struct device *dev)
156 return dev->dma_mask != NULL && *dev->dma_mask != DMA_MASK_NONE;
159 #ifdef CONFIG_HAVE_GENERIC_DMA_COHERENT
161 * These three functions are only for dma allocator.
162 * Don't use them in device drivers.
164 int dma_alloc_from_dev_coherent(struct device *dev, ssize_t size,
165 dma_addr_t *dma_handle, void **ret);
166 int dma_release_from_dev_coherent(struct device *dev, int order, void *vaddr);
168 int dma_mmap_from_dev_coherent(struct device *dev, struct vm_area_struct *vma,
169 void *cpu_addr, size_t size, int *ret);
171 void *dma_alloc_from_global_coherent(ssize_t size, dma_addr_t *dma_handle);
172 int dma_release_from_global_coherent(int order, void *vaddr);
173 int dma_mmap_from_global_coherent(struct vm_area_struct *vma, void *cpu_addr,
174 size_t size, int *ret);
177 #define dma_alloc_from_dev_coherent(dev, size, handle, ret) (0)
178 #define dma_release_from_dev_coherent(dev, order, vaddr) (0)
179 #define dma_mmap_from_dev_coherent(dev, vma, vaddr, order, ret) (0)
181 static inline void *dma_alloc_from_global_coherent(ssize_t size,
182 dma_addr_t *dma_handle)
187 static inline int dma_release_from_global_coherent(int order, void *vaddr)
192 static inline int dma_mmap_from_global_coherent(struct vm_area_struct *vma,
193 void *cpu_addr, size_t size,
198 #endif /* CONFIG_HAVE_GENERIC_DMA_COHERENT */
200 #ifdef CONFIG_HAS_DMA
201 #include <asm/dma-mapping.h>
202 static inline const struct dma_map_ops *get_dma_ops(struct device *dev)
204 if (dev && dev->dma_ops)
206 return get_arch_dma_ops(dev ? dev->bus : NULL);
209 static inline void set_dma_ops(struct device *dev,
210 const struct dma_map_ops *dma_ops)
212 dev->dma_ops = dma_ops;
216 * Define the dma api to allow compilation but not linking of
217 * dma dependent code. Code that depends on the dma-mapping
218 * API needs to set 'depends on HAS_DMA' in its Kconfig
220 extern const struct dma_map_ops bad_dma_ops;
221 static inline const struct dma_map_ops *get_dma_ops(struct device *dev)
227 static inline dma_addr_t dma_map_single_attrs(struct device *dev, void *ptr,
229 enum dma_data_direction dir,
232 const struct dma_map_ops *ops = get_dma_ops(dev);
235 kmemcheck_mark_initialized(ptr, size);
236 BUG_ON(!valid_dma_direction(dir));
237 addr = ops->map_page(dev, virt_to_page(ptr),
238 offset_in_page(ptr), size,
240 debug_dma_map_page(dev, virt_to_page(ptr),
241 offset_in_page(ptr), size,
246 static inline void dma_unmap_single_attrs(struct device *dev, dma_addr_t addr,
248 enum dma_data_direction dir,
251 const struct dma_map_ops *ops = get_dma_ops(dev);
253 BUG_ON(!valid_dma_direction(dir));
255 ops->unmap_page(dev, addr, size, dir, attrs);
256 debug_dma_unmap_page(dev, addr, size, dir, true);
260 * dma_maps_sg_attrs returns 0 on error and > 0 on success.
261 * It should never return a value < 0.
263 static inline int dma_map_sg_attrs(struct device *dev, struct scatterlist *sg,
264 int nents, enum dma_data_direction dir,
267 const struct dma_map_ops *ops = get_dma_ops(dev);
269 struct scatterlist *s;
271 for_each_sg(sg, s, nents, i)
272 kmemcheck_mark_initialized(sg_virt(s), s->length);
273 BUG_ON(!valid_dma_direction(dir));
274 ents = ops->map_sg(dev, sg, nents, dir, attrs);
276 debug_dma_map_sg(dev, sg, nents, ents, dir);
281 static inline void dma_unmap_sg_attrs(struct device *dev, struct scatterlist *sg,
282 int nents, enum dma_data_direction dir,
285 const struct dma_map_ops *ops = get_dma_ops(dev);
287 BUG_ON(!valid_dma_direction(dir));
288 debug_dma_unmap_sg(dev, sg, nents, dir);
290 ops->unmap_sg(dev, sg, nents, dir, attrs);
293 static inline dma_addr_t dma_map_page_attrs(struct device *dev,
295 size_t offset, size_t size,
296 enum dma_data_direction dir,
299 const struct dma_map_ops *ops = get_dma_ops(dev);
302 kmemcheck_mark_initialized(page_address(page) + offset, size);
303 BUG_ON(!valid_dma_direction(dir));
304 addr = ops->map_page(dev, page, offset, size, dir, attrs);
305 debug_dma_map_page(dev, page, offset, size, dir, addr, false);
310 static inline void dma_unmap_page_attrs(struct device *dev,
311 dma_addr_t addr, size_t size,
312 enum dma_data_direction dir,
315 const struct dma_map_ops *ops = get_dma_ops(dev);
317 BUG_ON(!valid_dma_direction(dir));
319 ops->unmap_page(dev, addr, size, dir, attrs);
320 debug_dma_unmap_page(dev, addr, size, dir, false);
323 static inline dma_addr_t dma_map_resource(struct device *dev,
324 phys_addr_t phys_addr,
326 enum dma_data_direction dir,
329 const struct dma_map_ops *ops = get_dma_ops(dev);
332 BUG_ON(!valid_dma_direction(dir));
334 /* Don't allow RAM to be mapped */
335 BUG_ON(pfn_valid(PHYS_PFN(phys_addr)));
338 if (ops->map_resource)
339 addr = ops->map_resource(dev, phys_addr, size, dir, attrs);
341 debug_dma_map_resource(dev, phys_addr, size, dir, addr);
346 static inline void dma_unmap_resource(struct device *dev, dma_addr_t addr,
347 size_t size, enum dma_data_direction dir,
350 const struct dma_map_ops *ops = get_dma_ops(dev);
352 BUG_ON(!valid_dma_direction(dir));
353 if (ops->unmap_resource)
354 ops->unmap_resource(dev, addr, size, dir, attrs);
355 debug_dma_unmap_resource(dev, addr, size, dir);
358 static inline void dma_sync_single_for_cpu(struct device *dev, dma_addr_t addr,
360 enum dma_data_direction dir)
362 const struct dma_map_ops *ops = get_dma_ops(dev);
364 BUG_ON(!valid_dma_direction(dir));
365 if (ops->sync_single_for_cpu)
366 ops->sync_single_for_cpu(dev, addr, size, dir);
367 debug_dma_sync_single_for_cpu(dev, addr, size, dir);
370 static inline void dma_sync_single_for_device(struct device *dev,
371 dma_addr_t addr, size_t size,
372 enum dma_data_direction dir)
374 const struct dma_map_ops *ops = get_dma_ops(dev);
376 BUG_ON(!valid_dma_direction(dir));
377 if (ops->sync_single_for_device)
378 ops->sync_single_for_device(dev, addr, size, dir);
379 debug_dma_sync_single_for_device(dev, addr, size, dir);
382 static inline void dma_sync_single_range_for_cpu(struct device *dev,
384 unsigned long offset,
386 enum dma_data_direction dir)
388 const struct dma_map_ops *ops = get_dma_ops(dev);
390 BUG_ON(!valid_dma_direction(dir));
391 if (ops->sync_single_for_cpu)
392 ops->sync_single_for_cpu(dev, addr + offset, size, dir);
393 debug_dma_sync_single_range_for_cpu(dev, addr, offset, size, dir);
396 static inline void dma_sync_single_range_for_device(struct device *dev,
398 unsigned long offset,
400 enum dma_data_direction dir)
402 const struct dma_map_ops *ops = get_dma_ops(dev);
404 BUG_ON(!valid_dma_direction(dir));
405 if (ops->sync_single_for_device)
406 ops->sync_single_for_device(dev, addr + offset, size, dir);
407 debug_dma_sync_single_range_for_device(dev, addr, offset, size, dir);
411 dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
412 int nelems, enum dma_data_direction dir)
414 const struct dma_map_ops *ops = get_dma_ops(dev);
416 BUG_ON(!valid_dma_direction(dir));
417 if (ops->sync_sg_for_cpu)
418 ops->sync_sg_for_cpu(dev, sg, nelems, dir);
419 debug_dma_sync_sg_for_cpu(dev, sg, nelems, dir);
423 dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
424 int nelems, enum dma_data_direction dir)
426 const struct dma_map_ops *ops = get_dma_ops(dev);
428 BUG_ON(!valid_dma_direction(dir));
429 if (ops->sync_sg_for_device)
430 ops->sync_sg_for_device(dev, sg, nelems, dir);
431 debug_dma_sync_sg_for_device(dev, sg, nelems, dir);
435 #define dma_map_single(d, a, s, r) dma_map_single_attrs(d, a, s, r, 0)
436 #define dma_unmap_single(d, a, s, r) dma_unmap_single_attrs(d, a, s, r, 0)
437 #define dma_map_sg(d, s, n, r) dma_map_sg_attrs(d, s, n, r, 0)
438 #define dma_unmap_sg(d, s, n, r) dma_unmap_sg_attrs(d, s, n, r, 0)
439 #define dma_map_page(d, p, o, s, r) dma_map_page_attrs(d, p, o, s, r, 0)
440 #define dma_unmap_page(d, a, s, r) dma_unmap_page_attrs(d, a, s, r, 0)
443 dma_cache_sync(struct device *dev, void *vaddr, size_t size,
444 enum dma_data_direction dir)
446 const struct dma_map_ops *ops = get_dma_ops(dev);
448 BUG_ON(!valid_dma_direction(dir));
450 ops->cache_sync(dev, vaddr, size, dir);
453 extern int dma_common_mmap(struct device *dev, struct vm_area_struct *vma,
454 void *cpu_addr, dma_addr_t dma_addr, size_t size);
456 void *dma_common_contiguous_remap(struct page *page, size_t size,
457 unsigned long vm_flags,
458 pgprot_t prot, const void *caller);
460 void *dma_common_pages_remap(struct page **pages, size_t size,
461 unsigned long vm_flags, pgprot_t prot,
463 void dma_common_free_remap(void *cpu_addr, size_t size, unsigned long vm_flags);
466 * dma_mmap_attrs - map a coherent DMA allocation into user space
467 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
468 * @vma: vm_area_struct describing requested user mapping
469 * @cpu_addr: kernel CPU-view address returned from dma_alloc_attrs
470 * @handle: device-view address returned from dma_alloc_attrs
471 * @size: size of memory originally requested in dma_alloc_attrs
472 * @attrs: attributes of mapping properties requested in dma_alloc_attrs
474 * Map a coherent DMA buffer previously allocated by dma_alloc_attrs
475 * into user space. The coherent DMA buffer must not be freed by the
476 * driver until the user space mapping has been released.
479 dma_mmap_attrs(struct device *dev, struct vm_area_struct *vma, void *cpu_addr,
480 dma_addr_t dma_addr, size_t size, unsigned long attrs)
482 const struct dma_map_ops *ops = get_dma_ops(dev);
485 return ops->mmap(dev, vma, cpu_addr, dma_addr, size, attrs);
486 return dma_common_mmap(dev, vma, cpu_addr, dma_addr, size);
489 #define dma_mmap_coherent(d, v, c, h, s) dma_mmap_attrs(d, v, c, h, s, 0)
492 dma_common_get_sgtable(struct device *dev, struct sg_table *sgt,
493 void *cpu_addr, dma_addr_t dma_addr, size_t size);
496 dma_get_sgtable_attrs(struct device *dev, struct sg_table *sgt, void *cpu_addr,
497 dma_addr_t dma_addr, size_t size,
500 const struct dma_map_ops *ops = get_dma_ops(dev);
502 if (ops->get_sgtable)
503 return ops->get_sgtable(dev, sgt, cpu_addr, dma_addr, size,
505 return dma_common_get_sgtable(dev, sgt, cpu_addr, dma_addr, size);
508 #define dma_get_sgtable(d, t, v, h, s) dma_get_sgtable_attrs(d, t, v, h, s, 0)
510 #ifndef arch_dma_alloc_attrs
511 #define arch_dma_alloc_attrs(dev, flag) (true)
514 static inline void *dma_alloc_attrs(struct device *dev, size_t size,
515 dma_addr_t *dma_handle, gfp_t flag,
518 const struct dma_map_ops *ops = get_dma_ops(dev);
523 if (dma_alloc_from_dev_coherent(dev, size, dma_handle, &cpu_addr))
526 if (!arch_dma_alloc_attrs(&dev, &flag))
531 cpu_addr = ops->alloc(dev, size, dma_handle, flag, attrs);
532 debug_dma_alloc_coherent(dev, size, *dma_handle, cpu_addr);
536 static inline void dma_free_attrs(struct device *dev, size_t size,
537 void *cpu_addr, dma_addr_t dma_handle,
540 const struct dma_map_ops *ops = get_dma_ops(dev);
543 WARN_ON(irqs_disabled());
545 if (dma_release_from_dev_coherent(dev, get_order(size), cpu_addr))
548 if (!ops->free || !cpu_addr)
551 debug_dma_free_coherent(dev, size, cpu_addr, dma_handle);
552 ops->free(dev, size, cpu_addr, dma_handle, attrs);
555 static inline void *dma_alloc_coherent(struct device *dev, size_t size,
556 dma_addr_t *dma_handle, gfp_t flag)
558 return dma_alloc_attrs(dev, size, dma_handle, flag, 0);
561 static inline void dma_free_coherent(struct device *dev, size_t size,
562 void *cpu_addr, dma_addr_t dma_handle)
564 return dma_free_attrs(dev, size, cpu_addr, dma_handle, 0);
567 static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
569 const struct dma_map_ops *ops = get_dma_ops(dev);
571 debug_dma_mapping_error(dev, dma_addr);
572 if (ops->mapping_error)
573 return ops->mapping_error(dev, dma_addr);
577 static inline void dma_check_mask(struct device *dev, u64 mask)
579 if (sme_active() && (mask < (((u64)sme_get_me_mask() << 1) - 1)))
580 dev_warn(dev, "SME is active, device will require DMA bounce buffers\n");
583 static inline int dma_supported(struct device *dev, u64 mask)
585 const struct dma_map_ops *ops = get_dma_ops(dev);
589 if (!ops->dma_supported)
591 return ops->dma_supported(dev, mask);
594 #ifndef HAVE_ARCH_DMA_SET_MASK
595 static inline int dma_set_mask(struct device *dev, u64 mask)
597 if (!dev->dma_mask || !dma_supported(dev, mask))
600 dma_check_mask(dev, mask);
602 *dev->dma_mask = mask;
607 static inline u64 dma_get_mask(struct device *dev)
609 if (dev && dev->dma_mask && *dev->dma_mask)
610 return *dev->dma_mask;
611 return DMA_BIT_MASK(32);
614 #ifdef CONFIG_ARCH_HAS_DMA_SET_COHERENT_MASK
615 int dma_set_coherent_mask(struct device *dev, u64 mask);
617 static inline int dma_set_coherent_mask(struct device *dev, u64 mask)
619 if (!dma_supported(dev, mask))
622 dma_check_mask(dev, mask);
624 dev->coherent_dma_mask = mask;
630 * Set both the DMA mask and the coherent DMA mask to the same thing.
631 * Note that we don't check the return value from dma_set_coherent_mask()
632 * as the DMA API guarantees that the coherent DMA mask can be set to
633 * the same or smaller than the streaming DMA mask.
635 static inline int dma_set_mask_and_coherent(struct device *dev, u64 mask)
637 int rc = dma_set_mask(dev, mask);
639 dma_set_coherent_mask(dev, mask);
644 * Similar to the above, except it deals with the case where the device
645 * does not have dev->dma_mask appropriately setup.
647 static inline int dma_coerce_mask_and_coherent(struct device *dev, u64 mask)
649 dev->dma_mask = &dev->coherent_dma_mask;
650 return dma_set_mask_and_coherent(dev, mask);
653 extern u64 dma_get_required_mask(struct device *dev);
655 #ifndef arch_setup_dma_ops
656 static inline void arch_setup_dma_ops(struct device *dev, u64 dma_base,
657 u64 size, const struct iommu_ops *iommu,
661 #ifndef arch_teardown_dma_ops
662 static inline void arch_teardown_dma_ops(struct device *dev) { }
665 static inline unsigned int dma_get_max_seg_size(struct device *dev)
667 if (dev->dma_parms && dev->dma_parms->max_segment_size)
668 return dev->dma_parms->max_segment_size;
672 static inline unsigned int dma_set_max_seg_size(struct device *dev,
675 if (dev->dma_parms) {
676 dev->dma_parms->max_segment_size = size;
682 static inline unsigned long dma_get_seg_boundary(struct device *dev)
684 if (dev->dma_parms && dev->dma_parms->segment_boundary_mask)
685 return dev->dma_parms->segment_boundary_mask;
686 return DMA_BIT_MASK(32);
689 static inline int dma_set_seg_boundary(struct device *dev, unsigned long mask)
691 if (dev->dma_parms) {
692 dev->dma_parms->segment_boundary_mask = mask;
699 static inline unsigned long dma_max_pfn(struct device *dev)
701 return *dev->dma_mask >> PAGE_SHIFT;
705 static inline void *dma_zalloc_coherent(struct device *dev, size_t size,
706 dma_addr_t *dma_handle, gfp_t flag)
708 void *ret = dma_alloc_coherent(dev, size, dma_handle,
713 static inline int dma_get_cache_alignment(void)
715 #ifdef ARCH_DMA_MINALIGN
716 return ARCH_DMA_MINALIGN;
721 /* flags for the coherent memory api */
722 #define DMA_MEMORY_EXCLUSIVE 0x01
724 #ifdef CONFIG_HAVE_GENERIC_DMA_COHERENT
725 int dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr,
726 dma_addr_t device_addr, size_t size, int flags);
727 void dma_release_declared_memory(struct device *dev);
728 void *dma_mark_declared_memory_occupied(struct device *dev,
729 dma_addr_t device_addr, size_t size);
732 dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr,
733 dma_addr_t device_addr, size_t size, int flags)
739 dma_release_declared_memory(struct device *dev)
744 dma_mark_declared_memory_occupied(struct device *dev,
745 dma_addr_t device_addr, size_t size)
747 return ERR_PTR(-EBUSY);
749 #endif /* CONFIG_HAVE_GENERIC_DMA_COHERENT */
751 #ifdef CONFIG_HAS_DMA
752 int dma_configure(struct device *dev);
753 void dma_deconfigure(struct device *dev);
755 static inline int dma_configure(struct device *dev)
760 static inline void dma_deconfigure(struct device *dev) {}
766 extern void *dmam_alloc_coherent(struct device *dev, size_t size,
767 dma_addr_t *dma_handle, gfp_t gfp);
768 extern void dmam_free_coherent(struct device *dev, size_t size, void *vaddr,
769 dma_addr_t dma_handle);
770 extern void *dmam_alloc_attrs(struct device *dev, size_t size,
771 dma_addr_t *dma_handle, gfp_t gfp,
772 unsigned long attrs);
773 #ifdef CONFIG_HAVE_GENERIC_DMA_COHERENT
774 extern int dmam_declare_coherent_memory(struct device *dev,
775 phys_addr_t phys_addr,
776 dma_addr_t device_addr, size_t size,
778 extern void dmam_release_declared_memory(struct device *dev);
779 #else /* CONFIG_HAVE_GENERIC_DMA_COHERENT */
780 static inline int dmam_declare_coherent_memory(struct device *dev,
781 phys_addr_t phys_addr, dma_addr_t device_addr,
782 size_t size, gfp_t gfp)
787 static inline void dmam_release_declared_memory(struct device *dev)
790 #endif /* CONFIG_HAVE_GENERIC_DMA_COHERENT */
792 static inline void *dma_alloc_wc(struct device *dev, size_t size,
793 dma_addr_t *dma_addr, gfp_t gfp)
795 return dma_alloc_attrs(dev, size, dma_addr, gfp,
796 DMA_ATTR_WRITE_COMBINE);
798 #ifndef dma_alloc_writecombine
799 #define dma_alloc_writecombine dma_alloc_wc
802 static inline void dma_free_wc(struct device *dev, size_t size,
803 void *cpu_addr, dma_addr_t dma_addr)
805 return dma_free_attrs(dev, size, cpu_addr, dma_addr,
806 DMA_ATTR_WRITE_COMBINE);
808 #ifndef dma_free_writecombine
809 #define dma_free_writecombine dma_free_wc
812 static inline int dma_mmap_wc(struct device *dev,
813 struct vm_area_struct *vma,
814 void *cpu_addr, dma_addr_t dma_addr,
817 return dma_mmap_attrs(dev, vma, cpu_addr, dma_addr, size,
818 DMA_ATTR_WRITE_COMBINE);
820 #ifndef dma_mmap_writecombine
821 #define dma_mmap_writecombine dma_mmap_wc
824 #if defined(CONFIG_NEED_DMA_MAP_STATE) || defined(CONFIG_DMA_API_DEBUG)
825 #define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME) dma_addr_t ADDR_NAME
826 #define DEFINE_DMA_UNMAP_LEN(LEN_NAME) __u32 LEN_NAME
827 #define dma_unmap_addr(PTR, ADDR_NAME) ((PTR)->ADDR_NAME)
828 #define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) (((PTR)->ADDR_NAME) = (VAL))
829 #define dma_unmap_len(PTR, LEN_NAME) ((PTR)->LEN_NAME)
830 #define dma_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL))
832 #define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME)
833 #define DEFINE_DMA_UNMAP_LEN(LEN_NAME)
834 #define dma_unmap_addr(PTR, ADDR_NAME) (0)
835 #define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
836 #define dma_unmap_len(PTR, LEN_NAME) (0)
837 #define dma_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)