2 * skl.c - Implementation of ASoC Intel SKL HD Audio driver
4 * Copyright (C) 2014-2015 Intel Corp
5 * Author: Jeeja KP <jeeja.kp@intel.com>
7 * Derived mostly from Intel HDA driver with following copyrights:
8 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
9 * PeiSen Hou <pshou@realtek.com.tw>
10 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; version 2 of the License.
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
21 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
24 #include <linux/module.h>
25 #include <linux/pci.h>
26 #include <linux/pm_runtime.h>
27 #include <linux/platform_device.h>
28 #include <linux/firmware.h>
29 #include <linux/delay.h>
30 #include <sound/pcm.h>
31 #include "../common/sst-acpi.h"
32 #include <sound/hda_register.h>
33 #include <sound/hdaudio.h>
34 #include <sound/hda_i915.h>
36 #include "skl-sst-dsp.h"
37 #include "skl-sst-ipc.h"
39 static struct skl_machine_pdata skl_dmic_data;
42 * initialize the PCI registers
44 static void skl_update_pci_byte(struct pci_dev *pci, unsigned int reg,
45 unsigned char mask, unsigned char val)
49 pci_read_config_byte(pci, reg, &data);
52 pci_write_config_byte(pci, reg, data);
55 static void skl_init_pci(struct skl *skl)
57 struct hdac_ext_bus *ebus = &skl->ebus;
60 * Clear bits 0-2 of PCI register TCSEL (at offset 0x44)
61 * TCSEL == Traffic Class Select Register, which sets PCI express QOS
62 * Ensuring these bits are 0 clears playback static on some HD Audio
64 * The PCI register TCSEL is defined in the Intel manuals.
66 dev_dbg(ebus_to_hbus(ebus)->dev, "Clearing TCSEL\n");
67 skl_update_pci_byte(skl->pci, AZX_PCIREG_TCSEL, 0x07, 0);
70 static void update_pci_dword(struct pci_dev *pci,
71 unsigned int reg, u32 mask, u32 val)
75 pci_read_config_dword(pci, reg, &data);
78 pci_write_config_dword(pci, reg, data);
82 * skl_enable_miscbdcge - enable/dsiable CGCTL.MISCBDCGE bits
84 * @dev: device pointer
85 * @enable: enable/disable flag
87 static void skl_enable_miscbdcge(struct device *dev, bool enable)
89 struct pci_dev *pci = to_pci_dev(dev);
92 val = enable ? AZX_CGCTL_MISCBDCGE_MASK : 0;
94 update_pci_dword(pci, AZX_PCIREG_CGCTL, AZX_CGCTL_MISCBDCGE_MASK, val);
98 * While performing reset, controller may not come back properly causing
99 * issues, so recommendation is to set CGCTL.MISCBDCGE to 0 then do reset
100 * (init chip) and then again set CGCTL.MISCBDCGE to 1
102 static int skl_init_chip(struct hdac_bus *bus, bool full_reset)
106 skl_enable_miscbdcge(bus->dev, false);
107 ret = snd_hdac_bus_init_chip(bus, full_reset);
108 skl_enable_miscbdcge(bus->dev, true);
113 void skl_update_d0i3c(struct device *dev, bool enable)
115 struct pci_dev *pci = to_pci_dev(dev);
116 struct hdac_ext_bus *ebus = pci_get_drvdata(pci);
117 struct hdac_bus *bus = ebus_to_hbus(ebus);
121 reg = snd_hdac_chip_readb(bus, VS_D0I3C);
122 /* Do not write to D0I3C until command in progress bit is cleared */
123 while ((reg & AZX_REG_VS_D0I3C_CIP) && --timeout) {
125 reg = snd_hdac_chip_readb(bus, VS_D0I3C);
128 /* Highly unlikely. But if it happens, flag error explicitly */
130 dev_err(bus->dev, "Before D0I3C update: D0I3C CIP timeout\n");
135 reg = reg | AZX_REG_VS_D0I3C_I3;
137 reg = reg & (~AZX_REG_VS_D0I3C_I3);
139 snd_hdac_chip_writeb(bus, VS_D0I3C, reg);
142 /* Wait for cmd in progress to be cleared before exiting the function */
143 reg = snd_hdac_chip_readb(bus, VS_D0I3C);
144 while ((reg & AZX_REG_VS_D0I3C_CIP) && --timeout) {
146 reg = snd_hdac_chip_readb(bus, VS_D0I3C);
149 /* Highly unlikely. But if it happens, flag error explicitly */
151 dev_err(bus->dev, "After D0I3C update: D0I3C CIP timeout\n");
155 dev_dbg(bus->dev, "D0I3C register = 0x%x\n",
156 snd_hdac_chip_readb(bus, VS_D0I3C));
159 /* called from IRQ */
160 static void skl_stream_update(struct hdac_bus *bus, struct hdac_stream *hstr)
162 snd_pcm_period_elapsed(hstr->substream);
165 static irqreturn_t skl_interrupt(int irq, void *dev_id)
167 struct hdac_ext_bus *ebus = dev_id;
168 struct hdac_bus *bus = ebus_to_hbus(ebus);
171 if (!pm_runtime_active(bus->dev))
174 spin_lock(&bus->reg_lock);
176 status = snd_hdac_chip_readl(bus, INTSTS);
177 if (status == 0 || status == 0xffffffff) {
178 spin_unlock(&bus->reg_lock);
183 status = snd_hdac_chip_readb(bus, RIRBSTS);
184 if (status & RIRB_INT_MASK) {
185 if (status & RIRB_INT_RESPONSE)
186 snd_hdac_bus_update_rirb(bus);
187 snd_hdac_chip_writeb(bus, RIRBSTS, RIRB_INT_MASK);
190 spin_unlock(&bus->reg_lock);
192 return snd_hdac_chip_readl(bus, INTSTS) ? IRQ_WAKE_THREAD : IRQ_HANDLED;
195 static irqreturn_t skl_threaded_handler(int irq, void *dev_id)
197 struct hdac_ext_bus *ebus = dev_id;
198 struct hdac_bus *bus = ebus_to_hbus(ebus);
201 status = snd_hdac_chip_readl(bus, INTSTS);
203 snd_hdac_bus_handle_stream_irq(bus, status, skl_stream_update);
208 static int skl_acquire_irq(struct hdac_ext_bus *ebus, int do_disconnect)
210 struct skl *skl = ebus_to_skl(ebus);
211 struct hdac_bus *bus = ebus_to_hbus(ebus);
214 ret = request_threaded_irq(skl->pci->irq, skl_interrupt,
215 skl_threaded_handler,
217 KBUILD_MODNAME, ebus);
220 "unable to grab IRQ %d, disabling device\n",
225 bus->irq = skl->pci->irq;
226 pci_intx(skl->pci, 1);
231 static int skl_suspend_late(struct device *dev)
233 struct pci_dev *pci = to_pci_dev(dev);
234 struct hdac_ext_bus *ebus = pci_get_drvdata(pci);
235 struct skl *skl = ebus_to_skl(ebus);
237 return skl_suspend_late_dsp(skl);
241 static int _skl_suspend(struct hdac_ext_bus *ebus)
243 struct skl *skl = ebus_to_skl(ebus);
244 struct hdac_bus *bus = ebus_to_hbus(ebus);
245 struct pci_dev *pci = to_pci_dev(bus->dev);
248 snd_hdac_ext_bus_link_power_down_all(ebus);
250 ret = skl_suspend_dsp(skl);
254 snd_hdac_bus_stop_chip(bus);
255 update_pci_dword(pci, AZX_PCIREG_PGCTL,
256 AZX_PGCTL_LSRMD_MASK, AZX_PGCTL_LSRMD_MASK);
257 skl_enable_miscbdcge(bus->dev, false);
258 snd_hdac_bus_enter_link_reset(bus);
259 skl_enable_miscbdcge(bus->dev, true);
260 skl_cleanup_resources(skl);
265 static int _skl_resume(struct hdac_ext_bus *ebus)
267 struct skl *skl = ebus_to_skl(ebus);
268 struct hdac_bus *bus = ebus_to_hbus(ebus);
271 skl_init_chip(bus, true);
273 return skl_resume_dsp(skl);
277 #ifdef CONFIG_PM_SLEEP
281 static int skl_suspend(struct device *dev)
283 struct pci_dev *pci = to_pci_dev(dev);
284 struct hdac_ext_bus *ebus = pci_get_drvdata(pci);
285 struct skl *skl = ebus_to_skl(ebus);
286 struct hdac_bus *bus = ebus_to_hbus(ebus);
290 * Do not suspend if streams which are marked ignore suspend are
291 * running, we need to save the state for these and continue
293 if (skl->supend_active) {
294 /* turn off the links and stop the CORB/RIRB DMA if it is On */
295 snd_hdac_ext_bus_link_power_down_all(ebus);
297 if (ebus->cmd_dma_state)
298 snd_hdac_bus_stop_cmd_io(&ebus->bus);
300 enable_irq_wake(bus->irq);
303 ret = _skl_suspend(ebus);
306 skl->skl_sst->fw_loaded = false;
309 if (IS_ENABLED(CONFIG_SND_SOC_HDAC_HDMI)) {
310 ret = snd_hdac_display_power(bus, false);
313 "Cannot turn OFF display power on i915\n");
319 static int skl_resume(struct device *dev)
321 struct pci_dev *pci = to_pci_dev(dev);
322 struct hdac_ext_bus *ebus = pci_get_drvdata(pci);
323 struct skl *skl = ebus_to_skl(ebus);
324 struct hdac_bus *bus = ebus_to_hbus(ebus);
325 struct hdac_ext_link *hlink = NULL;
328 /* Turned OFF in HDMI codec driver after codec reconfiguration */
329 if (IS_ENABLED(CONFIG_SND_SOC_HDAC_HDMI)) {
330 ret = snd_hdac_display_power(bus, true);
333 "Cannot turn on display power on i915\n");
339 * resume only when we are not in suspend active, otherwise need to
342 if (skl->supend_active) {
343 pci_restore_state(pci);
344 snd_hdac_ext_bus_link_power_up_all(ebus);
345 disable_irq_wake(bus->irq);
347 * turn On the links which are On before active suspend
348 * and start the CORB/RIRB DMA if On before
351 list_for_each_entry(hlink, &ebus->hlink_list, list) {
352 if (hlink->ref_count)
353 snd_hdac_ext_bus_link_power_up(hlink);
356 if (ebus->cmd_dma_state)
357 snd_hdac_bus_init_cmd_io(&ebus->bus);
359 ret = _skl_resume(ebus);
361 /* turn off the links which are off before suspend */
362 list_for_each_entry(hlink, &ebus->hlink_list, list) {
363 if (!hlink->ref_count)
364 snd_hdac_ext_bus_link_power_down(hlink);
367 if (!ebus->cmd_dma_state)
368 snd_hdac_bus_stop_cmd_io(&ebus->bus);
373 #endif /* CONFIG_PM_SLEEP */
376 static int skl_runtime_suspend(struct device *dev)
378 struct pci_dev *pci = to_pci_dev(dev);
379 struct hdac_ext_bus *ebus = pci_get_drvdata(pci);
380 struct hdac_bus *bus = ebus_to_hbus(ebus);
382 dev_dbg(bus->dev, "in %s\n", __func__);
384 return _skl_suspend(ebus);
387 static int skl_runtime_resume(struct device *dev)
389 struct pci_dev *pci = to_pci_dev(dev);
390 struct hdac_ext_bus *ebus = pci_get_drvdata(pci);
391 struct hdac_bus *bus = ebus_to_hbus(ebus);
393 dev_dbg(bus->dev, "in %s\n", __func__);
395 return _skl_resume(ebus);
397 #endif /* CONFIG_PM */
399 static const struct dev_pm_ops skl_pm = {
400 SET_SYSTEM_SLEEP_PM_OPS(skl_suspend, skl_resume)
401 SET_RUNTIME_PM_OPS(skl_runtime_suspend, skl_runtime_resume, NULL)
402 .suspend_late = skl_suspend_late,
408 static int skl_free(struct hdac_ext_bus *ebus)
410 struct skl *skl = ebus_to_skl(ebus);
411 struct hdac_bus *bus = ebus_to_hbus(ebus);
413 skl->init_done = 0; /* to be sure */
415 snd_hdac_ext_stop_streams(ebus);
418 free_irq(bus->irq, (void *)bus);
419 snd_hdac_bus_free_stream_pages(bus);
420 snd_hdac_stream_free_all(ebus);
421 snd_hdac_link_free_all(ebus);
424 iounmap(bus->remap_addr);
426 pci_release_regions(skl->pci);
427 pci_disable_device(skl->pci);
429 snd_hdac_ext_bus_exit(ebus);
431 cancel_work_sync(&skl->probe_work);
432 if (IS_ENABLED(CONFIG_SND_SOC_HDAC_HDMI))
433 snd_hdac_i915_exit(&ebus->bus);
438 static int skl_machine_device_register(struct skl *skl, void *driver_data)
440 struct hdac_bus *bus = ebus_to_hbus(&skl->ebus);
441 struct platform_device *pdev;
442 struct sst_acpi_mach *mach = driver_data;
445 mach = sst_acpi_find_machine(mach);
447 dev_err(bus->dev, "No matching machine driver found\n");
450 skl->fw_name = mach->fw_filename;
452 pdev = platform_device_alloc(mach->drv_name, -1);
454 dev_err(bus->dev, "platform device alloc failed\n");
458 ret = platform_device_add(pdev);
460 dev_err(bus->dev, "failed to add machine device\n");
461 platform_device_put(pdev);
466 dev_set_drvdata(&pdev->dev, mach->pdata);
473 static void skl_machine_device_unregister(struct skl *skl)
476 platform_device_unregister(skl->i2s_dev);
479 static int skl_dmic_device_register(struct skl *skl)
481 struct hdac_bus *bus = ebus_to_hbus(&skl->ebus);
482 struct platform_device *pdev;
485 /* SKL has one dmic port, so allocate dmic device for this */
486 pdev = platform_device_alloc("dmic-codec", -1);
488 dev_err(bus->dev, "failed to allocate dmic device\n");
492 ret = platform_device_add(pdev);
494 dev_err(bus->dev, "failed to add dmic device: %d\n", ret);
495 platform_device_put(pdev);
498 skl->dmic_dev = pdev;
503 static void skl_dmic_device_unregister(struct skl *skl)
506 platform_device_unregister(skl->dmic_dev);
510 * Probe the given codec address
512 static int probe_codec(struct hdac_ext_bus *ebus, int addr)
514 struct hdac_bus *bus = ebus_to_hbus(ebus);
515 unsigned int cmd = (addr << 28) | (AC_NODE_ROOT << 20) |
516 (AC_VERB_PARAMETERS << 8) | AC_PAR_VENDOR_ID;
517 unsigned int res = -1;
519 mutex_lock(&bus->cmd_mutex);
520 snd_hdac_bus_send_cmd(bus, cmd);
521 snd_hdac_bus_get_response(bus, addr, &res);
522 mutex_unlock(&bus->cmd_mutex);
525 dev_dbg(bus->dev, "codec #%d probed OK\n", addr);
527 return snd_hdac_ext_bus_device_init(ebus, addr);
530 /* Codec initialization */
531 static void skl_codec_create(struct hdac_ext_bus *ebus)
533 struct hdac_bus *bus = ebus_to_hbus(ebus);
536 max_slots = HDA_MAX_CODECS;
538 /* First try to probe all given codec slots */
539 for (c = 0; c < max_slots; c++) {
540 if ((bus->codec_mask & (1 << c))) {
541 if (probe_codec(ebus, c) < 0) {
543 * Some BIOSen give you wrong codec addresses
547 "Codec #%d probe error; disabling it...\n", c);
548 bus->codec_mask &= ~(1 << c);
550 * More badly, accessing to a non-existing
551 * codec often screws up the controller bus,
552 * and disturbs the further communications.
553 * Thus if an error occurs during probing,
554 * better to reset the controller bus to get
555 * back to the sanity state.
557 snd_hdac_bus_stop_chip(bus);
558 skl_init_chip(bus, true);
564 static const struct hdac_bus_ops bus_core_ops = {
565 .command = snd_hdac_bus_send_cmd,
566 .get_response = snd_hdac_bus_get_response,
569 static int skl_i915_init(struct hdac_bus *bus)
574 * The HDMI codec is in GPU so we need to ensure that it is powered
575 * up and ready for probe
577 err = snd_hdac_i915_init(bus);
581 err = snd_hdac_display_power(bus, true);
583 dev_err(bus->dev, "Cannot turn on display power on i915\n");
588 static void skl_probe_work(struct work_struct *work)
590 struct skl *skl = container_of(work, struct skl, probe_work);
591 struct hdac_ext_bus *ebus = &skl->ebus;
592 struct hdac_bus *bus = ebus_to_hbus(ebus);
593 struct hdac_ext_link *hlink = NULL;
596 if (IS_ENABLED(CONFIG_SND_SOC_HDAC_HDMI)) {
597 err = skl_i915_init(bus);
602 err = skl_init_chip(bus, true);
604 dev_err(bus->dev, "Init chip failed with err: %d\n", err);
608 /* codec detection */
609 if (!bus->codec_mask)
610 dev_info(bus->dev, "no hda codecs found!\n");
612 /* create codec instances */
613 skl_codec_create(ebus);
615 if (IS_ENABLED(CONFIG_SND_SOC_HDAC_HDMI)) {
616 err = snd_hdac_display_power(bus, false);
618 dev_err(bus->dev, "Cannot turn off display power on i915\n");
623 /* register platform dai and controls */
624 err = skl_platform_register(bus->dev);
628 * we are done probing so decrement link counts
630 list_for_each_entry(hlink, &ebus->hlink_list, list)
631 snd_hdac_ext_bus_link_put(ebus, hlink);
634 pm_runtime_put_noidle(bus->dev);
635 pm_runtime_allow(bus->dev);
641 if (IS_ENABLED(CONFIG_SND_SOC_HDAC_HDMI))
642 err = snd_hdac_display_power(bus, false);
648 static int skl_create(struct pci_dev *pci,
649 const struct hdac_io_ops *io_ops,
653 struct hdac_ext_bus *ebus;
659 err = pci_enable_device(pci);
663 skl = devm_kzalloc(&pci->dev, sizeof(*skl), GFP_KERNEL);
665 pci_disable_device(pci);
669 snd_hdac_ext_bus_init(ebus, &pci->dev, &bus_core_ops, io_ops);
670 ebus->bus.use_posbuf = 1;
672 INIT_WORK(&skl->probe_work, skl_probe_work);
674 ebus->bus.bdl_pos_adj = 0;
681 static int skl_first_init(struct hdac_ext_bus *ebus)
683 struct skl *skl = ebus_to_skl(ebus);
684 struct hdac_bus *bus = ebus_to_hbus(ebus);
685 struct pci_dev *pci = skl->pci;
688 int cp_streams, pb_streams, start_idx;
690 err = pci_request_regions(pci, "Skylake HD audio");
694 bus->addr = pci_resource_start(pci, 0);
695 bus->remap_addr = pci_ioremap_bar(pci, 0);
696 if (bus->remap_addr == NULL) {
697 dev_err(bus->dev, "ioremap error\n");
701 skl_init_chip(bus, true);
703 snd_hdac_bus_parse_capabilities(bus);
705 if (skl_acquire_irq(ebus, 0) < 0)
709 synchronize_irq(bus->irq);
711 gcap = snd_hdac_chip_readw(bus, GCAP);
712 dev_dbg(bus->dev, "chipset global capabilities = 0x%x\n", gcap);
714 /* allow 64bit DMA address if supported by H/W */
715 if (!dma_set_mask(bus->dev, DMA_BIT_MASK(64))) {
716 dma_set_coherent_mask(bus->dev, DMA_BIT_MASK(64));
718 dma_set_mask(bus->dev, DMA_BIT_MASK(32));
719 dma_set_coherent_mask(bus->dev, DMA_BIT_MASK(32));
722 /* read number of streams from GCAP register */
723 cp_streams = (gcap >> 8) & 0x0f;
724 pb_streams = (gcap >> 12) & 0x0f;
726 if (!pb_streams && !cp_streams)
729 ebus->num_streams = cp_streams + pb_streams;
731 /* initialize streams */
732 snd_hdac_ext_stream_init_all
733 (ebus, 0, cp_streams, SNDRV_PCM_STREAM_CAPTURE);
734 start_idx = cp_streams;
735 snd_hdac_ext_stream_init_all
736 (ebus, start_idx, pb_streams, SNDRV_PCM_STREAM_PLAYBACK);
738 err = snd_hdac_bus_alloc_stream_pages(bus);
742 /* initialize chip */
745 return skl_init_chip(bus, true);
748 static int skl_probe(struct pci_dev *pci,
749 const struct pci_device_id *pci_id)
752 struct hdac_ext_bus *ebus = NULL;
753 struct hdac_bus *bus = NULL;
756 /* we use ext core ops, so provide NULL for ops here */
757 err = skl_create(pci, NULL, &skl);
762 bus = ebus_to_hbus(ebus);
764 err = skl_first_init(ebus);
768 skl->pci_id = pci->device;
770 device_disable_async_suspend(bus->dev);
772 skl->nhlt = skl_nhlt_init(bus->dev);
774 if (skl->nhlt == NULL) {
779 err = skl_nhlt_create_sysfs(skl);
783 skl_nhlt_update_topology_bin(skl);
785 pci_set_drvdata(skl->pci, ebus);
787 skl_dmic_data.dmic_num = skl_get_dmic_geo(skl);
789 /* check if dsp is there */
791 err = skl_machine_device_register(skl,
792 (void *)pci_id->driver_data);
796 err = skl_init_dsp(skl);
798 dev_dbg(bus->dev, "error failed to register dsp\n");
801 skl->skl_sst->enable_miscbdcge = skl_enable_miscbdcge;
805 snd_hdac_ext_bus_get_ml_capabilities(ebus);
807 snd_hdac_bus_stop_chip(bus);
809 /* create device for soc dmic */
810 err = skl_dmic_device_register(skl);
814 schedule_work(&skl->probe_work);
821 skl_machine_device_unregister(skl);
823 skl_nhlt_free(skl->nhlt);
830 static void skl_shutdown(struct pci_dev *pci)
832 struct hdac_ext_bus *ebus = pci_get_drvdata(pci);
833 struct hdac_bus *bus = ebus_to_hbus(ebus);
834 struct hdac_stream *s;
835 struct hdac_ext_stream *stream;
841 skl = ebus_to_skl(ebus);
846 snd_hdac_ext_stop_streams(ebus);
847 list_for_each_entry(s, &bus->stream_list, list) {
848 stream = stream_to_hdac_ext_stream(s);
849 snd_hdac_ext_stream_decouple(ebus, stream, false);
852 snd_hdac_bus_stop_chip(bus);
855 static void skl_remove(struct pci_dev *pci)
857 struct hdac_ext_bus *ebus = pci_get_drvdata(pci);
858 struct skl *skl = ebus_to_skl(ebus);
860 release_firmware(skl->tplg);
862 pm_runtime_get_noresume(&pci->dev);
864 /* codec removal, invoke bus_device_remove */
865 snd_hdac_ext_bus_device_remove(ebus);
868 skl_platform_unregister(&pci->dev);
870 skl_machine_device_unregister(skl);
871 skl_dmic_device_unregister(skl);
872 skl_nhlt_remove_sysfs(skl);
873 skl_nhlt_free(skl->nhlt);
875 dev_set_drvdata(&pci->dev, NULL);
878 static struct sst_codecs skl_codecs = {
880 .codecs = {"NAU88L25"}
883 static struct sst_codecs kbl_codecs = {
885 .codecs = {"NAU88L25"}
888 static struct sst_codecs bxt_codecs = {
890 .codecs = {"MX98357A"}
893 static struct sst_codecs kbl_poppy_codecs = {
895 .codecs = {"10EC5663"}
898 static struct sst_codecs kbl_5663_5514_codecs = {
900 .codecs = {"10EC5663", "10EC5514"}
904 static struct sst_acpi_mach sst_skl_devdata[] = {
907 .drv_name = "skl_alc286s_i2s",
908 .fw_filename = "intel/dsp_fw_release.bin",
912 .drv_name = "skl_n88l25_s4567",
913 .fw_filename = "intel/dsp_fw_release.bin",
914 .machine_quirk = sst_acpi_codec_list,
915 .quirk_data = &skl_codecs,
916 .pdata = &skl_dmic_data
920 .drv_name = "skl_n88l25_m98357a",
921 .fw_filename = "intel/dsp_fw_release.bin",
922 .machine_quirk = sst_acpi_codec_list,
923 .quirk_data = &skl_codecs,
924 .pdata = &skl_dmic_data
929 static struct sst_acpi_mach sst_bxtp_devdata[] = {
932 .drv_name = "bxt_alc298s_i2s",
933 .fw_filename = "intel/dsp_fw_bxtn.bin",
937 .drv_name = "bxt_da7219_max98357a_i2s",
938 .fw_filename = "intel/dsp_fw_bxtn.bin",
939 .machine_quirk = sst_acpi_codec_list,
940 .quirk_data = &bxt_codecs,
944 static struct sst_acpi_mach sst_kbl_devdata[] = {
947 .drv_name = "kbl_alc286s_i2s",
948 .fw_filename = "intel/dsp_fw_kbl.bin",
952 .drv_name = "kbl_n88l25_s4567",
953 .fw_filename = "intel/dsp_fw_kbl.bin",
954 .machine_quirk = sst_acpi_codec_list,
955 .quirk_data = &kbl_codecs,
956 .pdata = &skl_dmic_data
960 .drv_name = "kbl_n88l25_m98357a",
961 .fw_filename = "intel/dsp_fw_kbl.bin",
962 .machine_quirk = sst_acpi_codec_list,
963 .quirk_data = &kbl_codecs,
964 .pdata = &skl_dmic_data
968 .drv_name = "kbl_r5514_5663_max",
969 .fw_filename = "intel/dsp_fw_kbl.bin",
970 .machine_quirk = sst_acpi_codec_list,
971 .quirk_data = &kbl_5663_5514_codecs,
972 .pdata = &skl_dmic_data
976 .drv_name = "kbl_rt5663_m98927",
977 .fw_filename = "intel/dsp_fw_kbl.bin",
978 .machine_quirk = sst_acpi_codec_list,
979 .quirk_data = &kbl_poppy_codecs,
980 .pdata = &skl_dmic_data
984 .drv_name = "kbl_rt5663",
985 .fw_filename = "intel/dsp_fw_kbl.bin",
991 static struct sst_acpi_mach sst_glk_devdata[] = {
994 .drv_name = "glk_alc298s_i2s",
995 .fw_filename = "intel/dsp_fw_glk.bin",
1000 static const struct pci_device_id skl_ids[] = {
1001 /* Sunrise Point-LP */
1002 { PCI_DEVICE(0x8086, 0x9d70),
1003 .driver_data = (unsigned long)&sst_skl_devdata},
1005 { PCI_DEVICE(0x8086, 0x5a98),
1006 .driver_data = (unsigned long)&sst_bxtp_devdata},
1008 { PCI_DEVICE(0x8086, 0x9D71),
1009 .driver_data = (unsigned long)&sst_kbl_devdata},
1011 { PCI_DEVICE(0x8086, 0x3198),
1012 .driver_data = (unsigned long)&sst_glk_devdata},
1015 MODULE_DEVICE_TABLE(pci, skl_ids);
1017 /* pci_driver definition */
1018 static struct pci_driver skl_driver = {
1019 .name = KBUILD_MODNAME,
1020 .id_table = skl_ids,
1022 .remove = skl_remove,
1023 .shutdown = skl_shutdown,
1028 module_pci_driver(skl_driver);
1030 MODULE_LICENSE("GPL v2");
1031 MODULE_DESCRIPTION("Intel Skylake ASoC HDA driver");