Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
[muen/linux.git] / drivers / soc / rockchip / pm_domains.c
index f874baaf934cb9050f03b51c1a75ac50c54f3e3c..6dff8682155f98c69143b912037ff7a0187d49c0 100644 (file)
 #include <linux/clk.h>
 #include <linux/regmap.h>
 #include <linux/mfd/syscon.h>
+#include <dt-bindings/power/px30-power.h>
+#include <dt-bindings/power/rk3036-power.h>
+#include <dt-bindings/power/rk3128-power.h>
+#include <dt-bindings/power/rk3228-power.h>
 #include <dt-bindings/power/rk3288-power.h>
 #include <dt-bindings/power/rk3328-power.h>
 #include <dt-bindings/power/rk3366-power.h>
@@ -104,6 +108,18 @@ struct rockchip_pmu {
        .active_wakeup = wakeup,                        \
 }
 
+#define DOMAIN_RK3036(req, ack, idle, wakeup)          \
+{                                                      \
+       .req_mask = (req >= 0) ? BIT(req) : 0,          \
+       .req_w_mask = (req >= 0) ?  BIT(req + 16) : 0,  \
+       .ack_mask = (ack >= 0) ? BIT(ack) : 0,          \
+       .idle_mask = (idle >= 0) ? BIT(idle) : 0,       \
+       .active_wakeup = wakeup,                        \
+}
+
+#define DOMAIN_PX30(pwr, status, req, wakeup)          \
+       DOMAIN_M(pwr, status, req, (req) + 16, req, wakeup)
+
 #define DOMAIN_RK3288(pwr, status, req, wakeup)                \
        DOMAIN(pwr, status, req, req, (req) + 16, wakeup)
 
@@ -256,7 +272,7 @@ static void rockchip_do_pmu_set_power_domain(struct rockchip_pm_domain *pd,
                return;
        else if (pd->info->pwr_w_mask)
                regmap_write(pmu->regmap, pmu->info->pwr_offset,
-                            on ? pd->info->pwr_mask :
+                            on ? pd->info->pwr_w_mask :
                             (pd->info->pwr_mask | pd->info->pwr_w_mask));
        else
                regmap_update_bits(pmu->regmap, pmu->info->pwr_offset,
@@ -700,6 +716,49 @@ err_out:
        return error;
 }
 
+static const struct rockchip_domain_info px30_pm_domains[] = {
+       [PX30_PD_USB]           = DOMAIN_PX30(5, 5, 10, false),
+       [PX30_PD_SDCARD]        = DOMAIN_PX30(8, 8, 9, false),
+       [PX30_PD_GMAC]          = DOMAIN_PX30(10, 10, 6, false),
+       [PX30_PD_MMC_NAND]      = DOMAIN_PX30(11, 11, 5, false),
+       [PX30_PD_VPU]           = DOMAIN_PX30(12, 12, 14, false),
+       [PX30_PD_VO]            = DOMAIN_PX30(13, 13, 7, false),
+       [PX30_PD_VI]            = DOMAIN_PX30(14, 14, 8, false),
+       [PX30_PD_GPU]           = DOMAIN_PX30(15, 15, 2, false),
+};
+
+static const struct rockchip_domain_info rk3036_pm_domains[] = {
+       [RK3036_PD_MSCH]        = DOMAIN_RK3036(14, 23, 30, true),
+       [RK3036_PD_CORE]        = DOMAIN_RK3036(13, 17, 24, false),
+       [RK3036_PD_PERI]        = DOMAIN_RK3036(12, 18, 25, false),
+       [RK3036_PD_VIO]         = DOMAIN_RK3036(11, 19, 26, false),
+       [RK3036_PD_VPU]         = DOMAIN_RK3036(10, 20, 27, false),
+       [RK3036_PD_GPU]         = DOMAIN_RK3036(9, 21, 28, false),
+       [RK3036_PD_SYS]         = DOMAIN_RK3036(8, 22, 29, false),
+};
+
+static const struct rockchip_domain_info rk3128_pm_domains[] = {
+       [RK3128_PD_CORE]        = DOMAIN_RK3288(0, 0, 4, false),
+       [RK3128_PD_MSCH]        = DOMAIN_RK3288(-1, -1, 6, true),
+       [RK3128_PD_VIO]         = DOMAIN_RK3288(3, 3, 2, false),
+       [RK3128_PD_VIDEO]       = DOMAIN_RK3288(2, 2, 1, false),
+       [RK3128_PD_GPU]         = DOMAIN_RK3288(1, 1, 3, false),
+};
+
+static const struct rockchip_domain_info rk3228_pm_domains[] = {
+       [RK3228_PD_CORE]        = DOMAIN_RK3036(0, 0, 16, true),
+       [RK3228_PD_MSCH]        = DOMAIN_RK3036(1, 1, 17, true),
+       [RK3228_PD_BUS]         = DOMAIN_RK3036(2, 2, 18, true),
+       [RK3228_PD_SYS]         = DOMAIN_RK3036(3, 3, 19, true),
+       [RK3228_PD_VIO]         = DOMAIN_RK3036(4, 4, 20, false),
+       [RK3228_PD_VOP]         = DOMAIN_RK3036(5, 5, 21, false),
+       [RK3228_PD_VPU]         = DOMAIN_RK3036(6, 6, 22, false),
+       [RK3228_PD_RKVDEC]      = DOMAIN_RK3036(7, 7, 23, false),
+       [RK3228_PD_GPU]         = DOMAIN_RK3036(8, 8, 24, false),
+       [RK3228_PD_PERI]        = DOMAIN_RK3036(9, 9, 25, true),
+       [RK3228_PD_GMAC]        = DOMAIN_RK3036(10, 10, 26, false),
+};
+
 static const struct rockchip_domain_info rk3288_pm_domains[] = {
        [RK3288_PD_VIO]         = DOMAIN_RK3288(7, 7, 4, false),
        [RK3288_PD_HEVC]        = DOMAIN_RK3288(14, 10, 9, false),
@@ -767,6 +826,46 @@ static const struct rockchip_domain_info rk3399_pm_domains[] = {
        [RK3399_PD_SDIOAUDIO]   = DOMAIN_RK3399(31, 31, 29, true),
 };
 
+static const struct rockchip_pmu_info px30_pmu = {
+       .pwr_offset = 0x18,
+       .status_offset = 0x20,
+       .req_offset = 0x64,
+       .idle_offset = 0x6c,
+       .ack_offset = 0x6c,
+
+       .num_domains = ARRAY_SIZE(px30_pm_domains),
+       .domain_info = px30_pm_domains,
+};
+
+static const struct rockchip_pmu_info rk3036_pmu = {
+       .req_offset = 0x148,
+       .idle_offset = 0x14c,
+       .ack_offset = 0x14c,
+
+       .num_domains = ARRAY_SIZE(rk3036_pm_domains),
+       .domain_info = rk3036_pm_domains,
+};
+
+static const struct rockchip_pmu_info rk3128_pmu = {
+       .pwr_offset = 0x04,
+       .status_offset = 0x08,
+       .req_offset = 0x0c,
+       .idle_offset = 0x10,
+       .ack_offset = 0x10,
+
+       .num_domains = ARRAY_SIZE(rk3128_pm_domains),
+       .domain_info = rk3128_pm_domains,
+};
+
+static const struct rockchip_pmu_info rk3228_pmu = {
+       .req_offset = 0x40c,
+       .idle_offset = 0x488,
+       .ack_offset = 0x488,
+
+       .num_domains = ARRAY_SIZE(rk3228_pm_domains),
+       .domain_info = rk3228_pm_domains,
+};
+
 static const struct rockchip_pmu_info rk3288_pmu = {
        .pwr_offset = 0x08,
        .status_offset = 0x0c,
@@ -841,6 +940,22 @@ static const struct rockchip_pmu_info rk3399_pmu = {
 };
 
 static const struct of_device_id rockchip_pm_domain_dt_match[] = {
+       {
+               .compatible = "rockchip,px30-power-controller",
+               .data = (void *)&px30_pmu,
+       },
+       {
+               .compatible = "rockchip,rk3036-power-controller",
+               .data = (void *)&rk3036_pmu,
+       },
+       {
+               .compatible = "rockchip,rk3128-power-controller",
+               .data = (void *)&rk3128_pmu,
+       },
+       {
+               .compatible = "rockchip,rk3228-power-controller",
+               .data = (void *)&rk3228_pmu,
+       },
        {
                .compatible = "rockchip,rk3288-power-controller",
                .data = (void *)&rk3288_pmu,