drm/amdgpu:Add new register offset/mask to support VCN DPG mode
authorJames Zhu <James.Zhu@amd.com>
Mon, 10 Sep 2018 18:58:16 +0000 (14:58 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 27 Sep 2018 02:09:23 +0000 (21:09 -0500)
commitb604545b921b0b6af1785db85bab8e790a18ddad
treefe191256abb7a9cade854159f9b7fc81728729af
parent21cbe2f38cd94c180c4b3aad00bcb95b5f323134
drm/amdgpu:Add new register offset/mask to support VCN DPG mode

New register offset/mask need to be added to support VCN DPG mode.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Acked-by: Christian K├Ânig <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_offset.h
drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h