Merge branch 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/evalenti/linux...
authorLinus Torvalds <torvalds@linux-foundation.org>
Tue, 12 Jun 2018 20:23:51 +0000 (13:23 -0700)
committerLinus Torvalds <torvalds@linux-foundation.org>
Tue, 12 Jun 2018 20:23:51 +0000 (13:23 -0700)
Pull thermal SoC updates from Zhang Rui:
 "Thermal SoC management updates:

   - imx thermal driver now supports i.MX7 thermal sensor (Anson Huang)

   - exynos thermal driver dropped support for exynos 5440 (Krzysztof
     Kozlowski)

   - rcar_thermal now supports r8a77995 (Yoshihiro Kaneko)

   - rcar_gen3_thermal now supports r8a77965 (Niklas Söderlund)

   - qcom-spmi-temp-alarm now supports GEN2 PMIC peripherals (David
     Collins)

   - uniphier thermal now supports UniPhier PXs3 (Kunihiko Hayashi)

   - mediatek thermal now supports MT7622 SoC (Sean Wang)

   - considerable refactoring of exynos driver (Bartlomiej
     Zolnierkiewicz)

   - small fixes all over the place on different drivers"

* 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/evalenti/linux-soc-thermal: (50 commits)
  thermal: qcom: tsens: Allow number of sensors to come from DT
  thermal: tegra: soctherm: add const to struct thermal_cooling_device_ops
  thermal: exynos: Reduce severity of too early temperature read
  thermal: imx: Switch to SPDX identifier
  thermal: qcom-spmi-temp-alarm: add support for GEN2 PMIC peripherals
  thermal: ti-soc-thermal: fix incorrect entry in omap5430_adc_to_temp[]
  thermal: rcar_thermal: add r8a77995 support
  dt-bindings: thermal: rcar-thermal: add R8A77995 support
  thermal: mediatek: use of_device_get_match_data()
  thermal: exynos: remove trip reporting to user-space
  thermal: exynos: remove unused defines for Exynos5433
  thermal: exynos: cleanup code for enabling threshold interrupts
  thermal: exynos: check return values of ->get_trip_[temp, hyst] methods
  thermal: exynos: move trips setting to exynos_tmu_initialize()
  thermal: exynos: set trips in ascending order in exynos7_tmu_initialize()
  thermal: exynos: do not use trips structure directly in ->tmu_initialize
  thermal: exynos: add exynos*_tmu_set_[trip,hyst]() helpers
  thermal: exynos: move IRQs clearing to exynos_tmu_initialize()
  thermal: exynos: clear IRQs later in exynos4412_tmu_initialize()
  thermal: exynos: make ->tmu_initialize method void
  ...

1  2 
Documentation/devicetree/bindings/thermal/rcar-gen3-thermal.txt
drivers/thermal/qcom/tsens.c
drivers/thermal/samsung/exynos_tmu.c

index 39e7d4e61a63c038e003d739c5602f2cc97a55e7,32c63ffef2e3a3ff1443fda4b2886d2c687706e1..cfa154bb0fa7c7ec5977de4c38c92a7ebd596e7e
@@@ -9,6 -9,7 +9,7 @@@ Required properties
                          Examples with soctypes are:
                            - "renesas,r8a7795-thermal" (R-Car H3)
                            - "renesas,r8a7796-thermal" (R-Car M3-W)
+                           - "renesas,r8a77965-thermal" (R-Car M3-N)
  - reg                 : Address ranges of the thermal registers. Each sensor
                          needs one address range. Sorting must be done in
                          increasing order according to datasheet, i.e.
@@@ -18,7 -19,7 +19,7 @@@
  
  Optional properties:
  
- - interrupts           : interrupts routed to the TSC (3 for H3 and M3-W)
+ - interrupts           : interrupts routed to the TSC (3 for H3, M3-W and M3-N)
  - power-domain                : Must contain a reference to the power domain. This
                          property is mandatory if the thermal sensor instance
                          is part of a controllable power domain.
@@@ -27,9 -28,9 +28,9 @@@ Example
  
        tsc: thermal@e6198000 {
                compatible = "renesas,r8a7795-thermal";
 -              reg = <0 0xe6198000 0 0x68>,
 -                    <0 0xe61a0000 0 0x5c>,
 -                    <0 0xe61a8000 0 0x5c>;
 +              reg = <0 0xe6198000 0 0x100>,
 +                    <0 0xe61a0000 0 0x100>,
 +                    <0 0xe61a8000 0 0x100>;
                interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
                             <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
                             <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
index c2c34425279df67b952c0cf269c85eeedb729fbd,20f3b87d7667f7599977c7e231c5f1bf9f922496..3440166c2ae922859afb62fdf8901c1092fc8697
@@@ -112,9 -112,11 +112,10 @@@ static int tsens_probe(struct platform_
        int ret, i;
        struct device *dev;
        struct device_node *np;
 -      struct tsens_sensor *s;
        struct tsens_device *tmdev;
        const struct tsens_data *data;
        const struct of_device_id *id;
+       u32 num_sensors;
  
        if (pdev->dev.of_node)
                dev = &pdev->dev;
        else
                data = &data_8960;
  
-       if (data->num_sensors <= 0) {
+       num_sensors = data->num_sensors;
+       if (np)
+               of_property_read_u32(np, "#qcom,sensors", &num_sensors);
+       if (num_sensors <= 0) {
                dev_err(dev, "invalid number of sensors\n");
                return -EINVAL;
        }
  
 -      tmdev = devm_kzalloc(dev, sizeof(*tmdev) +
 -                           num_sensors * sizeof(*s), GFP_KERNEL);
 +      tmdev = devm_kzalloc(dev,
-                            struct_size(tmdev, sensor, data->num_sensors),
++                           struct_size(tmdev, sensor, num_sensors),
 +                           GFP_KERNEL);
        if (!tmdev)
                return -ENOMEM;
  
        tmdev->dev = dev;
-       tmdev->num_sensors = data->num_sensors;
+       tmdev->num_sensors = num_sensors;
        tmdev->ops = data->ops;
        for (i = 0;  i < tmdev->num_sensors; i++) {
                if (data->hw_ids)
index ac83f721db24d78cff24d9349ecf75edafe9f2d4,c24969d740d1a931b3f165791e01789cbdba689c..a992e51ef06526eee82e9513da07b1b9046c03a5
  #include <linux/io.h>
  #include <linux/interrupt.h>
  #include <linux/module.h>
- #include <linux/of.h>
+ #include <linux/of_device.h>
  #include <linux/of_address.h>
  #include <linux/of_irq.h>
  #include <linux/platform_device.h>
  #include <linux/regulator/consumer.h>
  
- #include "exynos_tmu.h"
+ #include <dt-bindings/thermal/thermal_exynos.h>
  #include "../thermal_core.h"
  
  /* Exynos generic registers */
@@@ -75,9 -76,6 +76,6 @@@
  #define EXYNOS_TMU_THERM_TRIP_EN_SHIFT        12
  
  #define EXYNOS_TMU_INTEN_RISE0_SHIFT  0
- #define EXYNOS_TMU_INTEN_RISE1_SHIFT  4
- #define EXYNOS_TMU_INTEN_RISE2_SHIFT  8
- #define EXYNOS_TMU_INTEN_RISE3_SHIFT  12
  #define EXYNOS_TMU_INTEN_FALL0_SHIFT  16
  
  #define EXYNOS_EMUL_TIME      0x57F0
  #define EXYNOS4412_MUX_ADDR_SHIFT          20
  
  /* Exynos5433 specific registers */
- #define EXYNOS5433_TMU_REG_CONTROL1           0x024
- #define EXYNOS5433_TMU_SAMPLING_INTERVAL      0x02c
- #define EXYNOS5433_TMU_COUNTER_VALUE0         0x030
- #define EXYNOS5433_TMU_COUNTER_VALUE1         0x034
- #define EXYNOS5433_TMU_REG_CURRENT_TEMP1      0x044
  #define EXYNOS5433_THD_TEMP_RISE3_0           0x050
  #define EXYNOS5433_THD_TEMP_RISE7_4           0x054
  #define EXYNOS5433_THD_TEMP_FALL3_0           0x060
  
  #define EXYNOS5433_PD_DET_EN                  1
  
- /*exynos5440 specific registers*/
- #define EXYNOS5440_TMU_S0_7_TRIM              0x000
- #define EXYNOS5440_TMU_S0_7_CTRL              0x020
- #define EXYNOS5440_TMU_S0_7_DEBUG             0x040
- #define EXYNOS5440_TMU_S0_7_TEMP              0x0f0
- #define EXYNOS5440_TMU_S0_7_TH0                       0x110
- #define EXYNOS5440_TMU_S0_7_TH1                       0x130
- #define EXYNOS5440_TMU_S0_7_TH2                       0x150
- #define EXYNOS5440_TMU_S0_7_IRQEN             0x210
- #define EXYNOS5440_TMU_S0_7_IRQ                       0x230
- /* exynos5440 common registers */
- #define EXYNOS5440_TMU_IRQ_STATUS             0x000
- #define EXYNOS5440_TMU_PMIN                   0x004
- #define EXYNOS5440_TMU_INTEN_RISE0_SHIFT      0
- #define EXYNOS5440_TMU_INTEN_RISE1_SHIFT      1
- #define EXYNOS5440_TMU_INTEN_RISE2_SHIFT      2
- #define EXYNOS5440_TMU_INTEN_RISE3_SHIFT      3
- #define EXYNOS5440_TMU_INTEN_FALL0_SHIFT      4
- #define EXYNOS5440_TMU_TH_RISE4_SHIFT         24
- #define EXYNOS5440_EFUSE_SWAP_OFFSET          8
+ #define EXYNOS5433_G3D_BASE                   0x10070000
  
  /* Exynos7 specific registers */
  #define EXYNOS7_THD_TEMP_RISE7_6              0x50
  #define EXYNOS7_TMU_TEMP_MASK                 0x1ff
  #define EXYNOS7_PD_DET_EN_SHIFT                       23
  #define EXYNOS7_TMU_INTEN_RISE0_SHIFT         0
- #define EXYNOS7_TMU_INTEN_RISE1_SHIFT         1
- #define EXYNOS7_TMU_INTEN_RISE2_SHIFT         2
- #define EXYNOS7_TMU_INTEN_RISE3_SHIFT         3
- #define EXYNOS7_TMU_INTEN_RISE4_SHIFT         4
- #define EXYNOS7_TMU_INTEN_RISE5_SHIFT         5
- #define EXYNOS7_TMU_INTEN_RISE6_SHIFT         6
- #define EXYNOS7_TMU_INTEN_RISE7_SHIFT         7
  #define EXYNOS7_EMUL_DATA_SHIFT                       7
  #define EXYNOS7_EMUL_DATA_MASK                        0x1ff
  
+ #define EXYNOS_FIRST_POINT_TRIM                       25
+ #define EXYNOS_SECOND_POINT_TRIM              85
+ #define EXYNOS_NOISE_CANCEL_MODE              4
  #define MCELSIUS      1000
+ enum soc_type {
+       SOC_ARCH_EXYNOS3250 = 1,
+       SOC_ARCH_EXYNOS4210,
+       SOC_ARCH_EXYNOS4412,
+       SOC_ARCH_EXYNOS5250,
+       SOC_ARCH_EXYNOS5260,
+       SOC_ARCH_EXYNOS5420,
+       SOC_ARCH_EXYNOS5420_TRIMINFO,
+       SOC_ARCH_EXYNOS5433,
+       SOC_ARCH_EXYNOS7,
+ };
  /**
   * struct exynos_tmu_data : A structure to hold the private data of the TMU
        driver
   * @id: identifier of the one instance of the TMU controller.
-  * @pdata: pointer to the tmu platform/configuration data
   * @base: base address of the single instance of the TMU controller.
   * @base_second: base address of the common registers of the TMU controller.
   * @irq: irq number of the TMU controller.
   * @clk: pointer to the clock structure.
   * @clk_sec: pointer to the clock structure for accessing the base_second.
   * @sclk: pointer to the clock structure for accessing the tmu special clk.
+  * @cal_type: calibration type for temperature
+  * @efuse_value: SoC defined fuse value
+  * @min_efuse_value: minimum valid trimming data
+  * @max_efuse_value: maximum valid trimming data
   * @temp_error1: fused value of the first point trim.
   * @temp_error2: fused value of the second point trim.
+  * @gain: gain of amplifier in the positive-TC generator block
+  *    0 < gain <= 15
+  * @reference_voltage: reference voltage of amplifier
+  *    in the positive-TC generator block
+  *    0 < reference_voltage <= 31
   * @regulator: pointer to the TMU regulator structure.
   * @reg_conf: pointer to structure to register with core thermal.
   * @ntrip: number of supported trip points.
   */
  struct exynos_tmu_data {
        int id;
-       struct exynos_tmu_platform_data *pdata;
        void __iomem *base;
        void __iomem *base_second;
        int irq;
        struct work_struct irq_work;
        struct mutex lock;
        struct clk *clk, *clk_sec, *sclk;
+       u32 cal_type;
+       u32 efuse_value;
+       u32 min_efuse_value;
+       u32 max_efuse_value;
        u16 temp_error1, temp_error2;
+       u8 gain;
+       u8 reference_voltage;
        struct regulator *regulator;
        struct thermal_zone_device *tzd;
        unsigned int ntrip;
        bool enabled;
  
-       int (*tmu_initialize)(struct platform_device *pdev);
+       void (*tmu_set_trip_temp)(struct exynos_tmu_data *data, int trip,
+                                u8 temp);
+       void (*tmu_set_trip_hyst)(struct exynos_tmu_data *data, int trip,
+                                u8 temp, u8 hyst);
+       void (*tmu_initialize)(struct platform_device *pdev);
        void (*tmu_control)(struct platform_device *pdev, bool on);
        int (*tmu_read)(struct exynos_tmu_data *data);
        void (*tmu_set_emulation)(struct exynos_tmu_data *data, int temp);
        void (*tmu_clear_irqs)(struct exynos_tmu_data *data);
  };
  
- static void exynos_report_trigger(struct exynos_tmu_data *p)
- {
-       char data[10], *envp[] = { data, NULL };
-       struct thermal_zone_device *tz = p->tzd;
-       int temp;
-       unsigned int i;
-       if (!tz) {
-               pr_err("No thermal zone device defined\n");
-               return;
-       }
-       thermal_zone_device_update(tz, THERMAL_EVENT_UNSPECIFIED);
-       mutex_lock(&tz->lock);
-       /* Find the level for which trip happened */
-       for (i = 0; i < of_thermal_get_ntrips(tz); i++) {
-               tz->ops->get_trip_temp(tz, i, &temp);
-               if (tz->last_temperature < temp)
-                       break;
-       }
-       snprintf(data, sizeof(data), "%u", i);
-       kobject_uevent_env(&tz->device.kobj, KOBJ_CHANGE, envp);
-       mutex_unlock(&tz->lock);
- }
  /*
   * TMU treats temperature as a mapped temperature code.
   * The temperature is converted differently depending on the calibration type.
   */
  static int temp_to_code(struct exynos_tmu_data *data, u8 temp)
  {
-       struct exynos_tmu_platform_data *pdata = data->pdata;
-       int temp_code;
-       switch (pdata->cal_type) {
-       case TYPE_TWO_POINT_TRIMMING:
-               temp_code = (temp - pdata->first_point_trim) *
-                       (data->temp_error2 - data->temp_error1) /
-                       (pdata->second_point_trim - pdata->first_point_trim) +
-                       data->temp_error1;
-               break;
-       case TYPE_ONE_POINT_TRIMMING:
-               temp_code = temp + data->temp_error1 - pdata->first_point_trim;
-               break;
-       default:
-               temp_code = temp + pdata->default_temp_offset;
-               break;
-       }
+       if (data->cal_type == TYPE_ONE_POINT_TRIMMING)
+               return temp + data->temp_error1 - EXYNOS_FIRST_POINT_TRIM;
  
-       return temp_code;
+       return (temp - EXYNOS_FIRST_POINT_TRIM) *
+               (data->temp_error2 - data->temp_error1) /
+               (EXYNOS_SECOND_POINT_TRIM - EXYNOS_FIRST_POINT_TRIM) +
+               data->temp_error1;
  }
  
  /*
   */
  static int code_to_temp(struct exynos_tmu_data *data, u16 temp_code)
  {
-       struct exynos_tmu_platform_data *pdata = data->pdata;
-       int temp;
-       switch (pdata->cal_type) {
-       case TYPE_TWO_POINT_TRIMMING:
-               temp = (temp_code - data->temp_error1) *
-                       (pdata->second_point_trim - pdata->first_point_trim) /
-                       (data->temp_error2 - data->temp_error1) +
-                       pdata->first_point_trim;
-               break;
-       case TYPE_ONE_POINT_TRIMMING:
-               temp = temp_code - data->temp_error1 + pdata->first_point_trim;
-               break;
-       default:
-               temp = temp_code - pdata->default_temp_offset;
-               break;
-       }
+       if (data->cal_type == TYPE_ONE_POINT_TRIMMING)
+               return temp_code - data->temp_error1 + EXYNOS_FIRST_POINT_TRIM;
  
-       return temp;
+       return (temp_code - data->temp_error1) *
+               (EXYNOS_SECOND_POINT_TRIM - EXYNOS_FIRST_POINT_TRIM) /
+               (data->temp_error2 - data->temp_error1) +
+               EXYNOS_FIRST_POINT_TRIM;
  }
  
  static void sanitize_temp_error(struct exynos_tmu_data *data, u32 trim_info)
  {
-       struct exynos_tmu_platform_data *pdata = data->pdata;
+       u16 tmu_temp_mask =
+               (data->soc == SOC_ARCH_EXYNOS7) ? EXYNOS7_TMU_TEMP_MASK
+                                               : EXYNOS_TMU_TEMP_MASK;
  
-       data->temp_error1 = trim_info & EXYNOS_TMU_TEMP_MASK;
+       data->temp_error1 = trim_info & tmu_temp_mask;
        data->temp_error2 = ((trim_info >> EXYNOS_TRIMINFO_85_SHIFT) &
                                EXYNOS_TMU_TEMP_MASK);
  
        if (!data->temp_error1 ||
-               (pdata->min_efuse_value > data->temp_error1) ||
-               (data->temp_error1 > pdata->max_efuse_value))
-               data->temp_error1 = pdata->efuse_value & EXYNOS_TMU_TEMP_MASK;
+           (data->min_efuse_value > data->temp_error1) ||
+           (data->temp_error1 > data->max_efuse_value))
+               data->temp_error1 = data->efuse_value & EXYNOS_TMU_TEMP_MASK;
  
        if (!data->temp_error2)
                data->temp_error2 =
-                       (pdata->efuse_value >> EXYNOS_TRIMINFO_85_SHIFT) &
+                       (data->efuse_value >> EXYNOS_TRIMINFO_85_SHIFT) &
                        EXYNOS_TMU_TEMP_MASK;
  }
  
- static u32 get_th_reg(struct exynos_tmu_data *data, u32 threshold, bool falling)
+ static int exynos_tmu_initialize(struct platform_device *pdev)
  {
-       struct thermal_zone_device *tz = data->tzd;
+       struct exynos_tmu_data *data = platform_get_drvdata(pdev);
+       struct thermal_zone_device *tzd = data->tzd;
        const struct thermal_trip * const trips =
-               of_thermal_get_trip_points(tz);
-       unsigned long temp;
-       int i;
+               of_thermal_get_trip_points(tzd);
+       unsigned int status;
+       int ret = 0, temp, hyst;
  
        if (!trips) {
-               pr_err("%s: Cannot get trip points from of-thermal.c!\n",
-                      __func__);
-               return 0;
+               dev_err(&pdev->dev,
+                       "Cannot get trip points from device tree!\n");
+               return -ENODEV;
        }
  
-       for (i = 0; i < of_thermal_get_ntrips(tz); i++) {
-               if (trips[i].type == THERMAL_TRIP_CRITICAL)
-                       continue;
-               temp = trips[i].temperature / MCELSIUS;
-               if (falling)
-                       temp -= (trips[i].hysteresis / MCELSIUS);
-               else
-                       threshold &= ~(0xff << 8 * i);
-               threshold |= temp_to_code(data, temp) << 8 * i;
+       if (data->soc != SOC_ARCH_EXYNOS5433) /* FIXME */
+               ret = tzd->ops->get_crit_temp(tzd, &temp);
+       if (ret) {
+               dev_err(&pdev->dev,
+                       "No CRITICAL trip point defined in device tree!\n");
+               goto out;
        }
  
-       return threshold;
- }
- static int exynos_tmu_initialize(struct platform_device *pdev)
- {
-       struct exynos_tmu_data *data = platform_get_drvdata(pdev);
-       int ret;
-       if (of_thermal_get_ntrips(data->tzd) > data->ntrip) {
+       if (of_thermal_get_ntrips(tzd) > data->ntrip) {
                dev_info(&pdev->dev,
                         "More trip points than supported by this TMU.\n");
                dev_info(&pdev->dev,
                         "%d trip points should be configured in polling mode.\n",
-                        (of_thermal_get_ntrips(data->tzd) - data->ntrip));
+                        (of_thermal_get_ntrips(tzd) - data->ntrip));
        }
  
        mutex_lock(&data->lock);
        clk_enable(data->clk);
        if (!IS_ERR(data->clk_sec))
                clk_enable(data->clk_sec);
-       ret = data->tmu_initialize(pdev);
+       status = readb(data->base + EXYNOS_TMU_REG_STATUS);
+       if (!status) {
+               ret = -EBUSY;
+       } else {
+               int i, ntrips =
+                       min_t(int, of_thermal_get_ntrips(tzd), data->ntrip);
+               data->tmu_initialize(pdev);
+               /* Write temperature code for rising and falling threshold */
+               for (i = 0; i < ntrips; i++) {
+                       /* Write temperature code for rising threshold */
+                       ret = tzd->ops->get_trip_temp(tzd, i, &temp);
+                       if (ret)
+                               goto err;
+                       temp /= MCELSIUS;
+                       data->tmu_set_trip_temp(data, i, temp);
+                       /* Write temperature code for falling threshold */
+                       ret = tzd->ops->get_trip_hyst(tzd, i, &hyst);
+                       if (ret)
+                               goto err;
+                       hyst /= MCELSIUS;
+                       data->tmu_set_trip_hyst(data, i, temp, hyst);
+               }
+               data->tmu_clear_irqs(data);
+       }
+ err:
        clk_disable(data->clk);
        mutex_unlock(&data->lock);
        if (!IS_ERR(data->clk_sec))
                clk_disable(data->clk_sec);
+ out:
        return ret;
  }
  
  static u32 get_con_reg(struct exynos_tmu_data *data, u32 con)
  {
-       struct exynos_tmu_platform_data *pdata = data->pdata;
        if (data->soc == SOC_ARCH_EXYNOS4412 ||
            data->soc == SOC_ARCH_EXYNOS3250)
                con |= (EXYNOS4412_MUX_ADDR_VALUE << EXYNOS4412_MUX_ADDR_SHIFT);
  
        con &= ~(EXYNOS_TMU_REF_VOLTAGE_MASK << EXYNOS_TMU_REF_VOLTAGE_SHIFT);
-       con |= pdata->reference_voltage << EXYNOS_TMU_REF_VOLTAGE_SHIFT;
+       con |= data->reference_voltage << EXYNOS_TMU_REF_VOLTAGE_SHIFT;
  
        con &= ~(EXYNOS_TMU_BUF_SLOPE_SEL_MASK << EXYNOS_TMU_BUF_SLOPE_SEL_SHIFT);
-       con |= (pdata->gain << EXYNOS_TMU_BUF_SLOPE_SEL_SHIFT);
+       con |= (data->gain << EXYNOS_TMU_BUF_SLOPE_SEL_SHIFT);
  
-       if (pdata->noise_cancel_mode) {
-               con &= ~(EXYNOS_TMU_TRIP_MODE_MASK << EXYNOS_TMU_TRIP_MODE_SHIFT);
-               con |= (pdata->noise_cancel_mode << EXYNOS_TMU_TRIP_MODE_SHIFT);
-       }
+       con &= ~(EXYNOS_TMU_TRIP_MODE_MASK << EXYNOS_TMU_TRIP_MODE_SHIFT);
+       con |= (EXYNOS_NOISE_CANCEL_MODE << EXYNOS_TMU_TRIP_MODE_SHIFT);
  
        return con;
  }
@@@ -405,65 -370,70 +370,70 @@@ static void exynos_tmu_control(struct p
        mutex_unlock(&data->lock);
  }
  
- static int exynos4210_tmu_initialize(struct platform_device *pdev)
+ static void exynos4210_tmu_set_trip_temp(struct exynos_tmu_data *data,
+                                        int trip, u8 temp)
  {
-       struct exynos_tmu_data *data = platform_get_drvdata(pdev);
-       struct thermal_zone_device *tz = data->tzd;
        const struct thermal_trip * const trips =
-               of_thermal_get_trip_points(tz);
-       int ret = 0, threshold_code, i;
-       unsigned long reference, temp;
-       unsigned int status;
+               of_thermal_get_trip_points(data->tzd);
+       u8 ref, th_code;
  
-       if (!trips) {
-               pr_err("%s: Cannot get trip points from of-thermal.c!\n",
-                      __func__);
-               ret = -ENODEV;
-               goto out;
-       }
+       ref = trips[0].temperature / MCELSIUS;
  
-       status = readb(data->base + EXYNOS_TMU_REG_STATUS);
-       if (!status) {
-               ret = -EBUSY;
-               goto out;
+       if (trip == 0) {
+               th_code = temp_to_code(data, ref);
+               writeb(th_code, data->base + EXYNOS4210_TMU_REG_THRESHOLD_TEMP);
        }
  
+       temp -= ref;
+       writeb(temp, data->base + EXYNOS4210_TMU_REG_TRIG_LEVEL0 + trip * 4);
+ }
+ /* failing thresholds are not supported on Exynos4210 */
+ static void exynos4210_tmu_set_trip_hyst(struct exynos_tmu_data *data,
+                                        int trip, u8 temp, u8 hyst)
+ {
+ }
+ static void exynos4210_tmu_initialize(struct platform_device *pdev)
+ {
+       struct exynos_tmu_data *data = platform_get_drvdata(pdev);
        sanitize_temp_error(data, readl(data->base + EXYNOS_TMU_REG_TRIMINFO));
+ }
  
-       /* Write temperature code for threshold */
-       reference = trips[0].temperature / MCELSIUS;
-       threshold_code = temp_to_code(data, reference);
-       if (threshold_code < 0) {
-               ret = threshold_code;
-               goto out;
-       }
-       writeb(threshold_code, data->base + EXYNOS4210_TMU_REG_THRESHOLD_TEMP);
+ static void exynos4412_tmu_set_trip_temp(struct exynos_tmu_data *data,
+                                        int trip, u8 temp)
+ {
+       u32 th, con;
  
-       for (i = 0; i < of_thermal_get_ntrips(tz); i++) {
-               temp = trips[i].temperature / MCELSIUS;
-               writeb(temp - reference, data->base +
-                      EXYNOS4210_TMU_REG_TRIG_LEVEL0 + i * 4);
+       th = readl(data->base + EXYNOS_THD_TEMP_RISE);
+       th &= ~(0xff << 8 * trip);
+       th |= temp_to_code(data, temp) << 8 * trip;
+       writel(th, data->base + EXYNOS_THD_TEMP_RISE);
+       if (trip == 3) {
+               con = readl(data->base + EXYNOS_TMU_REG_CONTROL);
+               con |= (1 << EXYNOS_TMU_THERM_TRIP_EN_SHIFT);
+               writel(con, data->base + EXYNOS_TMU_REG_CONTROL);
        }
+ }
  
-       data->tmu_clear_irqs(data);
- out:
-       return ret;
+ static void exynos4412_tmu_set_trip_hyst(struct exynos_tmu_data *data,
+                                        int trip, u8 temp, u8 hyst)
+ {
+       u32 th;
+       th = readl(data->base + EXYNOS_THD_TEMP_FALL);
+       th &= ~(0xff << 8 * trip);
+       if (hyst)
+               th |= temp_to_code(data, temp - hyst) << 8 * trip;
+       writel(th, data->base + EXYNOS_THD_TEMP_FALL);
  }
  
- static int exynos4412_tmu_initialize(struct platform_device *pdev)
+ static void exynos4412_tmu_initialize(struct platform_device *pdev)
  {
        struct exynos_tmu_data *data = platform_get_drvdata(pdev);
-       const struct thermal_trip * const trips =
-               of_thermal_get_trip_points(data->tzd);
-       unsigned int status, trim_info, con, ctrl, rising_threshold;
-       int ret = 0, threshold_code, i;
-       unsigned long crit_temp = 0;
-       status = readb(data->base + EXYNOS_TMU_REG_STATUS);
-       if (!status) {
-               ret = -EBUSY;
-               goto out;
-       }
+       unsigned int trim_info, ctrl;
  
        if (data->soc == SOC_ARCH_EXYNOS3250 ||
            data->soc == SOC_ARCH_EXYNOS4412 ||
                trim_info = readl(data->base + EXYNOS_TMU_REG_TRIMINFO);
  
        sanitize_temp_error(data, trim_info);
+ }
  
-       /* Write temperature code for rising and falling threshold */
-       rising_threshold = readl(data->base + EXYNOS_THD_TEMP_RISE);
-       rising_threshold = get_th_reg(data, rising_threshold, false);
-       writel(rising_threshold, data->base + EXYNOS_THD_TEMP_RISE);
-       writel(get_th_reg(data, 0, true), data->base + EXYNOS_THD_TEMP_FALL);
-       data->tmu_clear_irqs(data);
+ static void exynos5433_tmu_set_trip_temp(struct exynos_tmu_data *data,
+                                        int trip, u8 temp)
+ {
+       unsigned int reg_off, j;
+       u32 th;
  
-       /* if last threshold limit is also present */
-       for (i = 0; i < of_thermal_get_ntrips(data->tzd); i++) {
-               if (trips[i].type == THERMAL_TRIP_CRITICAL) {
-                       crit_temp = trips[i].temperature;
-                       break;
-               }
+       if (trip > 3) {
+               reg_off = EXYNOS5433_THD_TEMP_RISE7_4;
+               j = trip - 4;
+       } else {
+               reg_off = EXYNOS5433_THD_TEMP_RISE3_0;
+               j = trip;
        }
  
-       if (i == of_thermal_get_ntrips(data->tzd)) {
-               pr_err("%s: No CRITICAL trip point defined at of-thermal.c!\n",
-                      __func__);
-               ret = -EINVAL;
-               goto out;
-       }
+       th = readl(data->base + reg_off);
+       th &= ~(0xff << j * 8);
+       th |= (temp_to_code(data, temp) << j * 8);
+       writel(th, data->base + reg_off);
+ }
  
-       threshold_code = temp_to_code(data, crit_temp / MCELSIUS);
-       /* 1-4 level to be assigned in th0 reg */
-       rising_threshold &= ~(0xff << 8 * i);
-       rising_threshold |= threshold_code << 8 * i;
-       writel(rising_threshold, data->base + EXYNOS_THD_TEMP_RISE);
-       con = readl(data->base + EXYNOS_TMU_REG_CONTROL);
-       con |= (1 << EXYNOS_TMU_THERM_TRIP_EN_SHIFT);
-       writel(con, data->base + EXYNOS_TMU_REG_CONTROL);
+ static void exynos5433_tmu_set_trip_hyst(struct exynos_tmu_data *data,
+                                        int trip, u8 temp, u8 hyst)
+ {
+       unsigned int reg_off, j;
+       u32 th;
  
- out:
-       return ret;
+       if (trip > 3) {
+               reg_off = EXYNOS5433_THD_TEMP_FALL7_4;
+               j = trip - 4;
+       } else {
+               reg_off = EXYNOS5433_THD_TEMP_FALL3_0;
+               j = trip;
+       }
+       th = readl(data->base + reg_off);
+       th &= ~(0xff << j * 8);
+       th |= (temp_to_code(data, temp - hyst) << j * 8);
+       writel(th, data->base + reg_off);
  }
  
- static int exynos5433_tmu_initialize(struct platform_device *pdev)
+ static void exynos5433_tmu_initialize(struct platform_device *pdev)
  {
        struct exynos_tmu_data *data = platform_get_drvdata(pdev);
-       struct exynos_tmu_platform_data *pdata = data->pdata;
-       struct thermal_zone_device *tz = data->tzd;
-       unsigned int status, trim_info;
-       unsigned int rising_threshold = 0, falling_threshold = 0;
-       int temp, temp_hist;
-       int ret = 0, threshold_code, i, sensor_id, cal_type;
-       status = readb(data->base + EXYNOS_TMU_REG_STATUS);
-       if (!status) {
-               ret = -EBUSY;
-               goto out;
-       }
+       unsigned int trim_info;
+       int sensor_id, cal_type;
  
        trim_info = readl(data->base + EXYNOS_TMU_REG_TRIMINFO);
        sanitize_temp_error(data, trim_info);
                                >> EXYNOS5433_TRIMINFO_CALIB_SEL_SHIFT;
  
        switch (cal_type) {
-       case EXYNOS5433_TRIMINFO_ONE_POINT_TRIMMING:
-               pdata->cal_type = TYPE_ONE_POINT_TRIMMING;
-               break;
        case EXYNOS5433_TRIMINFO_TWO_POINT_TRIMMING:
-               pdata->cal_type = TYPE_TWO_POINT_TRIMMING;
+               data->cal_type = TYPE_TWO_POINT_TRIMMING;
                break;
+       case EXYNOS5433_TRIMINFO_ONE_POINT_TRIMMING:
        default:
-               pdata->cal_type = TYPE_ONE_POINT_TRIMMING;
+               data->cal_type = TYPE_ONE_POINT_TRIMMING;
                break;
        }
  
        dev_info(&pdev->dev, "Calibration type is %d-point calibration\n",
                        cal_type ?  2 : 1);
-       /* Write temperature code for rising and falling threshold */
-       for (i = 0; i < of_thermal_get_ntrips(tz); i++) {
-               int rising_reg_offset, falling_reg_offset;
-               int j = 0;
-               switch (i) {
-               case 0:
-               case 1:
-               case 2:
-               case 3:
-                       rising_reg_offset = EXYNOS5433_THD_TEMP_RISE3_0;
-                       falling_reg_offset = EXYNOS5433_THD_TEMP_FALL3_0;
-                       j = i;
-                       break;
-               case 4:
-               case 5:
-               case 6:
-               case 7:
-                       rising_reg_offset = EXYNOS5433_THD_TEMP_RISE7_4;
-                       falling_reg_offset = EXYNOS5433_THD_TEMP_FALL7_4;
-                       j = i - 4;
-                       break;
-               default:
-                       continue;
-               }
-               /* Write temperature code for rising threshold */
-               tz->ops->get_trip_temp(tz, i, &temp);
-               temp /= MCELSIUS;
-               threshold_code = temp_to_code(data, temp);
-               rising_threshold = readl(data->base + rising_reg_offset);
-               rising_threshold |= (threshold_code << j * 8);
-               writel(rising_threshold, data->base + rising_reg_offset);
-               /* Write temperature code for falling threshold */
-               tz->ops->get_trip_hyst(tz, i, &temp_hist);
-               temp_hist = temp - (temp_hist / MCELSIUS);
-               threshold_code = temp_to_code(data, temp_hist);
-               falling_threshold = readl(data->base + falling_reg_offset);
-               falling_threshold &= ~(0xff << j * 8);
-               falling_threshold |= (threshold_code << j * 8);
-               writel(falling_threshold, data->base + falling_reg_offset);
-       }
-       data->tmu_clear_irqs(data);
- out:
-       return ret;
  }
  
- static int exynos5440_tmu_initialize(struct platform_device *pdev)
+ static void exynos7_tmu_set_trip_temp(struct exynos_tmu_data *data,
+                                     int trip, u8 temp)
  {
-       struct exynos_tmu_data *data = platform_get_drvdata(pdev);
-       unsigned int trim_info = 0, con, rising_threshold;
-       int threshold_code;
-       int crit_temp = 0;
+       unsigned int reg_off, bit_off;
+       u32 th;
  
-       /*
-        * For exynos5440 soc triminfo value is swapped between TMU0 and
-        * TMU2, so the below logic is needed.
-        */
-       switch (data->id) {
-       case 0:
-               trim_info = readl(data->base + EXYNOS5440_EFUSE_SWAP_OFFSET +
-                                EXYNOS5440_TMU_S0_7_TRIM);
-               break;
-       case 1:
-               trim_info = readl(data->base + EXYNOS5440_TMU_S0_7_TRIM);
-               break;
-       case 2:
-               trim_info = readl(data->base - EXYNOS5440_EFUSE_SWAP_OFFSET +
-                                 EXYNOS5440_TMU_S0_7_TRIM);
-       }
-       sanitize_temp_error(data, trim_info);
+       reg_off = ((7 - trip) / 2) * 4;
+       bit_off = ((8 - trip) % 2);
  
-       /* Write temperature code for rising and falling threshold */
-       rising_threshold = readl(data->base + EXYNOS5440_TMU_S0_7_TH0);
-       rising_threshold = get_th_reg(data, rising_threshold, false);
-       writel(rising_threshold, data->base + EXYNOS5440_TMU_S0_7_TH0);
-       writel(0, data->base + EXYNOS5440_TMU_S0_7_TH1);
+       th = readl(data->base + EXYNOS7_THD_TEMP_RISE7_6 + reg_off);
+       th &= ~(EXYNOS7_TMU_TEMP_MASK << (16 * bit_off));
+       th |= temp_to_code(data, temp) << (16 * bit_off);
+       writel(th, data->base + EXYNOS7_THD_TEMP_RISE7_6 + reg_off);
+ }
  
-       data->tmu_clear_irqs(data);
+ static void exynos7_tmu_set_trip_hyst(struct exynos_tmu_data *data,
+                                     int trip, u8 temp, u8 hyst)
+ {
+       unsigned int reg_off, bit_off;
+       u32 th;
  
-       /* if last threshold limit is also present */
-       if (!data->tzd->ops->get_crit_temp(data->tzd, &crit_temp)) {
-               threshold_code = temp_to_code(data, crit_temp / MCELSIUS);
-               /* 5th level to be assigned in th2 reg */
-               rising_threshold =
-                       threshold_code << EXYNOS5440_TMU_TH_RISE4_SHIFT;
-               writel(rising_threshold, data->base + EXYNOS5440_TMU_S0_7_TH2);
-               con = readl(data->base + EXYNOS5440_TMU_S0_7_CTRL);
-               con |= (1 << EXYNOS_TMU_THERM_TRIP_EN_SHIFT);
-               writel(con, data->base + EXYNOS5440_TMU_S0_7_CTRL);
-       }
-       /* Clear the PMIN in the common TMU register */
-       if (!data->id)
-               writel(0, data->base_second + EXYNOS5440_TMU_PMIN);
+       reg_off = ((7 - trip) / 2) * 4;
+       bit_off = ((8 - trip) % 2);
  
-       return 0;
+       th = readl(data->base + EXYNOS7_THD_TEMP_FALL7_6 + reg_off);
+       th &= ~(EXYNOS7_TMU_TEMP_MASK << (16 * bit_off));
+       th |= temp_to_code(data, temp - hyst) << (16 * bit_off);
+       writel(th, data->base + EXYNOS7_THD_TEMP_FALL7_6 + reg_off);
  }
  
- static int exynos7_tmu_initialize(struct platform_device *pdev)
+ static void exynos7_tmu_initialize(struct platform_device *pdev)
  {
        struct exynos_tmu_data *data = platform_get_drvdata(pdev);
-       struct thermal_zone_device *tz = data->tzd;
-       struct exynos_tmu_platform_data *pdata = data->pdata;
-       unsigned int status, trim_info;
-       unsigned int rising_threshold = 0, falling_threshold = 0;
-       int ret = 0, threshold_code, i;
-       int temp, temp_hist;
-       unsigned int reg_off, bit_off;
-       status = readb(data->base + EXYNOS_TMU_REG_STATUS);
-       if (!status) {
-               ret = -EBUSY;
-               goto out;
-       }
+       unsigned int trim_info;
  
        trim_info = readl(data->base + EXYNOS_TMU_REG_TRIMINFO);
-       data->temp_error1 = trim_info & EXYNOS7_TMU_TEMP_MASK;
-       if (!data->temp_error1 ||
-           (pdata->min_efuse_value > data->temp_error1) ||
-           (data->temp_error1 > pdata->max_efuse_value))
-               data->temp_error1 = pdata->efuse_value & EXYNOS_TMU_TEMP_MASK;
-       /* Write temperature code for rising and falling threshold */
-       for (i = (of_thermal_get_ntrips(tz) - 1); i >= 0; i--) {
-               /*
-                * On exynos7 there are 4 rising and 4 falling threshold
-                * registers (0x50-0x5c and 0x60-0x6c respectively). Each
-                * register holds the value of two threshold levels (at bit
-                * offsets 0 and 16). Based on the fact that there are atmost
-                * eight possible trigger levels, calculate the register and
-                * bit offsets where the threshold levels are to be written.
-                *
-                * e.g. EXYNOS7_THD_TEMP_RISE7_6 (0x50)
-                * [24:16] - Threshold level 7
-                * [8:0] - Threshold level 6
-                * e.g. EXYNOS7_THD_TEMP_RISE5_4 (0x54)
-                * [24:16] - Threshold level 5
-                * [8:0] - Threshold level 4
-                *
-                * and similarly for falling thresholds.
-                *
-                * Based on the above, calculate the register and bit offsets
-                * for rising/falling threshold levels and populate them.
-                */
-               reg_off = ((7 - i) / 2) * 4;
-               bit_off = ((8 - i) % 2);
-               tz->ops->get_trip_temp(tz, i, &temp);
-               temp /= MCELSIUS;
-               tz->ops->get_trip_hyst(tz, i, &temp_hist);
-               temp_hist = temp - (temp_hist / MCELSIUS);
-               /* Set 9-bit temperature code for rising threshold levels */
-               threshold_code = temp_to_code(data, temp);
-               rising_threshold = readl(data->base +
-                       EXYNOS7_THD_TEMP_RISE7_6 + reg_off);
-               rising_threshold &= ~(EXYNOS7_TMU_TEMP_MASK << (16 * bit_off));
-               rising_threshold |= threshold_code << (16 * bit_off);
-               writel(rising_threshold,
-                      data->base + EXYNOS7_THD_TEMP_RISE7_6 + reg_off);
-               /* Set 9-bit temperature code for falling threshold levels */
-               threshold_code = temp_to_code(data, temp_hist);
-               falling_threshold &= ~(EXYNOS7_TMU_TEMP_MASK << (16 * bit_off));
-               falling_threshold |= threshold_code << (16 * bit_off);
-               writel(falling_threshold,
-                      data->base + EXYNOS7_THD_TEMP_FALL7_6 + reg_off);
-       }
-       data->tmu_clear_irqs(data);
- out:
-       return ret;
+       sanitize_temp_error(data, trim_info);
  }
  
  static void exynos4210_tmu_control(struct platform_device *pdev, bool on)
  {
        struct exynos_tmu_data *data = platform_get_drvdata(pdev);
        struct thermal_zone_device *tz = data->tzd;
-       unsigned int con, interrupt_en;
+       unsigned int con, interrupt_en = 0, i;
  
        con = get_con_reg(data, readl(data->base + EXYNOS_TMU_REG_CONTROL));
  
        if (on) {
-               con |= (1 << EXYNOS_TMU_CORE_EN_SHIFT);
-               interrupt_en =
-                       (of_thermal_is_trip_valid(tz, 3)
-                        << EXYNOS_TMU_INTEN_RISE3_SHIFT) |
-                       (of_thermal_is_trip_valid(tz, 2)
-                        << EXYNOS_TMU_INTEN_RISE2_SHIFT) |
-                       (of_thermal_is_trip_valid(tz, 1)
-                        << EXYNOS_TMU_INTEN_RISE1_SHIFT) |
-                       (of_thermal_is_trip_valid(tz, 0)
-                        << EXYNOS_TMU_INTEN_RISE0_SHIFT);
+               for (i = 0; i < data->ntrip; i++) {
+                       if (!of_thermal_is_trip_valid(tz, i))
+                               continue;
+                       interrupt_en |=
+                               (1 << (EXYNOS_TMU_INTEN_RISE0_SHIFT + i * 4));
+               }
  
                if (data->soc != SOC_ARCH_EXYNOS4210)
                        interrupt_en |=
                                interrupt_en << EXYNOS_TMU_INTEN_FALL0_SHIFT;
+               con |= (1 << EXYNOS_TMU_CORE_EN_SHIFT);
        } else {
                con &= ~(1 << EXYNOS_TMU_CORE_EN_SHIFT);
-               interrupt_en = 0; /* Disable all interrupts */
        }
        writel(interrupt_en, data->base + EXYNOS_TMU_REG_INTEN);
        writel(con, data->base + EXYNOS_TMU_REG_CONTROL);
  }
@@@ -781,36 -603,25 +603,25 @@@ static void exynos5433_tmu_control(stru
  {
        struct exynos_tmu_data *data = platform_get_drvdata(pdev);
        struct thermal_zone_device *tz = data->tzd;
-       unsigned int con, interrupt_en, pd_det_en;
+       unsigned int con, interrupt_en = 0, pd_det_en, i;
  
        con = get_con_reg(data, readl(data->base + EXYNOS_TMU_REG_CONTROL));
  
        if (on) {
-               con |= (1 << EXYNOS_TMU_CORE_EN_SHIFT);
-               interrupt_en =
-                       (of_thermal_is_trip_valid(tz, 7)
-                       << EXYNOS7_TMU_INTEN_RISE7_SHIFT) |
-                       (of_thermal_is_trip_valid(tz, 6)
-                       << EXYNOS7_TMU_INTEN_RISE6_SHIFT) |
-                       (of_thermal_is_trip_valid(tz, 5)
-                       << EXYNOS7_TMU_INTEN_RISE5_SHIFT) |
-                       (of_thermal_is_trip_valid(tz, 4)
-                       << EXYNOS7_TMU_INTEN_RISE4_SHIFT) |
-                       (of_thermal_is_trip_valid(tz, 3)
-                       << EXYNOS7_TMU_INTEN_RISE3_SHIFT) |
-                       (of_thermal_is_trip_valid(tz, 2)
-                       << EXYNOS7_TMU_INTEN_RISE2_SHIFT) |
-                       (of_thermal_is_trip_valid(tz, 1)
-                       << EXYNOS7_TMU_INTEN_RISE1_SHIFT) |
-                       (of_thermal_is_trip_valid(tz, 0)
-                       << EXYNOS7_TMU_INTEN_RISE0_SHIFT);
+               for (i = 0; i < data->ntrip; i++) {
+                       if (!of_thermal_is_trip_valid(tz, i))
+                               continue;
+                       interrupt_en |=
+                               (1 << (EXYNOS7_TMU_INTEN_RISE0_SHIFT + i));
+               }
  
                interrupt_en |=
                        interrupt_en << EXYNOS_TMU_INTEN_FALL0_SHIFT;
-       } else {
+               con |= (1 << EXYNOS_TMU_CORE_EN_SHIFT);
+       } else
                con &= ~(1 << EXYNOS_TMU_CORE_EN_SHIFT);
-               interrupt_en = 0; /* Disable all interrupts */
-       }
  
        pd_det_en = on ? EXYNOS5433_PD_DET_EN : 0;
  
        writel(con, data->base + EXYNOS_TMU_REG_CONTROL);
  }
  
- static void exynos5440_tmu_control(struct platform_device *pdev, bool on)
- {
-       struct exynos_tmu_data *data = platform_get_drvdata(pdev);
-       struct thermal_zone_device *tz = data->tzd;
-       unsigned int con, interrupt_en;
-       con = get_con_reg(data, readl(data->base + EXYNOS5440_TMU_S0_7_CTRL));
-       if (on) {
-               con |= (1 << EXYNOS_TMU_CORE_EN_SHIFT);
-               interrupt_en =
-                       (of_thermal_is_trip_valid(tz, 3)
-                        << EXYNOS5440_TMU_INTEN_RISE3_SHIFT) |
-                       (of_thermal_is_trip_valid(tz, 2)
-                        << EXYNOS5440_TMU_INTEN_RISE2_SHIFT) |
-                       (of_thermal_is_trip_valid(tz, 1)
-                        << EXYNOS5440_TMU_INTEN_RISE1_SHIFT) |
-                       (of_thermal_is_trip_valid(tz, 0)
-                        << EXYNOS5440_TMU_INTEN_RISE0_SHIFT);
-               interrupt_en |=
-                       interrupt_en << EXYNOS5440_TMU_INTEN_FALL0_SHIFT;
-       } else {
-               con &= ~(1 << EXYNOS_TMU_CORE_EN_SHIFT);
-               interrupt_en = 0; /* Disable all interrupts */
-       }
-       writel(interrupt_en, data->base + EXYNOS5440_TMU_S0_7_IRQEN);
-       writel(con, data->base + EXYNOS5440_TMU_S0_7_CTRL);
- }
  static void exynos7_tmu_control(struct platform_device *pdev, bool on)
  {
        struct exynos_tmu_data *data = platform_get_drvdata(pdev);
        struct thermal_zone_device *tz = data->tzd;
-       unsigned int con, interrupt_en;
+       unsigned int con, interrupt_en = 0, i;
  
        con = get_con_reg(data, readl(data->base + EXYNOS_TMU_REG_CONTROL));
  
        if (on) {
-               con |= (1 << EXYNOS_TMU_CORE_EN_SHIFT);
-               con |= (1 << EXYNOS7_PD_DET_EN_SHIFT);
-               interrupt_en =
-                       (of_thermal_is_trip_valid(tz, 7)
-                       << EXYNOS7_TMU_INTEN_RISE7_SHIFT) |
-                       (of_thermal_is_trip_valid(tz, 6)
-                       << EXYNOS7_TMU_INTEN_RISE6_SHIFT) |
-                       (of_thermal_is_trip_valid(tz, 5)
-                       << EXYNOS7_TMU_INTEN_RISE5_SHIFT) |
-                       (of_thermal_is_trip_valid(tz, 4)
-                       << EXYNOS7_TMU_INTEN_RISE4_SHIFT) |
-                       (of_thermal_is_trip_valid(tz, 3)
-                       << EXYNOS7_TMU_INTEN_RISE3_SHIFT) |
-                       (of_thermal_is_trip_valid(tz, 2)
-                       << EXYNOS7_TMU_INTEN_RISE2_SHIFT) |
-                       (of_thermal_is_trip_valid(tz, 1)
-                       << EXYNOS7_TMU_INTEN_RISE1_SHIFT) |
-                       (of_thermal_is_trip_valid(tz, 0)
-                       << EXYNOS7_TMU_INTEN_RISE0_SHIFT);
+               for (i = 0; i < data->ntrip; i++) {
+                       if (!of_thermal_is_trip_valid(tz, i))
+                               continue;
+                       interrupt_en |=
+                               (1 << (EXYNOS7_TMU_INTEN_RISE0_SHIFT + i));
+               }
  
                interrupt_en |=
                        interrupt_en << EXYNOS_TMU_INTEN_FALL0_SHIFT;
+               con |= (1 << EXYNOS_TMU_CORE_EN_SHIFT);
+               con |= (1 << EXYNOS7_PD_DET_EN_SHIFT);
        } else {
                con &= ~(1 << EXYNOS_TMU_CORE_EN_SHIFT);
                con &= ~(1 << EXYNOS7_PD_DET_EN_SHIFT);
-               interrupt_en = 0; /* Disable all interrupts */
        }
  
        writel(interrupt_en, data->base + EXYNOS7_TMU_REG_INTEN);
@@@ -894,8 -666,14 +666,14 @@@ static int exynos_get_temp(void *p, in
        struct exynos_tmu_data *data = p;
        int value, ret = 0;
  
 -      if (!data || !data->tmu_read)
 +      if (!data || !data->tmu_read || !data->enabled)
                return -EINVAL;
+       else if (!data->enabled)
+               /*
+                * Called too early, probably
+                * from thermal_zone_of_sensor_register().
+                */
+               return -EAGAIN;
  
        mutex_lock(&data->lock);
        clk_enable(data->clk);
@@@ -919,10 -697,8 +697,8 @@@ static u32 get_emul_con_reg(struct exyn
        if (temp) {
                temp /= MCELSIUS;
  
-               if (data->soc != SOC_ARCH_EXYNOS5440) {
-                       val &= ~(EXYNOS_EMUL_TIME_MASK << EXYNOS_EMUL_TIME_SHIFT);
-                       val |= (EXYNOS_EMUL_TIME << EXYNOS_EMUL_TIME_SHIFT);
-               }
+               val &= ~(EXYNOS_EMUL_TIME_MASK << EXYNOS_EMUL_TIME_SHIFT);
+               val |= (EXYNOS_EMUL_TIME << EXYNOS_EMUL_TIME_SHIFT);
                if (data->soc == SOC_ARCH_EXYNOS7) {
                        val &= ~(EXYNOS7_EMUL_DATA_MASK <<
                                EXYNOS7_EMUL_DATA_SHIFT);
@@@ -963,16 -739,6 +739,6 @@@ static void exynos4412_tmu_set_emulatio
        writel(val, data->base + emul_con);
  }
  
- static void exynos5440_tmu_set_emulation(struct exynos_tmu_data *data,
-                                        int temp)
- {
-       unsigned int val;
-       val = readl(data->base + EXYNOS5440_TMU_S0_7_DEBUG);
-       val = get_emul_con_reg(data, val, temp);
-       writel(val, data->base + EXYNOS5440_TMU_S0_7_DEBUG);
- }
  static int exynos_tmu_set_emulation(void *drv_data, int temp)
  {
        struct exynos_tmu_data *data = drv_data;
@@@ -995,7 -761,6 +761,6 @@@ out
  }
  #else
  #define exynos4412_tmu_set_emulation NULL
- #define exynos5440_tmu_set_emulation NULL
  static int exynos_tmu_set_emulation(void *drv_data, int temp)
        { return -EINVAL; }
  #endif /* CONFIG_THERMAL_EMULATION */
@@@ -1013,11 -778,6 +778,6 @@@ static int exynos4412_tmu_read(struct e
        return readb(data->base + EXYNOS_TMU_REG_CURRENT_TEMP);
  }
  
- static int exynos5440_tmu_read(struct exynos_tmu_data *data)
- {
-       return readb(data->base + EXYNOS5440_TMU_S0_7_TEMP);
- }
  static int exynos7_tmu_read(struct exynos_tmu_data *data)
  {
        return readw(data->base + EXYNOS_TMU_REG_CURRENT_TEMP) &
@@@ -1028,20 -788,14 +788,14 @@@ static void exynos_tmu_work(struct work
  {
        struct exynos_tmu_data *data = container_of(work,
                        struct exynos_tmu_data, irq_work);
-       unsigned int val_type;
  
        if (!IS_ERR(data->clk_sec))
                clk_enable(data->clk_sec);
-       /* Find which sensor generated this interrupt */
-       if (data->soc == SOC_ARCH_EXYNOS5440) {
-               val_type = readl(data->base_second + EXYNOS5440_TMU_IRQ_STATUS);
-               if (!((val_type >> data->id) & 0x1))
-                       goto out;
-       }
        if (!IS_ERR(data->clk_sec))
                clk_disable(data->clk_sec);
  
-       exynos_report_trigger(data);
+       thermal_zone_device_update(data->tzd, THERMAL_EVENT_UNSPECIFIED);
        mutex_lock(&data->lock);
        clk_enable(data->clk);
  
  
        clk_disable(data->clk);
        mutex_unlock(&data->lock);
- out:
        enable_irq(data->irq);
  }
  
@@@ -1085,15 -838,6 +838,6 @@@ static void exynos4210_tmu_clear_irqs(s
        writel(val_irq, data->base + tmu_intclear);
  }
  
- static void exynos5440_tmu_clear_irqs(struct exynos_tmu_data *data)
- {
-       unsigned int val_irq;
-       val_irq = readl(data->base + EXYNOS5440_TMU_S0_7_IRQ);
-       /* clear the interrupts */
-       writel(val_irq, data->base + EXYNOS5440_TMU_S0_7_IRQ);
- }
  static irqreturn_t exynos_tmu_irq(int irq, void *id)
  {
        struct exynos_tmu_data *data = id;
  }
  
  static const struct of_device_id exynos_tmu_match[] = {
-       { .compatible = "samsung,exynos3250-tmu", },
-       { .compatible = "samsung,exynos4210-tmu", },
-       { .compatible = "samsung,exynos4412-tmu", },
-       { .compatible = "samsung,exynos5250-tmu", },
-       { .compatible = "samsung,exynos5260-tmu", },
-       { .compatible = "samsung,exynos5420-tmu", },
-       { .compatible = "samsung,exynos5420-tmu-ext-triminfo", },
-       { .compatible = "samsung,exynos5433-tmu", },
-       { .compatible = "samsung,exynos5440-tmu", },
-       { .compatible = "samsung,exynos7-tmu", },
-       { /* sentinel */ },
+       {
+               .compatible = "samsung,exynos3250-tmu",
+               .data = (const void *)SOC_ARCH_EXYNOS3250,
+       }, {
+               .compatible = "samsung,exynos4210-tmu",
+               .data = (const void *)SOC_ARCH_EXYNOS4210,
+       }, {
+               .compatible = "samsung,exynos4412-tmu",
+               .data = (const void *)SOC_ARCH_EXYNOS4412,
+       }, {
+               .compatible = "samsung,exynos5250-tmu",
+               .data = (const void *)SOC_ARCH_EXYNOS5250,
+       }, {
+               .compatible = "samsung,exynos5260-tmu",
+               .data = (const void *)SOC_ARCH_EXYNOS5260,
+       }, {
+               .compatible = "samsung,exynos5420-tmu",
+               .data = (const void *)SOC_ARCH_EXYNOS5420,
+       }, {
+               .compatible = "samsung,exynos5420-tmu-ext-triminfo",
+               .data = (const void *)SOC_ARCH_EXYNOS5420_TRIMINFO,
+       }, {
+               .compatible = "samsung,exynos5433-tmu",
+               .data = (const void *)SOC_ARCH_EXYNOS5433,
+       }, {
+               .compatible = "samsung,exynos7-tmu",
+               .data = (const void *)SOC_ARCH_EXYNOS7,
+       },
+       { },
  };
  MODULE_DEVICE_TABLE(of, exynos_tmu_match);
  
- static int exynos_of_get_soc_type(struct device_node *np)
- {
-       if (of_device_is_compatible(np, "samsung,exynos3250-tmu"))
-               return SOC_ARCH_EXYNOS3250;
-       else if (of_device_is_compatible(np, "samsung,exynos4210-tmu"))
-               return SOC_ARCH_EXYNOS4210;
-       else if (of_device_is_compatible(np, "samsung,exynos4412-tmu"))
-               return SOC_ARCH_EXYNOS4412;
-       else if (of_device_is_compatible(np, "samsung,exynos5250-tmu"))
-               return SOC_ARCH_EXYNOS5250;
-       else if (of_device_is_compatible(np, "samsung,exynos5260-tmu"))
-               return SOC_ARCH_EXYNOS5260;
-       else if (of_device_is_compatible(np, "samsung,exynos5420-tmu"))
-               return SOC_ARCH_EXYNOS5420;
-       else if (of_device_is_compatible(np,
-                                        "samsung,exynos5420-tmu-ext-triminfo"))
-               return SOC_ARCH_EXYNOS5420_TRIMINFO;
-       else if (of_device_is_compatible(np, "samsung,exynos5433-tmu"))
-               return SOC_ARCH_EXYNOS5433;
-       else if (of_device_is_compatible(np, "samsung,exynos5440-tmu"))
-               return SOC_ARCH_EXYNOS5440;
-       else if (of_device_is_compatible(np, "samsung,exynos7-tmu"))
-               return SOC_ARCH_EXYNOS7;
-       return -EINVAL;
- }
- static int exynos_of_sensor_conf(struct device_node *np,
-                                struct exynos_tmu_platform_data *pdata)
- {
-       u32 value;
-       int ret;
-       of_node_get(np);
-       ret = of_property_read_u32(np, "samsung,tmu_gain", &value);
-       pdata->gain = (u8)value;
-       of_property_read_u32(np, "samsung,tmu_reference_voltage", &value);
-       pdata->reference_voltage = (u8)value;
-       of_property_read_u32(np, "samsung,tmu_noise_cancel_mode", &value);
-       pdata->noise_cancel_mode = (u8)value;
-       of_property_read_u32(np, "samsung,tmu_efuse_value",
-                            &pdata->efuse_value);
-       of_property_read_u32(np, "samsung,tmu_min_efuse_value",
-                            &pdata->min_efuse_value);
-       of_property_read_u32(np, "samsung,tmu_max_efuse_value",
-                            &pdata->max_efuse_value);
-       of_property_read_u32(np, "samsung,tmu_first_point_trim", &value);
-       pdata->first_point_trim = (u8)value;
-       of_property_read_u32(np, "samsung,tmu_second_point_trim", &value);
-       pdata->second_point_trim = (u8)value;
-       of_property_read_u32(np, "samsung,tmu_default_temp_offset", &value);
-       pdata->default_temp_offset = (u8)value;
-       of_property_read_u32(np, "samsung,tmu_cal_type", &pdata->cal_type);
-       of_node_put(np);
-       return 0;
- }
  static int exynos_map_dt_data(struct platform_device *pdev)
  {
        struct exynos_tmu_data *data = platform_get_drvdata(pdev);
-       struct exynos_tmu_platform_data *pdata;
        struct resource res;
  
        if (!data || !pdev->dev.of_node)
                return -EADDRNOTAVAIL;
        }
  
-       pdata = devm_kzalloc(&pdev->dev,
-                            sizeof(struct exynos_tmu_platform_data),
-                            GFP_KERNEL);
-       if (!pdata)
-               return -ENOMEM;
-       exynos_of_sensor_conf(pdev->dev.of_node, pdata);
-       data->pdata = pdata;
-       data->soc = exynos_of_get_soc_type(pdev->dev.of_node);
+       data->soc = (enum soc_type)of_device_get_match_data(&pdev->dev);
  
        switch (data->soc) {
        case SOC_ARCH_EXYNOS4210:
+               data->tmu_set_trip_temp = exynos4210_tmu_set_trip_temp;
+               data->tmu_set_trip_hyst = exynos4210_tmu_set_trip_hyst;
                data->tmu_initialize = exynos4210_tmu_initialize;
                data->tmu_control = exynos4210_tmu_control;
                data->tmu_read = exynos4210_tmu_read;
                data->tmu_clear_irqs = exynos4210_tmu_clear_irqs;
                data->ntrip = 4;
+               data->gain = 15;
+               data->reference_voltage = 7;
+               data->efuse_value = 55;
+               data->min_efuse_value = 40;
+               data->max_efuse_value = 100;
                break;
        case SOC_ARCH_EXYNOS3250:
        case SOC_ARCH_EXYNOS4412:
        case SOC_ARCH_EXYNOS5260:
        case SOC_ARCH_EXYNOS5420:
        case SOC_ARCH_EXYNOS5420_TRIMINFO:
+               data->tmu_set_trip_temp = exynos4412_tmu_set_trip_temp;
+               data->tmu_set_trip_hyst = exynos4412_tmu_set_trip_hyst;
                data->tmu_initialize = exynos4412_tmu_initialize;
                data->tmu_control = exynos4210_tmu_control;
                data->tmu_read = exynos4412_tmu_read;
                data->tmu_set_emulation = exynos4412_tmu_set_emulation;
                data->tmu_clear_irqs = exynos4210_tmu_clear_irqs;
                data->ntrip = 4;
+               data->gain = 8;
+               data->reference_voltage = 16;
+               data->efuse_value = 55;
+               if (data->soc != SOC_ARCH_EXYNOS5420 &&
+                   data->soc != SOC_ARCH_EXYNOS5420_TRIMINFO)
+                       data->min_efuse_value = 40;
+               else
+                       data->min_efuse_value = 0;
+               data->max_efuse_value = 100;
                break;
        case SOC_ARCH_EXYNOS5433:
+               data->tmu_set_trip_temp = exynos5433_tmu_set_trip_temp;
+               data->tmu_set_trip_hyst = exynos5433_tmu_set_trip_hyst;
                data->tmu_initialize = exynos5433_tmu_initialize;
                data->tmu_control = exynos5433_tmu_control;
                data->tmu_read = exynos4412_tmu_read;
                data->tmu_set_emulation = exynos4412_tmu_set_emulation;
                data->tmu_clear_irqs = exynos4210_tmu_clear_irqs;
                data->ntrip = 8;
-               break;
-       case SOC_ARCH_EXYNOS5440:
-               data->tmu_initialize = exynos5440_tmu_initialize;
-               data->tmu_control = exynos5440_tmu_control;
-               data->tmu_read = exynos5440_tmu_read;
-               data->tmu_set_emulation = exynos5440_tmu_set_emulation;
-               data->tmu_clear_irqs = exynos5440_tmu_clear_irqs;
-               data->ntrip = 4;
+               data->gain = 8;
+               if (res.start == EXYNOS5433_G3D_BASE)
+                       data->reference_voltage = 23;
+               else
+                       data->reference_voltage = 16;
+               data->efuse_value = 75;
+               data->min_efuse_value = 40;
+               data->max_efuse_value = 150;
                break;
        case SOC_ARCH_EXYNOS7:
+               data->tmu_set_trip_temp = exynos7_tmu_set_trip_temp;
+               data->tmu_set_trip_hyst = exynos7_tmu_set_trip_hyst;
                data->tmu_initialize = exynos7_tmu_initialize;
                data->tmu_control = exynos7_tmu_control;
                data->tmu_read = exynos7_tmu_read;
                data->tmu_set_emulation = exynos4412_tmu_set_emulation;
                data->tmu_clear_irqs = exynos4210_tmu_clear_irqs;
                data->ntrip = 8;
+               data->gain = 9;
+               data->reference_voltage = 17;
+               data->efuse_value = 75;
+               data->min_efuse_value = 15;
+               data->max_efuse_value = 100;
                break;
        default:
                dev_err(&pdev->dev, "Platform not supported\n");
                return -EINVAL;
        }
  
+       data->cal_type = TYPE_ONE_POINT_TRIMMING;
        /*
         * Check if the TMU shares some registers and then try to map the
         * memory of common registers.
         */
-       if (data->soc != SOC_ARCH_EXYNOS5420_TRIMINFO &&
-           data->soc != SOC_ARCH_EXYNOS5440)
+       if (data->soc != SOC_ARCH_EXYNOS5420_TRIMINFO)
                return 0;
  
        if (of_address_to_resource(pdev->dev.of_node, 1, &res)) {