mei: mask interrupt set bit on clean reset bit
authorAlexander Usyskin <alexander.usyskin@intel.com>
Sun, 25 Jan 2015 21:45:27 +0000 (23:45 +0200)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Tue, 3 Feb 2015 23:48:51 +0000 (15:48 -0800)
We should mask interrupt set bit when writing back
hcsr value in reset bit clean-up.

This is refinement for
mei: clean reset bit before reset
commit b13a65ef190e488e2761d65bdd2e1fe8a3a125f5

Cc: <stable@vger.kernel.org> #3.10+
Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com>
Signed-off-by: Tomas Winkler <tomas.winkler@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/misc/mei/hw-me.c

index 06ff0a2..ccc1b40 100644 (file)
@@ -242,7 +242,7 @@ static int mei_me_hw_reset(struct mei_device *dev, bool intr_enable)
        if ((hcsr & H_RST) == H_RST) {
                dev_warn(dev->dev, "H_RST is set = 0x%08X", hcsr);
                hcsr &= ~H_RST;
-               mei_me_reg_write(hw, H_CSR, hcsr);
+               mei_hcsr_set(hw, hcsr);
                hcsr = mei_hcsr_read(hw);
        }