Merge tag 'bcm2835-dt-next-2017-03-30' into devicetree/next
authorFlorian Fainelli <f.fainelli@gmail.com>
Wed, 19 Apr 2017 16:35:26 +0000 (09:35 -0700)
committerFlorian Fainelli <f.fainelli@gmail.com>
Sun, 14 May 2017 03:22:59 +0000 (20:22 -0700)
This pull request brings back bcm2835 DT fixups from Baruch Siach that
got misplaced after a PR for 4.11 got rejected.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
arch/arm/boot/dts/bcm283x-rpi-smsc9512.dtsi
arch/arm/boot/dts/bcm283x-rpi-smsc9514.dtsi
arch/arm/boot/dts/bcm283x.dtsi

index 12c981e5113489ea785d8f4d8b0a5b9f99d61beb..9a0599f711ff3382a7b908bb72e9f0392db5e1bf 100644 (file)
@@ -1,6 +1,6 @@
 / {
        aliases {
-               ethernet = &ethernet;
+               ethernet0 = &ethernet;
        };
 };
 
index 3f0a56ebcf1f64692cbdd311752ce8d1fd36a5f1..dc7ae776db5fc0ca54e91ef6369fbaee71162d22 100644 (file)
@@ -1,6 +1,6 @@
 / {
        aliases {
-               ethernet = &ethernet;
+               ethernet0 = &ethernet;
        };
 };
 
index 35cea3fcaf5c479e68e50e5d8e6606cb9735abba..561f27d8d92224fe8f4f8c3224a5441f2d41175a 100644 (file)
                                brcm,pins = <0 1>;
                                brcm,function = <BCM2835_FSEL_ALT0>;
                        };
-                       i2c0_gpio32: i2c0_gpio32 {
-                               brcm,pins = <32 34>;
+                       i2c0_gpio28: i2c0_gpio28 {
+                               brcm,pins = <28 29>;
                                brcm,function = <BCM2835_FSEL_ALT0>;
                        };
                        i2c0_gpio44: i2c0_gpio44 {
                        /* Separate from the uart0_gpio14 group
                         * because it conflicts with spi1_gpio16, and
                         * people often run uart0 on the two pins
-                        * without flow contrl.
+                        * without flow control.
                         */
                        uart0_ctsrts_gpio16: uart0_ctsrts_gpio16 {
                                brcm,pins = <16 17>;
                                brcm,function = <BCM2835_FSEL_ALT3>;
                        };
-                       uart0_gpio30: uart0_gpio30 {
+                       uart0_ctsrts_gpio30: uart0_ctsrts_gpio30 {
                                brcm,pins = <30 31>;
                                brcm,function = <BCM2835_FSEL_ALT3>;
                        };
-                       uart0_ctsrts_gpio32: uart0_ctsrts_gpio32 {
+                       uart0_gpio32: uart0_gpio32 {
                                brcm,pins = <32 33>;
                                brcm,function = <BCM2835_FSEL_ALT3>;
                        };
+                       uart0_gpio36: uart0_gpio36 {
+                               brcm,pins = <36 37>;
+                               brcm,function = <BCM2835_FSEL_ALT2>;
+                       };
+                       uart0_ctsrts_gpio38: uart0_ctsrts_gpio38 {
+                               brcm,pins = <38 39>;
+                               brcm,function = <BCM2835_FSEL_ALT2>;
+                       };
 
                        uart1_gpio14: uart1_gpio14 {
                                brcm,pins = <14 15>;
                                brcm,pins = <30 31>;
                                brcm,function = <BCM2835_FSEL_ALT5>;
                        };
-                       uart1_gpio36: uart1_gpio36 {
-                               brcm,pins = <36 37 38 39>;
-                               brcm,function = <BCM2835_FSEL_ALT2>;
-                       };
                        uart1_gpio40: uart1_gpio40 {
                                brcm,pins = <40 41>;
                                brcm,function = <BCM2835_FSEL_ALT5>;