Merge tag 'pxa-dt-4.21' of https://github.com/rjarzmik/linux into next/dt
authorOlof Johansson <olof@lixom.net>
Tue, 11 Dec 2018 15:43:46 +0000 (07:43 -0800)
committerOlof Johansson <olof@lixom.net>
Tue, 11 Dec 2018 15:43:46 +0000 (07:43 -0800)
This device-tree pxa update brings :
 - various fixes from Daniel (W=12 issues mainly)
 - support for the first pxa3xx devicetree pxa board

* tag 'pxa-dt-4.21' of https://github.com/rjarzmik/linux:
  ARM: dts: pxa3xx: Add Raumfeld DTS files
  ARM: dts: pxa: clean up USB controller nodes
  ARM: dts: pxa3xx: clean up pxa3xx clock controller node name
  ARM: dts: pxa3xx: order timer and gcu nodes under /pxabus
  ARM: dts: pxa2xx: fix hwuart memory range
  ARM: dts: pxa3xx: drop #address-cells and #size-cells from pinctrl node
  ARM: dts: pxa2xx: drop #address-cells and #size-cells from /cpus
  ARM: dts: pxa3xx: add gcu node

Signed-off-by: Olof Johansson <olof@lixom.net>
508 files changed:
.mailmap
Documentation/ABI/testing/sysfs-class-led-trigger-pattern
Documentation/devicetree/bindings/arm/amlogic,scpi.txt
Documentation/devicetree/bindings/arm/amlogic.txt
Documentation/devicetree/bindings/arm/rockchip.txt
Documentation/devicetree/bindings/arm/shmobile.txt
Documentation/devicetree/bindings/i2c/i2c-omap.txt
Documentation/devicetree/bindings/iio/adc/qcom,spmi-vadc.txt
Documentation/devicetree/bindings/soc/bcm/brcm,bcm2835-vchiq.txt
Documentation/devicetree/bindings/timer/amlogic,meson6-timer.txt
Documentation/devicetree/bindings/timer/mrvl,mmp-timer.txt
Documentation/devicetree/bindings/vendor-prefixes.txt
Documentation/i2c/busses/i2c-nvidia-gpu [new file with mode: 0644]
Documentation/x86/x86_64/mm.txt
Documentation/x86/zero-page.txt
MAINTAINERS
Makefile
arch/alpha/include/asm/termios.h
arch/alpha/include/uapi/asm/ioctls.h
arch/alpha/include/uapi/asm/termbits.h
arch/arm/boot/dts/Makefile
arch/arm/boot/dts/am3517-evm.dts
arch/arm/boot/dts/am437x-gp-evm.dts
arch/arm/boot/dts/arm-realview-pbx.dtsi
arch/arm/boot/dts/aspeed-bmc-arm-centriq2400-rep.dts
arch/arm/boot/dts/aspeed-bmc-intel-s2600wf.dts
arch/arm/boot/dts/aspeed-bmc-opp-lanyang.dts
arch/arm/boot/dts/aspeed-bmc-portwell-neptune.dts
arch/arm/boot/dts/bcm-nsp.dtsi
arch/arm/boot/dts/bcm2835-rpi-zero-w.dts
arch/arm/boot/dts/bcm2835-rpi-zero.dts
arch/arm/boot/dts/bcm2835-rpi.dtsi
arch/arm/boot/dts/bcm2836-rpi-2-b.dts
arch/arm/boot/dts/bcm2836-rpi.dtsi [new file with mode: 0644]
arch/arm/boot/dts/bcm2837-rpi-3-b-plus.dts
arch/arm/boot/dts/bcm2837-rpi-3-b.dts
arch/arm/boot/dts/bcm2837-rpi-cm3.dtsi
arch/arm/boot/dts/bcm4708-linksys-ea6500-v2.dts [new file with mode: 0644]
arch/arm/boot/dts/bcm47081.dtsi
arch/arm/boot/dts/bcm4709.dtsi
arch/arm/boot/dts/bcm47094.dtsi
arch/arm/boot/dts/bcm47189-tenda-ac9.dts
arch/arm/boot/dts/bcm5301x.dtsi
arch/arm/boot/dts/bcm53573.dtsi
arch/arm/boot/dts/bcm63138.dtsi
arch/arm/boot/dts/bcm958522er.dts
arch/arm/boot/dts/bcm958525er.dts
arch/arm/boot/dts/bcm958525xmc.dts
arch/arm/boot/dts/bcm958622hr.dts
arch/arm/boot/dts/bcm958623hr.dts
arch/arm/boot/dts/bcm958625hr.dts
arch/arm/boot/dts/bcm958625k.dts
arch/arm/boot/dts/bcm963138dvt.dts
arch/arm/boot/dts/bcm988312hr.dts
arch/arm/boot/dts/emev2.dtsi
arch/arm/boot/dts/imx53-ppd.dts
arch/arm/boot/dts/imx6sll.dtsi
arch/arm/boot/dts/imx6sx-sdb.dtsi
arch/arm/boot/dts/meson.dtsi
arch/arm/boot/dts/meson6-atv1200.dts
arch/arm/boot/dts/meson6.dtsi
arch/arm/boot/dts/meson8-minix-neo-x8.dts
arch/arm/boot/dts/meson8.dtsi
arch/arm/boot/dts/meson8b-mxq.dts
arch/arm/boot/dts/meson8b.dtsi
arch/arm/boot/dts/meson8m2.dtsi
arch/arm/boot/dts/mmp2.dtsi
arch/arm/boot/dts/omap3-gta04.dtsi
arch/arm/boot/dts/qcom-apq8064-arrow-sd-600eval-pins.dtsi [deleted file]
arch/arm/boot/dts/qcom-apq8064-arrow-sd-600eval.dts [deleted file]
arch/arm/boot/dts/qcom-apq8084.dtsi
arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts
arch/arm/boot/dts/qcom-msm8974.dtsi
arch/arm/boot/dts/r8a7740.dtsi
arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts
arch/arm/boot/dts/r8a77470.dtsi
arch/arm/boot/dts/r8a7790-lager.dts
arch/arm/boot/dts/r8a7791-koelsch.dts
arch/arm/boot/dts/r8a7791-porter.dts
arch/arm/boot/dts/r9a06g032.dtsi
arch/arm/boot/dts/rk3066a.dtsi
arch/arm/boot/dts/rk3188.dtsi
arch/arm/boot/dts/rk322x.dtsi
arch/arm/boot/dts/rk3288-rock2-som.dtsi
arch/arm/boot/dts/rk3288-veyron-mickey.dts
arch/arm/boot/dts/rk3288.dtsi
arch/arm/boot/dts/rk3xxx.dtsi
arch/arm/boot/dts/sh73a0.dtsi
arch/arm/boot/dts/socfpga.dtsi
arch/arm/boot/dts/socfpga_arria10.dtsi
arch/arm/boot/dts/socfpga_arria10_socdk.dtsi
arch/arm/boot/dts/socfpga_arria10_socdk_nand.dts
arch/arm/boot/dts/socfpga_arria10_socdk_qspi.dts
arch/arm/boot/dts/socfpga_arria10_socdk_sdmmc.dts
arch/arm/boot/dts/socfpga_arria5.dtsi
arch/arm/boot/dts/socfpga_arria5_socdk.dts
arch/arm/boot/dts/socfpga_cyclone5.dtsi
arch/arm/boot/dts/socfpga_cyclone5_de0_nano_soc.dts
arch/arm/boot/dts/socfpga_cyclone5_mcv.dtsi
arch/arm/boot/dts/socfpga_cyclone5_mcvevk.dts
arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
arch/arm/boot/dts/socfpga_cyclone5_sockit.dts
arch/arm/boot/dts/socfpga_cyclone5_socrates.dts
arch/arm/boot/dts/socfpga_cyclone5_sodia.dts
arch/arm/boot/dts/socfpga_cyclone5_vining_fpga.dts
arch/arm/boot/dts/socfpga_vt.dts
arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
arch/arm/boot/dts/vexpress-v2m.dtsi
arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts
arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
arch/arm/boot/dts/vexpress-v2p-ca5s.dts
arch/arm/boot/dts/vexpress-v2p-ca9.dts
arch/arm/boot/dts/vf610m4-colibri.dts
arch/arm/configs/multi_v7_defconfig
arch/arm/include/asm/pgtable-2level.h
arch/arm/mach-mmp/mmp2-dt.c
arch/arm/mm/proc-v7.S
arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
arch/arm64/boot/dts/amlogic/Makefile
arch/arm64/boot/dts/amlogic/meson-axg-s400.dts
arch/arm64/boot/dts/amlogic/meson-axg.dtsi
arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi
arch/arm64/boot/dts/amlogic/meson-gx.dtsi
arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts
arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
arch/arm64/boot/dts/amlogic/meson-gxl-s805x-libretech-ac.dts [new file with mode: 0644]
arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts
arch/arm64/boot/dts/amlogic/meson-gxl-s905d-phicomm-n1.dts [new file with mode: 0644]
arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts
arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts
arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dts
arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts
arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts
arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
arch/arm64/boot/dts/hisilicon/hi3660.dtsi
arch/arm64/boot/dts/hisilicon/hi3670-hikey970.dts
arch/arm64/boot/dts/hisilicon/hi3670.dtsi
arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts
arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
arch/arm64/boot/dts/hisilicon/hi6220.dtsi
arch/arm64/boot/dts/hisilicon/hikey970-pinctrl.dtsi [new file with mode: 0644]
arch/arm64/boot/dts/qcom/Makefile
arch/arm64/boot/dts/qcom/msm8916.dtsi
arch/arm64/boot/dts/qcom/msm8996.dtsi
arch/arm64/boot/dts/qcom/msm8998-mtp.dtsi
arch/arm64/boot/dts/qcom/msm8998-pins.dtsi [new file with mode: 0644]
arch/arm64/boot/dts/qcom/msm8998.dtsi
arch/arm64/boot/dts/qcom/pm8998.dtsi
arch/arm64/boot/dts/qcom/pms405.dtsi [new file with mode: 0644]
arch/arm64/boot/dts/qcom/qcs404-evb-1000.dts [new file with mode: 0644]
arch/arm64/boot/dts/qcom/qcs404-evb-4000.dts [new file with mode: 0644]
arch/arm64/boot/dts/qcom/qcs404-evb.dtsi [new file with mode: 0644]
arch/arm64/boot/dts/qcom/qcs404.dtsi [new file with mode: 0644]
arch/arm64/boot/dts/qcom/sdm845-mtp.dts
arch/arm64/boot/dts/qcom/sdm845.dtsi
arch/arm64/boot/dts/renesas/r8a774a1.dtsi
arch/arm64/boot/dts/renesas/r8a7795-es1-salvator-x.dts
arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
arch/arm64/boot/dts/renesas/r8a7795-salvator-xs.dts
arch/arm64/boot/dts/renesas/r8a7795.dtsi
arch/arm64/boot/dts/renesas/r8a7796.dtsi
arch/arm64/boot/dts/renesas/r8a77965.dtsi
arch/arm64/boot/dts/renesas/r8a77970.dtsi
arch/arm64/boot/dts/renesas/r8a77980-condor.dts
arch/arm64/boot/dts/renesas/r8a77980.dtsi
arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts
arch/arm64/boot/dts/renesas/r8a77990.dtsi
arch/arm64/boot/dts/renesas/r8a77995-draak.dts
arch/arm64/boot/dts/renesas/r8a77995.dtsi
arch/arm64/boot/dts/renesas/salvator-common.dtsi
arch/arm64/boot/dts/renesas/ulcb.dtsi
arch/arm64/boot/dts/rockchip/Makefile
arch/arm64/boot/dts/rockchip/rk3328-rock64.dts
arch/arm64/boot/dts/rockchip/rk3328.dtsi
arch/arm64/boot/dts/rockchip/rk3368.dtsi
arch/arm64/boot/dts/rockchip/rk3399-gru-chromebook.dtsi
arch/arm64/boot/dts/rockchip/rk3399-gru-kevin.dts
arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet-inx.dts [new file with mode: 0644]
arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet-kd.dts [new file with mode: 0644]
arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet.dtsi [new file with mode: 0644]
arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator.dts
arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi
arch/arm64/boot/dts/rockchip/rk3399.dtsi
arch/arm64/boot/dts/sprd/sc9836.dtsi
arch/arm64/boot/dts/sprd/sc9860.dtsi
arch/arm64/include/asm/processor.h
arch/arm64/mm/init.c
arch/arm64/mm/mmu.c
arch/m68k/include/asm/pgtable_mm.h
arch/microblaze/include/asm/pgtable.h
arch/mips/cavium-octeon/executive/cvmx-helper.c
arch/mips/mm/dma-noncoherent.c
arch/nds32/include/asm/pgtable.h
arch/parisc/include/asm/pgtable.h
arch/s390/Makefile
arch/s390/boot/compressed/Makefile
arch/s390/configs/debug_defconfig
arch/s390/configs/performance_defconfig
arch/s390/defconfig
arch/s390/include/asm/mmu_context.h
arch/s390/include/asm/pgalloc.h
arch/s390/include/asm/pgtable.h
arch/s390/include/asm/processor.h
arch/s390/include/asm/thread_info.h
arch/s390/include/asm/tlb.h
arch/s390/kernel/entry.S
arch/s390/kernel/perf_cpum_cf.c
arch/s390/kernel/perf_cpum_sf.c
arch/s390/kernel/vdso32/Makefile
arch/s390/kernel/vdso64/Makefile
arch/s390/kernel/vmlinux.lds.S
arch/s390/mm/pgalloc.c
arch/s390/numa/numa.c
arch/um/drivers/ubd_kern.c
arch/x86/Kconfig
arch/x86/Makefile
arch/x86/include/asm/mce.h
arch/x86/include/asm/mshyperv.h
arch/x86/include/asm/page_64_types.h
arch/x86/include/asm/pgtable_64_types.h
arch/x86/include/asm/qspinlock.h
arch/x86/include/asm/xen/page.h
arch/x86/kernel/cpu/mcheck/mce.c
arch/x86/kernel/cpu/mshyperv.c
arch/x86/kernel/cpu/vmware.c
arch/x86/kernel/ldt.c
arch/x86/kernel/vsmp_64.c
arch/x86/xen/mmu_pv.c
arch/x86/xen/p2m.c
arch/x86/xen/spinlock.c
block/bio.c
block/blk-lib.c
block/blk-merge.c
block/blk.h
drivers/acpi/nfit/mce.c
drivers/ata/sata_rcar.c
drivers/block/xen-blkfront.c
drivers/clk/clk-fixed-factor.c
drivers/clk/meson/axg.c
drivers/clk/meson/gxbb.c
drivers/clk/qcom/gcc-qcs404.c
drivers/clocksource/i8253.c
drivers/gpu/drm/amd/amdgpu/amdgpu.h
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.h
drivers/gpu/drm/amd/display/dc/core/dc_link.c
drivers/gpu/drm/amd/display/dc/dc.h
drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c
drivers/gpu/drm/amd/include/amd_shared.h
drivers/gpu/drm/amd/include/atomfirmware.h
drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c
drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h
drivers/gpu/drm/amd/powerplay/inc/vega20_ppsmc.h
drivers/gpu/drm/etnaviv/etnaviv_sched.c
drivers/gpu/drm/exynos/exynos5433_drm_decon.c
drivers/gpu/drm/exynos/exynos_drm_crtc.c
drivers/gpu/drm/exynos/exynos_drm_drv.h
drivers/gpu/drm/exynos/exynos_drm_dsi.c
drivers/gpu/drm/exynos/exynos_drm_fbdev.c
drivers/gpu/drm/i915/gvt/gtt.c
drivers/gpu/drm/i915/gvt/gtt.h
drivers/gpu/drm/i915/gvt/handlers.c
drivers/gpu/drm/i915/gvt/mmio_context.c
drivers/gpu/drm/i915/i915_drv.c
drivers/gpu/drm/i915/i915_drv.h
drivers/gpu/drm/i915/i915_gem_execbuffer.c
drivers/gpu/drm/i915/i915_gem_gtt.c
drivers/gpu/drm/i915/i915_gem_gtt.h
drivers/gpu/drm/i915/i915_reg.h
drivers/gpu/drm/i915/intel_audio.c
drivers/gpu/drm/i915/intel_cdclk.c
drivers/gpu/drm/i915/intel_display.c
drivers/gpu/drm/i915/intel_lpe_audio.c
drivers/gpu/drm/i915/intel_pm.c
drivers/gpu/drm/i915/selftests/huge_pages.c
drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
drivers/gpu/drm/sun4i/sun4i_lvds.c
drivers/gpu/drm/sun4i/sun4i_rgb.c
drivers/gpu/drm/sun4i/sun4i_tcon.c
drivers/gpu/vga/vga_switcheroo.c
drivers/hid/hid-alps.c
drivers/hid/hid-asus.c
drivers/hid/hid-ids.h
drivers/hid/hid-quirks.c
drivers/hid/i2c-hid/i2c-hid-core.c
drivers/hid/i2c-hid/i2c-hid-dmi-quirks.c
drivers/hid/usbhid/hiddev.c
drivers/hwmon/hwmon.c
drivers/hwmon/ibmpowernv.c
drivers/i2c/busses/Kconfig
drivers/i2c/busses/Makefile
drivers/i2c/busses/i2c-nvidia-gpu.c [new file with mode: 0644]
drivers/i2c/busses/i2c-qcom-geni.c
drivers/leds/trigger/ledtrig-pattern.c
drivers/mtd/devices/Kconfig
drivers/mtd/maps/sa1100-flash.c
drivers/mtd/nand/raw/nand_base.c
drivers/mtd/spi-nor/cadence-quadspi.c
drivers/mtd/spi-nor/spi-nor.c
drivers/net/bonding/bond_main.c
drivers/net/dsa/microchip/ksz_common.c
drivers/net/dsa/mv88e6xxx/global1.c
drivers/net/ethernet/aquantia/atlantic/aq_ethtool.c
drivers/net/ethernet/aquantia/atlantic/aq_hw.h
drivers/net/ethernet/aquantia/atlantic/aq_main.c
drivers/net/ethernet/aquantia/atlantic/aq_nic.c
drivers/net/ethernet/aquantia/atlantic/aq_nic.h
drivers/net/ethernet/aquantia/atlantic/aq_ring.c
drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0.c
drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_llh.c
drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_llh.h
drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_llh_internal.h
drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_utils_fw2x.c
drivers/net/ethernet/atheros/alx/alx.h
drivers/net/ethernet/atheros/alx/main.c
drivers/net/ethernet/broadcom/bcmsysport.c
drivers/net/ethernet/broadcom/genet/bcmgenet.c
drivers/net/ethernet/hisilicon/hns3/hns3_enet.c
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c
drivers/net/ethernet/ibm/ibmvnic.c
drivers/net/ethernet/intel/i40e/i40e_main.c
drivers/net/ethernet/intel/ice/ice.h
drivers/net/ethernet/intel/ice/ice_common.c
drivers/net/ethernet/intel/ice/ice_ethtool.c
drivers/net/ethernet/intel/ice/ice_hw_autogen.h
drivers/net/ethernet/intel/ice/ice_lib.c
drivers/net/ethernet/intel/ice/ice_main.c
drivers/net/ethernet/intel/ice/ice_switch.c
drivers/net/ethernet/intel/ice/ice_switch.h
drivers/net/ethernet/intel/ice/ice_txrx.c
drivers/net/ethernet/intel/ice/ice_txrx.h
drivers/net/ethernet/intel/ice/ice_type.h
drivers/net/ethernet/intel/ice/ice_virtchnl_pf.c
drivers/net/ethernet/intel/igb/igb_ptp.c
drivers/net/ethernet/marvell/mvneta.c
drivers/net/ethernet/mellanox/mlx4/en_tx.c
drivers/net/ethernet/mellanox/mlxsw/spectrum.c
drivers/net/ethernet/qlogic/qed/qed_fcoe.c
drivers/net/ethernet/qlogic/qed/qed_iscsi.c
drivers/net/ethernet/qlogic/qed/qed_l2.c
drivers/net/ethernet/qlogic/qed/qed_mcp.c
drivers/net/ethernet/qlogic/qed/qed_rdma.c
drivers/net/ethernet/qlogic/qed/qed_roce.c
drivers/net/ethernet/qlogic/qed/qed_sp.h
drivers/net/ethernet/qlogic/qed/qed_sp_commands.c
drivers/net/ethernet/qlogic/qed/qed_spq.c
drivers/net/ethernet/qlogic/qed/qed_sriov.c
drivers/net/ethernet/qlogic/qlcnic/qlcnic_io.c
drivers/net/ethernet/qualcomm/rmnet/rmnet_vnd.c
drivers/net/ethernet/stmicro/stmmac/common.h
drivers/net/ethernet/stmicro/stmmac/descs_com.h
drivers/net/ethernet/stmicro/stmmac/enh_desc.c
drivers/net/ethernet/stmicro/stmmac/ring_mode.c
drivers/net/fddi/defza.c
drivers/net/fddi/defza.h
drivers/net/phy/broadcom.c
drivers/net/phy/realtek.c
drivers/net/usb/smsc95xx.c
drivers/nvme/host/core.c
drivers/nvme/host/multipath.c
drivers/nvme/target/core.c
drivers/nvme/target/rdma.c
drivers/of/device.c
drivers/of/of_numa.c
drivers/s390/net/qeth_core.h
drivers/s390/net/qeth_core_main.c
drivers/s390/net/qeth_core_mpc.h
drivers/s390/net/qeth_l2_main.c
drivers/s390/net/qeth_l3_main.c
drivers/tty/serial/sh-sci.c
drivers/tty/tty_baudrate.c
drivers/tty/vt/vt.c
drivers/usb/typec/ucsi/Kconfig
drivers/usb/typec/ucsi/Makefile
drivers/usb/typec/ucsi/ucsi_ccg.c [new file with mode: 0644]
drivers/xen/grant-table.c
drivers/xen/privcmd-buf.c
fs/btrfs/ctree.h
fs/btrfs/disk-io.c
fs/btrfs/free-space-cache.c
fs/btrfs/inode.c
fs/btrfs/ioctl.c
fs/btrfs/super.c
fs/btrfs/tree-checker.c
fs/btrfs/tree-log.c
fs/ceph/file.c
fs/ceph/mds_client.c
fs/ceph/quota.c
fs/ext4/inode.c
fs/ext4/namei.c
fs/ext4/resize.c
fs/ext4/super.c
fs/ext4/xattr.c
fs/namespace.c
fs/xfs/libxfs/xfs_attr_leaf.c
fs/xfs/xfs_ioctl.c
fs/xfs/xfs_message.c
include/asm-generic/4level-fixup.h
include/asm-generic/5level-fixup.h
include/asm-generic/pgtable-nop4d-hack.h
include/asm-generic/pgtable-nop4d.h
include/asm-generic/pgtable-nopmd.h
include/asm-generic/pgtable-nopud.h
include/asm-generic/pgtable.h
include/dt-bindings/power/rk3066-power.h [new file with mode: 0644]
include/dt-bindings/power/rk3188-power.h [new file with mode: 0644]
include/linux/ceph/ceph_features.h
include/linux/compiler-gcc.h
include/linux/compiler.h
include/linux/compiler_attributes.h
include/linux/compiler_types.h
include/linux/hid.h
include/linux/i8253.h
include/linux/mm.h
include/linux/mtd/nand.h
include/linux/netdevice.h
include/linux/netfilter/ipset/ip_set.h
include/linux/netfilter/ipset/ip_set_comment.h
include/linux/nmi.h
include/net/addrconf.h
include/net/if_inet6.h
include/net/netfilter/nf_conntrack_l4proto.h
include/uapi/linux/kfd_ioctl.h
include/uapi/linux/netfilter/nf_tables.h
include/uapi/linux/netfilter_bridge.h
include/uapi/linux/sctp.h
include/xen/xen-ops.h
kernel/bpf/core.c
kernel/bpf/syscall.c
kernel/resource.c
kernel/sched/core.c
kernel/sched/fair.c
kernel/time/posix-cpu-timers.c
kernel/trace/trace_probe.c
kernel/user_namespace.c
lib/raid6/test/Makefile
net/core/dev.c
net/core/flow_dissector.c
net/core/netpoll.c
net/core/rtnetlink.c
net/core/skbuff.c
net/core/sock.c
net/ipv4/inet_fragment.c
net/ipv4/ip_fragment.c
net/ipv4/ip_sockglue.c
net/ipv6/af_inet6.c
net/ipv6/anycast.c
net/ipv6/ip6_fib.c
net/ipv6/netfilter/nf_conntrack_reasm.c
net/netfilter/ipset/ip_set_core.c
net/netfilter/ipset/ip_set_hash_netportnet.c
net/netfilter/ipset/ip_set_list_set.c
net/netfilter/nf_conntrack_core.c
net/netfilter/nf_conntrack_proto_dccp.c
net/netfilter/nf_conntrack_proto_generic.c
net/netfilter/nf_conntrack_proto_icmp.c
net/netfilter/nf_conntrack_proto_icmpv6.c
net/netfilter/nf_conntrack_proto_sctp.c
net/netfilter/nf_conntrack_proto_tcp.c
net/netfilter/nf_conntrack_proto_udp.c
net/netfilter/nfnetlink_cttimeout.c
net/netfilter/nft_compat.c
net/netfilter/nft_numgen.c
net/netfilter/nft_osf.c
net/netfilter/xt_IDLETIMER.c
net/openvswitch/conntrack.c
net/rxrpc/ar-internal.h
net/rxrpc/call_event.c
net/rxrpc/output.c
net/sched/act_mirred.c
net/sched/cls_flower.c
net/sched/sch_netem.c
net/sctp/outqueue.c
net/tipc/link.c
scripts/kconfig/merge_config.sh
scripts/package/builddeb
scripts/package/mkdebian
scripts/package/mkspec
scripts/setlocalversion
sound/pci/hda/thinkpad_helper.c
tools/arch/arm64/include/asm/barrier.h
tools/perf/Documentation/perf-list.txt
tools/perf/Makefile.perf
tools/perf/builtin-record.c
tools/perf/builtin-stat.c
tools/perf/builtin-top.c
tools/perf/builtin-trace.c
tools/perf/examples/bpf/augmented_raw_syscalls.c [new file with mode: 0644]
tools/perf/jvmti/jvmti_agent.c
tools/perf/scripts/python/exported-sql-viewer.py
tools/perf/tests/attr/test-record-group-sampling
tools/perf/util/evlist.c
tools/perf/util/evlist.h
tools/perf/util/evsel.c
tools/perf/util/intel-pt-decoder/intel-pt-decoder.c
tools/perf/util/intel-pt-decoder/intel-pt-log.c
tools/perf/util/intel-pt-decoder/intel-pt-log.h
tools/perf/util/intel-pt.c
tools/perf/util/pmu.c

index a76be45..28fecaf 100644 (file)
--- a/.mailmap
+++ b/.mailmap
@@ -159,6 +159,7 @@ Peter Oruba <peter@oruba.de>
 Peter Oruba <peter.oruba@amd.com>
 Pratyush Anand <pratyush.anand@gmail.com> <pratyush.anand@st.com>
 Praveen BP <praveenbp@ti.com>
+Punit Agrawal <punitagrawal@gmail.com> <punit.agrawal@arm.com>
 Qais Yousef <qsyousef@gmail.com> <qais.yousef@imgtec.com>
 Oleksij Rempel <linux@rempel-privat.de> <bug-track@fisher-privat.net>
 Oleksij Rempel <linux@rempel-privat.de> <external.Oleksij.Rempel@de.bosch.com>
index fb3d1e0..1e5d172 100644 (file)
@@ -37,8 +37,8 @@ Description:
                  0-|   /             \/             \/
                    +---0----1----2----3----4----5----6------------> time (s)
 
-               2. To make the LED go instantly from one brigntess value to another,
-               we should use use zero-time lengths (the brightness must be same as
+               2. To make the LED go instantly from one brightness value to another,
+               we should use zero-time lengths (the brightness must be same as
                the previous tuple's). So the format should be:
                "brightness_1 duration_1 brightness_1 0 brightness_2 duration_2
                brightness_2 0 ...". For example:
index 7b9a861..5ab59da 100644 (file)
@@ -17,4 +17,11 @@ Required sub-node properties:
 - compatible : should be "amlogic,meson-gxbb-scp-shmem" for SRAM based shared
                memory on Amlogic GXBB SoC.
 
+Sensor bindings for the sensors based on SCPI Message Protocol
+--------------------------------------------------------------
+SCPI provides an API to access the various sensors on the SoC.
+
+Required properties:
+- compatible : should be "amlogic,meson-gxbb-scpi-sensors".
+
 [0] Documentation/devicetree/bindings/arm/arm,scpi.txt
index 4498292..8dbc259 100644 (file)
@@ -91,8 +91,10 @@ Board compatible values (alphabetically, grouped by SoC):
 
   - "amlogic,p230" (Meson gxl s905d)
   - "amlogic,p231" (Meson gxl s905d)
+  - "phicomm,n1" (Meson gxl s905d)
 
   - "amlogic,p241" (Meson gxl s805x)
+  - "libretech,aml-s805x-ac" (Meson gxl s805x)
 
   - "amlogic,p281" (Meson gxl s905w)
   - "oranth,tx3-mini" (Meson gxl s905w)
index 0cc7123..7ce7382 100644 (file)
@@ -152,6 +152,40 @@ Rockchip platforms device tree bindings
       - compatible = "google,veyron-pinky-rev2", "google,veyron-pinky",
                     "google,veyron", "rockchip,rk3288";
 
+- Google Scarlet - with display from Kingdisplay
+    Required root node properties:
+      - compatible = "google,scarlet-rev15-sku7", "google,scarlet-rev15",
+                    "google,scarlet-rev14-sku7", "google,scarlet-rev14",
+                    "google,scarlet-rev13-sku7", "google,scarlet-rev13",
+                    "google,scarlet-rev12-sku7", "google,scarlet-rev12",
+                    "google,scarlet-rev11-sku7", "google,scarlet-rev11",
+                    "google,scarlet-rev10-sku7", "google,scarlet-rev10",
+                    "google,scarlet-rev9-sku7",  "google,scarlet-rev9",
+                    "google,scarlet-rev8-sku7",  "google,scarlet-rev8",
+                    "google,scarlet-rev7-sku7",  "google,scarlet-rev7",
+                    "google,scarlet-rev6-sku7",  "google,scarlet-rev6",
+                    "google,scarlet-rev5-sku7",  "google,scarlet-rev5",
+                    "google,scarlet-rev4-sku7",  "google,scarlet-rev4",
+                    "google,scarlet-rev3-sku7",  "google,scarlet-rev3",
+                    "google,scarlet", "google,gru", "rockchip,rk3399";
+
+- Google Scarlet - with display from Innolux
+    Required root node properties:
+      - compatible = "google,scarlet-rev15-sku6", "google,scarlet-rev15",
+                    "google,scarlet-rev14-sku6", "google,scarlet-rev14",
+                    "google,scarlet-rev13-sku6", "google,scarlet-rev13",
+                    "google,scarlet-rev12-sku6", "google,scarlet-rev12",
+                    "google,scarlet-rev11-sku6", "google,scarlet-rev11",
+                    "google,scarlet-rev10-sku6", "google,scarlet-rev10",
+                    "google,scarlet-rev9-sku6",  "google,scarlet-rev9",
+                    "google,scarlet-rev8-sku6",  "google,scarlet-rev8",
+                    "google,scarlet-rev7-sku6",  "google,scarlet-rev7",
+                    "google,scarlet-rev6-sku6",  "google,scarlet-rev6",
+                    "google,scarlet-rev5-sku6",  "google,scarlet-rev5",
+                    "google,scarlet-rev4-sku6",  "google,scarlet-rev4",
+                    "google,scarlet", "google,gru", "rockchip,rk3399";
+
+
 - Google Speedy (Asus C201 Chromebook):
     Required root node properties:
       - compatible = "google,veyron-speedy-rev9", "google,veyron-speedy-rev8",
index f5e0f82..58c4256 100644 (file)
@@ -27,7 +27,7 @@ SoCs:
     compatible = "renesas,r8a77470"
   - RZ/G2M (R8A774A1)
     compatible = "renesas,r8a774a1"
-  - RZ/G2E (RA8774C0)
+  - RZ/G2E (R8A774C0)
     compatible = "renesas,r8a774c0"
   - R-Car M1A (R8A77781)
     compatible = "renesas,r8a7778"
index 7e49839..4b90ba9 100644 (file)
@@ -1,8 +1,12 @@
 I2C for OMAP platforms
 
 Required properties :
-- compatible : Must be "ti,omap2420-i2c", "ti,omap2430-i2c", "ti,omap3-i2c"
-  or "ti,omap4-i2c"
+- compatible : Must be
+       "ti,omap2420-i2c" for OMAP2420 SoCs
+       "ti,omap2430-i2c" for OMAP2430 SoCs
+       "ti,omap3-i2c" for OMAP3 SoCs
+       "ti,omap4-i2c" for OMAP4+ SoCs
+       "ti,am654-i2c", "ti,omap4-i2c" for AM654 SoCs
 - ti,hwmods : Must be "i2c<n>", n being the instance number (1-based)
 - #address-cells = <1>;
 - #size-cells = <0>;
index b3c86f4..c81993f 100644 (file)
@@ -140,6 +140,10 @@ VADC_GND_REF and VADC_VDD_VADC.
 
 Example:
 
+#include <dt-bindings/iio/qcom,spmi-vadc.h>
+#include <linux/irq.h>
+/* ... */
+
        /* VADC node */
        pmic_vadc: vadc@3100 {
                compatible = "qcom,spmi-vadc";
@@ -151,7 +155,7 @@ Example:
                io-channel-ranges;
 
                /* Channel node */
-               usb_id_nopull {
+               adc-chan@VADC_LR_MUX10_USB_ID {
                        reg = <VADC_LR_MUX10_USB_ID>;
                        qcom,decimation = <512>;
                        qcom,ratiometric;
index 8dd7b3a..f331316 100644 (file)
@@ -2,7 +2,8 @@ Broadcom VCHIQ firmware services
 
 Required properties:
 
-- compatible:  Should be "brcm,bcm2835-vchiq"
+- compatible:  Should be "brcm,bcm2835-vchiq" on BCM2835, otherwise
+               "brcm,bcm2836-vchiq".
 - reg:         Physical base address and length of the doorbell register pair
 - interrupts:  The interrupt number
                  See bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt
index a092053..a9da22b 100644 (file)
@@ -4,12 +4,19 @@ Required properties:
 
 - compatible : should be "amlogic,meson6-timer"
 - reg : Specifies base physical address and size of the registers.
-- interrupts : The interrupt of the first timer
+- interrupts : The four interrupts, one for each timer event
+- clocks : phandles to the pclk (system clock) and XTAL clocks
+- clock-names : must contain "pclk" and "xtal"
 
 Example:
 
 timer@c1109940 {
        compatible = "amlogic,meson6-timer";
        reg = <0xc1109940 0x14>;
-       interrupts = <0 10 1>;
+       interrupts = <GIC_SPI 10 IRQ_TYPE_EDGE_RISING>,
+                    <GIC_SPI 11 IRQ_TYPE_EDGE_RISING>,
+                    <GIC_SPI 6 IRQ_TYPE_EDGE_RISING>,
+                    <GIC_SPI 29 IRQ_TYPE_EDGE_RISING>;
+       clocks = <&xtal>, <&clk81>;
+       clock-names = "xtal", "pclk";
 };
index 9a6e251..b8f02c6 100644 (file)
@@ -5,9 +5,13 @@ Required properties:
 - reg : Address and length of the register set of timer controller.
 - interrupts : Should be the interrupt number.
 
+Optional properties:
+- clocks : Should contain a single entry describing the clock input.
+
 Example:
        timer0: timer@d4014000 {
                compatible = "mrvl,mmp-timer";
                reg = <0xd4014000 0x100>;
                interrupts = <13>;
+               clocks = <&coreclk 2>;
        };
index 4b1a2a8..8c413d8 100644 (file)
@@ -296,6 +296,7 @@ panasonic   Panasonic Corporation
 parade Parade Technologies Inc.
 pericom        Pericom Technology Inc.
 pervasive      Pervasive Displays, Inc.
+phicomm PHICOMM Co., Ltd.
 phytec PHYTEC Messtechnik GmbH
 picochip       Picochip Ltd
 pine64 Pine64
diff --git a/Documentation/i2c/busses/i2c-nvidia-gpu b/Documentation/i2c/busses/i2c-nvidia-gpu
new file mode 100644 (file)
index 0000000..31884d2
--- /dev/null
@@ -0,0 +1,18 @@
+Kernel driver i2c-nvidia-gpu
+
+Datasheet: not publicly available.
+
+Authors:
+       Ajay Gupta <ajayg@nvidia.com>
+
+Description
+-----------
+
+i2c-nvidia-gpu is a driver for I2C controller included in NVIDIA Turing
+and later GPUs and it is used to communicate with Type-C controller on GPUs.
+
+If your 'lspci -v' listing shows something like the following,
+
+01:00.3 Serial bus controller [0c80]: NVIDIA Corporation Device 1ad9 (rev a1)
+
+then this driver should support the I2C controller of your GPU.
index 73aaaa3..804f942 100644 (file)
@@ -34,23 +34,24 @@ __________________|____________|__________________|_________|___________________
 ____________________________________________________________|___________________________________________________________
                   |            |                  |         |
  ffff800000000000 | -128    TB | ffff87ffffffffff |    8 TB | ... guard hole, also reserved for hypervisor
- ffff880000000000 | -120    TB | ffffc7ffffffffff |   64 TB | direct mapping of all physical memory (page_offset_base)
- ffffc80000000000 |  -56    TB | ffffc8ffffffffff |    1 TB | ... unused hole
+ ffff880000000000 | -120    TB | ffff887fffffffff |  0.5 TB | LDT remap for PTI
+ ffff888000000000 | -119.5  TB | ffffc87fffffffff |   64 TB | direct mapping of all physical memory (page_offset_base)
+ ffffc88000000000 |  -55.5  TB | ffffc8ffffffffff |  0.5 TB | ... unused hole
  ffffc90000000000 |  -55    TB | ffffe8ffffffffff |   32 TB | vmalloc/ioremap space (vmalloc_base)
  ffffe90000000000 |  -23    TB | ffffe9ffffffffff |    1 TB | ... unused hole
  ffffea0000000000 |  -22    TB | ffffeaffffffffff |    1 TB | virtual memory map (vmemmap_base)
  ffffeb0000000000 |  -21    TB | ffffebffffffffff |    1 TB | ... unused hole
  ffffec0000000000 |  -20    TB | fffffbffffffffff |   16 TB | KASAN shadow memory
- fffffc0000000000 |   -4    TB | fffffdffffffffff |    2 TB | ... unused hole
-                  |            |                  |         | vaddr_end for KASLR
- fffffe0000000000 |   -2    TB | fffffe7fffffffff |  0.5 TB | cpu_entry_area mapping
- fffffe8000000000 |   -1.5  TB | fffffeffffffffff |  0.5 TB | LDT remap for PTI
- ffffff0000000000 |   -1    TB | ffffff7fffffffff |  0.5 TB | %esp fixup stacks
 __________________|____________|__________________|_________|____________________________________________________________
                                                             |
-                                                            | Identical layout to the 47-bit one from here on:
+                                                            | Identical layout to the 56-bit one from here on:
 ____________________________________________________________|____________________________________________________________
                   |            |                  |         |
+ fffffc0000000000 |   -4    TB | fffffdffffffffff |    2 TB | ... unused hole
+                  |            |                  |         | vaddr_end for KASLR
+ fffffe0000000000 |   -2    TB | fffffe7fffffffff |  0.5 TB | cpu_entry_area mapping
+ fffffe8000000000 |   -1.5  TB | fffffeffffffffff |  0.5 TB | ... unused hole
+ ffffff0000000000 |   -1    TB | ffffff7fffffffff |  0.5 TB | %esp fixup stacks
  ffffff8000000000 | -512    GB | ffffffeeffffffff |  444 GB | ... unused hole
  ffffffef00000000 |  -68    GB | fffffffeffffffff |   64 GB | EFI region mapping space
  ffffffff00000000 |   -4    GB | ffffffff7fffffff |    2 GB | ... unused hole
@@ -83,7 +84,7 @@ Notes:
 __________________|____________|__________________|_________|___________________________________________________________
                   |            |                  |         |
  0000800000000000 |  +64    PB | ffff7fffffffffff | ~16K PB | ... huge, still almost 64 bits wide hole of non-canonical
-                  |            |                  |         |     virtual memory addresses up to the -128 TB
+                  |            |                  |         |     virtual memory addresses up to the -64 PB
                   |            |                  |         |     starting offset of kernel mappings.
 __________________|____________|__________________|_________|___________________________________________________________
                                                             |
@@ -91,23 +92,24 @@ __________________|____________|__________________|_________|___________________
 ____________________________________________________________|___________________________________________________________
                   |            |                  |         |
  ff00000000000000 |  -64    PB | ff0fffffffffffff |    4 PB | ... guard hole, also reserved for hypervisor
- ff10000000000000 |  -60    PB | ff8fffffffffffff |   32 PB | direct mapping of all physical memory (page_offset_base)
- ff90000000000000 |  -28    PB | ff9fffffffffffff |    4 PB | LDT remap for PTI
+ ff10000000000000 |  -60    PB | ff10ffffffffffff | 0.25 PB | LDT remap for PTI
+ ff11000000000000 |  -59.75 PB | ff90ffffffffffff |   32 PB | direct mapping of all physical memory (page_offset_base)
+ ff91000000000000 |  -27.75 PB | ff9fffffffffffff | 3.75 PB | ... unused hole
  ffa0000000000000 |  -24    PB | ffd1ffffffffffff | 12.5 PB | vmalloc/ioremap space (vmalloc_base)
  ffd2000000000000 |  -11.5  PB | ffd3ffffffffffff |  0.5 PB | ... unused hole
  ffd4000000000000 |  -11    PB | ffd5ffffffffffff |  0.5 PB | virtual memory map (vmemmap_base)
  ffd6000000000000 |  -10.5  PB | ffdeffffffffffff | 2.25 PB | ... unused hole
  ffdf000000000000 |   -8.25 PB | fffffdffffffffff |   ~8 PB | KASAN shadow memory
- fffffc0000000000 |   -4    TB | fffffdffffffffff |    2 TB | ... unused hole
-                  |            |                  |         | vaddr_end for KASLR
- fffffe0000000000 |   -2    TB | fffffe7fffffffff |  0.5 TB | cpu_entry_area mapping
- fffffe8000000000 |   -1.5  TB | fffffeffffffffff |  0.5 TB | ... unused hole
- ffffff0000000000 |   -1    TB | ffffff7fffffffff |  0.5 TB | %esp fixup stacks
 __________________|____________|__________________|_________|____________________________________________________________
                                                             |
                                                             | Identical layout to the 47-bit one from here on:
 ____________________________________________________________|____________________________________________________________
                   |            |                  |         |
+ fffffc0000000000 |   -4    TB | fffffdffffffffff |    2 TB | ... unused hole
+                  |            |                  |         | vaddr_end for KASLR
+ fffffe0000000000 |   -2    TB | fffffe7fffffffff |  0.5 TB | cpu_entry_area mapping
+ fffffe8000000000 |   -1.5  TB | fffffeffffffffff |  0.5 TB | ... unused hole
+ ffffff0000000000 |   -1    TB | ffffff7fffffffff |  0.5 TB | %esp fixup stacks
  ffffff8000000000 | -512    GB | ffffffeeffffffff |  444 GB | ... unused hole
  ffffffef00000000 |  -68    GB | fffffffeffffffff |   64 GB | EFI region mapping space
  ffffffff00000000 |   -4    GB | ffffffff7fffffff |    2 GB | ... unused hole
index 97b7adb..68aed07 100644 (file)
@@ -25,7 +25,7 @@ Offset        Proto   Name            Meaning
 0C8/004        ALL     ext_cmd_line_ptr  cmd_line_ptr high 32bits
 140/080        ALL     edid_info       Video mode setup (struct edid_info)
 1C0/020        ALL     efi_info        EFI 32 information (struct efi_info)
-1E0/004        ALL     alk_mem_k       Alternative mem check, in KB
+1E0/004        ALL     alt_mem_k       Alternative mem check, in KB
 1E4/004        ALL     scratch         Scratch field for the kernel setup code
 1E8/001        ALL     e820_entries    Number of entries in e820_table (below)
 1E9/001        ALL     eddbuf_entries  Number of entries in eddbuf (below)
index f485597..e3dfefb 100644 (file)
@@ -6607,9 +6607,9 @@ F:        arch/*/include/asm/suspend*.h
 
 HID CORE LAYER
 M:     Jiri Kosina <jikos@kernel.org>
-R:     Benjamin Tissoires <benjamin.tissoires@redhat.com>
+M:     Benjamin Tissoires <benjamin.tissoires@redhat.com>
 L:     linux-input@vger.kernel.org
-T:     git git://git.kernel.org/pub/scm/linux/kernel/git/jikos/hid.git
+T:     git git://git.kernel.org/pub/scm/linux/kernel/git/hid/hid.git
 S:     Maintained
 F:     drivers/hid/
 F:     include/linux/hid*
@@ -6861,6 +6861,13 @@ L:       linux-acpi@vger.kernel.org
 S:     Maintained
 F:     drivers/i2c/i2c-core-acpi.c
 
+I2C CONTROLLER DRIVER FOR NVIDIA GPU
+M:     Ajay Gupta <ajayg@nvidia.com>
+L:     linux-i2c@vger.kernel.org
+S:     Maintained
+F:     Documentation/i2c/busses/i2c-nvidia-gpu
+F:     drivers/i2c/busses/i2c-nvidia-gpu.c
+
 I2C MUXES
 M:     Peter Rosin <peda@axentia.se>
 L:     linux-i2c@vger.kernel.org
@@ -8367,7 +8374,7 @@ F:        drivers/media/dvb-frontends/lgdt3305.*
 LIBATA PATA ARASAN COMPACT FLASH CONTROLLER
 M:     Viresh Kumar <vireshk@kernel.org>
 L:     linux-ide@vger.kernel.org
-T:     git git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata.git
+T:     git git://git.kernel.org/pub/scm/linux/kernel/git/axboe/linux-block.git
 S:     Maintained
 F:     include/linux/pata_arasan_cf_data.h
 F:     drivers/ata/pata_arasan_cf.c
@@ -8384,7 +8391,7 @@ F:        drivers/ata/ata_generic.c
 LIBATA PATA FARADAY FTIDE010 AND GEMINI SATA BRIDGE DRIVERS
 M:     Linus Walleij <linus.walleij@linaro.org>
 L:     linux-ide@vger.kernel.org
-T:     git git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata.git
+T:     git git://git.kernel.org/pub/scm/linux/kernel/git/axboe/linux-block.git
 S:     Maintained
 F:     drivers/ata/pata_ftide010.c
 F:     drivers/ata/sata_gemini.c
@@ -8403,7 +8410,7 @@ F:        include/linux/ahci_platform.h
 LIBATA SATA PROMISE TX2/TX4 CONTROLLER DRIVER
 M:     Mikael Pettersson <mikpelinux@gmail.com>
 L:     linux-ide@vger.kernel.org
-T:     git git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata.git
+T:     git git://git.kernel.org/pub/scm/linux/kernel/git/axboe/linux-block.git
 S:     Maintained
 F:     drivers/ata/sata_promise.*
 
@@ -10784,6 +10791,14 @@ L:     linux-omap@vger.kernel.org
 S:     Maintained
 F:     arch/arm/mach-omap2/omap_hwmod.*
 
+OMAP I2C DRIVER
+M:     Vignesh R <vigneshr@ti.com>
+L:     linux-omap@vger.kernel.org
+L:     linux-i2c@vger.kernel.org
+S:     Maintained
+F:     Documentation/devicetree/bindings/i2c/i2c-omap.txt
+F:     drivers/i2c/busses/i2c-omap.c
+
 OMAP IMAGING SUBSYSTEM (OMAP3 ISP and OMAP4 ISS)
 M:     Laurent Pinchart <laurent.pinchart@ideasonboard.com>
 L:     linux-media@vger.kernel.org
@@ -12359,6 +12374,13 @@ L:     linux-arm-msm@vger.kernel.org
 S:     Maintained
 F:     drivers/iommu/qcom_iommu.c
 
+QUALCOMM TSENS THERMAL DRIVER
+M:     Amit Kucheria <amit.kucheria@linaro.org>
+L:     linux-pm@vger.kernel.org
+L:     linux-arm-msm@vger.kernel.org
+S:     Maintained
+F:     drivers/thermal/qcom/
+
 QUALCOMM VENUS VIDEO ACCELERATOR DRIVER
 M:     Stanimir Varbanov <stanimir.varbanov@linaro.org>
 L:     linux-media@vger.kernel.org
@@ -15436,9 +15458,9 @@ F:      include/linux/usb/gadget*
 
 USB HID/HIDBP DRIVERS (USB KEYBOARDS, MICE, REMOTE CONTROLS, ...)
 M:     Jiri Kosina <jikos@kernel.org>
-R:     Benjamin Tissoires <benjamin.tissoires@redhat.com>
+M:     Benjamin Tissoires <benjamin.tissoires@redhat.com>
 L:     linux-usb@vger.kernel.org
-T:     git git://git.kernel.org/pub/scm/linux/kernel/git/jikos/hid.git
+T:     git git://git.kernel.org/pub/scm/linux/kernel/git/hid/hid.git
 S:     Maintained
 F:     Documentation/hid/hiddev.txt
 F:     drivers/hid/usbhid/
index 9fce8b9..2f36db8 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -2,7 +2,7 @@
 VERSION = 4
 PATCHLEVEL = 20
 SUBLEVEL = 0
-EXTRAVERSION = -rc1
+EXTRAVERSION = -rc2
 NAME = "People's Front"
 
 # *DOCUMENTATION*
index 6a8c53d..b7c77bb 100644 (file)
 })
 
 #define user_termios_to_kernel_termios(k, u) \
-       copy_from_user(k, u, sizeof(struct termios))
+       copy_from_user(k, u, sizeof(struct termios2))
 
 #define kernel_termios_to_user_termios(u, k) \
+       copy_to_user(u, k, sizeof(struct termios2))
+
+#define user_termios_to_kernel_termios_1(k, u) \
+       copy_from_user(k, u, sizeof(struct termios))
+
+#define kernel_termios_to_user_termios_1(u, k) \
        copy_to_user(u, k, sizeof(struct termios))
 
 #endif /* _ALPHA_TERMIOS_H */
index 1e9121c..9713116 100644 (file)
 #define TCXONC         _IO('t', 30)
 #define TCFLSH         _IO('t', 31)
 
+#define TCGETS2                _IOR('T', 42, struct termios2)
+#define TCSETS2                _IOW('T', 43, struct termios2)
+#define TCSETSW2       _IOW('T', 44, struct termios2)
+#define TCSETSF2       _IOW('T', 45, struct termios2)
+
 #define TIOCSWINSZ     _IOW('t', 103, struct winsize)
 #define TIOCGWINSZ     _IOR('t', 104, struct winsize)
 #define        TIOCSTART       _IO('t', 110)           /* start output, like ^Q */
index de6c836..4575ba3 100644 (file)
@@ -26,6 +26,19 @@ struct termios {
        speed_t c_ospeed;               /* output speed */
 };
 
+/* Alpha has identical termios and termios2 */
+
+struct termios2 {
+       tcflag_t c_iflag;               /* input mode flags */
+       tcflag_t c_oflag;               /* output mode flags */
+       tcflag_t c_cflag;               /* control mode flags */
+       tcflag_t c_lflag;               /* local mode flags */
+       cc_t c_cc[NCCS];                /* control characters */
+       cc_t c_line;                    /* line discipline (== c_cc[19]) */
+       speed_t c_ispeed;               /* input speed */
+       speed_t c_ospeed;               /* output speed */
+};
+
 /* Alpha has matching termios and ktermios */
 
 struct ktermios {
@@ -152,6 +165,7 @@ struct ktermios {
 #define B3000000  00034
 #define B3500000  00035
 #define B4000000  00036
+#define BOTHER    00037
 
 #define CSIZE  00001400
 #define   CS5  00000000
@@ -169,6 +183,9 @@ struct ktermios {
 #define CMSPAR   010000000000          /* mark or space (stick) parity */
 #define CRTSCTS          020000000000          /* flow control */
 
+#define CIBAUD 07600000
+#define IBSHIFT        16
+
 /* c_lflag bits */
 #define ISIG   0x00000080
 #define ICANON 0x00000100
index 3fc3412..6e843f3 100644 (file)
@@ -89,6 +89,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \
        bcm4708-asus-rt-ac68u.dtb \
        bcm4708-buffalo-wzr-1750dhp.dtb \
        bcm4708-linksys-ea6300-v1.dtb \
+       bcm4708-linksys-ea6500-v2.dtb \
        bcm4708-luxul-xap-1510.dtb \
        bcm4708-luxul-xwc-1000.dtb \
        bcm4708-netgear-r6250.dtb \
@@ -790,7 +791,6 @@ dtb-$(CONFIG_ARCH_OXNAS) += \
        ox820-cloudengines-pogoplug-series-3.dtb
 dtb-$(CONFIG_ARCH_QCOM) += \
        qcom-apq8060-dragonboard.dtb \
-       qcom-apq8064-arrow-sd-600eval.dtb \
        qcom-apq8064-cm-qs600.dtb \
        qcom-apq8064-ifc6410.dtb \
        qcom-apq8064-sony-xperia-yuga.dtb \
index d4d33cd..07f5939 100644 (file)
                display0 = &lcd0;
        };
 
+       chosen {
+               stdout-path = &uart3;
+       };
+
        memory@80000000 {
                device_type = "memory";
                reg = <0x80000000 0x10000000>; /* 256 MB */
index 601bf4d..f4a20ca 100644 (file)
                debounce-delay-ms = <5>;
                col-scan-delay-us = <2>;
 
-               row-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH /* Bank3, pin21 */
+               pinctrl-names = "default", "sleep";
+               pinctrl-0 = <&matrix_keypad_default>;
+               pinctrl-1 = <&matrix_keypad_sleep>;
+
+               linux,wakeup;
+
+               row-gpios = <&gpio0 3 GPIO_ACTIVE_HIGH /* Bank0, pin3 */
                                &gpio4 3 GPIO_ACTIVE_HIGH /* Bank4, pin3 */
                                &gpio4 2 GPIO_ACTIVE_HIGH>; /* Bank4, pin2 */
 
        beeper: beeper {
                compatible = "gpio-beeper";
                pinctrl-names = "default";
-               pinctrl-0 = <&beeper_pins>;
+               pinctrl-0 = <&beeper_pins_default>;
+               pinctrl-1 = <&beeper_pins_sleep>;
                gpios = <&gpio4 12 GPIO_ACTIVE_HIGH>;
        };
 };
 
 &am43xx_pinmux {
        pinctrl-names = "default", "sleep";
-       pinctrl-0 = <&wlan_pins_default>;
+       pinctrl-0 = <&wlan_pins_default &ddr3_vtt_toggle_default &unused_pins &debugss_pins>;
        pinctrl-1 = <&wlan_pins_sleep>;
 
+       ddr3_vtt_toggle_default: ddr_vtt_toggle_default {
+               pinctrl-single,pins = <
+                       0x25C (DS0_PULL_UP_DOWN_EN | PIN_OUTPUT_PULLUP | DS0_FORCE_OFF_MODE | MUX_MODE7) /* spi0_cs0.gpio5_7 */
+               >;
+       };
+
        i2c0_pins: i2c0_pins {
                pinctrl-single,pins = <
                        AM4372_IOPAD(0x988, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)  /* i2c0_sda.i2c0_sda */
                >;
        };
 
+       beeper_pins_default: beeper_pins_default {
+               pinctrl-single,pins = <
+                       AM4372_IOPAD(0x9e0, PIN_OUTPUT_PULLUP | MUX_MODE7)      /* cam1_field.gpio4_12 */
+               >;
+       };
+
+       beeper_pins_sleep: beeper_pins_sleep {
+               pinctrl-single,pins = <
+                       AM4372_IOPAD(0x9e0, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* cam1_field.gpio4_12 */
+               >;
+       };
+
+       unused_pins: unused_pins {
+               pinctrl-single,pins = <
+                       AM4372_IOPAD(0x854, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                       AM4372_IOPAD(0x858, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                       AM4372_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                       AM4372_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                       AM4372_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                       AM4372_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                       AM4372_IOPAD(0x950, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                       AM4372_IOPAD(0x990, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                       AM4372_IOPAD(0x994, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                       AM4372_IOPAD(0x998, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                       AM4372_IOPAD(0x99c, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                       AM4372_IOPAD(0x9a0, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                       AM4372_IOPAD(0xa3c, PIN_INPUT | PULL_DISABLE | MUX_MODE7)
+                       AM4372_IOPAD(0xa40, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                       AM4372_IOPAD(0xa44, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                       AM4372_IOPAD(0xa48, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                       AM4372_IOPAD(0xa4c, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                       AM4372_IOPAD(0xa50, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                       AM4372_IOPAD(0xa54, PIN_INPUT | PULL_DISABLE | MUX_MODE7)
+                       AM4372_IOPAD(0xa58, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                       AM4372_IOPAD(0xa60, PIN_INPUT | PULL_DISABLE | MUX_MODE7)
+                       AM4372_IOPAD(0xa68, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                       AM4372_IOPAD(0xa70, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                       AM4372_IOPAD(0xa78, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                       AM4372_IOPAD(0xa7c, PIN_INPUT | PULL_DISABLE)
+                       AM4372_IOPAD(0xac8, PIN_INPUT_PULLDOWN)
+                       AM4372_IOPAD(0xad4, PIN_INPUT_PULLDOWN)
+                       AM4372_IOPAD(0xad8, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                       AM4372_IOPAD(0xadc, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                       AM4372_IOPAD(0xae0, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                       AM4372_IOPAD(0xae4, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                       AM4372_IOPAD(0xae8, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                       AM4372_IOPAD(0xaec, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                       AM4372_IOPAD(0xaf0, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                       AM4372_IOPAD(0xaf4, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                       AM4372_IOPAD(0xaf8, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                       AM4372_IOPAD(0xafc, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                       AM4372_IOPAD(0xb00, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                       AM4372_IOPAD(0xb04, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                       AM4372_IOPAD(0xb08, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                       AM4372_IOPAD(0xb0c, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                       AM4372_IOPAD(0xb10, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                       AM4372_IOPAD(0xb14, PIN_INPUT_PULLDOWN | MUX_MODE7)
+                       AM4372_IOPAD(0xb18, PIN_INPUT_PULLDOWN | MUX_MODE7)
+               >;
+       };
+
+       debugss_pins: pinmux_debugss_pins {
+               pinctrl-single,pins = <
+                       AM4372_IOPAD(0xa90, PIN_INPUT_PULLDOWN)
+                       AM4372_IOPAD(0xa94, PIN_INPUT_PULLDOWN)
+                       AM4372_IOPAD(0xa98, PIN_INPUT_PULLDOWN)
+                       AM4372_IOPAD(0xa9c, PIN_INPUT_PULLDOWN)
+                       AM4372_IOPAD(0xaa0, PIN_INPUT_PULLDOWN)
+                       AM4372_IOPAD(0xaa4, PIN_INPUT_PULLDOWN)
+                       AM4372_IOPAD(0xaa8, PIN_INPUT_PULLDOWN)
+               >;
+       };
+
        uart0_pins_default: uart0_pins_default {
                pinctrl-single,pins = <
-                       AM4372_IOPAD(0x968, PIN_INPUT | MUX_MODE0)              /* uart0_ctsn.uart0_ctsn */
-                       AM4372_IOPAD(0x96C, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* uart0_rtsn.uart0_rtsn */
-                       AM4372_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0)       /* uart0_rxd.uart0_rxd */
-                       AM4372_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* uart0_txd.uart0_txd */
+                       AM4372_IOPAD(0x968, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE0) /* uart0_ctsn.uart0_ctsn */
+                       AM4372_IOPAD(0x96C, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE0) /* uart0_rtsn.uart0_rtsn */
+                       AM4372_IOPAD(0x970, PIN_INPUT_PULLUP | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0) /* uart0_rxd.uart0_rxd */
+                       AM4372_IOPAD(0x974, PIN_INPUT | PULL_DISABLE | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0) /* uart0_txd.uart0_txd */
                >;
        };
 
-       beeper_pins: beeper_pins {
+       uart0_pins_sleep: uart0_pins_sleep {
                pinctrl-single,pins = <
-                       AM4372_IOPAD(0x9e0, PIN_OUTPUT_PULLUP | MUX_MODE7)      /* cam1_field.gpio4_12 */
+                       AM4372_IOPAD(0x968, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* uart0_ctsn.uart0_ctsn */
+                       AM4372_IOPAD(0x96C, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* uart0_rtsn.uart0_rtsn */
+                       AM4372_IOPAD(0x970, PIN_INPUT_PULLUP | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0) /* uart0_rxd.uart0_rxd */
+                       AM4372_IOPAD(0x974, PIN_INPUT_PULLDOWN | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0) /* uart0_txd.uart0_txd */
+               >;
+       };
+
+       matrix_keypad_default: matrix_keypad_default {
+               pinctrl-single,pins = <
+                       AM4372_IOPAD(0x9a4, PIN_OUTPUT | MUX_MODE7)
+                       AM4372_IOPAD(0x9a8, PIN_OUTPUT | MUX_MODE7)
+                       AM4372_IOPAD(0x9ac, PIN_INPUT | PULL_DISABLE | MUX_MODE9)
+                       AM4372_IOPAD(0x954, PIN_INPUT_PULLDOWN | MUX_MODE0)
                >;
        };
 
+       matrix_keypad_sleep: matrix_keypad_sleep {
+               pinctrl-single,pins = <
+                       AM4372_IOPAD(0x9a4, PULL_UP | MUX_MODE7)
+                       AM4372_IOPAD(0x9a8, PULL_UP | MUX_MODE7)
+                       AM4372_IOPAD(0x9ac, PIN_INPUT | PULL_DISABLE | MUX_MODE9)
+                       AM4372_IOPAD(0x954, PIN_INPUT_PULLDOWN | MUX_MODE0)
+               >;
+       };
 };
 
 &uart0 {
        status = "okay";
-       pinctrl-names = "default";
+       pinctrl-names = "default", "sleep";
        pinctrl-0 = <&uart0_pins_default>;
+       pinctrl-1 = <&uart0_pins_sleep>;
 };
 
 &i2c0 {
index a567669..916a977 100644 (file)
@@ -44,7 +44,7 @@
        };
 
        /* The voltage to the MMC card is hardwired at 3.3V */
-       vmmc: fixedregulator@0 {
+       vmmc: regulator-vmmc {
                compatible = "regulator-fixed";
                regulator-name = "vmmc";
                regulator-min-microvolt = <3300000>;
@@ -52,7 +52,7 @@
                regulator-boot-on;
         };
 
-       veth: fixedregulator@0 {
+       veth: regulator-veth {
                compatible = "regulator-fixed";
                regulator-name = "veth";
                regulator-min-microvolt = <3300000>;
                };
        };
 };
-
index df12276..c2ece0b 100644 (file)
@@ -13,7 +13,7 @@
                bootargs = "console=ttyS4,115200 earlyprintk";
        };
 
-       memory {
+       memory@80000000 {
                reg = <0x80000000 0x40000000>;
        };
 
index 7a291de..22dade6 100644 (file)
@@ -13,7 +13,7 @@
                bootargs = "earlyprintk";
        };
 
-       memory {
+       memory@80000000 {
                reg = <0x80000000 0x20000000>;
        };
 
index d598b63..024e52a 100644 (file)
@@ -14,7 +14,7 @@
                bootargs = "console=ttyS4,115200 earlyprintk";
        };
 
-       memory {
+       memory@80000000 {
                reg = <0x80000000 0x40000000>;
        };
 
 &adc {
        status = "okay";
 };
-
index 43ed139..33d7045 100644 (file)
@@ -17,7 +17,7 @@
                bootargs = "console=ttyS4,115200 earlyprintk";
        };
 
-       memory {
+       memory@80000000 {
                reg = <0x80000000 0x20000000>;
        };
 
index 2fd111d..0d2538b 100644 (file)
        model = "Broadcom Northstar Plus SoC";
        interrupt-parent = <&gic>;
 
+       aliases {
+               serial0 = &uart0;
+               serial1 = &uart1;
+               ethernet0 = &amac0;
+               ethernet1 = &amac1;
+               ethernet2 = &amac2;
+       };
+
        cpus {
                #address-cells = <1>;
                #size-cells = <0>;
index b7f79f1..644d907 100644 (file)
@@ -1,12 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright (C) 2017 Stefan Wahren <stefan.wahren@i2se.com>
- *
- * The code contained herein is licensed under the GNU General Public
- * License. You may obtain a copy of the GNU General Public License
- * Version 2 or later at the following locations:
- *
- * http://www.opensource.org/licenses/gpl-license.html
- * http://www.gnu.org/copyleft/gpl.html
  */
 
 /dts-v1/;
index 7036240..00323ba 100644 (file)
@@ -1,12 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright (C) 2016 Stefan Wahren <stefan.wahren@i2se.com>
- *
- * The code contained herein is licensed under the GNU General Public
- * License. You may obtain a copy of the GNU General Public License
- * Version 2 or later at the following locations:
- *
- * http://www.opensource.org/licenses/gpl-license.html
- * http://www.gnu.org/copyleft/gpl.html
  */
 
 /dts-v1/;
index cb2d6d7..29f970f 100644 (file)
@@ -30,9 +30,9 @@
                        #power-domain-cells = <1>;
                };
 
-               mailbox@7e00b840 {
+               vchiq: mailbox@7e00b840 {
                        compatible = "brcm,bcm2835-vchiq";
-                       reg = <0x7e00b840 0xf>;
+                       reg = <0x7e00b840 0x3c>;
                        interrupts = <0 2>;
                };
        };
index 2fef70a..ac4408b 100644 (file)
@@ -1,7 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0
 /dts-v1/;
 #include "bcm2836.dtsi"
-#include "bcm2835-rpi.dtsi"
+#include "bcm2836-rpi.dtsi"
 #include "bcm283x-rpi-smsc9514.dtsi"
 #include "bcm283x-rpi-usb-host.dtsi"
 
diff --git a/arch/arm/boot/dts/bcm2836-rpi.dtsi b/arch/arm/boot/dts/bcm2836-rpi.dtsi
new file mode 100644 (file)
index 0000000..c4c858b
--- /dev/null
@@ -0,0 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0
+#include "bcm2835-rpi.dtsi"
+
+&vchiq {
+       compatible = "brcm,bcm2836-vchiq", "brcm,bcm2835-vchiq";
+};
index 4adb85e..eca36e3 100644 (file)
@@ -1,7 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0
 /dts-v1/;
 #include "bcm2837.dtsi"
-#include "bcm2835-rpi.dtsi"
+#include "bcm2836-rpi.dtsi"
 #include "bcm283x-rpi-lan7515.dtsi"
 #include "bcm283x-rpi-usb-host.dtsi"
 
index c318bcb..a0ba0f6 100644 (file)
@@ -1,7 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0
 /dts-v1/;
 #include "bcm2837.dtsi"
-#include "bcm2835-rpi.dtsi"
+#include "bcm2836-rpi.dtsi"
 #include "bcm283x-rpi-smsc9514.dtsi"
 #include "bcm283x-rpi-usb-host.dtsi"
 
index 7b7ab6a..4a89a18 100644 (file)
@@ -1,7 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0
 /dts-v1/;
 #include "bcm2837.dtsi"
-#include "bcm2835-rpi.dtsi"
+#include "bcm2836-rpi.dtsi"
 
 / {
        memory {
diff --git a/arch/arm/boot/dts/bcm4708-linksys-ea6500-v2.dts b/arch/arm/boot/dts/bcm4708-linksys-ea6500-v2.dts
new file mode 100644 (file)
index 0000000..babcfec
--- /dev/null
@@ -0,0 +1,45 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Copyright (C) 2017 Rafał Miłecki <rafal@milecki.pl>
+ * Copyright (C) 2018 Rene Kjellerup <rk.katana.steel@gmail.com>
+ */
+
+/dts-v1/;
+
+#include "bcm4708.dtsi"
+#include "bcm5301x-nand-cs0-bch8.dtsi"
+
+/ {
+       compatible = "linksys,ea6500-v2", "brcm,bcm4708";
+       model = "Linksys EA6500 V2";
+
+       chosen {
+               bootargs = "console=ttyS0,115200";
+       };
+
+       memory {
+               reg = <0x00000000 0x08000000>;
+       };
+
+       gpio-keys {
+               compatible = "gpio-keys";
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               wps {
+                       label = "WPS";
+                       linux,code = <KEY_WPS_BUTTON>;
+                       gpios = <&chipcommon 7 GPIO_ACTIVE_LOW>;
+               };
+
+               restart {
+                       label = "Reset";
+                       linux,code = <KEY_RESTART>;
+                       gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>;
+               };
+       };
+};
+
+&usb3_phy {
+       status = "okay";
+};
index 9829d04..ed13af0 100644 (file)
@@ -1,20 +1,9 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
 /*
  * Broadcom BCM470X / BCM5301X ARM platform code.
  * DTS for BCM47081 SoC.
  *
  * Copyright © 2014 Rafał Miłecki <zajec5@gmail.com>
- *
- * Permission to use, copy, modify, and/or distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES WITH
- * REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY
- * AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT,
- * INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
- * LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE
- * OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
- * PERFORMANCE OF THIS SOFTWARE.
  */
 
 #include "bcm5301x.dtsi"
index c645fea..e1bb866 100644 (file)
@@ -1,7 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
 /*
  * Copyright (C) 2016 Rafał Miłecki <rafal@milecki.pl>
- *
- * Licensed under the ISC license.
  */
 
 #include "bcm4708.dtsi"
index f7c3e27..cdc5ff5 100644 (file)
@@ -1,7 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
 /*
  * Copyright (C) 2016 Rafał Miłecki <rafal@milecki.pl>
- *
- * Licensed under the ISC license.
  */
 
 #include "bcm4708.dtsi"
index 19e61b5..e15e2a1 100644 (file)
@@ -1,7 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
 /*
  * Copyright (C) 2016 Rafał Miłecki <rafal@milecki.pl>
- *
- * Licensed under the ISC license.
  */
 
 /dts-v1/;
index 7a5c188..fd7af94 100644 (file)
@@ -37,6 +37,8 @@
                        reg = <0x0400 0x100>;
                        interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&iprocslow>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinmux_uart1>;
                        status = "disabled";
                };
        };
                status = "disabled";
        };
 
+       dmu@1800c000 {
+               compatible = "simple-bus";
+               ranges = <0 0x1800c000 0x1000>;
+               #address-cells = <1>;
+               #size-cells = <1>;
+
+               cru@100 {
+                       compatible = "simple-bus";
+                       reg = <0x100 0x1a4>;
+                       ranges;
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       pin-controller@1c0 {
+                               compatible = "brcm,bcm4708-pinmux";
+                               reg = <0x1c0 0x24>;
+                               reg-names = "cru_gpio_control";
+
+                               spi-pins {
+                                       groups = "spi_grp";
+                                       function = "spi";
+                               };
+
+                               i2c {
+                                       groups = "i2c_grp";
+                                       function = "i2c";
+                               };
+
+                               pwm {
+                                       groups = "pwm0_grp", "pwm1_grp",
+                                                "pwm2_grp", "pwm3_grp";
+                                       function = "pwm";
+                               };
+
+                               pinmux_uart1: uart1 {
+                                       groups = "uart1_grp";
+                                       function = "uart1";
+                               };
+                       };
+               };
+       };
+
        lcpll0: lcpll0@1800c100 {
                #clock-cells = <1>;
                compatible = "brcm,nsp-lcpll0";
index 453a2a3..5054fa9 100644 (file)
@@ -1,7 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
 /*
  * Copyright (C) 2016 Rafał Miłecki <rafal@milecki.pl>
- *
- * Licensed under the ISC license.
  */
 
 #include <dt-bindings/gpio/gpio.h>
index 6df6151..f597640 100644 (file)
                        reg = <0x4800e0 0x10>;
                        #reset-cells = <2>;
                };
+
+               ahci: sata@8000 {
+                       compatible = "brcm,bcm63138-ahci", "brcm,sata3-ahci";
+                       reg-names = "ahci", "top-ctrl";
+                       reg = <0xa000 0x9ac>, <0x8040 0x24>;
+                       interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       resets = <&pmb0 3 1>;
+                       reset-names = "ahci";
+                       status = "disabled";
+
+                       sata0: sata-port@0 {
+                               reg = <0>;
+                               phys = <&sata_phy0>;
+                       };
+               };
+
+               sata_phy: sata-phy@8100 {
+                       compatible = "brcm,bcm63138-sata-phy", "brcm,phy-sata3";
+                       reg = <0x8100 0x1e00>;
+                       reg-names = "phy";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       status = "disabled";
+
+                       sata_phy0: sata-phy@0 {
+                               reg = <0>;
+                               #phy-cells = <0>;
+                       };
+               };
        };
 
        /* Legacy UBUS base */
index f9dd342..21479b4 100644 (file)
        model = "NorthStar Plus SVK (BCM958522ER)";
        compatible = "brcm,bcm58522", "brcm,nsp";
 
-       aliases {
-               serial0 = &uart0;
-       };
-
        chosen {
                stdout-path = "serial0:115200n8";
        };
index 374508a..cda3d79 100644 (file)
        model = "NorthStar Plus SVK (BCM958525ER)";
        compatible = "brcm,bcm58525", "brcm,nsp";
 
-       aliases {
-               serial0 = &uart0;
-       };
-
        chosen {
                stdout-path = "serial0:115200n8";
        };
index 403250c..f866498 100644 (file)
        model = "NorthStar Plus XMC (BCM958525xmc)";
        compatible = "brcm,bcm58525", "brcm,nsp";
 
-       aliases {
-               serial0 = &uart0;
-       };
-
        chosen {
                stdout-path = "serial0:115200n8";
        };
index ecd05e2..df60602 100644 (file)
        model = "NorthStar Plus SVK (BCM958622HR)";
        compatible = "brcm,bcm58622", "brcm,nsp";
 
-       aliases {
-               serial0 = &uart0;
-       };
-
        chosen {
                stdout-path = "serial0:115200n8";
        };
index f5e85b3..3893e7a 100644 (file)
        model = "NorthStar Plus SVK (BCM958623HR)";
        compatible = "brcm,bcm58623", "brcm,nsp";
 
-       aliases {
-               serial0 = &uart0;
-       };
-
        chosen {
                stdout-path = "serial0:115200n8";
        };
index a53a2f6..cf226b0 100644 (file)
        model = "NorthStar Plus SVK (BCM958625HR)";
        compatible = "brcm,bcm58625", "brcm,nsp";
 
-       aliases {
-               serial0 = &uart0;
-       };
-
        chosen {
                stdout-path = "serial0:115200n8";
        };
index 3ea5f73..10b3d51 100644 (file)
        model = "NorthStar Plus SVK (BCM958625K)";
        compatible = "brcm,bcm58625", "brcm,nsp";
 
-       aliases {
-               serial0 = &uart0;
-               serial1 = &uart1;
-       };
-
        chosen {
                stdout-path = "serial0:115200n8";
        };
index c616736..8dca97e 100644 (file)
                brcm,nand-oob-sectors-size = <16>;
        };
 };
+
+&ahci {
+       status = "okay";
+};
+
+&sata_phy {
+       status = "okay";
+};
index ea9a080..e39db14 100644 (file)
        model = "NorthStar Plus SVK (BCM988312HR)";
        compatible = "brcm,bcm88312", "brcm,nsp";
 
-       aliases {
-               serial0 = &uart0;
-       };
-
        chosen {
                stdout-path = "serial0:115200n8";
        };
index 373ea87..67d8601 100644 (file)
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0
 /*
- * Device Tree Source for the EMEV2 SoC
+ * Device Tree Source for the Emma Mobile EV2 SoC
  *
  * Copyright (C) 2012 Renesas Solutions Corp.
  */
index b560ff8..5ff9a17 100644 (file)
@@ -55,7 +55,7 @@
        };
 
        chosen {
-               stdout-path = "&uart1:115200n8";
+               stdout-path = "serial0:115200n8";
        };
 
        memory@70000000 {
index ed9a980..beefa1b 100644 (file)
                        i2c1: i2c@21a0000 {
                                #address-cells = <1>;
                                #size-cells = <0>;
-                               compatible = "fs,imx6sll-i2c", "fsl,imx21-i2c";
+                               compatible = "fsl,imx6sll-i2c", "fsl,imx21-i2c";
                                reg = <0x021a0000 0x4000>;
                                interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
                                clocks = <&clks IMX6SLL_CLK_I2C1>;
index 53b3408..7d7d679 100644 (file)
                regulator-name = "enet_3v3";
                regulator-min-microvolt = <3300000>;
                regulator-max-microvolt = <3300000>;
-               gpios = <&gpio2 6 GPIO_ACTIVE_LOW>;
+               gpio = <&gpio2 6 GPIO_ACTIVE_LOW>;
+               regulator-boot-on;
+               regulator-always-on;
        };
 
        reg_pcie_gpio: regulator-pcie-gpio {
        phy-supply = <&reg_enet_3v3>;
        phy-mode = "rgmii";
        phy-handle = <&ethphy1>;
+       phy-reset-gpios = <&gpio2 7 GPIO_ACTIVE_LOW>;
        status = "okay";
 
        mdio {
                                MX6SX_PAD_RGMII1_RD3__ENET1_RX_DATA_3   0x3081
                                MX6SX_PAD_RGMII1_RX_CTL__ENET1_RX_EN    0x3081
                                MX6SX_PAD_ENET2_RX_CLK__ENET2_REF_CLK_25M       0x91
+                               /* phy reset */
+                               MX6SX_PAD_ENET2_CRS__GPIO2_IO_7         0x10b0
                        >;
                };
 
index 0d9faf1..0839da0 100644 (file)
                                interrupts = <GIC_SPI 0 IRQ_TYPE_EDGE_RISING>;
                        };
 
-                       timer@9940 {
+                       timer_abcde: timer@9940 {
                                compatible = "amlogic,meson6-timer";
                                reg = <0x9940 0x18>;
-                               interrupts = <GIC_SPI 10 IRQ_TYPE_EDGE_RISING>;
+                               interrupts = <GIC_SPI 10 IRQ_TYPE_EDGE_RISING>,
+                                            <GIC_SPI 11 IRQ_TYPE_EDGE_RISING>,
+                                            <GIC_SPI 6 IRQ_TYPE_EDGE_RISING>,
+                                            <GIC_SPI 29 IRQ_TYPE_EDGE_RISING>;
                        };
                };
 
index 9444b0d..fc48cff 100644 (file)
                serial0 = &uart_AO;
        };
 
+       chosen {
+               stdout-path = "serial0:115200n8";
+       };
+
        memory {
                reg = <0x40000000 0x80000000>;
        };
index 9b46321..ca978ab 100644 (file)
        status = "disabled";
 };
 
+&timer_abcde {
+       clocks = <&xtal>, <&clk81>;
+       clock-names = "xtal", "pclk";
+};
+
 &uart_AO {
        clocks = <&xtal>, <&clk81>, <&clk81>;
        clock-names = "xtal", "pclk", "baud";
index 8bceb8d..55fb090 100644 (file)
                serial0 = &uart_AO;
        };
 
+       chosen {
+               stdout-path = "serial0:115200n8";
+       };
+
        memory {
                reg = <0x40000000 0x80000000>;
        };
index 7162e0c..3be5fbd 100644 (file)
                        mux {
                                groups = "uart_tx_ao_a", "uart_rx_ao_a";
                                function = "uart_ao";
+                               bias-disable;
                        };
                };
 
                        mux {
                                groups = "i2c_mst_sck_ao", "i2c_mst_sda_ao";
                                function = "i2c_mst_ao";
+                               bias-disable;
                        };
                };
 
                        mux {
                                groups = "remote_input";
                                function = "remote";
+                               bias-disable;
                        };
                };
 
                        mux {
                                groups = "pwm_f_ao";
                                function = "pwm_f_ao";
+                               bias-disable;
                        };
                };
        };
                                groups = "sd_d0_a", "sd_d1_a", "sd_d2_a",
                                        "sd_d3_a", "sd_clk_a", "sd_cmd_a";
                                function = "sd_a";
+                               bias-disable;
                        };
                };
 
                                groups = "sd_d0_b", "sd_d1_b", "sd_d2_b",
                                        "sd_d3_b", "sd_clk_b", "sd_cmd_b";
                                function = "sd_b";
+                               bias-disable;
                        };
                };
 
                                groups = "sd_d0_c", "sd_d1_c", "sd_d2_c",
                                        "sd_d3_c", "sd_clk_c", "sd_cmd_c";
                                function = "sd_c";
+                               bias-disable;
                        };
                };
 
                        mux {
                                groups = "nor_d", "nor_q", "nor_c", "nor_cs";
                                function = "nor";
+                               bias-disable;
                        };
                };
 
                                         "eth_rxd1", "eth_rxd0", "eth_mdio",
                                         "eth_mdc";
                                function = "ethernet";
+                               bias-disable;
                        };
                };
 
                        mux {
                                groups = "pwm_e";
                                function = "pwm_e";
+                               bias-disable;
                        };
                };
 
                                groups = "uart_tx_a1",
                                       "uart_rx_a1";
                                function = "uart_a";
+                               bias-disable;
                        };
                };
 
                                groups = "uart_cts_a1",
                                       "uart_rts_a1";
                                function = "uart_a";
+                               bias-disable;
                        };
                };
        };
        clocks = <&clkc CLKID_CLK81>;
 };
 
+&timer_abcde {
+       clocks = <&clkc CLKID_XTAL>, <&clkc CLKID_CLK81>;
+       clock-names = "xtal", "pclk";
+};
+
 &uart_AO {
        compatible = "amlogic,meson8-uart", "amlogic,meson-uart";
        clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_XTAL>, <&clkc CLKID_CLK81>;
index c7fdaea..5c9b76a 100644 (file)
                serial0 = &uart_AO;
        };
 
+       chosen {
+               stdout-path = "serial0:115200n8";
+       };
+
        memory {
                reg = <0x40000000 0x40000000>;
        };
index cd1ca9d..587a855 100644 (file)
                        mux {
                                groups = "uart_tx_ao_a", "uart_rx_ao_a";
                                function = "uart_ao";
+                               bias-disable;
                        };
                };
 
                        mux {
                                groups = "remote_input";
                                function = "remote";
+                               bias-disable;
                        };
                };
        };
                                         "eth_txd2",
                                         "eth_txd3";
                                function = "ethernet";
+                               bias-disable;
                        };
                };
 
                                         "eth_mdio_en",
                                         "eth_mdc";
                                function = "ethernet";
+                               bias-disable;
                        };
                };
 
                        mux {
                                groups = "i2c_sda_a", "i2c_sck_a";
                                function = "i2c_a";
+                               bias-disable;
                        };
                };
 
                                groups = "sd_d0_b", "sd_d1_b", "sd_d2_b",
                                        "sd_d3_b", "sd_clk_b", "sd_cmd_b";
                                function = "sd_b";
+                               bias-disable;
                        };
                };
 
                        mux {
                                groups = "pwm_c1";
                                function = "pwm_c";
+                               bias-disable;
                        };
                };
 
                                groups = "uart_tx_b0",
                                       "uart_rx_b0";
                                function = "uart_b";
+                               bias-disable;
                        };
                };
 
                                groups = "uart_cts_b0",
                                       "uart_rts_b0";
                                function = "uart_b";
+                               bias-disable;
                        };
                };
        };
        clock-names = "core", "clkin";
 };
 
+&timer_abcde {
+       clocks = <&clkc CLKID_XTAL>, <&clkc CLKID_CLK81>;
+       clock-names = "xtal", "pclk";
+};
+
 &uart_AO {
        compatible = "amlogic,meson8b-uart", "amlogic,meson-uart";
        clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_XTAL>, <&clkc CLKID_CLK81>;
index 3e1f922..d1a28c2 100644 (file)
@@ -45,6 +45,7 @@
                                 "eth_rxd1", "eth_rxd0",
                                 "eth_mdio", "eth_mdc";
                        function = "ethernet";
+                       bias-disable;
                };
        };
 };
index 766bbb8..ee03e08 100644 (file)
                                reg-names = "mux status", "mux mask";
                                mrvl,intc-nr-irqs = <2>;
                        };
+
+                       usb_otg_phy0: usb-otg-phy@d4207000 {
+                               compatible = "marvell,mmp2-usb-phy";
+                               reg = <0xd4207000 0x40>;
+                               #phy-cells = <0>;
+                               status = "disabled";
+                       };
+
+                       usb_otg0: usb-otg@d4208000 {
+                               compatible = "marvell,pxau2o-ehci";
+                               reg = <0xd4208000 0x200>;
+                               interrupts = <44>;
+                               clocks = <&soc_clocks MMP2_CLK_USB>;
+                               clock-names = "USBCLK";
+                               phys = <&usb_otg_phy0>;
+                               phy-names = "usb";
+                               status = "disabled";
+                       };
+
+                       mmc1: mmc@d4280000 {
+                               compatible = "mrvl,pxav3-mmc";
+                               reg = <0xd4280000 0x120>;
+                               clocks = <&soc_clocks MMP2_CLK_SDH0>;
+                               clock-names = "io";
+                               interrupts = <39>;
+                               status = "disabled";
+                       };
+
+                       mmc2: mmc@d4280800 {
+                               compatible = "mrvl,pxav3-mmc";
+                               reg = <0xd4280800 0x120>;
+                               clocks = <&soc_clocks MMP2_CLK_SDH1>;
+                               clock-names = "io";
+                               interrupts = <52>;
+                               status = "disabled";
+                       };
+
+                       mmc3: mmc@d4281000 {
+                               compatible = "mrvl,pxav3-mmc";
+                               reg = <0xd4281000 0x120>;
+                               clocks = <&soc_clocks MMP2_CLK_SDH2>;
+                               clock-names = "io";
+                               interrupts = <53>;
+                               status = "disabled";
+                       };
+
+                       mmc4: mmc@d4281800 {
+                               compatible = "mrvl,pxav3-mmc";
+                               reg = <0xd4281800 0x120>;
+                               clocks = <&soc_clocks MMP2_CLK_SDH3>;
+                               clock-names = "io";
+                               interrupts = <54>;
+                               status = "disabled";
+                       };
                };
 
                apb@d4000000 {  /* APB */
                                compatible = "mrvl,mmp-timer";
                                reg = <0xd4014000 0x100>;
                                interrupts = <13>;
+                               clocks = <&soc_clocks MMP2_CLK_TIMER>;
                        };
 
                        uart1: uart@d4030000 {
                                status = "disabled";
                        };
 
-                       gpio@d4019000 {
+                       gpio: gpio@d4019000 {
                                compatible = "marvell,mmp2-gpio";
                                #address-cells = <1>;
                                #size-cells = <1>;
                                clocks = <&soc_clocks MMP2_CLK_GPIO>;
                                resets = <&soc_clocks MMP2_CLK_GPIO>;
                                interrupt-controller;
-                               #interrupt-cells = <1>;
+                               #interrupt-cells = <2>;
                                ranges;
 
                                gcb0: gpio@d4019000 {
                                status = "disabled";
                        };
 
-                       twsi2: i2c@d4025000 {
+                       twsi2: i2c@d4031000 {
                                compatible = "mrvl,mmp-twsi";
-                               reg = <0xd4025000 0x1000>;
-                               interrupts = <58>;
+                               reg = <0xd4031000 0x1000>;
+                               interrupt-parent = <&intcmux17>;
+                               interrupts = <0>;
                                clocks = <&soc_clocks MMP2_CLK_TWSI1>;
                                resets = <&soc_clocks MMP2_CLK_TWSI1>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               status = "disabled";
+                       };
+
+                       twsi3: i2c@d4032000 {
+                               compatible = "mrvl,mmp-twsi";
+                               reg = <0xd4032000 0x1000>;
+                               interrupt-parent = <&intcmux17>;
+                               interrupts = <1>;
+                               clocks = <&soc_clocks MMP2_CLK_TWSI2>;
+                               resets = <&soc_clocks MMP2_CLK_TWSI2>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               status = "disabled";
+                       };
+
+                       twsi4: i2c@d4033000 {
+                               compatible = "mrvl,mmp-twsi";
+                               reg = <0xd4033000 0x1000>;
+                               interrupt-parent = <&intcmux17>;
+                               interrupts = <2>;
+                               clocks = <&soc_clocks MMP2_CLK_TWSI3>;
+                               resets = <&soc_clocks MMP2_CLK_TWSI3>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               status = "disabled";
+                       };
+
+
+                       twsi5: i2c@d4033800 {
+                               compatible = "mrvl,mmp-twsi";
+                               reg = <0xd4033800 0x1000>;
+                               interrupt-parent = <&intcmux17>;
+                               interrupts = <3>;
+                               clocks = <&soc_clocks MMP2_CLK_TWSI4>;
+                               resets = <&soc_clocks MMP2_CLK_TWSI4>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               status = "disabled";
+                       };
+
+                       twsi6: i2c@d4034000 {
+                               compatible = "mrvl,mmp-twsi";
+                               reg = <0xd4034000 0x1000>;
+                               interrupt-parent = <&intcmux17>;
+                               interrupts = <4>;
+                               clocks = <&soc_clocks MMP2_CLK_TWSI5>;
+                               resets = <&soc_clocks MMP2_CLK_TWSI5>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
                                status = "disabled";
                        };
 
                                resets = <&soc_clocks MMP2_CLK_RTC>;
                                status = "disabled";
                        };
+
+                       ssp1: ssp@d4035000 {
+                               compatible = "marvell,mmp2-ssp";
+                               reg = <0xd4035000 0x1000>;
+                               clocks = <&soc_clocks MMP2_CLK_SSP0>;
+                               interrupts = <0>;
+                               status = "disabled";
+                       };
+
+                       ssp2: ssp@d4036000 {
+                               compatible = "marvell,mmp2-ssp";
+                               reg = <0xd4036000 0x1000>;
+                               clocks = <&soc_clocks MMP2_CLK_SSP1>;
+                               interrupts = <1>;
+                               status = "disabled";
+                       };
+
+                       ssp3: ssp@d4037000 {
+                               compatible = "marvell,mmp2-ssp";
+                               reg = <0xd4037000 0x1000>;
+                               clocks = <&soc_clocks MMP2_CLK_SSP2>;
+                               interrupts = <20>;
+                               status = "disabled";
+                       };
+
+                       ssp4: ssp@d4039000 {
+                               compatible = "marvell,mmp2-ssp";
+                               reg = <0xd4039000 0x1000>;
+                               clocks = <&soc_clocks MMP2_CLK_SSP3>;
+                               interrupts = <21>;
+                               status = "disabled";
+                       };
                };
 
                soc_clocks: clocks{
index d5fe553..e53d326 100644 (file)
                        OMAP3_CORE1_IOPAD(0x2190, PIN_OUTPUT | MUX_MODE0)       /* mcbsp1_dx.mcbsp1_dx */
                        OMAP3_CORE1_IOPAD(0x2192, PIN_INPUT | MUX_MODE0)        /* mcbsp1_dx.mcbsp1_dr */
                        /* mcbsp_clks is used as PENIRQ */
-                       /* OMAP3_CORE1_IOPAD(0x2194, PIN_INPUT | MUX_MODE0)     /* mcbsp_clks.mcbsp_clks */
+                       /* OMAP3_CORE1_IOPAD(0x2194, PIN_INPUT | MUX_MODE0)        mcbsp_clks.mcbsp_clks */
                        OMAP3_CORE1_IOPAD(0x2196, PIN_INPUT | MUX_MODE0)        /* mcbsp_clks.mcbsp1_fsx */
                        OMAP3_CORE1_IOPAD(0x2198, PIN_INPUT | MUX_MODE0)        /* mcbsp1_clkx.mcbsp1_clkx */
                >;
diff --git a/arch/arm/boot/dts/qcom-apq8064-arrow-sd-600eval-pins.dtsi b/arch/arm/boot/dts/qcom-apq8064-arrow-sd-600eval-pins.dtsi
deleted file mode 100644 (file)
index 8df7315..0000000
+++ /dev/null
@@ -1,53 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-&tlmm_pinmux {
-       card_detect: card-detect {
-               mux {
-                       pins = "gpio26";
-                       function = "gpio";
-                       bias-disable;
-               };
-       };
-
-       pcie_pins: pcie-pinmux {
-               mux {
-                       pins = "gpio27";
-                       function = "gpio";
-               };
-               conf {
-                       pins = "gpio27";
-                       drive-strength = <12>;
-                       bias-disable;
-               };
-       };
-
-       user_leds: user-leds {
-               mux {
-                       pins = "gpio3", "gpio7", "gpio10", "gpio11";
-                       function = "gpio";
-               };
-
-               conf {
-                       pins = "gpio3", "gpio7", "gpio10", "gpio11";
-                       function = "gpio";
-                       output-low;
-               };
-       };
-
-       magneto_pins: magneto-pins {
-               mux {
-                       pins = "gpio31", "gpio48";
-                       function = "gpio";
-                       bias-disable;
-               };
-       };
-};
-
-&pm8921_mpps {
-       mpp_leds: mpp-leds {
-               pinconf {
-                       pins = "mpp7", "mpp8";
-                       function = "digital";
-                       output-low;
-               };
-       };
-};
diff --git a/arch/arm/boot/dts/qcom-apq8064-arrow-sd-600eval.dts b/arch/arm/boot/dts/qcom-apq8064-arrow-sd-600eval.dts
deleted file mode 100644 (file)
index 76b56ea..0000000
+++ /dev/null
@@ -1,415 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-#include "qcom-apq8064-v2.0.dtsi"
-#include "qcom-apq8064-arrow-sd-600eval-pins.dtsi"
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/mfd/qcom-rpm.h>
-
-/ {
-       model = "Arrow Electronics, APQ8064 SD_600eval";
-       compatible = "arrow,sd_600eval", "qcom,apq8064";
-
-       aliases {
-               serial0 = &gsbi7_serial;
-               serial1 = &gsbi1_serial;
-               i2c0 = &gsbi2_i2c;
-               i2c1 = &gsbi3_i2c;
-               i2c2 = &gsbi4_i2c;
-               i2c3 = &gsbi7_i2c;
-               spi0 = &gsbi5_spi;
-       };
-
-       regulators {
-               compatible = "simple-bus";
-               vph: regulator-fixed@1 {
-                       compatible = "regulator-fixed";
-                       regulator-min-microvolt = <4500000>;
-                       regulator-max-microvolt = <4500000>;
-                       regulator-name = "VPH";
-                       regulator-type = "voltage";
-                       regulator-boot-on;
-               };
-
-               /* on board fixed 3.3v supply */
-               vcc3v3: vcc3v3 {
-                       compatible = "regulator-fixed";
-                       regulator-name = "VCC3V3";
-                       regulator-min-microvolt = <3300000>;
-                       regulator-max-microvolt = <3300000>;
-                       regulator-always-on;
-               };
-
-       };
-
-       hdmi-out {
-               compatible = "hdmi-connector";
-               type = "a";
-
-               port {
-                       hdmi_con: endpoint {
-                               remote-endpoint = <&hdmi_out>;
-                       };
-               };
-       };
-
-       soc {
-               rpm@108000 {
-                       regulators {
-                               vdd_s1-supply = <&vph>;
-                               vdd_s2-supply = <&vph>;
-                               vdd_s3-supply = <&vph>;
-                               vdd_s4-supply = <&vph>;
-                               vdd_s5-supply = <&vph>;
-                               vdd_s6-supply = <&vph>;
-                               vdd_s7-supply = <&vph>;
-                               vdd_l1_l2_l12_l18-supply = <&pm8921_s4>;
-                               vdd_l3_l15_l17-supply = <&vph>;
-                               vdd_l4_l14-supply = <&vph>;
-                               vdd_l5_l8_l16-supply = <&vph>;
-                               vdd_l6_l7-supply = <&vph>;
-                               vdd_l9_l11-supply = <&vph>;
-                               vdd_l10_l22-supply = <&vph>;
-                               vdd_l21_l23_l29-supply = <&vph>;
-                               vdd_l24-supply = <&pm8921_s1>;
-                               vdd_l25-supply = <&pm8921_s1>;
-                               vdd_l26-supply = <&pm8921_s7>;
-                               vdd_l27-supply = <&pm8921_s7>;
-                               vdd_l28-supply = <&pm8921_s7>;
-                               vin_lvs1_3_6-supply = <&pm8921_s4>;
-                               vin_lvs2-supply = <&pm8921_s1>;
-                               vin_lvs4_5_7-supply = <&pm8921_s4>;
-
-                               s1 {
-                                       regulator-always-on;
-                                       regulator-min-microvolt = <1225000>;
-                                       regulator-max-microvolt = <1225000>;
-                                       qcom,switch-mode-frequency = <3200000>;
-                                       bias-pull-down;
-                               };
-
-                               s2 {
-                                       regulator-min-microvolt = <1300000>;
-                                       regulator-max-microvolt = <1300000>;
-                                       qcom,switch-mode-frequency = <1600000>;
-                                       bias-pull-down;
-                                       regulator-always-on;
-                               };
-
-                               s3 {
-                                       regulator-min-microvolt = <1000000>;
-                                       regulator-max-microvolt = <1400000>;
-                                       qcom,switch-mode-frequency = <4800000>;
-                               };
-
-                               s4 {
-                                       regulator-min-microvolt = <1800000>;
-                                       regulator-max-microvolt = <1800000>;
-                                       qcom,switch-mode-frequency = <1600000>;
-                                       qcom,force-mode = <QCOM_RPM_FORCE_MODE_AUTO>;
-                                       bias-pull-down;
-                                       regulator-always-on;
-                               };
-
-                               s7 {
-                                       regulator-min-microvolt = <1300000>;
-                                       regulator-max-microvolt = <1300000>;
-                                       qcom,switch-mode-frequency = <3200000>;
-                                };
-
-                               l3 {
-                                       regulator-min-microvolt = <3050000>;
-                                       regulator-max-microvolt = <3300000>;
-                                       bias-pull-down;
-                               };
-
-                               l4 {
-                                       regulator-min-microvolt = <1000000>;
-                                       regulator-max-microvolt = <1800000>;
-                                       bias-pull-down;
-                               };
-
-                               l5 {
-                                       regulator-min-microvolt = <2750000>;
-                                       regulator-max-microvolt = <3000000>;
-                                       bias-pull-down;
-                                       regulator-boot-on;
-                                       regulator-always-on;
-                               };
-
-                               l6 {
-                                       regulator-min-microvolt = <2950000>;
-                                       regulator-max-microvolt = <2950000>;
-                                       bias-pull-down;
-                               };
-
-                               /**
-                                * 1.8v required on LS expansion
-                                * for mezzanine boards
-                                */
-                               l15 {
-                                       regulator-min-microvolt = <1800000>;
-                                       regulator-max-microvolt = <1800000>;
-                                       regulator-always-on;
-                               };
-
-                               l23 {
-                                       regulator-min-microvolt = <1700000>;
-                                       regulator-max-microvolt = <1900000>;
-                                       bias-pull-down;
-                               };
-
-                               lvs6 {
-                                       bias-pull-down;
-                               };
-
-                               lvs7 {
-                                       bias-pull-down;
-                               };
-                       };
-               };
-
-               gsbi@12440000 {
-                       status = "okay";
-                       qcom,mode = <GSBI_PROT_UART_W_FC>;
-                       serial@12450000 {
-                               label = "LS-UART1";
-                               status = "okay";
-                               pinctrl-names = "default";
-                               pinctrl-0 = <&gsbi1_uart_4pins>;
-                       };
-               };
-
-               gsbi@12480000 {
-                       status = "okay";
-                       qcom,mode = <GSBI_PROT_I2C>;
-                       i2c@124a0000 {
-                               /* On Low speed expansion and Sensors */
-                               label = "LS-I2C0";
-                               status = "okay";
-                               lis3mdl_mag@1e {
-                                       compatible = "st,lis3mdl-magn";
-                                       reg = <0x1e>;
-                                       vdd-supply = <&vcc3v3>;
-                                       vddio-supply = <&pm8921_s4>;
-                                       pinctrl-names = "default";
-                                       pinctrl-0 = <&magneto_pins>;
-                                       interrupt-parent = <&tlmm_pinmux>;
-
-                                       st,drdy-int-pin = <2>;
-                                       interrupts = <48 IRQ_TYPE_EDGE_RISING>, /* DRDY line */
-                                                    <31 IRQ_TYPE_EDGE_RISING>; /* INT */
-                               };
-                       };
-               };
-
-               gsbi@16200000 {
-                       status = "okay";
-                       qcom,mode = <GSBI_PROT_I2C>;
-                       i2c@16280000 {
-                       /* On Low speed expansion */
-                               status = "okay";
-                               label = "LS-I2C1";
-                               clock-frequency = <200000>;
-                               eeprom@52 {
-                                       compatible = "atmel,24c128";
-                                       reg = <0x52>;
-                                       pagesize = <64>;
-                               };
-                       };
-               };
-
-               gsbi@16300000 {
-                       status = "okay";
-                       qcom,mode = <GSBI_PROT_I2C>;
-                       i2c@16380000 {
-                               /* On High speed expansion */
-                               label = "HS-CAM-I2C3";
-                               status = "okay";
-                       };
-               };
-
-               gsbi@1a200000 {
-                       status = "okay";
-                       spi@1a280000 {
-                               /* On Low speed expansion */
-                               label = "LS-SPI0";
-                               status = "okay";
-                       };
-               };
-
-               /* DEBUG UART  */
-               gsbi@16600000 {
-                       status = "okay";
-                       qcom,mode = <GSBI_PROT_I2C_UART>;
-                       serial@16640000 {
-                               label = "LS-UART0";
-                               status = "okay";
-                               pinctrl-names = "default";
-                               pinctrl-0 = <&gsbi7_uart_2pins>;
-                       };
-
-                       i2c@16680000 {
-                               /* On High speed expansion */
-                               status = "okay";
-                               label = "HS-CAM-I2C2";
-                       };
-               };
-
-               leds {
-                       pinctrl-names = "default";
-                       pinctrl-0 = <&user_leds>, <&mpp_leds>;
-
-                       compatible = "gpio-leds";
-
-                       user-led0 {
-                               label = "user0-led";
-                               gpios = <&tlmm_pinmux 3 GPIO_ACTIVE_HIGH>;
-                               linux,default-trigger = "heartbeat";
-                               default-state = "off";
-                       };
-
-                       user-led1 {
-                               label = "user1-led";
-                               gpios = <&tlmm_pinmux 7 GPIO_ACTIVE_HIGH>;
-                               linux,default-trigger = "mmc0";
-                               default-state = "off";
-                       };
-
-                       user-led2 {
-                               label = "user2-led";
-                               gpios = <&tlmm_pinmux 10 GPIO_ACTIVE_HIGH>;
-                               linux,default-trigger = "mmc1";
-                               default-state = "off";
-                       };
-
-                       user-led3 {
-                               label = "user3-led";
-                               gpios = <&tlmm_pinmux 11 GPIO_ACTIVE_HIGH>;
-                               linux,default-trigger = "none";
-                               default-state = "off";
-                       };
-
-                       wifi-led {
-                               label = "WiFi-led";
-                               gpios = <&pm8921_mpps 7 GPIO_ACTIVE_HIGH>;
-                               default-state = "off";
-                       };
-
-                       bt-led {
-                               label = "BT-led";
-                               gpios = <&pm8921_mpps 8 GPIO_ACTIVE_HIGH>;
-                               default-state = "off";
-                       };
-               };
-
-               pci@1b500000 {
-                       status = "okay";
-                       vdda-supply = <&pm8921_s3>;
-                       vdda_phy-supply = <&pm8921_lvs6>;
-                       vdda_refclk-supply = <&vcc3v3>;
-                       pinctrl-0 = <&pcie_pins>;
-                       pinctrl-names = "default";
-                       perst-gpio = <&tlmm_pinmux 27 GPIO_ACTIVE_LOW>;
-               };
-
-               phy@1b400000 {
-                       status = "okay";
-               };
-
-               sata@29000000 {
-                       status  = "okay";
-                       target-supply   = <&pm8921_lvs7>;
-               };
-
-               /* OTG */
-               usb@12500000 {
-                       status = "okay";
-                       dr_mode = "peripheral";
-                       ulpi {
-                               phy {
-                                       v3p3-supply = <&pm8921_l3>;
-                                       v1p8-supply = <&pm8921_l4>;
-                               };
-                       };
-               };
-
-               usb@12520000 {
-                       status = "okay";
-                       dr_mode = "otg";
-                       ulpi {
-                               phy {
-                                       v3p3-supply = <&pm8921_l3>;
-                                       v1p8-supply = <&pm8921_l23>;
-                               };
-                       };
-               };
-
-               usb@12530000 {
-                       status = "okay";
-                       dr_mode = "otg";
-                       ulpi {
-                               phy {
-                                       v3p3-supply = <&pm8921_l3>;
-                                       v1p8-supply = <&pm8921_l23>;
-                               };
-                       };
-               };
-
-               amba {
-                       /* eMMC */
-                       sdcc@12400000 {
-                               status = "okay";
-                               vmmc-supply = <&pm8921_l5>;
-                               vqmmc-supply = <&pm8921_s4>;
-                       };
-
-                       /* External micro SD card */
-                       sdcc@12180000 {
-                               status = "okay";
-                               vmmc-supply = <&pm8921_l6>;
-                               pinctrl-names   = "default";
-                               pinctrl-0       = <&card_detect>;
-                               cd-gpios        = <&tlmm_pinmux 26 GPIO_ACTIVE_HIGH>;
-                       };
-               };
-
-               riva-pil@3204000 {
-                       status = "okay";
-
-                       pinctrl-names = "default";
-                       pinctrl-0 = <&riva_wlan_pin_a>, <&riva_bt_pin_a>, <&riva_fm_pin_a>;
-               };
-
-               hdmi-tx@4a00000 {
-                       status = "okay";
-                       core-vdda-supply = <&pm8921_hdmi_switch>;
-                       hdmi-mux-supply = <&vcc3v3>;
-
-                       hpd-gpio = <&tlmm_pinmux 72 GPIO_ACTIVE_HIGH>;
-
-                       ports {
-                               port@1 {
-                                       endpoint {
-                                               remote-endpoint = <&hdmi_con>;
-                                       };
-                               };
-                       };
-               };
-
-               hdmi-phy@4a00400 {
-                       status = "okay";
-                       core-vdda-supply = <&pm8921_hdmi_switch>;
-               };
-
-               mdp@5100000 {
-                       status = "okay";
-
-                       ports {
-                               port@3 {
-                                       endpoint {
-                                               remote-endpoint = <&hdmi_in>;
-                                       };
-                               };
-                       };
-               };
-       };
-};
index 0e1e987..899f285 100644 (file)
                };
 
                sdhci@f9824900 {
-                       compatible = "qcom,sdhci-msm-v4";
+                       compatible = "qcom,apq8084-sdhci", "qcom,sdhci-msm-v4";
                        reg = <0xf9824900 0x11c>, <0xf9824000 0x800>;
                        reg-names = "hc_mem", "core_mem";
                        interrupts = <0 123 0>, <0 138 0>;
                };
 
                sdhci@f98a4900 {
-                       compatible = "qcom,sdhci-msm-v4";
+                       compatible = "qcom,apq8084-sdhci", "qcom,sdhci-msm-v4";
                        reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>;
                        reg-names = "hc_mem", "core_mem";
                        interrupts = <0 125 0>, <0 221 0>;
index ed8f064..51444c5 100644 (file)
                                ak8963@f {
                                        compatible = "asahi-kasei,ak8963";
                                        reg = <0x0f>;
-                                       // Currently only works in polling mode.
-                                       // gpios = <&msmgpio 61 0>;
+                                       gpios = <&msmgpio 67 0>;
                                        vid-supply = <&pm8941_lvs1>;
                                        vdd-supply = <&pm8941_l17>;
                                };
index aba159d..ca266a5 100644 (file)
                        };
                };
 
-               tsens: thermal-sensor@fc4a8000 {
+               tsens: thermal-sensor@fc4a9000 {
                        compatible = "qcom,msm8974-tsens";
-                       reg = <0xfc4a8000 0x2000>;
+                       reg = <0xfc4a9000 0x1000>, /* TM */
+                             <0xfc4a8000 0x1000>; /* SROT */
                        nvmem-cells = <&tsens_calib>, <&tsens_backup>;
                        nvmem-cell-names = "calib", "calib_backup";
+                       #qcom,sensors = <11>;
                        #thermal-sensor-cells = <1>;
                };
 
                };
 
                sdhci@f9824900 {
-                       compatible = "qcom,sdhci-msm-v4";
+                       compatible = "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4";
                        reg = <0xf9824900 0x11c>, <0xf9824000 0x800>;
                        reg-names = "hc_mem", "core_mem";
                        interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
                };
 
                sdhci@f9864900 {
-                       compatible = "qcom,sdhci-msm-v4";
+                       compatible = "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4";
                        reg = <0xf9864900 0x11c>, <0xf9864000 0x800>;
                        reg-names = "hc_mem", "core_mem";
                        interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>,
                };
 
                sdhci@f98a4900 {
-                       compatible = "qcom,sdhci-msm-v4";
+                       compatible = "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4";
                        reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>;
                        reg-names = "hc_mem", "core_mem";
                        interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
index 383cba6..12ffe73 100644 (file)
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0
 /*
- * Device Tree Source for the r8a7740 SoC
+ * Device Tree Source for the R-Mobile A1 (R8A77400) SoC
  *
  * Copyright (C) 2012 Renesas Solutions Corp.
  */
index 22da819..40b7f98 100644 (file)
@@ -6,6 +6,7 @@
  */
 
 /dts-v1/;
+#include <dt-bindings/gpio/gpio.h>
 #include "r8a77470.dtsi"
 / {
        model = "iWave iW-RainboW-G23S single board computer based on RZ/G1C";
                device_type = "memory";
                reg = <0 0x40000000 0 0x20000000>;
        };
+
+       reg_1p8v: reg-1p8v {
+               compatible = "regulator-fixed";
+               regulator-name = "fixed-1.8V";
+               regulator-min-microvolt = <1800000>;
+               regulator-max-microvolt = <1800000>;
+               regulator-boot-on;
+               regulator-always-on;
+       };
+
+       reg_3p3v: reg-3p3v {
+               compatible = "regulator-fixed";
+               regulator-name = "fixed-3.3V";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               regulator-boot-on;
+               regulator-always-on;
+       };
+
+       vccq_sdhi2: regulator-vccq-sdhi2 {
+               compatible = "regulator-gpio";
+
+               regulator-name = "SDHI2 VccQ";
+               regulator-min-microvolt = <1800000>;
+               regulator-max-microvolt = <3300000>;
+
+               gpios = <&gpio2 24 GPIO_ACTIVE_LOW>;
+               gpios-states = <1>;
+               states = <3300000 1
+                         1800000 0>;
+       };
 };
 
 &avb {
+       pinctrl-0 = <&avb_pins>;
+       pinctrl-names = "default";
+
        phy-handle = <&phy3>;
        phy-mode = "gmii";
        renesas,no-ether-link;
        };
 };
 
+&cmt0 {
+       status = "okay";
+};
+
 &extal_clk {
        clock-frequency = <20000000>;
 };
 
 &pfc {
+       avb_pins: avb {
+               groups = "avb_mdio", "avb_gmii_tx_rx";
+               function = "avb";
+       };
+
+       mmc_pins_uhs: mmc_uhs {
+               groups = "mmc_data8", "mmc_ctrl";
+               function = "mmc";
+               power-source = <1800>;
+       };
+
+       qspi0_pins: qspi0 {
+               groups = "qspi0_ctrl", "qspi0_data2";
+               function = "qspi0";
+       };
+
        scif1_pins: scif1 {
                groups = "scif1_data_b";
                function = "scif1";
        };
+
+       sdhi2_pins: sd2 {
+               groups = "sdhi2_data4", "sdhi2_ctrl";
+               function = "sdhi2";
+               power-source = <3300>;
+       };
+
+       sdhi2_pins_uhs: sd2_uhs {
+               groups = "sdhi2_data4", "sdhi2_ctrl";
+               function = "sdhi2";
+               power-source = <1800>;
+       };
+};
+
+&qspi0 {
+       pinctrl-0 = <&qspi0_pins>;
+       pinctrl-names = "default";
+
+       status = "okay";
+
+       /* WARNING - This device contains the bootloader. Handle with care. */
+       flash: flash@0 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "issi,is25lp016d", "jedec,spi-nor";
+               reg = <0>;
+               spi-max-frequency = <133000000>;
+               spi-tx-bus-width = <1>;
+               spi-rx-bus-width = <1>;
+               m25p,fast-read;
+               spi-cpol;
+               spi-cpha;
+       };
+};
+
+&rwdt {
+       timeout-sec = <60>;
+       status = "okay";
 };
 
 &scif1 {
 
        status = "okay";
 };
+
+&sdhi1 {
+       pinctrl-0 = <&mmc_pins_uhs>;
+       pinctrl-names = "state_uhs";
+
+       vmmc-supply = <&reg_3p3v>;
+       vqmmc-supply = <&reg_1p8v>;
+       bus-width = <8>;
+       mmc-hs200-1_8v;
+       non-removable;
+       fixed-emmc-driver-type = <1>;
+       status = "okay";
+};
+
+&sdhi2 {
+       pinctrl-0 = <&sdhi2_pins>;
+       pinctrl-1 = <&sdhi2_pins_uhs>;
+       pinctrl-names = "default", "state_uhs";
+
+       vmmc-supply = <&reg_3p3v>;
+       vqmmc-supply = <&vccq_sdhi2>;
+       bus-width = <4>;
+       cd-gpios = <&gpio4 20 GPIO_ACTIVE_LOW>;
+       sd-uhs-sdr50;
+       status = "okay";
+};
index 9ec78d3..f4e232b 100644 (file)
        #address-cells = <2>;
        #size-cells = <2>;
 
+       aliases {
+               i2c0 = &i2c0;
+               i2c1 = &i2c1;
+               i2c2 = &i2c2;
+               i2c3 = &i2c3;
+               i2c4 = &i2c4;
+       };
+
        cpus {
                #address-cells = <1>;
                #size-cells = <0>;
                #size-cells = <2>;
                ranges;
 
+               rwdt: watchdog@e6020000 {
+                       compatible = "renesas,r8a77470-wdt",
+                                    "renesas,rcar-gen2-wdt";
+                       reg = <0 0xe6020000 0 0x0c>;
+                       clocks = <&cpg CPG_MOD 402>;
+                       power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
+                       resets = <&cpg 402>;
+                       status = "disabled";
+               };
+
                gpio0: gpio@e6050000 {
                        compatible = "renesas,gpio-r8a77470",
                                     "renesas,rcar-gen2-gpio";
                        reg = <0 0xe6300000 0 0x20000>;
                };
 
+               i2c0: i2c@e6508000 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "renesas,i2c-r8a77470",
+                                    "renesas,rcar-gen2-i2c";
+                       reg = <0 0xe6508000 0 0x40>;
+                       interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 931>;
+                       power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
+                       resets = <&cpg 931>;
+                       i2c-scl-internal-delay-ns = <6>;
+                       status = "disabled";
+               };
+
+               i2c1: i2c@e6518000 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "renesas,i2c-r8a77470",
+                                    "renesas,rcar-gen2-i2c";
+                       reg = <0 0xe6518000 0 0x40>;
+                       interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 930>;
+                       power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
+                       resets = <&cpg 930>;
+                       i2c-scl-internal-delay-ns = <6>;
+                       status = "disabled";
+               };
+
+               i2c2: i2c@e6530000 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "renesas,i2c-r8a77470",
+                                    "renesas,rcar-gen2-i2c";
+                       reg = <0 0xe6530000 0 0x40>;
+                       interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 929>;
+                       power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
+                       resets = <&cpg 929>;
+                       i2c-scl-internal-delay-ns = <6>;
+                       status = "disabled";
+               };
+
+               i2c3: i2c@e6540000 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "renesas,i2c-r8a77470",
+                                    "renesas,rcar-gen2-i2c";
+                       reg = <0 0xe6540000 0 0x40>;
+                       interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 928>;
+                       power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
+                       resets = <&cpg 928>;
+                       i2c-scl-internal-delay-ns = <6>;
+                       status = "disabled";
+               };
+
                i2c4: i2c@e6520000 {
                        #address-cells = <1>;
                        #size-cells = <0>;
                        status = "disabled";
                };
 
+               usb_dmac00: dma-controller@e65a0000 {
+                       compatible = "renesas,r8a77470-usb-dmac",
+                                    "renesas,usb-dmac";
+                       reg = <0 0xe65a0000 0 0x100>;
+                       interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
+                                     GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "ch0", "ch1";
+                       clocks = <&cpg CPG_MOD 330>;
+                       power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
+                       resets = <&cpg 330>;
+                       #dma-cells = <1>;
+                       dma-channels = <2>;
+               };
+
+               usb_dmac10: dma-controller@e65b0000 {
+                       compatible = "renesas,r8a77470-usb-dmac",
+                                    "renesas,usb-dmac";
+                       reg = <0 0xe65b0000 0 0x100>;
+                       interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
+                                     GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "ch0", "ch1";
+                       clocks = <&cpg CPG_MOD 331>;
+                       power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
+                       resets = <&cpg 331>;
+                       #dma-cells = <1>;
+                       dma-channels = <2>;
+               };
+
+               usb_dmac01: dma-controller@e65a8000 {
+                       compatible = "renesas,r8a77470-usb-dmac",
+                                    "renesas,usb-dmac";
+                       reg = <0 0xe65a8000 0 0x100>;
+                       interrupts = <GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH
+                                     GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "ch0", "ch1";
+                       clocks = <&cpg CPG_MOD 326>;
+                       power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
+                       resets = <&cpg 326>;
+                       #dma-cells = <1>;
+                       dma-channels = <2>;
+               };
+
+               usb_dmac11: dma-controller@e65b8000 {
+                       compatible = "renesas,r8a77470-usb-dmac",
+                                    "renesas,usb-dmac";
+                       reg = <0 0xe65b8000 0 0x100>;
+                       interrupts = <GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH
+                                     GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "ch0", "ch1";
+                       clocks = <&cpg CPG_MOD 327>;
+                       power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
+                       resets = <&cpg 327>;
+                       #dma-cells = <1>;
+                       dma-channels = <2>;
+               };
+
                dmac0: dma-controller@e6700000 {
                        compatible = "renesas,dmac-r8a77470",
                                     "renesas,rcar-dmac";
                        status = "disabled";
                };
 
+               qspi0: spi@e6b10000 {
+                       compatible = "renesas,qspi-r8a77470", "renesas,qspi";
+                       reg = <0 0xe6b10000 0 0x2c>;
+                       interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 918>;
+                       dmas = <&dmac0 0x17>, <&dmac0 0x18>,
+                              <&dmac1 0x17>, <&dmac1 0x18>;
+                       dma-names = "tx", "rx", "tx", "rx";
+                       power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
+                       num-cs = <1>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       resets = <&cpg 918>;
+                       status = "disabled";
+               };
+
+               qspi1: spi@ee200000 {
+                       compatible = "renesas,qspi-r8a77470", "renesas,qspi";
+                       reg = <0 0xee200000 0 0x2c>;
+                       interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 917>;
+                       dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
+                              <&dmac1 0xd1>, <&dmac1 0xd2>;
+                       dma-names = "tx", "rx", "tx", "rx";
+                       power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
+                       num-cs = <1>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       resets = <&cpg 917>;
+                       status = "disabled";
+               };
+
                scif0: serial@e6e60000 {
                        compatible = "renesas,scif-r8a77470",
                                     "renesas,rcar-gen2-scif", "renesas,scif";
                        status = "disabled";
                };
 
+               sdhi0: sd@ee100000 {
+                       compatible = "renesas,sdhi-r8a77470",
+                                    "renesas,rcar-gen2-sdhi";
+                       reg = <0 0xee100000 0 0x328>;
+                       interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 314>;
+                       dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
+                              <&dmac1 0xcd>, <&dmac1 0xce>;
+                       dma-names = "tx", "rx", "tx", "rx";
+                       max-frequency = <156000000>;
+                       power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
+                       resets = <&cpg 314>;
+                       status = "disabled";
+               };
+
+               sdhi1: sd@ee300000 {
+                       compatible = "renesas,sdhi-mmc-r8a77470";
+                       reg = <0 0xee300000 0 0x2000>;
+                       interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 313>;
+                       max-frequency = <156000000>;
+                       power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
+                       resets = <&cpg 313>;
+                       status = "disabled";
+               };
+
                sdhi2: sd@ee160000 {
                        compatible = "renesas,sdhi-r8a77470",
                                     "renesas,rcar-gen2-sdhi";
                        dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
                               <&dmac1 0xd3>, <&dmac1 0xd4>;
                        dma-names = "tx", "rx", "tx", "rx";
-                       max-frequency = <97500000>;
+                       max-frequency = <78000000>;
                        power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
                        resets = <&cpg 312>;
                        status = "disabled";
                        compatible = "renesas,prr";
                        reg = <0 0xff000044 0 4>;
                };
+
+               cmt0: timer@ffca0000 {
+                       compatible = "renesas,r8a77470-cmt0",
+                                    "renesas,rcar-gen2-cmt0";
+                       reg = <0 0xffca0000 0 0x1004>;
+                       interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 124>;
+                       clock-names = "fck";
+                       power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
+                       resets = <&cpg 124>;
+                       status = "disabled";
+               };
+
+               cmt1: timer@e6130000 {
+                       compatible = "renesas,r8a77470-cmt1",
+                                    "renesas,rcar-gen2-cmt1";
+                       reg = <0 0xe6130000 0 0x1004>;
+                       interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 329>;
+                       clock-names = "fck";
+                       power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
+                       resets = <&cpg 329>;
+                       status = "disabled";
+               };
        };
 
        timer {
index 50312e7..7b9508e 100644 (file)
 };
 
 &lvds1 {
-       status = "okay";
-
        ports {
                port@1 {
                        lvds_connector: endpoint {
index ce22db0..e6580aa 100644 (file)
 };
 
 &lvds0 {
-       status = "okay";
-
        ports {
                port@1 {
                        lvds_connector: endpoint {
index f02036e..fefdf82 100644 (file)
 };
 
 &lvds0 {
-       status = "okay";
-
        ports {
                port@1 {
                        lvds_connector: endpoint {
index eaf9497..4c1ab49 100644 (file)
                        status = "disabled";
                };
 
-               gic: gic@44101000 {
+               pinctrl: pin-controller@40067000 {
+                       compatible = "renesas,r9a06g032-pinctrl", "renesas,rzn1-pinctrl";
+                       reg = <0x40067000 0x1000>, <0x51000000 0x480>;
+                       clocks = <&sysctrl R9A06G032_HCLK_PINCONFIG>;
+                       clock-names = "bus";
+                       status = "okay";
+               };
+
+               gic: interrupt-controller@44101000 {
                        compatible = "arm,cortex-a7-gic", "arm,gic-400";
                        interrupt-controller;
                        #interrupt-cells = <3>;
index 2ab3c4b..112d2bf 100644 (file)
@@ -7,6 +7,7 @@
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/pinctrl/rockchip.h>
 #include <dt-bindings/clock/rk3066a-cru.h>
+#include <dt-bindings/power/rk3066-power.h>
 #include "rk3xxx.dtsi"
 
 / {
                          "ppmmu2",
                          "pp3",
                          "ppmmu3";
+       power-domains = <&power RK3066_PD_GPU>;
 };
 
 &i2c0 {
        dma-names = "rx-tx";
 };
 
+&pmu {
+       power: power-controller {
+               compatible = "rockchip,rk3066-power-controller";
+               #power-domain-cells = <1>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               pd_vio@RK3066_PD_VIO {
+                       reg = <RK3066_PD_VIO>;
+                       clocks = <&cru ACLK_LCDC0>,
+                                <&cru ACLK_LCDC1>,
+                                <&cru DCLK_LCDC0>,
+                                <&cru DCLK_LCDC1>,
+                                <&cru HCLK_LCDC0>,
+                                <&cru HCLK_LCDC1>,
+                                <&cru SCLK_CIF1>,
+                                <&cru ACLK_CIF1>,
+                                <&cru HCLK_CIF1>,
+                                <&cru SCLK_CIF0>,
+                                <&cru ACLK_CIF0>,
+                                <&cru HCLK_CIF0>,
+                                <&cru ACLK_IPP>,
+                                <&cru HCLK_IPP>,
+                                <&cru ACLK_RGA>,
+                                <&cru HCLK_RGA>;
+                       pm_qos = <&qos_lcdc0>,
+                                <&qos_lcdc1>,
+                                <&qos_cif0>,
+                                <&qos_cif1>,
+                                <&qos_ipp>,
+                                <&qos_rga>;
+               };
+
+               pd_video@RK3066_PD_VIDEO {
+                       reg = <RK3066_PD_VIDEO>;
+                       clocks = <&cru ACLK_VDPU>,
+                                <&cru ACLK_VEPU>,
+                                <&cru HCLK_VDPU>,
+                                <&cru HCLK_VEPU>;
+                       pm_qos = <&qos_vpu>;
+               };
+
+               pd_gpu@RK3066_PD_GPU {
+                       reg = <RK3066_PD_GPU>;
+                       clocks = <&cru ACLK_GPU>;
+                       pm_qos = <&qos_gpu>;
+               };
+       };
+};
+
 &pwm0 {
        pinctrl-names = "default";
        pinctrl-0 = <&pwm0_out>;
index b6f7909..7e0dc52 100644 (file)
@@ -7,6 +7,7 @@
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/pinctrl/rockchip.h>
 #include <dt-bindings/clock/rk3188-cru.h>
+#include <dt-bindings/power/rk3188-power.h>
 #include "rk3xxx.dtsi"
 
 / {
@@ -80,6 +81,7 @@
                interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&cru ACLK_LCDC0>, <&cru DCLK_LCDC0>, <&cru HCLK_LCDC0>;
                clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
+               power-domains = <&power RK3188_PD_VIO>;
                resets = <&cru SRST_LCDC0_AXI>, <&cru SRST_LCDC0_AHB>, <&cru SRST_LCDC0_DCLK>;
                reset-names = "axi", "ahb", "dclk";
                status = "disabled";
@@ -96,6 +98,7 @@
                interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&cru ACLK_LCDC1>, <&cru DCLK_LCDC1>, <&cru HCLK_LCDC1>;
                clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
+               power-domains = <&power RK3188_PD_VIO>;
                resets = <&cru SRST_LCDC1_AXI>, <&cru SRST_LCDC1_AHB>, <&cru SRST_LCDC1_DCLK>;
                reset-names = "axi", "ahb", "dclk";
                status = "disabled";
                          "ppmmu2",
                          "pp3",
                          "ppmmu3";
+       power-domains = <&power RK3188_PD_GPU>;
 };
 
 &i2c0 {
        pinctrl-0 = <&i2c4_xfer>;
 };
 
+&pmu {
+       power: power-controller {
+               compatible = "rockchip,rk3188-power-controller";
+               #power-domain-cells = <1>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               pd_vio@RK3188_PD_VIO {
+                       reg = <RK3188_PD_VIO>;
+                       clocks = <&cru ACLK_LCDC0>,
+                                <&cru ACLK_LCDC1>,
+                                <&cru DCLK_LCDC0>,
+                                <&cru DCLK_LCDC1>,
+                                <&cru HCLK_LCDC0>,
+                                <&cru HCLK_LCDC1>,
+                                <&cru SCLK_CIF0>,
+                                <&cru ACLK_CIF0>,
+                                <&cru HCLK_CIF0>,
+                                <&cru ACLK_IPP>,
+                                <&cru HCLK_IPP>,
+                                <&cru ACLK_RGA>,
+                                <&cru HCLK_RGA>;
+                       pm_qos = <&qos_lcdc0>,
+                                <&qos_lcdc1>,
+                                <&qos_cif0>,
+                                <&qos_cif1>,
+                                <&qos_ipp>,
+                                <&qos_rga>;
+               };
+
+               pd_video@RK3188_PD_VIDEO {
+                       reg = <RK3188_PD_VIDEO>;
+                       clocks = <&cru ACLK_VDPU>,
+                                <&cru ACLK_VEPU>,
+                                <&cru HCLK_VDPU>,
+                                <&cru HCLK_VEPU>;
+                       pm_qos = <&qos_vpu>;
+               };
+
+               pd_gpu@RK3188_PD_GPU {
+                       reg = <RK3188_PD_GPU>;
+                       clocks = <&cru ACLK_GPU>;
+                       pm_qos = <&qos_gpu>;
+               };
+       };
+};
+
 &pwm0 {
        pinctrl-names = "default";
        pinctrl-0 = <&pwm0_out>;
index cd8f2a3..29f1907 100644 (file)
                                map0 {
                                        trip = <&cpu_alert0>;
                                        cooling-device =
-                                               <&cpu0 THERMAL_NO_LIMIT 6>;
+                                               <&cpu0 THERMAL_NO_LIMIT 6>,
+                                               <&cpu1 THERMAL_NO_LIMIT 6>,
+                                               <&cpu2 THERMAL_NO_LIMIT 6>,
+                                               <&cpu3 THERMAL_NO_LIMIT 6>;
                                };
                                map1 {
                                        trip = <&cpu_alert1>;
                                        cooling-device =
-                                               <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+                                               <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                               <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                               <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                               <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
                                };
                        };
                };
index 5032548..32e1ab3 100644 (file)
@@ -25,7 +25,7 @@
 
        vcc_flash: flash-regulator {
                compatible = "regulator-fixed";
-               regulator-name = "vcc_sys";
+               regulator-name = "vcc_flash";
                regulator-min-microvolt = <1800000>;
                regulator-max-microvolt = <1800000>;
                startup-delay-us = <150>;
index 1e0158a..d889ab3 100644 (file)
                 */
                cpu_warm_limit_cpu {
                        trip = <&cpu_alert_warm>;
-                       cooling-device =
-                               <&cpu0 THERMAL_NO_LIMIT 4>;
+                       cooling-device = <&cpu0 THERMAL_NO_LIMIT 4>,
+                                        <&cpu1 THERMAL_NO_LIMIT 4>,
+                                        <&cpu2 THERMAL_NO_LIMIT 4>,
+                                        <&cpu3 THERMAL_NO_LIMIT 4>;
                };
 
                /*
                 */
                cpu_almost_hot_limit_cpu {
                        trip = <&cpu_alert_almost_hot>;
-                       cooling-device =
-                               <&cpu0 5 6>;
+                       cooling-device = <&cpu0 5 6>, <&cpu1 5 6>, <&cpu2 5 6>,
+                                        <&cpu3 5 6>;
                };
                cpu_hot_limit_cpu {
                        trip = <&cpu_alert_hot>;
-                       cooling-device =
-                               <&cpu0 7 7>;
+                       cooling-device = <&cpu0 7 7>, <&cpu1 7 7>, <&cpu2 7 7>,
+                                        <&cpu3 7 7>;
                };
                cpu_hotter_limit_cpu {
                        trip = <&cpu_alert_hotter>;
-                       cooling-device =
-                               <&cpu0 7 8>;
+                       cooling-device = <&cpu0 7 8>, <&cpu1 7 8>, <&cpu2 7 8>,
+                                        <&cpu3 7 8>;
                };
                cpu_very_hot_limit_cpu {
                        trip = <&cpu_alert_very_hot>;
-                       cooling-device =
-                               <&cpu0 8 THERMAL_NO_LIMIT>;
+                       cooling-device = <&cpu0 8 THERMAL_NO_LIMIT>,
+                                        <&cpu1 8 THERMAL_NO_LIMIT>,
+                                        <&cpu2 8 THERMAL_NO_LIMIT>,
+                                        <&cpu3 8 THERMAL_NO_LIMIT>;
                };
        };
 };
index 0840ffb..1da86e8 100644 (file)
                                map0 {
                                        trip = <&cpu_alert0>;
                                        cooling-device =
-                                               <&cpu0 THERMAL_NO_LIMIT 6>;
+                                               <&cpu0 THERMAL_NO_LIMIT 6>,
+                                               <&cpu1 THERMAL_NO_LIMIT 6>,
+                                               <&cpu2 THERMAL_NO_LIMIT 6>,
+                                               <&cpu3 THERMAL_NO_LIMIT 6>;
                                };
                                map1 {
                                        trip = <&cpu_alert1>;
                                        cooling-device =
-                                               <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+                                               <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                               <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                               <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                               <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
                                };
                        };
                };
                                map0 {
                                        trip = <&gpu_alert0>;
                                        cooling-device =
-                                               <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+                                               <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                               <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                               <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                               <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
                                };
                        };
                };
index d752dc6..97307a4 100644 (file)
                status = "disabled";
        };
 
+       qos_gpu: qos@1012d000 {
+               compatible = "syscon";
+               reg = <0x1012d000 0x20>;
+       };
+
+       qos_vpu: qos@1012e000 {
+               compatible = "syscon";
+               reg = <0x1012e000 0x20>;
+       };
+
+       qos_lcdc0: qos@1012f000 {
+               compatible = "syscon";
+               reg = <0x1012f000 0x20>;
+       };
+
+       qos_cif0: qos@1012f080 {
+               compatible = "syscon";
+               reg = <0x1012f080 0x20>;
+       };
+
+       qos_ipp: qos@1012f100 {
+               compatible = "syscon";
+               reg = <0x1012f100 0x20>;
+       };
+
+       qos_lcdc1: qos@1012f180 {
+               compatible = "syscon";
+               reg = <0x1012f180 0x20>;
+       };
+
+       qos_cif1: qos@1012f200 {
+               compatible = "syscon";
+               reg = <0x1012f200 0x20>;
+       };
+
+       qos_rga: qos@1012f280 {
+               compatible = "syscon";
+               reg = <0x1012f280 0x20>;
+       };
+
        usb_otg: usb@10180000 {
                compatible = "rockchip,rk3066-usb", "snps,dwc2";
                reg = <0x10180000 0x40000>;
index e8f0a07..3383699 100644 (file)
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0
 /*
- * Device Tree Source for the SH73A0 SoC
+ * Device Tree Source for the SH-Mobile AG5 (R8A73A00/SH73A0) SoC
  *
  * Copyright (C) 2012 Renesas Solutions Corp.
  */