Merge tag 'sunxi-h3-h5-for-4.18' of https://git.kernel.org/pub/scm/linux/kernel/git...
authorOlof Johansson <olof@lixom.net>
Fri, 25 May 2018 20:58:59 +0000 (13:58 -0700)
committerOlof Johansson <olof@lixom.net>
Fri, 25 May 2018 20:58:59 +0000 (13:58 -0700)
Allwinner H3/H5 support for 4.18

Here is our usual bunch of changes for the H3 and H5 SoCs that share the
same SoC design but with different CPUs.

This time, most of the changes are about supporting CPUFreq on these SoCs,
with voltage scaling being enabled for a number of boards.

* tag 'sunxi-h3-h5-for-4.18' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
  ARM: dts: sun8i: h3: Add SY8106A regulator to Orange Pi PC
  arm64: dts: allwinner: Add dts file for Libre Computer Board ALL-H3-CC H5 ver.
  arm64: dts: allwinner: Sort dtb entries in Makefile
  arm64: dts: allwinner: h5: Add cpu0 label for first cpu
  ARM: dts: sun8i: h2+: Add Libre Computer Board ALL-H3-CC H2+ ver.
  ARM: dts: sun8i: h2-plus: Sort dtb entries in Makefile
  arm: dts: sun8i: h3: libretech-all-h3-cc: Move board definition to common dtsi
  ARM: dts: sun8i: h3: fix ALL-H3-CC H3 ver VCC-1V2 regulator voltage
  ARM: dts: sun8i: h3: set the cpu-supply to VDD-CPUX on ALL-H3-CC H3 ver
  ARM: dts: sun8i: h3: fix ALL-H3-CC H3 ver VDD-CPUX voltage
  ARM: dts: sun8i: h3: add SY8113B regulator used by Orange Pi One board
  ARM: dts: sun8i: h2+: add SY8113B regulator used by Orange Pi Zero board
  ARM: dts: sun8i: h3: add operating-points-v2 table for CPU
  ARM: dts: sunxi: h3/h5: Add r_i2c I2C controller
  ARM: dts: sunxi: h3/h5: Add r_i2c pinmux node

Signed-off-by: Olof Johansson <olof@lixom.net>
12 files changed:
arch/arm/boot/dts/Makefile
arch/arm/boot/dts/sun8i-h2-plus-libretech-all-h3-cc.dts [new file with mode: 0644]
arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
arch/arm/boot/dts/sun8i-h3-libretech-all-h3-cc.dts
arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
arch/arm/boot/dts/sun8i-h3.dtsi
arch/arm/boot/dts/sunxi-h3-h5.dtsi
arch/arm/boot/dts/sunxi-libretech-all-h3-cc.dtsi [new file with mode: 0644]
arch/arm64/boot/dts/allwinner/Makefile
arch/arm64/boot/dts/allwinner/sun50i-h5-libretech-all-h3-cc.dts [new file with mode: 0644]
arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi

index fdf0bbd6c24d88d5e623ff81dc2f06dc2e2c9293..dc7293f9a2ae31736e8855ef32e4546f67acb41b 100644 (file)
@@ -1000,8 +1000,9 @@ dtb-$(CONFIG_MACH_SUN8I) += \
        sun8i-a83t-bananapi-m3.dtb \
        sun8i-a83t-cubietruck-plus.dtb \
        sun8i-a83t-tbs-a711.dtb \
-       sun8i-h2-plus-orangepi-r1.dtb \
        sun8i-h2-plus-bananapi-m2-zero.dtb \
+       sun8i-h2-plus-libretech-all-h3-cc.dtb \
+       sun8i-h2-plus-orangepi-r1.dtb \
        sun8i-h2-plus-orangepi-zero.dtb \
        sun8i-h3-bananapi-m2-plus.dtb \
        sun8i-h3-beelink-x2.dtb \
diff --git a/arch/arm/boot/dts/sun8i-h2-plus-libretech-all-h3-cc.dts b/arch/arm/boot/dts/sun8i-h2-plus-libretech-all-h3-cc.dts
new file mode 100644 (file)
index 0000000..4db0d4b
--- /dev/null
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2018 Chen-Yu Tsai <wens@csie.org>
+ */
+
+/dts-v1/;
+#include "sun8i-h3.dtsi"
+#include "sunxi-libretech-all-h3-cc.dtsi"
+
+/ {
+       model = "Libre Computer Board ALL-H3-CC H2+";
+       compatible = "libretech,all-h3-cc-h2-plus", "allwinner,sun8i-h2-plus";
+};
index 0bc031fe4c56b5a234f73bafd1919ef81d613f54..84cd9c06122752e226f55b532890fde654ecf4c9 100644 (file)
                gpio = <&pio 0 20 GPIO_ACTIVE_HIGH>;
        };
 
+       reg_vdd_cpux: vdd-cpux-regulator {
+               compatible = "regulator-gpio";
+               regulator-name = "vdd-cpux";
+               regulator-type = "voltage";
+               regulator-boot-on;
+               regulator-always-on;
+               regulator-min-microvolt = <1100000>;
+               regulator-max-microvolt = <1300000>;
+               regulator-ramp-delay = <50>; /* 4ms */
+
+               gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
+               enable-active-high;
+               gpios-states = <1>;
+               states = <1100000 0
+                         1300000 1>;
+       };
+
        wifi_pwrseq: wifi_pwrseq {
                compatible = "mmc-pwrseq-simple";
                reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>;
        };
 };
 
+&cpu0 {
+       cpu-supply = <&reg_vdd_cpux>;
+};
+
 &ehci0 {
        status = "okay";
 };
index b20a710da7bc6bf9553051ff4d9c0942f4f732bc..a8b2f0f1c11d6407ef0f5251e6b9ea9d53085f66 100644 (file)
@@ -6,213 +6,9 @@
 
 /dts-v1/;
 #include "sun8i-h3.dtsi"
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
+#include "sunxi-libretech-all-h3-cc.dtsi"
 
 / {
        model = "Libre Computer Board ALL-H3-CC H3";
        compatible = "libretech,all-h3-cc-h3", "allwinner,sun8i-h3";
-
-       aliases {
-               ethernet0 = &emac;
-               serial0 = &uart0;
-       };
-
-       chosen {
-               stdout-path = "serial0:115200n8";
-       };
-
-       connector {
-               compatible = "hdmi-connector";
-               type = "a";
-
-               port {
-                       hdmi_con_in: endpoint {
-                               remote-endpoint = <&hdmi_out_con>;
-                       };
-               };
-       };
-
-       leds {
-               compatible = "gpio-leds";
-
-               pwr_led {
-                       label = "librecomputer:green:pwr";
-                       gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PL10 */
-                       default-state = "on";
-               };
-
-               status_led {
-                       label = "librecomputer:blue:status";
-                       gpios = <&pio 0 7 GPIO_ACTIVE_HIGH>; /* PA7 */
-               };
-       };
-
-       gpio_keys {
-               compatible = "gpio-keys";
-
-               power {
-                       label = "power";
-                       linux,code = <KEY_POWER>;
-                       gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
-               };
-       };
-
-       reg_vcc1v2: vcc1v2 {
-               compatible = "regulator-fixed";
-               regulator-name = "vcc1v2";
-               regulator-min-microvolt = <3300000>;
-               regulator-max-microvolt = <3300000>;
-               regulator-always-on;
-               regulator-boot-on;
-               vin-supply = <&reg_vcc5v0>;
-               gpio = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */
-               enable-active-high;
-       };
-
-       reg_vcc3v3: vcc3v3 {
-               compatible = "regulator-fixed";
-               regulator-name = "vcc3v3";
-               regulator-min-microvolt = <3300000>;
-               regulator-max-microvolt = <3300000>;
-               vin-supply = <&reg_vcc5v0>;
-       };
-
-       /* This represents the board's 5V input */
-       reg_vcc5v0: vcc5v0 {
-               compatible = "regulator-fixed";
-               regulator-name = "vcc5v0";
-               regulator-min-microvolt = <5000000>;
-               regulator-max-microvolt = <5000000>;
-       };
-
-       reg_vcc_dram: vcc-dram {
-               compatible = "regulator-fixed";
-               regulator-name = "vcc-dram";
-               regulator-min-microvolt = <1500000>;
-               regulator-max-microvolt = <1500000>;
-               regulator-always-on;
-               regulator-boot-on;
-               vin-supply = <&reg_vcc5v0>;
-               gpio = <&r_pio 0 9 GPIO_ACTIVE_HIGH>; /* PL9 */
-               enable-active-high;
-       };
-
-       reg_vcc_io: vcc-io {
-               compatible = "regulator-fixed";
-               regulator-name = "vcc-io";
-               regulator-min-microvolt = <3300000>;
-               regulator-max-microvolt = <3300000>;
-               regulator-always-on;
-               regulator-boot-on;
-               vin-supply = <&reg_vcc3v3>;
-               gpio = <&r_pio 0 5 GPIO_ACTIVE_LOW>; /* PL5 */
-       };
-
-       reg_vdd_cpux: vdd-cpux {
-               compatible = "regulator-fixed";
-               regulator-name = "vdd-cpux";
-               regulator-min-microvolt = <3300000>;
-               regulator-max-microvolt = <3300000>;
-               regulator-always-on;
-               regulator-boot-on;
-               vin-supply = <&reg_vcc5v0>;
-               gpio = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */
-               enable-active-high;
-       };
-};
-
-&codec {
-       allwinner,audio-routing =
-               "Line Out", "LINEOUT",
-               "MIC1", "Mic",
-               "Mic",  "MBIAS";
-       status = "okay";
-};
-
-&de {
-       status = "okay";
-};
-
-&ehci0 {
-       status = "okay";
-};
-
-&ehci1 {
-       status = "okay";
-};
-
-&ehci2 {
-       status = "okay";
-};
-
-&ehci3 {
-       status = "okay";
-};
-
-&emac {
-       phy-handle = <&int_mii_phy>;
-       phy-mode = "mii";
-       allwinner,leds-active-low;
-       status = "okay";
-};
-
-&hdmi {
-       status = "okay";
-};
-
-&hdmi_out {
-       hdmi_out_con: endpoint {
-               remote-endpoint = <&hdmi_con_in>;
-       };
-};
-
-&ir {
-       pinctrl-names = "default";
-       pinctrl-0 = <&ir_pins_a>;
-       status = "okay";
-};
-
-&mmc0 {
-       vmmc-supply = <&reg_vcc_io>;
-       bus-width = <4>;
-       cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
-       status = "okay";
-};
-
-&ohci0 {
-       status = "okay";
-};
-
-&ohci1 {
-       status = "okay";
-};
-
-&ohci2 {
-       status = "okay";
-};
-
-&ohci3 {
-       status = "okay";
-};
-
-&uart0 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&uart0_pins_a>;
-       status = "okay";
-};
-
-&usb_otg {
-       dr_mode = "host";
-       status = "okay";
-};
-
-&usbphy {
-       /* VBUS on USB ports are always on */
-       usb0_vbus-supply = <&reg_vcc5v0>;
-       usb1_vbus-supply = <&reg_vcc5v0>;
-       usb2_vbus-supply = <&reg_vcc5v0>;
-       usb3_vbus-supply = <&reg_vcc5v0>;
-       status = "okay";
 };
index 3328fe583c9ba3f3d52bb615d33a0a9f03c29647..d56ac39510781876ba57972f26a5c57dfb7c76c7 100644 (file)
                        gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>;
                };
        };
+
+       reg_vdd_cpux: vdd-cpux-regulator {
+               compatible = "regulator-gpio";
+               regulator-name = "vdd-cpux";
+               regulator-type = "voltage";
+               regulator-boot-on;
+               regulator-always-on;
+               regulator-min-microvolt = <1100000>;
+               regulator-max-microvolt = <1300000>;
+               regulator-ramp-delay = <50>; /* 4ms */
+
+               gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
+               enable-active-high;
+               gpios-states = <0x1>;
+               states = <1100000 0x0
+                         1300000 0x1>;
+       };
+};
+
+&cpu0 {
+       cpu-supply = <&reg_vdd_cpux>;
 };
 
 &de {
index cea4d647ecbf3464dcddce9952d6d844646cf613..46240334128f29bf24e79650d514ad8e1b27c1af 100644 (file)
        status = "okay";
 };
 
+&cpu0 {
+       cpu-supply = <&reg_vdd_cpux>;
+};
+
 &ehci0 {
        status = "okay";
 };
        };
 };
 
+&r_i2c {
+       status = "okay";
+
+       reg_vdd_cpux: regulator@65 {
+               compatible = "silergy,sy8106a";
+               reg = <0x65>;
+               regulator-name = "vdd-cpux";
+               silergy,fixed-microvolt = <1200000>;
+               /*
+                * The datasheet uses 1.1V as the minimum value of VDD-CPUX,
+                * however both the Armbian DVFS table and the official one
+                * have operating points with voltage under 1.1V, and both
+                * DVFS table are known to work properly at the lowest
+                * operating point.
+                *
+                * Use 1.0V as the minimum voltage instead.
+                */
+               regulator-min-microvolt = <1000000>;
+               regulator-max-microvolt = <1300000>;
+               regulator-boot-on;
+               regulator-always-on;
+       };
+};
+
 &r_pio {
        leds_r_opc: led_pins {
                pins = "PL10";
index 10da8ed7db813df90ec3dbb6043d5724f8493f79..41d57c76f29052c4bb1724810bc0c5c9a50c09b1 100644 (file)
 #include "sunxi-h3-h5.dtsi"
 
 / {
+       cpu0_opp_table: opp_table0 {
+               compatible = "operating-points-v2";
+               opp-shared;
+
+               opp@648000000 {
+                       opp-hz = /bits/ 64 <648000000>;
+                       opp-microvolt = <1040000 1040000 1300000>;
+                       clock-latency-ns = <244144>; /* 8 32k periods */
+               };
+
+               opp@816000000 {
+                       opp-hz = /bits/ 64 <816000000>;
+                       opp-microvolt = <1100000 1100000 1300000>;
+                       clock-latency-ns = <244144>; /* 8 32k periods */
+               };
+
+               opp@1008000000 {
+                       opp-hz = /bits/ 64 <1008000000>;
+                       opp-microvolt = <1200000 1200000 1300000>;
+                       clock-latency-ns = <244144>; /* 8 32k periods */
+               };
+       };
+
        cpus {
                #address-cells = <1>;
                #size-cells = <0>;
 
-               cpu@0 {
+               cpu0: cpu@0 {
                        compatible = "arm,cortex-a7";
                        device_type = "cpu";
                        reg = <0>;
+                       clocks = <&ccu CLK_CPUX>;
+                       clock-names = "cpu";
+                       operating-points-v2 = <&cpu0_opp_table>;
+                       #cooling-cells = <2>;
                };
 
                cpu@1 {
                        compatible = "arm,cortex-a7";
                        device_type = "cpu";
                        reg = <1>;
+                       operating-points-v2 = <&cpu0_opp_table>;
                };
 
                cpu@2 {
                        compatible = "arm,cortex-a7";
                        device_type = "cpu";
                        reg = <2>;
+                       operating-points-v2 = <&cpu0_opp_table>;
                };
 
                cpu@3 {
                        compatible = "arm,cortex-a7";
                        device_type = "cpu";
                        reg = <3>;
+                       operating-points-v2 = <&cpu0_opp_table>;
                };
        };
 
index 1be1a02d6df26b5a963418a50b15a9bea4880004..c3bff1105e5da6169972888fb70327f2ff8e7c81 100644 (file)
                        status = "disabled";
                };
 
+               r_i2c: i2c@1f02400 {
+                       compatible = "allwinner,sun6i-a31-i2c";
+                       reg = <0x01f02400 0x400>;
+                       interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&r_i2c_pins>;
+                       clocks = <&r_ccu CLK_APB0_I2C>;
+                       resets = <&r_ccu RST_APB0_I2C>;
+                       status = "disabled";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+
                r_pio: pinctrl@1f02c00 {
                        compatible = "allwinner,sun8i-h3-r-pinctrl";
                        reg = <0x01f02c00 0x400>;
                                pins = "PL11";
                                function = "s_cir_rx";
                        };
+
+                       r_i2c_pins: r-i2c {
+                               pins = "PL0", "PL1";
+                               function = "s_i2c";
+                       };
                };
        };
 };
diff --git a/arch/arm/boot/dts/sunxi-libretech-all-h3-cc.dtsi b/arch/arm/boot/dts/sunxi-libretech-all-h3-cc.dtsi
new file mode 100644 (file)
index 0000000..f7ffdd6
--- /dev/null
@@ -0,0 +1,215 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2017 Chen-Yu Tsai <wens@csie.org>
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+       aliases {
+               ethernet0 = &emac;
+               serial0 = &uart0;
+       };
+
+       chosen {
+               stdout-path = "serial0:115200n8";
+       };
+
+       connector {
+               compatible = "hdmi-connector";
+               type = "a";
+
+               port {
+                       hdmi_con_in: endpoint {
+                               remote-endpoint = <&hdmi_out_con>;
+                       };
+               };
+       };
+
+       leds {
+               compatible = "gpio-leds";
+
+               pwr_led {
+                       label = "librecomputer:green:pwr";
+                       gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PL10 */
+                       default-state = "on";
+               };
+
+               status_led {
+                       label = "librecomputer:blue:status";
+                       gpios = <&pio 0 7 GPIO_ACTIVE_HIGH>; /* PA7 */
+               };
+       };
+
+       gpio_keys {
+               compatible = "gpio-keys";
+
+               power {
+                       label = "power";
+                       linux,code = <KEY_POWER>;
+                       gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
+               };
+       };
+
+       reg_vcc1v2: vcc1v2 {
+               compatible = "regulator-fixed";
+               regulator-name = "vcc1v2";
+               regulator-min-microvolt = <1200000>;
+               regulator-max-microvolt = <1200000>;
+               regulator-always-on;
+               regulator-boot-on;
+               vin-supply = <&reg_vcc5v0>;
+               gpio = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */
+               enable-active-high;
+       };
+
+       reg_vcc3v3: vcc3v3 {
+               compatible = "regulator-fixed";
+               regulator-name = "vcc3v3";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               vin-supply = <&reg_vcc5v0>;
+       };
+
+       /* This represents the board's 5V input */
+       reg_vcc5v0: vcc5v0 {
+               compatible = "regulator-fixed";
+               regulator-name = "vcc5v0";
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+       };
+
+       reg_vcc_dram: vcc-dram {
+               compatible = "regulator-fixed";
+               regulator-name = "vcc-dram";
+               regulator-min-microvolt = <1500000>;
+               regulator-max-microvolt = <1500000>;
+               regulator-always-on;
+               regulator-boot-on;
+               vin-supply = <&reg_vcc5v0>;
+               gpio = <&r_pio 0 9 GPIO_ACTIVE_HIGH>; /* PL9 */
+               enable-active-high;
+       };
+
+       reg_vcc_io: vcc-io {
+               compatible = "regulator-fixed";
+               regulator-name = "vcc-io";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               regulator-always-on;
+               regulator-boot-on;
+               vin-supply = <&reg_vcc3v3>;
+               gpio = <&r_pio 0 5 GPIO_ACTIVE_LOW>; /* PL5 */
+       };
+
+       reg_vdd_cpux: vdd-cpux {
+               compatible = "regulator-fixed";
+               regulator-name = "vdd-cpux";
+               regulator-min-microvolt = <1200000>;
+               regulator-max-microvolt = <1200000>;
+               regulator-always-on;
+               regulator-boot-on;
+               vin-supply = <&reg_vcc5v0>;
+               gpio = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */
+               enable-active-high;
+       };
+};
+
+&codec {
+       allwinner,audio-routing =
+               "Line Out", "LINEOUT",
+               "MIC1", "Mic",
+               "Mic",  "MBIAS";
+       status = "okay";
+};
+
+&cpu0 {
+       cpu-supply = <&reg_vdd_cpux>;
+};
+
+&de {
+       status = "okay";
+};
+
+&ehci0 {
+       status = "okay";
+};
+
+&ehci1 {
+       status = "okay";
+};
+
+&ehci2 {
+       status = "okay";
+};
+
+&ehci3 {
+       status = "okay";
+};
+
+&emac {
+       phy-handle = <&int_mii_phy>;
+       phy-mode = "mii";
+       allwinner,leds-active-low;
+       status = "okay";
+};
+
+&hdmi {
+       status = "okay";
+};
+
+&hdmi_out {
+       hdmi_out_con: endpoint {
+               remote-endpoint = <&hdmi_con_in>;
+       };
+};
+
+&ir {
+       pinctrl-names = "default";
+       pinctrl-0 = <&ir_pins_a>;
+       status = "okay";
+};
+
+&mmc0 {
+       vmmc-supply = <&reg_vcc_io>;
+       bus-width = <4>;
+       cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+       status = "okay";
+};
+
+&ohci0 {
+       status = "okay";
+};
+
+&ohci1 {
+       status = "okay";
+};
+
+&ohci2 {
+       status = "okay";
+};
+
+&ohci3 {
+       status = "okay";
+};
+
+&uart0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart0_pins_a>;
+       status = "okay";
+};
+
+&usb_otg {
+       dr_mode = "host";
+       status = "okay";
+};
+
+&usbphy {
+       /* VBUS on USB ports are always on */
+       usb0_vbus-supply = <&reg_vcc5v0>;
+       usb1_vbus-supply = <&reg_vcc5v0>;
+       usb2_vbus-supply = <&reg_vcc5v0>;
+       usb3_vbus-supply = <&reg_vcc5v0>;
+       status = "okay";
+};
index 8bebe7da5ed9a924080dec86dbb05cfd97eab7fb..c31f90a494810d2ac9ef89fdd2bb4413ccb7da5e 100644 (file)
@@ -6,10 +6,11 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-orangepi-win.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pine64-plus.dtb sun50i-a64-pine64.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-sopine-baseboard.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-teres-i.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-libretech-all-h3-cc.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo2.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo-plus2.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-pc2.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-prime.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus2.dtb
-dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo2.dtb
-dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo-plus2.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-pine-h64.dtb
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-libretech-all-h3-cc.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-libretech-all-h3-cc.dts
new file mode 100644 (file)
index 0000000..95e113c
--- /dev/null
@@ -0,0 +1,14 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2018 BayLibre, SAS
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
+ */
+
+/dts-v1/;
+#include "sun50i-h5.dtsi"
+#include <arm/sunxi-libretech-all-h3-cc.dtsi>
+
+/ {
+       model = "Libre Computer Board ALL-H3-CC H5";
+       compatible = "libretech,all-h3-cc-h5", "allwinner,sun50i-h5";
+};
index e237c05cfdb403040742528228f59c04ca89b4c8..62d646baac3c403bb1d1908278694f7404a954f6 100644 (file)
@@ -47,7 +47,7 @@
                #address-cells = <1>;
                #size-cells = <0>;
 
-               cpu@0 {
+               cpu0: cpu@0 {
                        compatible = "arm,cortex-a53", "arm,armv8";
                        device_type = "cpu";
                        reg = <0>;