ARM: at91: add support in soc driver for new SAM9X60
authorSandeep Sheriker Mallikarjun <sandeepsheriker.mallikarjun@microchip.com>
Wed, 12 Dec 2018 10:41:10 +0000 (11:41 +0100)
committerAlexandre Belloni <alexandre.belloni@bootlin.com>
Wed, 12 Dec 2018 10:55:20 +0000 (11:55 +0100)
Add detection of new SAM9X60 by this soc.c driver.

Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
[nicolas.ferre@microchip.com: split patch]
Signed-off-by: Sandeep Sheriker Mallikarjun <sandeepsheriker.mallikarjun@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
drivers/soc/atmel/soc.c
drivers/soc/atmel/soc.h

index 2cc272ddf906516bf9adfaa16f9b18c4b60c62dd..096a83cf0caf33d098580b9b1f844cc534847336 100644 (file)
@@ -66,6 +66,8 @@ static const struct at91_soc __initconst socs[] = {
        AT91_SOC(AT91SAM9XE128_CIDR_MATCH, 0, "at91sam9xe128", "at91sam9xe128"),
        AT91_SOC(AT91SAM9XE256_CIDR_MATCH, 0, "at91sam9xe256", "at91sam9xe256"),
        AT91_SOC(AT91SAM9XE512_CIDR_MATCH, 0, "at91sam9xe512", "at91sam9xe512"),
        AT91_SOC(AT91SAM9XE128_CIDR_MATCH, 0, "at91sam9xe128", "at91sam9xe128"),
        AT91_SOC(AT91SAM9XE256_CIDR_MATCH, 0, "at91sam9xe256", "at91sam9xe256"),
        AT91_SOC(AT91SAM9XE512_CIDR_MATCH, 0, "at91sam9xe512", "at91sam9xe512"),
+       AT91_SOC(SAM9X60_CIDR_MATCH, SAM9X60_EXID_MATCH,
+                "sam9x60", "sam9x60"),
 #endif
 #ifdef CONFIG_SOC_SAMA5
        AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D21CU_EXID_MATCH,
 #endif
 #ifdef CONFIG_SOC_SAMA5
        AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D21CU_EXID_MATCH,
index ed89b24ecee11d4036daaa00de553d8d9e93e605..ee652e4841a5c38a4081892c6f1f996b35c21311 100644 (file)
@@ -42,6 +42,7 @@ at91_soc_init(const struct at91_soc *socs);
 #define AT91SAM9G45_CIDR_MATCH         0x019b05a0
 #define AT91SAM9X5_CIDR_MATCH          0x019a05a0
 #define AT91SAM9N12_CIDR_MATCH         0x019a07a0
 #define AT91SAM9G45_CIDR_MATCH         0x019b05a0
 #define AT91SAM9X5_CIDR_MATCH          0x019a05a0
 #define AT91SAM9N12_CIDR_MATCH         0x019a07a0
+#define SAM9X60_CIDR_MATCH             0x019b35a0
 
 #define AT91SAM9M11_EXID_MATCH         0x00000001
 #define AT91SAM9M10_EXID_MATCH         0x00000002
 
 #define AT91SAM9M11_EXID_MATCH         0x00000001
 #define AT91SAM9M10_EXID_MATCH         0x00000002
@@ -58,6 +59,8 @@ at91_soc_init(const struct at91_soc *socs);
 #define AT91SAM9N12_EXID_MATCH         0x00000006
 #define AT91SAM9CN11_EXID_MATCH                0x00000009
 
 #define AT91SAM9N12_EXID_MATCH         0x00000006
 #define AT91SAM9CN11_EXID_MATCH                0x00000009
 
+#define SAM9X60_EXID_MATCH             0x00000000
+
 #define AT91SAM9XE128_CIDR_MATCH       0x329973a0
 #define AT91SAM9XE256_CIDR_MATCH       0x329a93a0
 #define AT91SAM9XE512_CIDR_MATCH       0x329aa3a0
 #define AT91SAM9XE128_CIDR_MATCH       0x329973a0
 #define AT91SAM9XE256_CIDR_MATCH       0x329a93a0
 #define AT91SAM9XE512_CIDR_MATCH       0x329aa3a0