ARM: dts: meson: add the TIMER B/C/D interrupts
authorMartin Blumenstingl <martin.blumenstingl@googlemail.com>
Fri, 16 Nov 2018 20:42:34 +0000 (21:42 +0100)
committerKevin Hilman <khilman@baylibre.com>
Thu, 29 Nov 2018 00:49:03 +0000 (16:49 -0800)
The timer on Meson6/Meson8/Meson8b SoCs has four internal timer events.
For each of these a separate interrupt exists.
Pass these interrupts to allow using the timers other than TIMER A.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
arch/arm/boot/dts/meson.dtsi

index 0d9faf1a51eac0cca63b54cb272bb1c57e8261d2..f0255450bcb2f21058b2cfba094a2174b528c71f 100644 (file)
                        timer@9940 {
                                compatible = "amlogic,meson6-timer";
                                reg = <0x9940 0x18>;
                        timer@9940 {
                                compatible = "amlogic,meson6-timer";
                                reg = <0x9940 0x18>;
-                               interrupts = <GIC_SPI 10 IRQ_TYPE_EDGE_RISING>;
+                               interrupts = <GIC_SPI 10 IRQ_TYPE_EDGE_RISING>,
+                                            <GIC_SPI 11 IRQ_TYPE_EDGE_RISING>,
+                                            <GIC_SPI 6 IRQ_TYPE_EDGE_RISING>,
+                                            <GIC_SPI 29 IRQ_TYPE_EDGE_RISING>;
                        };
                };
 
                        };
                };