mtd: rawnand: denali_dt: remove single anonymous clock support
authorMasahiro Yamada <yamada.masahiro@socionext.com>
Tue, 15 Jan 2019 08:11:34 +0000 (17:11 +0900)
committerMiquel Raynal <miquel.raynal@bootlin.com>
Thu, 7 Feb 2019 22:17:51 +0000 (23:17 +0100)
Commit 6f1fe97bec34 ("mtd: rawnand: denali_dt: add more clocks based
on IP datasheet") introduced a more correct binding that requires
three named clocks.

Now that all upstream DT files migrated over to it, remove the single
anonymous clock support.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Tested-by: Dinh Nguyen <dinguyen@kernel.org>
Acked-by: Dinh Nguyen <dinguyen@kernel.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
drivers/mtd/nand/raw/denali_dt.c

index 7c6a8a4..0b5ae24 100644 (file)
@@ -109,25 +109,17 @@ static int denali_dt_probe(struct platform_device *pdev)
        if (IS_ERR(denali->host))
                return PTR_ERR(denali->host);
 
-       /*
-        * A single anonymous clock is supported for the backward compatibility.
-        * New platforms should support all the named clocks.
-        */
        dt->clk = devm_clk_get(dev, "nand");
        if (IS_ERR(dt->clk))
-               dt->clk = devm_clk_get(dev, NULL);
-       if (IS_ERR(dt->clk)) {
-               dev_err(dev, "no clk available\n");
                return PTR_ERR(dt->clk);
-       }
 
        dt->clk_x = devm_clk_get(dev, "nand_x");
        if (IS_ERR(dt->clk_x))
-               dt->clk_x = NULL;
+               return PTR_ERR(dt->clk_x);
 
        dt->clk_ecc = devm_clk_get(dev, "ecc");
        if (IS_ERR(dt->clk_ecc))
-               dt->clk_ecc = NULL;
+               return PTR_ERR(dt->clk_ecc);
 
        ret = clk_prepare_enable(dt->clk);
        if (ret)
@@ -141,19 +133,8 @@ static int denali_dt_probe(struct platform_device *pdev)
        if (ret)
                goto out_disable_clk_x;
 
-       if (dt->clk_x) {
-               denali->clk_rate = clk_get_rate(dt->clk);
-               denali->clk_x_rate = clk_get_rate(dt->clk_x);
-       } else {
-               /*
-                * Hardcode the clock rates for the backward compatibility.
-                * This works for both SOCFPGA and UniPhier.
-                */
-               dev_notice(dev,
-                          "necessary clock is missing. default clock rates are used.\n");
-               denali->clk_rate = 50000000;
-               denali->clk_x_rate = 200000000;
-       }
+       denali->clk_rate = clk_get_rate(dt->clk);
+       denali->clk_x_rate = clk_get_rate(dt->clk_x);
 
        ret = denali_init(denali);
        if (ret)