Merge tag 'samsung-soc-4.19' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk...
authorOlof Johansson <olof@lixom.net>
Thu, 26 Jul 2018 07:18:25 +0000 (00:18 -0700)
committerOlof Johansson <olof@lixom.net>
Thu, 26 Jul 2018 07:18:25 +0000 (00:18 -0700)
Samsung mach/soc changes for v4.19

Minor cleanups and fixes.

* tag 'samsung-soc-4.19' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  ARM: exynos: Clear global variable on init error path
  ARM: exynos: Remove outdated maintainer information
  ARM: s3c24xx: Fix typo in guard macro of s3c2412.h

Signed-off-by: Olof Johansson <olof@lixom.net>
528 files changed:
Documentation/admin-guide/pm/intel_pstate.rst
Documentation/devicetree/bindings/input/sprd,sc27xx-vibra.txt [new file with mode: 0644]
Documentation/filesystems/Locking
Documentation/filesystems/vfs.txt
Documentation/kbuild/kconfig-language.txt
Documentation/networking/e100.rst
Documentation/networking/e1000.rst
Documentation/networking/strparser.txt
Documentation/usb/gadget_configfs.txt
MAINTAINERS
Makefile
arch/arm/Kconfig
arch/arm/Kconfig.debug
arch/arm/boot/dts/armada-385-synology-ds116.dts
arch/arm/boot/dts/bcm-cygnus.dtsi
arch/arm/boot/dts/bcm-hr2.dtsi
arch/arm/boot/dts/bcm-nsp.dtsi
arch/arm/boot/dts/bcm5301x.dtsi
arch/arm/boot/dts/da850.dtsi
arch/arm/boot/dts/imx6q.dtsi
arch/arm/boot/dts/imx6sx.dtsi
arch/arm/boot/dts/socfpga.dtsi
arch/arm/boot/dts/socfpga_arria10.dtsi
arch/arm/common/Makefile
arch/arm/configs/multi_v7_defconfig
arch/arm/firmware/trusted_foundations.c
arch/arm/include/debug/renesas-scif.S
arch/arm/mach-at91/pm.c
arch/arm/mach-at91/pm.h
arch/arm/mach-at91/pm_suspend.S
arch/arm/mach-bcm/Kconfig
arch/arm/mach-davinci/Kconfig
arch/arm/mach-davinci/Makefile
arch/arm/mach-davinci/aemif.c [deleted file]
arch/arm/mach-davinci/board-da830-evm.c
arch/arm/mach-davinci/board-da850-evm.c
arch/arm/mach-davinci/board-dm355-evm.c
arch/arm/mach-davinci/board-dm355-leopard.c
arch/arm/mach-davinci/board-dm365-evm.c
arch/arm/mach-davinci/board-dm644x-evm.c
arch/arm/mach-davinci/board-dm646x-evm.c
arch/arm/mach-davinci/board-mityomapl138.c
arch/arm/mach-davinci/board-neuros-osd2.c
arch/arm/mach-davinci/board-omapl138-hawk.c
arch/arm/mach-davinci/board-sffsdr.c
arch/arm/mach-davinci/clock.c [deleted file]
arch/arm/mach-davinci/clock.h
arch/arm/mach-davinci/common.c
arch/arm/mach-davinci/da830.c
arch/arm/mach-davinci/da850.c
arch/arm/mach-davinci/da8xx-dt.c
arch/arm/mach-davinci/davinci.h
arch/arm/mach-davinci/devices-da8xx.c
arch/arm/mach-davinci/devices.c
arch/arm/mach-davinci/dm355.c
arch/arm/mach-davinci/dm365.c
arch/arm/mach-davinci/dm644x.c
arch/arm/mach-davinci/dm646x.c
arch/arm/mach-davinci/include/mach/clock.h
arch/arm/mach-davinci/include/mach/common.h
arch/arm/mach-davinci/include/mach/da8xx.h
arch/arm/mach-davinci/pm_domain.c
arch/arm/mach-davinci/psc.c [deleted file]
arch/arm/mach-davinci/psc.h
arch/arm/mach-davinci/time.c
arch/arm/mach-davinci/usb-da8xx.c
arch/arm/mach-hisi/hotplug.c
arch/arm/mach-imx/Kconfig
arch/arm/mach-imx/Makefile
arch/arm/mach-imx/common.h
arch/arm/mach-imx/cpu-imx5.c
arch/arm/mach-imx/cpu.c
arch/arm/mach-imx/cpuidle-imx6sl.c
arch/arm/mach-imx/cpuidle-imx6sx.c
arch/arm/mach-imx/gpc.c
arch/arm/mach-imx/imx31-dt.c
arch/arm/mach-imx/mach-imx51.c
arch/arm/mach-imx/mach-imx53.c
arch/arm/mach-imx/mach-imx6sl.c
arch/arm/mach-imx/mach-imx7d-cm4.c [new file with mode: 0644]
arch/arm/mach-imx/pm-imx6.c
arch/arm/mach-mvebu/platsmp.c
arch/arm/mach-mvebu/pmsu.c
arch/arm/mach-omap1/ams-delta-fiq-handler.S
arch/arm/mach-omap1/ams-delta-fiq.c
arch/arm/mach-omap1/ams-delta-fiq.h [new file with mode: 0644]
arch/arm/mach-omap1/board-ams-delta.c
arch/arm/mach-omap1/board-h2.c
arch/arm/mach-omap1/board-h3.c
arch/arm/mach-omap1/board-htcherald.c
arch/arm/mach-omap1/board-osk.c
arch/arm/mach-omap1/include/mach/ams-delta-fiq.h [deleted file]
arch/arm/mach-omap2/omap_hwmod_reset.c
arch/arm/mach-omap2/pm-asm-offsets.c
arch/arm/mach-omap2/pm-debug.c
arch/arm/mach-omap2/pm33xx-core.c
arch/arm/mach-omap2/sleep33xx.S
arch/arm/mach-omap2/sleep43xx.S
arch/arm/mach-pxa/devices.c
arch/arm/mach-pxa/devices.h
arch/arm/mach-pxa/hx4700.c
arch/arm/mach-pxa/mioa701.c
arch/arm/mach-pxa/pxa25x.c
arch/arm/mach-pxa/pxa27x.c
arch/arm/mach-pxa/pxa3xx.c
arch/arm/mach-pxa/zylonite.c
arch/arm/mach-shmobile/Kconfig
arch/arm/mach-shmobile/Makefile
arch/arm/mach-shmobile/common.h
arch/arm/mach-shmobile/headsmp-apmu.S
arch/arm/mach-shmobile/platsmp-apmu.c
arch/arm/mach-shmobile/platsmp-apmu.h [deleted file]
arch/arm/mach-shmobile/platsmp.c
arch/arm/mach-shmobile/pm-r8a7779.c [deleted file]
arch/arm/mach-shmobile/pm-rcar-gen2.c
arch/arm/mach-shmobile/r8a7779.h
arch/arm/mach-shmobile/r8a7790.h [deleted file]
arch/arm/mach-shmobile/r8a7791.h [deleted file]
arch/arm/mach-shmobile/regulator-quirk-rcar-gen2.c
arch/arm/mach-shmobile/setup-emev2.c
arch/arm/mach-shmobile/setup-r7s72100.c
arch/arm/mach-shmobile/setup-r8a73a4.c
arch/arm/mach-shmobile/setup-r8a7740.c
arch/arm/mach-shmobile/setup-r8a7778.c
arch/arm/mach-shmobile/setup-r8a7779.c
arch/arm/mach-shmobile/setup-r8a7790.c [deleted file]
arch/arm/mach-shmobile/setup-r8a7791.c [deleted file]
arch/arm/mach-shmobile/setup-rcar-gen2.c
arch/arm/mach-shmobile/setup-sh73a0.c
arch/arm/mach-shmobile/smp-emev2.c
arch/arm/mach-shmobile/smp-r8a7779.c
arch/arm/mach-shmobile/smp-r8a7790.c [deleted file]
arch/arm/mach-shmobile/smp-r8a7791.c [deleted file]
arch/arm/mach-shmobile/timer.c
arch/arm/mach-socfpga/Kconfig
arch/arm/plat-pxa/ssp.c
arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
arch/arm64/boot/dts/amlogic/meson-axg-s400.dts
arch/arm64/boot/dts/amlogic/meson-axg.dtsi
arch/arm64/boot/dts/amlogic/meson-gx.dtsi
arch/arm64/boot/dts/amlogic/meson-gxl-mali.dtsi
arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts
arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi
arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi
arch/arm64/boot/dts/broadcom/stingray/bcm958742k.dts
arch/arm64/boot/dts/broadcom/stingray/bcm958742t.dts
arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi
arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
arch/arm64/boot/dts/marvell/armada-cp110.dtsi
arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
arch/arm64/boot/dts/qcom/msm8916.dtsi
arch/arm64/boot/dts/socionext/uniphier-ld11-global.dts
arch/arm64/boot/dts/socionext/uniphier-ld20-global.dts
arch/arm64/configs/defconfig
arch/arm64/include/asm/alternative.h
arch/arm64/include/asm/pgtable.h
arch/arm64/kernel/alternative.c
arch/arm64/kernel/module.c
arch/microblaze/Kconfig.debug
arch/microblaze/include/asm/setup.h
arch/microblaze/include/asm/unistd.h
arch/microblaze/include/uapi/asm/unistd.h
arch/microblaze/kernel/Makefile
arch/microblaze/kernel/heartbeat.c [deleted file]
arch/microblaze/kernel/platform.c [deleted file]
arch/microblaze/kernel/reset.c
arch/microblaze/kernel/syscall_table.S
arch/microblaze/kernel/timer.c
arch/mips/kernel/signal.c
arch/parisc/Kconfig
arch/parisc/Makefile
arch/parisc/include/asm/signal.h
arch/parisc/include/uapi/asm/unistd.h
arch/parisc/kernel/drivers.c
arch/parisc/kernel/syscall_table.S
arch/parisc/kernel/unwind.c
arch/powerpc/include/asm/book3s/32/pgalloc.h
arch/powerpc/include/asm/nohash/32/pgalloc.h
arch/powerpc/include/asm/systbl.h
arch/powerpc/include/asm/unistd.h
arch/powerpc/include/uapi/asm/unistd.h
arch/powerpc/kernel/pci_32.c
arch/powerpc/kernel/pci_64.c
arch/powerpc/kernel/rtas.c
arch/powerpc/kernel/signal_32.c
arch/powerpc/kernel/signal_64.c
arch/powerpc/kernel/syscalls.c
arch/powerpc/mm/subpage-prot.c
arch/powerpc/platforms/powermac/time.c
arch/x86/entry/entry_32.S
arch/x86/entry/entry_64_compat.S
arch/x86/include/asm/pgalloc.h
arch/x86/include/asm/pgtable.h
arch/x86/include/asm/pgtable_64.h
arch/x86/kernel/e820.c
arch/x86/mm/fault.c
arch/x86/platform/efi/efi_64.c
block/blk-core.c
block/blk-mq.c
certs/blacklist.h
crypto/af_alg.c
crypto/algif_aead.c
crypto/algif_skcipher.c
crypto/asymmetric_keys/x509_cert_parser.c
drivers/acpi/osl.c
drivers/ata/pata_pxa.c
drivers/base/power/domain.c
drivers/block/drbd/drbd_req.c
drivers/char/random.c
drivers/clk/davinci/psc-da830.c
drivers/clk/davinci/psc-da850.c
drivers/clk/davinci/psc-dm365.c
drivers/clk/davinci/psc-dm644x.c
drivers/clk/davinci/psc-dm646x.c
drivers/cpufreq/qcom-cpufreq-kryo.c
drivers/dax/super.c
drivers/dma/pxa_dma.c
drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
drivers/gpu/drm/arm/malidp_drv.c
drivers/gpu/drm/arm/malidp_hw.c
drivers/gpu/drm/arm/malidp_planes.c
drivers/gpu/drm/i915/i915_drv.h
drivers/gpu/drm/meson/meson_drv.c
drivers/i2c/algos/i2c-algo-bit.c
drivers/i2c/busses/i2c-gpio.c
drivers/i2c/i2c-core-smbus.c
drivers/iio/accel/mma8452.c
drivers/iio/imu/inv_mpu6050/inv_mpu_core.c
drivers/iio/light/tsl2772.c
drivers/iio/pressure/bmp280-core.c
drivers/input/input-mt.c
drivers/input/joystick/xpad.c
drivers/input/keyboard/goldfish_events.c
drivers/input/misc/Kconfig
drivers/input/misc/Makefile
drivers/input/misc/sc27xx-vibra.c [new file with mode: 0644]
drivers/input/mouse/elan_i2c.h
drivers/input/mouse/elan_i2c_core.c
drivers/input/mouse/elan_i2c_smbus.c
drivers/input/mouse/elantech.c
drivers/input/mouse/psmouse-base.c
drivers/input/rmi4/Kconfig
drivers/input/rmi4/rmi_2d_sensor.c
drivers/input/rmi4/rmi_bus.c
drivers/input/rmi4/rmi_bus.h
drivers/input/rmi4/rmi_driver.c
drivers/input/rmi4/rmi_f01.c
drivers/input/rmi4/rmi_f03.c
drivers/input/rmi4/rmi_f11.c
drivers/input/rmi4/rmi_f12.c
drivers/input/rmi4/rmi_f30.c
drivers/input/rmi4/rmi_f34.c
drivers/input/rmi4/rmi_f54.c
drivers/input/serio/ams_delta_serio.c
drivers/input/touchscreen/silead.c
drivers/isdn/mISDN/socket.c
drivers/md/dm-raid.c
drivers/md/dm-table.c
drivers/md/dm-thin-metadata.c
drivers/md/dm-thin.c
drivers/md/dm-writecache.c
drivers/md/dm-zoned-target.c
drivers/md/dm.c
drivers/media/platform/pxa_camera.c
drivers/mmc/host/pxamci.c
drivers/mtd/chips/cfi_cmdset_0002.c
drivers/mtd/devices/mtd_dataflash.c
drivers/mtd/nand/raw/denali_dt.c
drivers/mtd/nand/raw/marvell_nand.c
drivers/mtd/nand/raw/mxc_nand.c
drivers/mtd/nand/raw/nand_base.c
drivers/mtd/nand/raw/nand_macronix.c
drivers/mtd/nand/raw/nand_micron.c
drivers/net/ethernet/amd/Kconfig
drivers/net/ethernet/apm/xgene-v2/Kconfig
drivers/net/ethernet/apm/xgene/Kconfig
drivers/net/ethernet/arc/Kconfig
drivers/net/ethernet/broadcom/Kconfig
drivers/net/ethernet/cadence/macb_ptp.c
drivers/net/ethernet/calxeda/Kconfig
drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
drivers/net/ethernet/hisilicon/Kconfig
drivers/net/ethernet/marvell/Kconfig
drivers/net/ethernet/marvell/mvneta.c
drivers/net/ethernet/mellanox/mlxsw/Kconfig
drivers/net/ethernet/mscc/ocelot.c
drivers/net/ethernet/realtek/r8169.c
drivers/net/ethernet/renesas/Kconfig
drivers/net/ethernet/sfc/efx.c
drivers/net/ethernet/smsc/smc911x.c
drivers/net/ethernet/smsc/smc91x.c
drivers/net/ethernet/smsc/smc91x.h
drivers/net/ethernet/ti/davinci_cpdma.c
drivers/net/ethernet/ti/davinci_emac.c
drivers/net/ipvlan/ipvlan_main.c
drivers/net/ppp/pppoe.c
drivers/net/usb/qmi_wwan.c
drivers/net/wireless/broadcom/brcm80211/Kconfig
drivers/net/wireless/quantenna/qtnfmac/Kconfig
drivers/net/xen-netfront.c
drivers/nfc/pn533/usb.c
drivers/nvdimm/pmem.c
drivers/nvme/host/rdma.c
drivers/pci/Makefile
drivers/pci/controller/Kconfig
drivers/pci/hotplug/acpi_pcihp.c
drivers/perf/xgene_pmu.c
drivers/scsi/ipr.c
drivers/scsi/qla2xxx/qla_target.c
drivers/scsi/scsi_debug.c
drivers/soc/imx/gpcv2.c
drivers/soc/qcom/Kconfig
drivers/soc/renesas/Makefile
drivers/soc/renesas/r9a06g032-smp.c [new file with mode: 0644]
drivers/soc/renesas/rcar-sysc.c
drivers/soc/ti/pm33xx.c
drivers/staging/android/ion/ion_heap.c
drivers/staging/comedi/drivers/quatech_daqp_cs.c
drivers/staging/typec/Kconfig
drivers/target/target_core_user.c
drivers/tty/n_tty.c
drivers/tty/serdev/core.c
drivers/tty/serial/8250/8250_pci.c
drivers/tty/vt/vt.c
drivers/usb/chipidea/host.c
drivers/usb/class/cdc-acm.c
drivers/usb/dwc2/core.h
drivers/usb/dwc2/gadget.c
drivers/usb/dwc2/hcd.c
drivers/usb/dwc2/hcd.h
drivers/usb/dwc2/hcd_intr.c
drivers/usb/dwc2/hcd_queue.c
drivers/usb/dwc3/core.c
drivers/usb/dwc3/dwc3-of-simple.c
drivers/usb/dwc3/dwc3-pci.c
drivers/usb/dwc3/dwc3-qcom.c
drivers/usb/gadget/composite.c
drivers/usb/gadget/function/f_fs.c
drivers/usb/host/xhci-mem.c
drivers/usb/host/xhci-tegra.c
drivers/usb/host/xhci-trace.h
drivers/usb/host/xhci.c
drivers/usb/host/xhci.h
drivers/usb/serial/cp210x.c
drivers/usb/typec/tcpm.c
drivers/usb/typec/ucsi/ucsi.c
drivers/usb/typec/ucsi/ucsi_acpi.c
drivers/vhost/net.c
fs/aio.c
fs/btrfs/extent_io.c
fs/btrfs/inode.c
fs/btrfs/ioctl.c
fs/btrfs/qgroup.c
fs/ceph/inode.c
fs/eventfd.c
fs/eventpoll.c
fs/pipe.c
fs/proc/generic.c
fs/select.c
fs/timerfd.c
fs/xfs/libxfs/xfs_ag_resv.c
fs/xfs/libxfs/xfs_bmap.c
fs/xfs/libxfs/xfs_bmap.h
fs/xfs/libxfs/xfs_format.h
fs/xfs/libxfs/xfs_inode_buf.c
fs/xfs/libxfs/xfs_rtbitmap.c
fs/xfs/xfs_bmap_util.c
fs/xfs/xfs_fsmap.c
fs/xfs/xfs_fsops.c
fs/xfs/xfs_inode.c
fs/xfs/xfs_iomap.c
fs/xfs/xfs_trans.c
include/crypto/if_alg.h
include/linux/acpi.h
include/linux/blkdev.h
include/linux/clk/at91_pmc.h
include/linux/compat.h
include/linux/compiler-gcc.h
include/linux/compiler_types.h
include/linux/cpuhotplug.h
include/linux/dax.h
include/linux/dma/pxa-dma.h
include/linux/filter.h
include/linux/fs.h
include/linux/iio/buffer-dma.h
include/linux/input/mt.h
include/linux/mfd/syscon/imx6q-iomuxc-gpr.h
include/linux/net.h
include/linux/platform_data/ams-delta-fiq.h [new file with mode: 0644]
include/linux/platform_data/mmp_dma.h
include/linux/platform_data/mtd-davinci-aemif.h
include/linux/platform_data/pm33xx.h
include/linux/pm_domain.h
include/linux/poll.h
include/linux/pxa2xx_ssp.h
include/linux/rmi.h
include/linux/scatterlist.h
include/linux/skbuff.h
include/linux/slub_def.h
include/linux/soc/renesas/rcar-sysc.h
include/linux/syscalls.h
include/net/bluetooth/bluetooth.h
include/net/iucv/af_iucv.h
include/net/sctp/sctp.h
include/net/tcp.h
include/net/tls.h
include/net/udp.h
include/uapi/linux/aio_abi.h
include/uapi/linux/target_core_user.h
init/Kconfig
kernel/dma/swiotlb.c
kernel/events/core.c
lib/Kconfig.kasan
lib/percpu_ida.c
lib/scatterlist.c
lib/test_printf.c
mm/slab_common.c
mm/slub.c
mm/vmstat.c
net/appletalk/ddp.c
net/atm/common.c
net/atm/common.h
net/atm/pvc.c
net/atm/svc.c
net/ax25/af_ax25.c
net/bluetooth/af_bluetooth.c
net/bluetooth/hci_sock.c
net/bluetooth/l2cap_sock.c
net/bluetooth/rfcomm/sock.c
net/bluetooth/sco.c
net/bpfilter/Makefile
net/caif/caif_socket.c
net/can/bcm.c
net/can/raw.c
net/core/datagram.c
net/dccp/ccids/ccid3.c
net/dccp/dccp.h
net/dccp/ipv4.c
net/dccp/ipv6.c
net/dccp/proto.c
net/decnet/af_decnet.c
net/ieee802154/socket.c
net/ipv4/af_inet.c
net/ipv4/tcp.c
net/ipv4/udp.c
net/ipv6/af_inet6.c
net/ipv6/mcast.c
net/ipv6/raw.c
net/iucv/af_iucv.c
net/kcm/kcmsock.c
net/key/af_key.c
net/l2tp/l2tp_ip.c
net/l2tp/l2tp_ip6.c
net/l2tp/l2tp_ppp.c
net/llc/af_llc.c
net/netlink/af_netlink.c
net/netrom/af_netrom.c
net/nfc/llcp_sock.c
net/nfc/rawsock.c
net/packet/af_packet.c
net/phonet/socket.c
net/qrtr/qrtr.c
net/rose/af_rose.c
net/rxrpc/af_rxrpc.c
net/sched/cls_flower.c
net/sched/sch_hfsc.c
net/sctp/chunk.c
net/sctp/ipv6.c
net/sctp/protocol.c
net/sctp/socket.c
net/smc/af_smc.c
net/socket.c
net/strparser/strparser.c
net/tipc/socket.c
net/tls/tls_main.c
net/tls/tls_sw.c
net/unix/af_unix.c
net/vmw_vsock/af_vsock.c
net/vmw_vsock/virtio_transport.c
net/x25/af_x25.c
net/xdp/xsk.c
scripts/checkpatch.pl
scripts/gcc-x86_64-has-stack-protector.sh
scripts/kconfig/expr.h
scripts/kconfig/preprocess.c
scripts/kconfig/zconf.y
security/keys/dh.c
security/selinux/selinuxfs.c
security/smack/smack_lsm.c
sound/core/seq/seq_clientmgr.c
sound/core/timer.c
sound/pci/hda/hda_codec.c
sound/pci/hda/hda_codec.h
sound/pci/hda/patch_ca0132.c
sound/pci/hda/patch_hdmi.c
sound/pci/hda/patch_realtek.c
sound/pci/lx6464es/lx6464es.c
sound/soc/pxa/pxa-ssp.c
tools/arch/arm/include/uapi/asm/kvm.h
tools/arch/arm64/include/uapi/asm/kvm.h
tools/arch/powerpc/include/uapi/asm/kvm.h
tools/arch/powerpc/include/uapi/asm/unistd.h
tools/arch/x86/include/asm/cpufeatures.h
tools/include/uapi/drm/drm.h
tools/include/uapi/linux/bpf.h
tools/include/uapi/linux/if_link.h
tools/include/uapi/linux/kvm.h
tools/perf/arch/powerpc/util/skip-callchain-idx.c
tools/perf/arch/x86/entry/syscalls/syscall_64.tbl
tools/perf/bench/numa.c
tools/perf/builtin-annotate.c
tools/perf/builtin-report.c
tools/perf/builtin-script.c
tools/perf/tests/parse-events.c
tools/perf/tests/topology.c
tools/perf/util/c++/clang.cpp
tools/perf/util/header.c
tools/perf/util/intel-pt-decoder/intel-pt-pkt-decoder.c
tools/perf/util/pmu.c
tools/testing/selftests/net/.gitignore
tools/testing/selftests/net/config
tools/testing/selftests/x86/sigreturn.c
tools/virtio/linux/scatterlist.h

index 8b9164990956743da612f2c968a191864dfc4c81..8f1d3de449b53fedcc78d1aee506e6882f2be90c 100644 (file)
@@ -324,8 +324,7 @@ Global Attributes
 
 ``intel_pstate`` exposes several global attributes (files) in ``sysfs`` to
 control its functionality at the system level.  They are located in the
-``/sys/devices/system/cpu/cpufreq/intel_pstate/`` directory and affect all
-CPUs.
+``/sys/devices/system/cpu/intel_pstate/`` directory and affect all CPUs.
 
 Some of them are not present if the ``intel_pstate=per_cpu_perf_limits``
 argument is passed to the kernel in the command line.
@@ -379,6 +378,17 @@ argument is passed to the kernel in the command line.
        but it affects the maximum possible value of per-policy P-state limits
        (see `Interpretation of Policy Attributes`_ below for details).
 
+``hwp_dynamic_boost``
+       This attribute is only present if ``intel_pstate`` works in the
+       `active mode with the HWP feature enabled <Active Mode With HWP_>`_ in
+       the processor.  If set (equal to 1), it causes the minimum P-state limit
+       to be increased dynamically for a short time whenever a task previously
+       waiting on I/O is selected to run on a given logical CPU (the purpose
+       of this mechanism is to improve performance).
+
+       This setting has no effect on logical CPUs whose minimum P-state limit
+       is directly set to the highest non-turbo P-state or above it.
+
 .. _status_attr:
 
 ``status``
diff --git a/Documentation/devicetree/bindings/input/sprd,sc27xx-vibra.txt b/Documentation/devicetree/bindings/input/sprd,sc27xx-vibra.txt
new file mode 100644 (file)
index 0000000..f2ec0d4
--- /dev/null
@@ -0,0 +1,23 @@
+Spreadtrum SC27xx PMIC Vibrator
+
+Required properties:
+- compatible: should be "sprd,sc2731-vibrator".
+- reg: address of vibrator control register.
+
+Example :
+
+       sc2731_pmic: pmic@0 {
+               compatible = "sprd,sc2731";
+               reg = <0>;
+               spi-max-frequency = <26000000>;
+               interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-controller;
+               #interrupt-cells = <2>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               vibrator@eb4 {
+                       compatible = "sprd,sc2731-vibrator";
+                       reg = <0xeb4>;
+               };
+       };
index 2c391338c6757f505eac6dfcbe98a169452ad305..37bf0a9de75cbe79794e653ff161e4a5eb37a97a 100644 (file)
@@ -441,8 +441,6 @@ prototypes:
        int (*iterate) (struct file *, struct dir_context *);
        int (*iterate_shared) (struct file *, struct dir_context *);
        __poll_t (*poll) (struct file *, struct poll_table_struct *);
-       struct wait_queue_head * (*get_poll_head)(struct file *, __poll_t);
-       __poll_t (*poll_mask) (struct file *, __poll_t);
        long (*unlocked_ioctl) (struct file *, unsigned int, unsigned long);
        long (*compat_ioctl) (struct file *, unsigned int, unsigned long);
        int (*mmap) (struct file *, struct vm_area_struct *);
@@ -473,7 +471,7 @@ prototypes:
 };
 
 locking rules:
-       All except for ->poll_mask may block.
+       All may block.
 
 ->llseek() locking has moved from llseek to the individual llseek
 implementations.  If your fs is not using generic_file_llseek, you
@@ -505,9 +503,6 @@ in sys_read() and friends.
 the lease within the individual filesystem to record the result of the
 operation
 
-->poll_mask can be called with or without the waitqueue lock for the waitqueue
-returned from ->get_poll_head.
-
 --------------------------- dquot_operations -------------------------------
 prototypes:
        int (*write_dquot) (struct dquot *);
index 829a7b7857a46904cfb7f02646212504a3a7f259..f608180ad59d71ab2bcc2d2d818699bfaaee1470 100644 (file)
@@ -857,8 +857,6 @@ struct file_operations {
        ssize_t (*write_iter) (struct kiocb *, struct iov_iter *);
        int (*iterate) (struct file *, struct dir_context *);
        __poll_t (*poll) (struct file *, struct poll_table_struct *);
-       struct wait_queue_head * (*get_poll_head)(struct file *, __poll_t);
-       __poll_t (*poll_mask) (struct file *, __poll_t);
        long (*unlocked_ioctl) (struct file *, unsigned int, unsigned long);
        long (*compat_ioctl) (struct file *, unsigned int, unsigned long);
        int (*mmap) (struct file *, struct vm_area_struct *);
@@ -903,17 +901,6 @@ otherwise noted.
        activity on this file and (optionally) go to sleep until there
        is activity. Called by the select(2) and poll(2) system calls
 
-  get_poll_head: Returns the struct wait_queue_head that callers can
-  wait on.  Callers need to check the returned events using ->poll_mask
-  once woken.  Can return NULL to indicate polling is not supported,
-  or any error code using the ERR_PTR convention to indicate that a
-  grave error occured and ->poll_mask shall not be called.
-
-  poll_mask: return the mask of EPOLL* values describing the file descriptor
-  state.  Called either before going to sleep on the waitqueue returned by
-  get_poll_head, or after it has been woken.  If ->get_poll_head and
-  ->poll_mask are implemented ->poll does not need to be implement.
-
   unlocked_ioctl: called by the ioctl(2) system call.
 
   compat_ioctl: called by the ioctl(2) system call when 32 bit system calls
index 3534a84d206caf324423a9422eb985b48c97813b..64e0775a62d4475ec378d033332b5099987954ff 100644 (file)
@@ -430,6 +430,12 @@ This sets the config program's title bar if the config program chooses
 to use it. It should be placed at the top of the configuration, before any
 other statement.
 
+'#' Kconfig source file comment:
+
+An unquoted '#' character anywhere in a source file line indicates
+the beginning of a source file comment.  The remainder of that line
+is a comment.
+
 
 Kconfig hints
 -------------
index d4d8370279254472ed812488ea61d4e3bd64651b..9708f5fa76de2deae7ddf562e757c3d9c4e90079 100644 (file)
@@ -1,3 +1,4 @@
+==============================================================
 Linux* Base Driver for the Intel(R) PRO/100 Family of Adapters
 ==============================================================
 
@@ -86,83 +87,84 @@ Event Log Message Level:  The driver uses the message level flag to log events
 Additional Configurations
 =========================
 
-  Configuring the Driver on Different Distributions
-  -------------------------------------------------
+Configuring the Driver on Different Distributions
+-------------------------------------------------
 
-  Configuring a network driver to load properly when the system is started is
-  distribution dependent. Typically, the configuration process involves adding
-  an alias line to /etc/modprobe.d/*.conf as well as editing other system
-  startup scripts and/or configuration files.  Many popular Linux
-  distributions ship with tools to make these changes for you. To learn the
-  proper way to configure a network device for your system, refer to your
-  distribution documentation.  If during this process you are asked for the
-  driver or module name, the name for the Linux Base Driver for the Intel
-  PRO/100 Family of Adapters is e100.
+Configuring a network driver to load properly when the system is started
+is distribution dependent.  Typically, the configuration process involves
+adding an alias line to /etc/modprobe.d/*.conf as well as editing other
+system startup scripts and/or configuration files.  Many popular Linux
+distributions ship with tools to make these changes for you.  To learn
+the proper way to configure a network device for your system, refer to
+your distribution documentation.  If during this process you are asked
+for the driver or module name, the name for the Linux Base Driver for
+the Intel PRO/100 Family of Adapters is e100.
 
-  As an example, if you install the e100 driver for two PRO/100 adapters
-  (eth0 and eth1), add the following to a configuration file in /etc/modprobe.d/
+As an example, if you install the e100 driver for two PRO/100 adapters
+(eth0 and eth1), add the following to a configuration file in
+/etc/modprobe.d/::
 
        alias eth0 e100
        alias eth1 e100
 
-  Viewing Link Messages
-  ---------------------
-  In order to see link messages and other Intel driver information on your
-  console, you must set the dmesg level up to six. This can be done by
-  entering the following on the command line before loading the e100 driver::
-
-       dmesg -n 6
+Viewing Link Messages
+---------------------
 
-  If you wish to see all messages issued by the driver, including debug
-  messages, set the dmesg level to eight.
+In order to see link messages and other Intel driver information on your
+console, you must set the dmesg level up to six.  This can be done by
+entering the following on the command line before loading the e100
+driver::
 
-  NOTE: This setting is not saved across reboots.
+       dmesg -n 6
 
+If you wish to see all messages issued by the driver, including debug
+messages, set the dmesg level to eight.
 
-  ethtool
-  -------
+NOTE: This setting is not saved across reboots.
 
-  The driver utilizes the ethtool interface for driver configuration and
-  diagnostics, as well as displaying statistical information.  The ethtool
-  version 1.6 or later is required for this functionality.
+ethtool
+-------
 
-  The latest release of ethtool can be found from
-  https://www.kernel.org/pub/software/network/ethtool/
+The driver utilizes the ethtool interface for driver configuration and
+diagnostics, as well as displaying statistical information.  The ethtool
+version 1.6 or later is required for this functionality.
 
-  Enabling Wake on LAN* (WoL)
-  ---------------------------
-  WoL is provided through the ethtool* utility.  For instructions on enabling
-  WoL with ethtool, refer to the ethtool man page.
+The latest release of ethtool can be found from
+https://www.kernel.org/pub/software/network/ethtool/
 
-  WoL will be enabled on the system during the next shut down or reboot. For
-  this driver version, in order to enable WoL, the e100 driver must be
-  loaded when shutting down or rebooting the system.
+Enabling Wake on LAN* (WoL)
+---------------------------
+WoL is provided through the ethtool* utility.  For instructions on
+enabling WoL with ethtool, refer to the ethtool man page.  WoL will be
+enabled on the system during the next shut down or reboot.  For this
+driver version, in order to enable WoL, the e100 driver must be loaded
+when shutting down or rebooting the system.
 
-  NAPI
-  ----
+NAPI
+----
 
-  NAPI (Rx polling mode) is supported in the e100 driver.
+NAPI (Rx polling mode) is supported in the e100 driver.
 
-  See https://wiki.linuxfoundation.org/networking/napi for more information
-  on NAPI.
+See https://wiki.linuxfoundation.org/networking/napi for more
+information on NAPI.
 
-  Multiple Interfaces on Same Ethernet Broadcast Network
-  ------------------------------------------------------
+Multiple Interfaces on Same Ethernet Broadcast Network
+------------------------------------------------------
 
-  Due to the default ARP behavior on Linux, it is not possible to have
-  one system on two IP networks in the same Ethernet broadcast domain
-  (non-partitioned switch) behave as expected. All Ethernet interfaces
-  will respond to IP traffic for any IP address assigned to the system.
-  This results in unbalanced receive traffic.
+Due to the default ARP behavior on Linux, it is not possible to have one
+system on two IP networks in the same Ethernet broadcast domain
+(non-partitioned switch) behave as expected.  All Ethernet interfaces
+will respond to IP traffic for any IP address assigned to the system.
+This results in unbalanced receive traffic.
 
-  If you have multiple interfaces in a server, either turn on ARP
-  filtering by
+If you have multiple interfaces in a server, either turn on ARP
+filtering by
 
-  (1) entering:: echo 1 > /proc/sys/net/ipv4/conf/all/arp_filter
-      (this only works if your kernel's version is higher than 2.4.5), or
+(1) entering:: echo 1 > /proc/sys/net/ipv4/conf/all/arp_filter
+    (this only works if your kernel's version is higher than 2.4.5), or
 
-  (2) installing the interfaces in separate broadcast domains (either
-      in different switches or in a switch partitioned to VLANs).
+(2) installing the interfaces in separate broadcast domains (either
+    in different switches or in a switch partitioned to VLANs).
 
 
 Support
index 616848940e63f7303633e0be67febc86bee6ac6f..144b87eef15341059b06655dcc1b0b65c5822b2a 100644 (file)
@@ -1,3 +1,4 @@
+===========================================================
 Linux* Base Driver for Intel(R) Ethernet Network Connection
 ===========================================================
 
@@ -354,57 +355,58 @@ previously mentioned to force the adapter to the same speed and duplex.
 Additional Configurations
 =========================
 
-  Jumbo Frames
-  ------------
-  Jumbo Frames support is enabled by changing the MTU to a value larger than
-  the default of 1500.  Use the ifconfig command to increase the MTU size.
-  For example::
+Jumbo Frames
+------------
+Jumbo Frames support is enabled by changing the MTU to a value larger
+than the default of 1500.  Use the ifconfig command to increase the MTU
+size.  For example::
 
        ifconfig eth<x> mtu 9000 up
 
-  This setting is not saved across reboots.  It can be made permanent if
-  you add::
+This setting is not saved across reboots.  It can be made permanent if
+you add::
 
        MTU=9000
 
-   to the file /etc/sysconfig/network-scripts/ifcfg-eth<x>.  This example
-   applies to the Red Hat distributions; other distributions may store this
-   setting in a different location.
+to the file /etc/sysconfig/network-scripts/ifcfg-eth<x>.  This example
+applies to the Red Hat distributions; other distributions may store this
+setting in a different location.
+
+Notes: Degradation in throughput performance may be observed in some
+Jumbo frames environments.  If this is observed, increasing the
+application's socket buffer size and/or increasing the
+/proc/sys/net/ipv4/tcp_*mem entry values may help.  See the specific
+application manual and /usr/src/linux*/Documentation/
+networking/ip-sysctl.txt for more details.
 
-  Notes:
-  Degradation in throughput performance may be observed in some Jumbo frames
-  environments. If this is observed, increasing the application's socket buffer
-  size and/or increasing the /proc/sys/net/ipv4/tcp_*mem entry values may help.
-  See the specific application manual and /usr/src/linux*/Documentation/
-  networking/ip-sysctl.txt for more details.
+- The maximum MTU setting for Jumbo Frames is 16110.  This value
+  coincides with the maximum Jumbo Frames size of 16128.
 
-  - The maximum MTU setting for Jumbo Frames is 16110.  This value coincides
-    with the maximum Jumbo Frames size of 16128.
+- Using Jumbo frames at 10 or 100 Mbps is not supported and may result
+  in poor performance or loss of link.
 
-  - Using Jumbo frames at 10 or 100 Mbps is not supported and may result in
-    poor performance or loss of link.
+- Adapters based on the Intel(R) 82542 and 82573V/E controller do not
+  support Jumbo Frames.  These correspond to the following product names:
+  Intel(R) PRO/1000 Gigabit Server Adapter Intel(R) PRO/1000 PM Network
+  Connection
 
-  - Adapters based on the Intel(R) 82542 and 82573V/E controller do not
-    support Jumbo Frames. These correspond to the following product names:
-     Intel(R) PRO/1000 Gigabit Server Adapter
-     Intel(R) PRO/1000 PM Network Connection
+ethtool
+-------
+The driver utilizes the ethtool interface for driver configuration and
+diagnostics, as well as displaying statistical information.  The ethtool
+version 1.6 or later is required for this functionality.
 
-  ethtool
-  -------
-  The driver utilizes the ethtool interface for driver configuration and
-  diagnostics, as well as displaying statistical information.  The ethtool
-  version 1.6 or later is required for this functionality.
+The latest release of ethtool can be found from
+https://www.kernel.org/pub/software/network/ethtool/
 
-  The latest release of ethtool can be found from
-  https://www.kernel.org/pub/software/network/ethtool/
+Enabling Wake on LAN* (WoL)
+---------------------------
+WoL is configured through the ethtool* utility.
 
-  Enabling Wake on LAN* (WoL)
-  ---------------------------
-  WoL is configured through the ethtool* utility.
+WoL will be enabled on the system during the next shut down or reboot.
+For this driver version, in order to enable WoL, the e1000 driver must be
+loaded when shutting down or rebooting the system.
 
-  WoL will be enabled on the system during the next shut down or reboot.
-  For this driver version, in order to enable WoL, the e1000 driver must be
-  loaded when shutting down or rebooting the system.
 
 Support
 =======
index 13081b3decefa834824b544182d0986e83bc50b4..a7d354ddda7baeb59760215cb41222e3b4698a8d 100644 (file)
@@ -48,7 +48,7 @@ void strp_pause(struct strparser *strp)
      Temporarily pause a stream parser. Message parsing is suspended
      and no new messages are delivered to the upper layer.
 
-void strp_pause(struct strparser *strp)
+void strp_unpause(struct strparser *strp)
 
      Unpause a paused stream parser.
 
index 635e57493709e16fbecc0235723dc742a608ae0e..b8cb38a98c1989eef926795b79b7399d65700135 100644 (file)
@@ -226,7 +226,7 @@ $ rm configs/<config name>.<number>/<function>
 where <config name>.<number> specify the configuration and <function> is
 a symlink to a function being removed from the configuration, e.g.:
 
-$ rm configfs/c.1/ncm.usb0
+$ rm configs/c.1/ncm.usb0
 
 ...
 ...
index 6cfd16790adda05a80c60c4e337a4f19f375e9c2..4a8c364a6af44ce1906090f625183f73fe94f4d0 100644 (file)
@@ -1256,11 +1256,6 @@ F:       arch/arm/mach-aspeed/
 F:     arch/arm/boot/dts/aspeed-*
 N:     aspeed
 
-ARM/ATMEL AT91 Clock Support
-M:     Boris Brezillon <boris.brezillon@bootlin.com>
-S:     Maintained
-F:     drivers/clk/at91
-
 ARM/CALXEDA HIGHBANK ARCHITECTURE
 M:     Rob Herring <robh@kernel.org>
 L:     linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
@@ -1442,6 +1437,16 @@ T:       git git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux.git
 F:     arch/arm/mach-imx/*vf610*
 F:     arch/arm/boot/dts/vf*
 
+ARM/FREESCALE LAYERSCAPE ARM ARCHITECTURE
+M:     Shawn Guo <shawnguo@kernel.org>
+M:     Li Yang <leoyang.li@nxp.com>
+L:     linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
+S:     Maintained
+T:     git git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux.git
+F:     arch/arm/boot/dts/ls1021a*
+F:     arch/arm64/boot/dts/freescale/fsl-*
+F:     arch/arm64/boot/dts/freescale/qoriq-*
+
 ARM/GLOMATION GESBC9312SX MACHINE SUPPORT
 M:     Lennert Buytenhek <kernel@wantstofly.org>
 L:     linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
@@ -2971,9 +2976,13 @@ N:       bcm585*
 N:     bcm586*
 N:     bcm88312
 N:     hr2
-F:     arch/arm64/boot/dts/broadcom/ns2*
+N:     stingray
+F:     arch/arm64/boot/dts/broadcom/northstar2/*
+F:     arch/arm64/boot/dts/broadcom/stingray/*
 F:     drivers/clk/bcm/clk-ns*
+F:     drivers/clk/bcm/clk-sr*
 F:     drivers/pinctrl/bcm/pinctrl-ns*
+F:     include/dt-bindings/clock/bcm-sr*
 
 BROADCOM KONA GPIO DRIVER
 M:     Ray Jui <rjui@broadcom.com>
@@ -5669,7 +5678,7 @@ F:        drivers/crypto/caam/
 F:     Documentation/devicetree/bindings/crypto/fsl-sec4.txt
 
 FREESCALE DIU FRAMEBUFFER DRIVER
-M:     Timur Tabi <timur@tabi.org>
+M:     Timur Tabi <timur@kernel.org>
 L:     linux-fbdev@vger.kernel.org
 S:     Maintained
 F:     drivers/video/fbdev/fsl-diu-fb.*
@@ -5769,7 +5778,7 @@ S:        Maintained
 F:     drivers/net/wan/fsl_ucc_hdlc*
 
 FREESCALE QUICC ENGINE UCC UART DRIVER
-M:     Timur Tabi <timur@tabi.org>
+M:     Timur Tabi <timur@kernel.org>
 L:     linuxppc-dev@lists.ozlabs.org
 S:     Maintained
 F:     drivers/tty/serial/ucc_uart.c
@@ -5793,7 +5802,7 @@ F:        drivers/net/ethernet/freescale/fs_enet/
 F:     include/linux/fs_enet_pd.h
 
 FREESCALE SOC SOUND DRIVERS
-M:     Timur Tabi <timur@tabi.org>
+M:     Timur Tabi <timur@kernel.org>
 M:     Nicolin Chen <nicoleotsuka@gmail.com>
 M:     Xiubo Li <Xiubo.Lee@gmail.com>
 R:     Fabio Estevam <fabio.estevam@nxp.com>
@@ -9882,6 +9891,7 @@ M:        Andrew Lunn <andrew@lunn.ch>
 M:     Vivien Didelot <vivien.didelot@savoirfairelinux.com>
 M:     Florian Fainelli <f.fainelli@gmail.com>
 S:     Maintained
+F:     Documentation/devicetree/bindings/net/dsa/
 F:     net/dsa/
 F:     include/net/dsa.h
 F:     include/linux/dsa/
@@ -10391,6 +10401,7 @@ F:      arch/arm/plat-omap/
 F:     arch/arm/configs/omap1_defconfig
 F:     drivers/i2c/busses/i2c-omap.c
 F:     include/linux/platform_data/i2c-omap.h
+F:     include/linux/platform_data/ams-delta-fiq.h
 
 OMAP2+ SUPPORT
 M:     Tony Lindgren <tony@atomide.com>
@@ -11476,6 +11487,15 @@ W:     http://wireless.kernel.org/en/users/Drivers/p54
 S:     Obsolete
 F:     drivers/net/wireless/intersil/prism54/
 
+PROC FILESYSTEM
+R:     Alexey Dobriyan <adobriyan@gmail.com>
+L:     linux-kernel@vger.kernel.org
+L:     linux-fsdevel@vger.kernel.org
+S:     Maintained
+F:     fs/proc/
+F:     include/linux/proc_fs.h
+F:     tools/testing/selftests/proc/
+
 PROC SYSCTL
 M:     "Luis R. Rodriguez" <mcgrof@kernel.org>
 M:     Kees Cook <keescook@chromium.org>
@@ -11808,9 +11828,9 @@ F:  Documentation/devicetree/bindings/opp/kryo-cpufreq.txt
 F:  drivers/cpufreq/qcom-cpufreq-kryo.c
 
 QUALCOMM EMAC GIGABIT ETHERNET DRIVER
-M:     Timur Tabi <timur@codeaurora.org>
+M:     Timur Tabi <timur@kernel.org>
 L:     netdev@vger.kernel.org
-S:     Supported
+S:     Maintained
 F:     drivers/net/ethernet/qualcomm/emac/
 
 QUALCOMM HEXAGON ARCHITECTURE
index c9132594860b5b40161fdbd68f11ff9ee782da3b..c5ce55cbc543c9c676580381f2a1cf727e8e7cd7 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -2,7 +2,7 @@
 VERSION = 4
 PATCHLEVEL = 18
 SUBLEVEL = 0
-EXTRAVERSION = -rc2
+EXTRAVERSION = -rc3
 NAME = Merciless Moray
 
 # *DOCUMENTATION*
index 54eeb8d00bc62a9f818aa9a833cbc15e7a1d9324..16fc89f7fd8aa4d540ce29c9c57798b6671c9b5e 100644 (file)
@@ -606,13 +606,16 @@ config ARCH_S3C24XX
 config ARCH_DAVINCI
        bool "TI DaVinci"
        select ARCH_HAS_HOLES_MEMORYMODEL
-       select CLKDEV_LOOKUP
+       select COMMON_CLK
        select CPU_ARM926T
        select GENERIC_ALLOCATOR
        select GENERIC_CLOCKEVENTS
        select GENERIC_IRQ_CHIP
        select GPIOLIB
        select HAVE_IDE
+       select PM_GENERIC_DOMAINS if PM
+       select PM_GENERIC_DOMAINS_OF if PM && OF
+       select RESET_CONTROLLER
        select USE_OF
        select ZONE_DMA
        help
@@ -1245,8 +1248,14 @@ config PCI
          VESA. If you have PCI, say Y, otherwise N.
 
 config PCI_DOMAINS
-       bool
+       bool "Support for multiple PCI domains"
        depends on PCI
+       help
+         Enable PCI domains kernel management. Say Y if your machine
+         has a PCI bus hierarchy that requires more than one PCI
+         domain (aka segment) to be correctly managed. Say N otherwise.
+
+         If you don't know what to do here, say N.
 
 config PCI_DOMAINS_GENERIC
        def_bool PCI_DOMAINS
index 693f84392f1ba0170cb8fb870b2ee9b8aa073d88..dd8db9582bdfb24fa17f9e443165337ddcc0609c 100644 (file)
@@ -207,6 +207,14 @@ choice
                depends on ARCH_BCM_HR2
                select DEBUG_UART_8250
 
+       config DEBUG_BCM_IPROC_UART3
+               bool "Kernel low-level debugging on BCM IPROC UART3"
+               depends on ARCH_BCM_CYGNUS
+               select DEBUG_UART_8250
+               help
+                 Say Y here if you want the debug print routines to direct
+                 their output to the third serial port on these devices.
+
        config DEBUG_BCM_KONA_UART
                bool "Kernel low-level debugging messages via BCM KONA UART"
                depends on ARCH_BCM_MOBILE
@@ -1565,14 +1573,15 @@ config DEBUG_UART_PHYS
        default 0x18000400 if DEBUG_BCM_HR2
        default 0x18010000 if DEBUG_SIRFATLAS7_UART0
        default 0x18020000 if DEBUG_SIRFATLAS7_UART1
+       default 0x18023000 if DEBUG_BCM_IPROC_UART3
        default 0x1c090000 if DEBUG_VEXPRESS_UART0_RS1
        default 0x20001000 if DEBUG_HIP01_UART
        default 0x20060000 if DEBUG_RK29_UART0
        default 0x20064000 if DEBUG_RK29_UART1 || DEBUG_RK3X_UART2
        default 0x20068000 if DEBUG_RK29_UART2 || DEBUG_RK3X_UART3
        default 0x20201000 if DEBUG_BCM2835
-       default 0x3f201000 if DEBUG_BCM2836
        default 0x3e000000 if DEBUG_BCM_KONA_UART
+       default 0x3f201000 if DEBUG_BCM2836
        default 0x4000e400 if DEBUG_LL_UART_EFM32
        default 0x40028000 if DEBUG_AT91_SAMV7_USART1
        default 0x40081000 if DEBUG_LPC18XX_UART0
@@ -1685,6 +1694,7 @@ config DEBUG_UART_VIRT
        default 0xf1002000 if DEBUG_MT8127_UART0
        default 0xf1006000 if DEBUG_MT6589_UART0
        default 0xf1009000 if DEBUG_MT8135_UART3
+       default 0xf1023000 if DEBUG_BCM_IPROC_UART3
        default 0xf11f1000 if DEBUG_VERSATILE
        default 0xf1600000 if DEBUG_INTEGRATOR
        default 0xf1c28000 if DEBUG_SUNXI_UART0
@@ -1800,7 +1810,7 @@ config DEBUG_UART_8250_WORD
                DEBUG_KEYSTONE_UART0 || DEBUG_KEYSTONE_UART1 || \
                DEBUG_ALPINE_UART0 || \
                DEBUG_DAVINCI_DMx_UART0 || DEBUG_DAVINCI_DA8XX_UART1 || \
-               DEBUG_DAVINCI_DA8XX_UART2 || \
+               DEBUG_DAVINCI_DA8XX_UART2 || DEBUG_BCM_IPROC_UART3 || \
                DEBUG_BCM_KONA_UART || DEBUG_RK32_UART2
 
 config DEBUG_UART_8250_PALMCHIP
index 6782ce481ac967ded05bbfc124355aa894790d6f..d8769956cbfcff7b4a38e72959ba8b88f397a1c0 100644 (file)
                                              3700 5
                                              3900 6
                                              4000 7>;
-                       cooling-cells = <2>;
+                       #cooling-cells = <2>;
                };
 
                gpio-leds {
index 9fe4f5a6379e3b60d79a6ed8a0327f680434861e..2c4df2d2d4a6e1165fe27565a19d681c47a32cfa 100644 (file)
                        reg = <0x18008000 0x100>;
                        #address-cells = <1>;
                        #size-cells = <0>;
-                       interrupts = <GIC_SPI 85 IRQ_TYPE_NONE>;
+                       interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
                        clock-frequency = <100000>;
                        status = "disabled";
                };
                        reg = <0x1800b000 0x100>;
                        #address-cells = <1>;
                        #size-cells = <0>;
-                       interrupts = <GIC_SPI 86 IRQ_TYPE_NONE>;
+                       interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
                        clock-frequency = <100000>;
                        status = "disabled";
                };
 
                        #interrupt-cells = <1>;
                        interrupt-map-mask = <0 0 0 0>;
-                       interrupt-map = <0 0 0 0 &gic GIC_SPI 100 IRQ_TYPE_NONE>;
+                       interrupt-map = <0 0 0 0 &gic GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
 
                        linux,pci-domain = <0>;
 
                                compatible = "brcm,iproc-msi";
                                msi-controller;
                                interrupt-parent = <&gic>;
-                               interrupts = <GIC_SPI 96 IRQ_TYPE_NONE>,
-                                            <GIC_SPI 97 IRQ_TYPE_NONE>,
-                                            <GIC_SPI 98 IRQ_TYPE_NONE>,
-                                            <GIC_SPI 99 IRQ_TYPE_NONE>;
+                               interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
+                                            <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
+                                            <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
+                                            <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
                        };
                };
 
 
                        #interrupt-cells = <1>;
                        interrupt-map-mask = <0 0 0 0>;
-                       interrupt-map = <0 0 0 0 &gic GIC_SPI 106 IRQ_TYPE_NONE>;
+                       interrupt-map = <0 0 0 0 &gic GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
 
                        linux,pci-domain = <1>;
 
                                compatible = "brcm,iproc-msi";
                                msi-controller;
                                interrupt-parent = <&gic>;
-                               interrupts = <GIC_SPI 102 IRQ_TYPE_NONE>,
-                                            <GIC_SPI 103 IRQ_TYPE_NONE>,
-                                            <GIC_SPI 104 IRQ_TYPE_NONE>,
-                                            <GIC_SPI 105 IRQ_TYPE_NONE>;
+                               interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
+                                            <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
+                                            <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
+                                            <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
                        };
                };
 
index 3f9cedd8011f0c22fb05b6a50d1705fc5ceab05d..3084a7c957339f0edc2fef97d203b08635c96790 100644 (file)
                        reg = <0x38000 0x50>;
                        #address-cells = <1>;
                        #size-cells = <0>;
-                       interrupts = <GIC_SPI 95 IRQ_TYPE_NONE>;
+                       interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
                        clock-frequency = <100000>;
                };
 
                        reg = <0x3b000 0x50>;
                        #address-cells = <1>;
                        #size-cells = <0>;
-                       interrupts = <GIC_SPI 96 IRQ_TYPE_NONE>;
+                       interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
                        clock-frequency = <100000>;
                };
        };
 
                #interrupt-cells = <1>;
                interrupt-map-mask = <0 0 0 0>;
-               interrupt-map = <0 0 0 0 &gic GIC_SPI 186 IRQ_TYPE_NONE>;
+               interrupt-map = <0 0 0 0 &gic GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
 
                linux,pci-domain = <0>;
 
                        compatible = "brcm,iproc-msi";
                        msi-controller;
                        interrupt-parent = <&gic>;
-                       interrupts = <GIC_SPI 182 IRQ_TYPE_NONE>,
-                                    <GIC_SPI 183 IRQ_TYPE_NONE>,
-                                    <GIC_SPI 184 IRQ_TYPE_NONE>,
-                                    <GIC_SPI 185 IRQ_TYPE_NONE>;
+                       interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>;
                        brcm,pcie-msi-inten;
                };
        };
 
                #interrupt-cells = <1>;
                interrupt-map-mask = <0 0 0 0>;
-               interrupt-map = <0 0 0 0 &gic GIC_SPI 192 IRQ_TYPE_NONE>;
+               interrupt-map = <0 0 0 0 &gic GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
 
                linux,pci-domain = <1>;
 
                        compatible = "brcm,iproc-msi";
                        msi-controller;
                        interrupt-parent = <&gic>;
-                       interrupts = <GIC_SPI 188 IRQ_TYPE_NONE>,
-                                    <GIC_SPI 189 IRQ_TYPE_NONE>,
-                                    <GIC_SPI 190 IRQ_TYPE_NONE>,
-                                    <GIC_SPI 191 IRQ_TYPE_NONE>;
+                       interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
                        brcm,pcie-msi-inten;
                };
        };
index dcc55aa84583cdd18f7ef6ecd780eb947be1ef1f..09ba8504632284532e3b17c6d1531e2d732fadc4 100644 (file)
                        reg = <0x38000 0x50>;
                        #address-cells = <1>;
                        #size-cells = <0>;
-                       interrupts = <GIC_SPI 89 IRQ_TYPE_NONE>;
+                       interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
                        clock-frequency = <100000>;
                        dma-coherent;
                        status = "disabled";
 
                #interrupt-cells = <1>;
                interrupt-map-mask = <0 0 0 0>;
-               interrupt-map = <0 0 0 0 &gic GIC_SPI 131 IRQ_TYPE_NONE>;
+               interrupt-map = <0 0 0 0 &gic GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
 
                linux,pci-domain = <0>;
 
                        compatible = "brcm,iproc-msi";
                        msi-controller;
                        interrupt-parent = <&gic>;
-                       interrupts = <GIC_SPI 127 IRQ_TYPE_NONE>,
-                                    <GIC_SPI 128 IRQ_TYPE_NONE>,
-                                    <GIC_SPI 129 IRQ_TYPE_NONE>,
-                                    <GIC_SPI 130 IRQ_TYPE_NONE>;
+                       interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
                        brcm,pcie-msi-inten;
                };
        };
 
                #interrupt-cells = <1>;
                interrupt-map-mask = <0 0 0 0>;
-               interrupt-map = <0 0 0 0 &gic GIC_SPI 137 IRQ_TYPE_NONE>;
+               interrupt-map = <0 0 0 0 &gic GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
 
                linux,pci-domain = <1>;
 
                        compatible = "brcm,iproc-msi";
                        msi-controller;
                        interrupt-parent = <&gic>;
-                       interrupts = <GIC_SPI 133 IRQ_TYPE_NONE>,
-                                    <GIC_SPI 134 IRQ_TYPE_NONE>,
-                                    <GIC_SPI 135 IRQ_TYPE_NONE>,
-                                    <GIC_SPI 136 IRQ_TYPE_NONE>;
+                       interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
                        brcm,pcie-msi-inten;
                };
        };
 
                #interrupt-cells = <1>;
                interrupt-map-mask = <0 0 0 0>;
-               interrupt-map = <0 0 0 0 &gic GIC_SPI 143 IRQ_TYPE_NONE>;
+               interrupt-map = <0 0 0 0 &gic GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
 
                linux,pci-domain = <2>;
 
                        compatible = "brcm,iproc-msi";
                        msi-controller;
                        interrupt-parent = <&gic>;
-                       interrupts = <GIC_SPI 139 IRQ_TYPE_NONE>,
-                                    <GIC_SPI 140 IRQ_TYPE_NONE>,
-                                    <GIC_SPI 141 IRQ_TYPE_NONE>,
-                                    <GIC_SPI 142 IRQ_TYPE_NONE>;
+                       interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>;
                        brcm,pcie-msi-inten;
                };
        };
index 9a076c409f4ed35fcf5fbe79807ede6e7e8466d5..ef995e50ee12bfd8b3d90d9e07062a41e04f4ff3 100644 (file)
        i2c0: i2c@18009000 {
                compatible = "brcm,iproc-i2c";
                reg = <0x18009000 0x50>;
-               interrupts = <GIC_SPI 121 IRQ_TYPE_NONE>;
+               interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
                #address-cells = <1>;
                #size-cells = <0>;
                clock-frequency = <100000>;
index f6f1597b03df931a1dea057921a43cea9f929a31..0f4f817a9e229c58f973f935a6f5906b1e0f8979 100644 (file)
                        gpio-controller;
                        #gpio-cells = <2>;
                        reg = <0x226000 0x1000>;
-                       interrupts = <42 IRQ_TYPE_EDGE_BOTH
-                               43 IRQ_TYPE_EDGE_BOTH 44 IRQ_TYPE_EDGE_BOTH
-                               45 IRQ_TYPE_EDGE_BOTH 46 IRQ_TYPE_EDGE_BOTH
-                               47 IRQ_TYPE_EDGE_BOTH 48 IRQ_TYPE_EDGE_BOTH
-                               49 IRQ_TYPE_EDGE_BOTH 50 IRQ_TYPE_EDGE_BOTH>;
+                       interrupts = <42 43 44 45 46 47 48 49 50>;
                        ti,ngpio = <144>;
                        ti,davinci-gpio-unbanked = <0>;
                        status = "disabled";
index 70483ce72ba6cf648809acb7f24be3af11817674..77f8f030dd0772aba631f57b704a7e60a9bd0532 100644 (file)
@@ -90,7 +90,7 @@
                                        clocks = <&clks IMX6Q_CLK_ECSPI5>,
                                                 <&clks IMX6Q_CLK_ECSPI5>;
                                        clock-names = "ipg", "per";
-                                       dmas = <&sdma 11 7 1>, <&sdma 12 7 2>;
+                                       dmas = <&sdma 11 8 1>, <&sdma 12 8 2>;
                                        dma-names = "rx", "tx";
                                        status = "disabled";
                                };
index d8b94f47498b67051ade669f23d2796a0b1e7433..4e4a55aad5c9ca9aa6fff90deb0ae1c5e99c3a13 100644 (file)
                        ranges = <0x81000000 0 0          0x08f80000 0 0x00010000 /* downstream I/O */
                                  0x82000000 0 0x08000000 0x08000000 0 0x00f00000>; /* non-prefetchable memory */
                        num-lanes = <1>;
-                       interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
                        interrupt-names = "msi";
                        #interrupt-cells = <1>;
                        interrupt-map-mask = <0 0 0 0x7>;
index 486d4e7433ed32d2662fabcf9b25fe54eab0f187..b38f8c24055800c45e1e81aef451f08ac9e27be5 100644 (file)
                nand0: nand@ff900000 {
                        #address-cells = <0x1>;
                        #size-cells = <0x1>;
-                       compatible = "denali,denali-nand-dt";
+                       compatible = "altr,socfpga-denali-nand";
                        reg = <0xff900000 0x100000>,
                              <0xffb80000 0x10000>;
                        reg-names = "nand_data", "denali_reg";
                        interrupts = <0x0 0x90 0x4>;
                        dma-mask = <0xffffffff>;
-                       clocks = <&nand_clk>;
+                       clocks = <&nand_x_clk>;
                        status = "disabled";
                };
 
index bead79e4b2aa2b624b8f7d21cef4751d6536b724..791ca15c799eba98850cbc3d4b96be7a509c422f 100644 (file)
                        #size-cells = <0>;
                        reg = <0xffda5000 0x100>;
                        interrupts = <0 102 4>;
-                       num-chipselect = <4>;
-                       bus-num = <0>;
+                       num-cs = <4>;
                        /*32bit_access;*/
                        tx-dma-channel = <&pdma 16>;
                        rx-dma-channel = <&pdma 17>;
                nand: nand@ffb90000 {
                        #address-cells = <1>;
                        #size-cells = <1>;
-                       compatible = "denali,denali-nand-dt", "altr,socfpga-denali-nand";
+                       compatible = "altr,socfpga-denali-nand";
                        reg = <0xffb90000 0x72000>,
                              <0xffb80000 0x10000>;
                        reg-names = "nand_data", "denali_reg";
index 1e9f7af8f70ff6ba23d9403f930f09dd6e0dda7e..3157be413297e5d22ad3174e2082b5199fc3083c 100644 (file)
@@ -10,7 +10,7 @@ obj-$(CONFIG_DMABOUNCE)               += dmabounce.o
 obj-$(CONFIG_SHARP_LOCOMO)     += locomo.o
 obj-$(CONFIG_SHARP_PARAM)      += sharpsl_param.o
 obj-$(CONFIG_SHARP_SCOOP)      += scoop.o
-obj-$(CONFIG_SMP)              += secure_cntvoff.o
+obj-$(CONFIG_CPU_V7)           += secure_cntvoff.o
 obj-$(CONFIG_PCI_HOST_ITE8152)  += it8152.o
 obj-$(CONFIG_MCPM)             += mcpm_head.o mcpm_entry.o mcpm_platsmp.o vlock.o
 CFLAGS_REMOVE_mcpm_entry.o     = -pg
index 7e1c543162c3ab16f11f6be6ccec5a16abae31d0..8f6be19825456496ef471b3b03a78d32354d9736 100644 (file)
@@ -1,5 +1,4 @@
 CONFIG_SYSVIPC=y
-CONFIG_FHANDLE=y
 CONFIG_NO_HZ=y
 CONFIG_HIGH_RES_TIMERS=y
 CONFIG_CGROUPS=y
@@ -10,20 +9,10 @@ CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
 CONFIG_PARTITION_ADVANCED=y
 CONFIG_CMDLINE_PARTITION=y
-CONFIG_ARCH_MULTI_V7=y
-# CONFIG_ARCH_MULTI_V5 is not set
-# CONFIG_ARCH_MULTI_V4 is not set
 CONFIG_ARCH_VIRT=y
 CONFIG_ARCH_ALPINE=y
 CONFIG_ARCH_ARTPEC=y
 CONFIG_MACH_ARTPEC6=y
-CONFIG_ARCH_MVEBU=y
-CONFIG_MACH_ARMADA_370=y
-CONFIG_MACH_ARMADA_375=y
-CONFIG_MACH_ARMADA_38X=y
-CONFIG_MACH_ARMADA_39X=y
-CONFIG_MACH_ARMADA_XP=y
-CONFIG_MACH_DOVE=y
 CONFIG_ARCH_AT91=y
 CONFIG_SOC_SAMA5D2=y
 CONFIG_SOC_SAMA5D3=y
@@ -32,9 +21,9 @@ CONFIG_ARCH_BCM=y
 CONFIG_ARCH_BCM_CYGNUS=y
 CONFIG_ARCH_BCM_HR2=y
 CONFIG_ARCH_BCM_NSP=y
-CONFIG_ARCH_BCM_21664=y
-CONFIG_ARCH_BCM_281XX=y
 CONFIG_ARCH_BCM_5301X=y
+CONFIG_ARCH_BCM_281XX=y
+CONFIG_ARCH_BCM_21664=y
 CONFIG_ARCH_BCM2835=y
 CONFIG_ARCH_BCM_63XX=y
 CONFIG_ARCH_BRCMSTB=y
@@ -43,14 +32,14 @@ CONFIG_MACH_BERLIN_BG2=y
 CONFIG_MACH_BERLIN_BG2CD=y
 CONFIG_MACH_BERLIN_BG2Q=y
 CONFIG_ARCH_DIGICOLOR=y
+CONFIG_ARCH_EXYNOS=y
+CONFIG_EXYNOS5420_MCPM=y
 CONFIG_ARCH_HIGHBANK=y
 CONFIG_ARCH_HISI=y
 CONFIG_ARCH_HI3xxx=y
-CONFIG_ARCH_HIX5HD2=y
 CONFIG_ARCH_HIP01=y
 CONFIG_ARCH_HIP04=y
-CONFIG_ARCH_KEYSTONE=y
-CONFIG_ARCH_MESON=y
+CONFIG_ARCH_HIX5HD2=y
 CONFIG_ARCH_MXC=y
 CONFIG_SOC_IMX50=y
 CONFIG_SOC_IMX51=y
@@ -60,29 +49,30 @@ CONFIG_SOC_IMX6SL=y
 CONFIG_SOC_IMX6SX=y
 CONFIG_SOC_IMX6UL=y
 CONFIG_SOC_IMX7D=y
-CONFIG_SOC_VF610=y
 CONFIG_SOC_LS1021A=y
+CONFIG_SOC_VF610=y
+CONFIG_ARCH_KEYSTONE=y
+CONFIG_ARCH_MEDIATEK=y
+CONFIG_ARCH_MESON=y
+CONFIG_ARCH_MVEBU=y
+CONFIG_MACH_ARMADA_370=y
+CONFIG_MACH_ARMADA_375=y
+CONFIG_MACH_ARMADA_38X=y
+CONFIG_MACH_ARMADA_39X=y
+CONFIG_MACH_ARMADA_XP=y
+CONFIG_MACH_DOVE=y
 CONFIG_ARCH_OMAP3=y
 CONFIG_ARCH_OMAP4=y
 CONFIG_SOC_OMAP5=y
 CONFIG_SOC_AM33XX=y
 CONFIG_SOC_AM43XX=y
 CONFIG_SOC_DRA7XX=y
+CONFIG_ARCH_SIRF=y
 CONFIG_ARCH_QCOM=y
-CONFIG_ARCH_MEDIATEK=y
 CONFIG_ARCH_MSM8X60=y
 CONFIG_ARCH_MSM8960=y
 CONFIG_ARCH_MSM8974=y
 CONFIG_ARCH_ROCKCHIP=y
-CONFIG_ARCH_SOCFPGA=y
-CONFIG_PLAT_SPEAR=y
-CONFIG_ARCH_SPEAR13XX=y
-CONFIG_MACH_SPEAR1310=y
-CONFIG_MACH_SPEAR1340=y
-CONFIG_ARCH_STI=y
-CONFIG_ARCH_STM32=y
-CONFIG_ARCH_EXYNOS=y
-CONFIG_EXYNOS5420_MCPM=y
 CONFIG_ARCH_RENESAS=y
 CONFIG_ARCH_EMEV2=y
 CONFIG_ARCH_R7S72100=y
@@ -99,40 +89,33 @@ CONFIG_ARCH_R8A7792=y
 CONFIG_ARCH_R8A7793=y
 CONFIG_ARCH_R8A7794=y
 CONFIG_ARCH_SH73A0=y
+CONFIG_ARCH_SOCFPGA=y
+CONFIG_PLAT_SPEAR=y
+CONFIG_ARCH_SPEAR13XX=y
+CONFIG_MACH_SPEAR1310=y
+CONFIG_MACH_SPEAR1340=y
+CONFIG_ARCH_STI=y
+CONFIG_ARCH_STM32=y
 CONFIG_ARCH_SUNXI=y
-CONFIG_ARCH_SIRF=y
 CONFIG_ARCH_TEGRA=y
-CONFIG_ARCH_TEGRA_2x_SOC=y
-CONFIG_ARCH_TEGRA_3x_SOC=y
-CONFIG_ARCH_TEGRA_114_SOC=y
-CONFIG_ARCH_TEGRA_124_SOC=y
 CONFIG_ARCH_UNIPHIER=y
 CONFIG_ARCH_U8500=y
-CONFIG_MACH_HREFV60=y
-CONFIG_MACH_SNOWBALL=y
 CONFIG_ARCH_VEXPRESS=y
 CONFIG_ARCH_VEXPRESS_TC2_PM=y
 CONFIG_ARCH_WM8850=y
 CONFIG_ARCH_ZYNQ=y
-CONFIG_TRUSTED_FOUNDATIONS=y
-CONFIG_PCI=y
-CONFIG_PCI_HOST_GENERIC=y
-CONFIG_PCI_DRA7XX=y
-CONFIG_PCI_DRA7XX_EP=y
-CONFIG_PCI_KEYSTONE=y
-CONFIG_PCI_MSI=y
+CONFIG_PCIEPORTBUS=y
 CONFIG_PCI_MVEBU=y
 CONFIG_PCI_TEGRA=y
 CONFIG_PCI_RCAR_GEN2=y
 CONFIG_PCIE_RCAR=y
-CONFIG_PCIEPORTBUS=y
+CONFIG_PCI_DRA7XX_EP=y
+CONFIG_PCI_KEYSTONE=y
 CONFIG_PCI_ENDPOINT=y
 CONFIG_PCI_ENDPOINT_CONFIGFS=y
 CONFIG_PCI_EPF_TEST=m
 CONFIG_SMP=y
 CONFIG_NR_CPUS=16
-CONFIG_HIGHPTE=y
-CONFIG_CMA=y
 CONFIG_SECCOMP=y
 CONFIG_ARM_APPENDED_DTB=y
 CONFIG_ARM_ATAG_DTB_COMPAT=y
@@ -145,14 +128,14 @@ CONFIG_CPU_FREQ_GOV_POWERSAVE=m
 CONFIG_CPU_FREQ_GOV_USERSPACE=m
 CONFIG_CPU_FREQ_GOV_CONSERVATIVE=m
 CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
+CONFIG_CPUFREQ_DT=y
 CONFIG_ARM_IMX6Q_CPUFREQ=y
 CONFIG_QORIQ_CPUFREQ=y
 CONFIG_CPU_IDLE=y
 CONFIG_ARM_CPUIDLE=y
-CONFIG_NEON=y
-CONFIG_KERNEL_MODE_NEON=y
 CONFIG_ARM_ZYNQ_CPUIDLE=y
 CONFIG_ARM_EXYNOS_CPUIDLE=y
+CONFIG_KERNEL_MODE_NEON=y
 CONFIG_NET=y
 CONFIG_PACKET=y
 CONFIG_UNIX=y
@@ -170,23 +153,13 @@ CONFIG_IPV6_MIP6=m
 CONFIG_IPV6_TUNNEL=m
 CONFIG_IPV6_MULTIPLE_TABLES=y
 CONFIG_NET_DSA=m
-CONFIG_NET_SWITCHDEV=y
 CONFIG_CAN=y
-CONFIG_CAN_RAW=y
-CONFIG_CAN_BCM=y
-CONFIG_CAN_DEV=y
 CONFIG_CAN_AT91=m
 CONFIG_CAN_FLEXCAN=m
-CONFIG_CAN_RCAR=m
+CONFIG_CAN_SUN4I=y
 CONFIG_CAN_XILINXCAN=y
+CONFIG_CAN_RCAR=m
 CONFIG_CAN_MCP251X=y
-CONFIG_NET_DSA_BCM_SF2=m
-CONFIG_B53=m
-CONFIG_B53_SPI_DRIVER=m
-CONFIG_B53_MDIO_DRIVER=m
-CONFIG_B53_MMAP_DRIVER=m
-CONFIG_B53_SRAB_DRIVER=m
-CONFIG_CAN_SUN4I=y
 CONFIG_BT=m
 CONFIG_BT_HCIUART=m
 CONFIG_BT_HCIUART_BCM=y
@@ -199,11 +172,9 @@ CONFIG_RFKILL_INPUT=y
 CONFIG_RFKILL_GPIO=y
 CONFIG_DEVTMPFS=y
 CONFIG_DEVTMPFS_MOUNT=y
-CONFIG_DMA_CMA=y
 CONFIG_CMA_SIZE_MBYTES=64
 CONFIG_OMAP_OCP2SCP=y
 CONFIG_SIMPLE_PM_BUS=y
-CONFIG_SUNXI_RSB=y
 CONFIG_MTD=y
 CONFIG_MTD_CMDLINE_PARTS=y
 CONFIG_MTD_BLOCK=y
@@ -236,7 +207,6 @@ CONFIG_PCI_ENDPOINT_TEST=m
 CONFIG_EEPROM_AT24=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_BLK_DEV_SR=y
-CONFIG_SCSI_MULTI_LUN=y
 CONFIG_ATA=y
 CONFIG_SATA_AHCI=y
 CONFIG_SATA_AHCI_PLATFORM=y
@@ -251,14 +221,20 @@ CONFIG_SATA_MV=y
 CONFIG_SATA_RCAR=y
 CONFIG_NETDEVICES=y
 CONFIG_VIRTIO_NET=y
-CONFIG_HIX5HD2_GMAC=y
+CONFIG_B53_SPI_DRIVER=m
+CONFIG_B53_MDIO_DRIVER=m
+CONFIG_B53_MMAP_DRIVER=m
+CONFIG_B53_SRAB_DRIVER=m
+CONFIG_NET_DSA_BCM_SF2=m
 CONFIG_SUN4I_EMAC=y
-CONFIG_MACB=y
 CONFIG_BCMGENET=m
 CONFIG_BGMAC_BCMA=y
 CONFIG_SYSTEMPORT=m
+CONFIG_MACB=y
 CONFIG_NET_CALXEDA_XGMAC=y
 CONFIG_GIANFAR=y
+CONFIG_HIX5HD2_GMAC=y
+CONFIG_E1000E=y
 CONFIG_IGB=y
 CONFIG_MV643XX_ETH=y
 CONFIG_MVNETA=y
@@ -268,19 +244,17 @@ CONFIG_R8169=y
 CONFIG_SH_ETH=y
 CONFIG_SMSC911X=y
 CONFIG_STMMAC_ETH=y
-CONFIG_STMMAC_PLATFORM=y
 CONFIG_DWMAC_DWC_QOS_ETH=y
 CONFIG_TI_CPSW=y
 CONFIG_XILINX_EMACLITE=y
 CONFIG_AT803X_PHY=y
-CONFIG_MARVELL_PHY=y
-CONFIG_SMSC_PHY=y
 CONFIG_BROADCOM_PHY=y
 CONFIG_ICPLUS_PHY=y
-CONFIG_REALTEK_PHY=y
+CONFIG_MARVELL_PHY=y
 CONFIG_MICREL_PHY=y
-CONFIG_FIXED_PHY=y
+CONFIG_REALTEK_PHY=y
 CONFIG_ROCKCHIP_PHY=y
+CONFIG_SMSC_PHY=y
 CONFIG_USB_PEGASUS=y
 CONFIG_USB_RTL8152=m
 CONFIG_USB_LAN78XX=m
@@ -288,29 +262,29 @@ CONFIG_USB_USBNET=y
 CONFIG_USB_NET_SMSC75XX=y
 CONFIG_USB_NET_SMSC95XX=y
 CONFIG_BRCMFMAC=m
-CONFIG_RT2X00=m
-CONFIG_RT2800USB=m
 CONFIG_MWIFIEX=m
 CONFIG_MWIFIEX_SDIO=m
+CONFIG_RT2X00=m
+CONFIG_RT2800USB=m
 CONFIG_INPUT_JOYDEV=y
 CONFIG_INPUT_EVDEV=y
 CONFIG_KEYBOARD_QT1070=m
 CONFIG_KEYBOARD_GPIO=y
 CONFIG_KEYBOARD_TEGRA=y
-CONFIG_KEYBOARD_SPEAR=y
+CONFIG_KEYBOARD_SAMSUNG=m
 CONFIG_KEYBOARD_ST_KEYSCAN=y
+CONFIG_KEYBOARD_SPEAR=y
 CONFIG_KEYBOARD_CROS_EC=m
-CONFIG_KEYBOARD_SAMSUNG=m
 CONFIG_MOUSE_PS2_ELANTECH=y
 CONFIG_MOUSE_CYAPA=m
 CONFIG_MOUSE_ELAN_I2C=y
 CONFIG_INPUT_TOUCHSCREEN=y
 CONFIG_TOUCHSCREEN_ATMEL_MXT=m
 CONFIG_TOUCHSCREEN_MMS114=m
+CONFIG_TOUCHSCREEN_WM97XX=m
 CONFIG_TOUCHSCREEN_ST1232=m
 CONFIG_TOUCHSCREEN_STMPE=y
 CONFIG_TOUCHSCREEN_SUN4I=y
-CONFIG_TOUCHSCREEN_WM97XX=m
 CONFIG_INPUT_MISC=y
 CONFIG_INPUT_MAX77693_HAPTIC=m
 CONFIG_INPUT_MAX8997_HAPTIC=m
@@ -327,13 +301,12 @@ CONFIG_SERIAL_8250_DW=y
 CONFIG_SERIAL_8250_EM=y
 CONFIG_SERIAL_8250_MT6577=y
 CONFIG_SERIAL_8250_UNIPHIER=y
+CONFIG_SERIAL_OF_PLATFORM=y
 CONFIG_SERIAL_AMBA_PL011=y
 CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
 CONFIG_SERIAL_ATMEL=y
 CONFIG_SERIAL_ATMEL_CONSOLE=y
 CONFIG_SERIAL_ATMEL_TTYAT=y
-CONFIG_SERIAL_BCM63XX=y
-CONFIG_SERIAL_BCM63XX_CONSOLE=y
 CONFIG_SERIAL_MESON=y
 CONFIG_SERIAL_MESON_CONSOLE=y
 CONFIG_SERIAL_SAMSUNG=y
@@ -345,15 +318,14 @@ CONFIG_SERIAL_IMX=y
 CONFIG_SERIAL_IMX_CONSOLE=y
 CONFIG_SERIAL_SH_SCI=y
 CONFIG_SERIAL_SH_SCI_NR_UARTS=20
-CONFIG_SERIAL_SH_SCI_CONSOLE=y
-CONFIG_SERIAL_SH_SCI_DMA=y
 CONFIG_SERIAL_MSM=y
 CONFIG_SERIAL_MSM_CONSOLE=y
 CONFIG_SERIAL_VT8500=y
 CONFIG_SERIAL_VT8500_CONSOLE=y
-CONFIG_SERIAL_OF_PLATFORM=y
 CONFIG_SERIAL_OMAP=y
 CONFIG_SERIAL_OMAP_CONSOLE=y
+CONFIG_SERIAL_BCM63XX=y
+CONFIG_SERIAL_BCM63XX_CONSOLE=y
 CONFIG_SERIAL_XILINX_PS_UART=y
 CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y
 CONFIG_SERIAL_FSL_LPUART=y
@@ -365,12 +337,10 @@ CONFIG_SERIAL_ST_ASC_CONSOLE=y
 CONFIG_SERIAL_STM32=y
 CONFIG_SERIAL_STM32_CONSOLE=y
 CONFIG_SERIAL_DEV_BUS=y
-CONFIG_HVC_DRIVER=y
 CONFIG_VIRTIO_CONSOLE=y
+CONFIG_HW_RANDOM=y
+CONFIG_HW_RANDOM_ST=y
 CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_DAVINCI=y
-CONFIG_I2C_MESON=y
-CONFIG_I2C_MUX=y
 CONFIG_I2C_ARB_GPIO_CHALLENGE=m
 CONFIG_I2C_MUX_PCA954x=y
 CONFIG_I2C_MUX_PINCTRL=y
@@ -378,12 +348,13 @@ CONFIG_I2C_DEMUX_PINCTRL=y
 CONFIG_I2C_AT91=m
 CONFIG_I2C_BCM2835=y
 CONFIG_I2C_CADENCE=y
+CONFIG_I2C_DAVINCI=y
 CONFIG_I2C_DESIGNWARE_PLATFORM=y
 CONFIG_I2C_DIGICOLOR=m
 CONFIG_I2C_EMEV2=m
 CONFIG_I2C_GPIO=m
-CONFIG_I2C_EXYNOS5=y
 CONFIG_I2C_IMX=y
+CONFIG_I2C_MESON=y
 CONFIG_I2C_MV64XXX=y
 CONFIG_I2C_RIIC=y
 CONFIG_I2C_RK3X=y
@@ -427,7 +398,6 @@ CONFIG_SPI_SPIDEV=y
 CONFIG_SPMI=y
 CONFIG_PINCTRL_AS3722=y
 CONFIG_PINCTRL_PALMAS=y
-CONFIG_PINCTRL_BCM2835=y
 CONFIG_PINCTRL_APQ8064=y
 CONFIG_PINCTRL_APQ8084=y
 CONFIG_PINCTRL_IPQ8064=y
@@ -437,25 +407,33 @@ CONFIG_PINCTRL_MSM8X74=y
 CONFIG_PINCTRL_MSM8916=y
 CONFIG_PINCTRL_QCOM_SPMI_PMIC=y
 CONFIG_PINCTRL_QCOM_SSBI_PMIC=y
-CONFIG_GPIO_GENERIC_PLATFORM=y
 CONFIG_GPIO_DAVINCI=y
 CONFIG_GPIO_DWAPB=y
 CONFIG_GPIO_EM=y
 CONFIG_GPIO_RCAR=y
+CONFIG_GPIO_SYSCON=y
 CONFIG_GPIO_UNIPHIER=y
 CONFIG_GPIO_XILINX=y
 CONFIG_GPIO_ZYNQ=y
 CONFIG_GPIO_PCA953X=y
 CONFIG_GPIO_PCA953X_IRQ=y
 CONFIG_GPIO_PCF857X=y
-CONFIG_GPIO_TWL4030=y
 CONFIG_GPIO_PALMAS=y
-CONFIG_GPIO_SYSCON=y
 CONFIG_GPIO_TPS6586X=y
 CONFIG_GPIO_TPS65910=y
+CONFIG_GPIO_TWL4030=y
+CONFIG_POWER_AVS=y
+CONFIG_ROCKCHIP_IODOMAIN=y
+CONFIG_POWER_RESET_AS3722=y
+CONFIG_POWER_RESET_GPIO=y
+CONFIG_POWER_RESET_GPIO_RESTART=y
+CONFIG_POWER_RESET_ST=y
+CONFIG_POWER_RESET_KEYSTONE=y
+CONFIG_POWER_RESET_RMOBILE=y
 CONFIG_BATTERY_ACT8945A=y
 CONFIG_BATTERY_CPCAP=m
 CONFIG_BATTERY_SBS=y
+CONFIG_AXP20X_POWER=m
 CONFIG_BATTERY_MAX17040=m
 CONFIG_BATTERY_MAX17042=m
 CONFIG_CHARGER_CPCAP=m
@@ -464,15 +442,6 @@ CONFIG_CHARGER_MAX77693=m
 CONFIG_CHARGER_MAX8997=m
 CONFIG_CHARGER_MAX8998=m
 CONFIG_CHARGER_TPS65090=y
-CONFIG_AXP20X_POWER=m
-CONFIG_POWER_RESET_AS3722=y
-CONFIG_POWER_RESET_GPIO=y
-CONFIG_POWER_RESET_GPIO_RESTART=y
-CONFIG_POWER_RESET_KEYSTONE=y
-CONFIG_POWER_RESET_RMOBILE=y
-CONFIG_POWER_RESET_ST=y
-CONFIG_POWER_AVS=y
-CONFIG_ROCKCHIP_IODOMAIN=y
 CONFIG_SENSORS_IIO_HWMON=y
 CONFIG_SENSORS_LM90=y
 CONFIG_SENSORS_LM95245=y
@@ -480,14 +449,12 @@ CONFIG_SENSORS_NTC_THERMISTOR=m
 CONFIG_SENSORS_PWM_FAN=m
 CONFIG_SENSORS_INA2XX=m
 CONFIG_CPU_THERMAL=y
-CONFIG_BCM2835_THERMAL=m
-CONFIG_BRCMSTB_THERMAL=m
 CONFIG_IMX_THERMAL=y
 CONFIG_ROCKCHIP_THERMAL=y
 CONFIG_RCAR_THERMAL=y
 CONFIG_ARMADA_THERMAL=y
-CONFIG_DAVINCI_WATCHDOG=m
-CONFIG_EXYNOS_THERMAL=m
+CONFIG_BCM2835_THERMAL=m
+CONFIG_BRCMSTB_THERMAL=m
 CONFIG_ST_THERMAL_MEMMAP=y
 CONFIG_WATCHDOG=y
 CONFIG_DA9063_WATCHDOG=m
@@ -495,20 +462,24 @@ CONFIG_XILINX_WATCHDOG=y
 CONFIG_ARM_SP805_WATCHDOG=y
 CONFIG_AT91SAM9X_WATCHDOG=y
 CONFIG_SAMA5D4_WATCHDOG=y
+CONFIG_DW_WATCHDOG=y
+CONFIG_DAVINCI_WATCHDOG=m
 CONFIG_ORION_WATCHDOG=y
 CONFIG_RN5T618_WATCHDOG=y
-CONFIG_ST_LPC_WATCHDOG=y
 CONFIG_SUNXI_WATCHDOG=y
 CONFIG_IMX2_WDT=y
+CONFIG_ST_LPC_WATCHDOG=y
 CONFIG_TEGRA_WATCHDOG=m
 CONFIG_MESON_WATCHDOG=y
-CONFIG_DW_WATCHDOG=y
 CONFIG_DIGICOLOR_WATCHDOG=y
 CONFIG_RENESAS_WDT=m
-CONFIG_BCM2835_WDT=y
 CONFIG_BCM47XX_WDT=y
-CONFIG_BCM7038_WDT=m
+CONFIG_BCM2835_WDT=y
 CONFIG_BCM_KONA_WDT=y
+CONFIG_BCM7038_WDT=m
+CONFIG_BCMA_HOST_SOC=y
+CONFIG_BCMA_DRIVER_GMAC_CMN=y
+CONFIG_BCMA_DRIVER_GPIO=y
 CONFIG_MFD_ACT8945A=y
 CONFIG_MFD_AS3711=y
 CONFIG_MFD_AS3722=y
@@ -516,7 +487,6 @@ CONFIG_MFD_ATMEL_FLEXCOM=y
 CONFIG_MFD_ATMEL_HLCDC=m
 CONFIG_MFD_BCM590XX=y
 CONFIG_MFD_AC100=y
-CONFIG_MFD_AXP20X=y
 CONFIG_MFD_AXP20X_I2C=y
 CONFIG_MFD_AXP20X_RSB=y
 CONFIG_MFD_CROS_EC=m
@@ -529,11 +499,11 @@ CONFIG_MFD_MAX77693=m
 CONFIG_MFD_MAX8907=y
 CONFIG_MFD_MAX8997=y
 CONFIG_MFD_MAX8998=y
-CONFIG_MFD_RK808=y
 CONFIG_MFD_CPCAP=y
 CONFIG_MFD_PM8XXX=y
 CONFIG_MFD_QCOM_RPM=y
 CONFIG_MFD_SPMI_PMIC=y
+CONFIG_MFD_RK808=y
 CONFIG_MFD_RN5T618=y
 CONFIG_MFD_SEC_CORE=y
 CONFIG_MFD_STMPE=y
@@ -543,10 +513,10 @@ CONFIG_MFD_TPS65217=y
 CONFIG_MFD_TPS65218=y
 CONFIG_MFD_TPS6586X=y
 CONFIG_MFD_TPS65910=y
-CONFIG_REGULATOR_ACT8945A=y
-CONFIG_REGULATOR_AB8500=y
 CONFIG_REGULATOR_ACT8865=y
+CONFIG_REGULATOR_ACT8945A=y
 CONFIG_REGULATOR_ANATOP=y
+CONFIG_REGULATOR_AB8500=y
 CONFIG_REGULATOR_AS3711=y
 CONFIG_REGULATOR_AS3722=y
 CONFIG_REGULATOR_AXP20X=y
@@ -554,10 +524,7 @@ CONFIG_REGULATOR_BCM590XX=y
 CONFIG_REGULATOR_CPCAP=y
 CONFIG_REGULATOR_DA9210=y
 CONFIG_REGULATOR_FAN53555=y
-CONFIG_REGULATOR_RK808=y
 CONFIG_REGULATOR_GPIO=y
-CONFIG_MFD_SYSCON=y
-CONFIG_POWER_RESET_SYSCON=y
 CONFIG_REGULATOR_LP872X=y
 CONFIG_REGULATOR_MAX14577=m
 CONFIG_REGULATOR_MAX8907=y
@@ -571,7 +538,8 @@ CONFIG_REGULATOR_PALMAS=y
 CONFIG_REGULATOR_PBIAS=y
 CONFIG_REGULATOR_PWM=y
 CONFIG_REGULATOR_QCOM_RPM=y
-CONFIG_REGULATOR_QCOM_SMD_RPM=y
+CONFIG_REGULATOR_QCOM_SMD_RPM=m
+CONFIG_REGULATOR_RK808=y
 CONFIG_REGULATOR_RN5T618=y
 CONFIG_REGULATOR_S2MPS11=y
 CONFIG_REGULATOR_S5M8767=y
@@ -592,18 +560,17 @@ CONFIG_MEDIA_CEC_SUPPORT=y
 CONFIG_MEDIA_CONTROLLER=y
 CONFIG_VIDEO_V4L2_SUBDEV_API=y
 CONFIG_MEDIA_USB_SUPPORT=y
-CONFIG_USB_VIDEO_CLASS=y
-CONFIG_USB_GSPCA=y
+CONFIG_USB_VIDEO_CLASS=m
 CONFIG_V4L_PLATFORM_DRIVERS=y
 CONFIG_SOC_CAMERA=m
 CONFIG_SOC_CAMERA_PLATFORM=m
-CONFIG_VIDEO_RCAR_VIN=m
-CONFIG_VIDEO_ATMEL_ISI=m
 CONFIG_VIDEO_SAMSUNG_EXYNOS4_IS=m
 CONFIG_VIDEO_S5P_FIMC=m
 CONFIG_VIDEO_S5P_MIPI_CSIS=m
 CONFIG_VIDEO_EXYNOS_FIMC_LITE=m
 CONFIG_VIDEO_EXYNOS4_FIMC_IS=m
+CONFIG_VIDEO_RCAR_VIN=m
+CONFIG_VIDEO_ATMEL_ISI=m
 CONFIG_V4L_MEM2MEM_DRIVERS=y
 CONFIG_VIDEO_SAMSUNG_S5P_JPEG=m
 CONFIG_VIDEO_SAMSUNG_S5P_MFC=m
@@ -614,19 +581,15 @@ CONFIG_VIDEO_STI_DELTA=m
 CONFIG_VIDEO_RENESAS_JPU=m
 CONFIG_VIDEO_RENESAS_VSP1=m
 CONFIG_V4L_TEST_DRIVERS=y
+CONFIG_VIDEO_VIVID=m
 CONFIG_CEC_PLATFORM_DRIVERS=y
 CONFIG_VIDEO_SAMSUNG_S5P_CEC=m
 # CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set
 CONFIG_VIDEO_ADV7180=m
 CONFIG_VIDEO_ML86V7667=m
 CONFIG_DRM=y
-CONFIG_DRM_I2C_ADV7511=m
-CONFIG_DRM_I2C_ADV7511_AUDIO=y
 # CONFIG_DRM_I2C_CH7006 is not set
 # CONFIG_DRM_I2C_SIL164 is not set
-CONFIG_DRM_DUMB_VGA_DAC=m
-CONFIG_DRM_NXP_PTN3460=m
-CONFIG_DRM_PARADE_PS8622=m
 CONFIG_DRM_NOUVEAU=m
 CONFIG_DRM_EXYNOS=m
 CONFIG_DRM_EXYNOS_FIMD=y
@@ -645,13 +608,18 @@ CONFIG_DRM_RCAR_LVDS=y
 CONFIG_DRM_SUN4I=m
 CONFIG_DRM_FSL_DCU=m
 CONFIG_DRM_TEGRA=y
+CONFIG_DRM_PANEL_SIMPLE=y
 CONFIG_DRM_PANEL_SAMSUNG_LD9040=m
 CONFIG_DRM_PANEL_SAMSUNG_S6E63J0X03=m
 CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0=m
-CONFIG_DRM_PANEL_SIMPLE=y
+CONFIG_DRM_DUMB_VGA_DAC=m
+CONFIG_DRM_NXP_PTN3460=m
+CONFIG_DRM_PARADE_PS8622=m
 CONFIG_DRM_SII9234=m
+CONFIG_DRM_I2C_ADV7511=m
+CONFIG_DRM_I2C_ADV7511_AUDIO=y
 CONFIG_DRM_STI=m
-CONFIG_DRM_VC4=y
+CONFIG_DRM_VC4=m
 CONFIG_DRM_ETNAVIV=m
 CONFIG_DRM_MXSFB=m
 CONFIG_FB_ARMCLCD=y
@@ -659,8 +627,6 @@ CONFIG_FB_EFI=y
 CONFIG_FB_WM8505=y
 CONFIG_FB_SH_MOBILE_LCDC=y
 CONFIG_FB_SIMPLE=y
-CONFIG_BACKLIGHT_LCD_SUPPORT=y
-CONFIG_BACKLIGHT_CLASS_DEVICE=y
 CONFIG_LCD_PLATFORM=m
 CONFIG_BACKLIGHT_PWM=y
 CONFIG_BACKLIGHT_AS3711=y
@@ -668,7 +634,6 @@ CONFIG_FRAMEBUFFER_CONSOLE=y
 CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
 CONFIG_SOUND=m
 CONFIG_SND=m
-CONFIG_SND_DYNAMIC_MINORS=y
 CONFIG_SND_HDA_TEGRA=m
 CONFIG_SND_HDA_INPUT_BEEP=y
 CONFIG_SND_HDA_PATCH_LOADER=y
@@ -692,7 +657,7 @@ CONFIG_SND_SOC_SNOW=m
 CONFIG_SND_SOC_ODROID=m
 CONFIG_SND_SOC_SH4_FSI=m
 CONFIG_SND_SOC_RCAR=m
-CONFIG_SND_SIMPLE_SCU_CARD=m
+CONFIG_SND_SOC_STI=m
 CONFIG_SND_SUN4I_CODEC=m
 CONFIG_SND_SOC_TEGRA=m
 CONFIG_SND_SOC_TEGRA20_I2S=m
@@ -703,31 +668,25 @@ CONFIG_SND_SOC_TEGRA_WM8903=m
 CONFIG_SND_SOC_TEGRA_WM9712=m
 CONFIG_SND_SOC_TEGRA_TRIMSLICE=m
 CONFIG_SND_SOC_TEGRA_ALC5632=m
-CONFIG_SND_SOC_CPCAP=m
 CONFIG_SND_SOC_TEGRA_MAX98090=m
 CONFIG_SND_SOC_AK4642=m
+CONFIG_SND_SOC_CPCAP=m
 CONFIG_SND_SOC_SGTL5000=m
 CONFIG_SND_SOC_SPDIF=m
-CONFIG_SND_SOC_WM8978=m
-CONFIG_SND_SOC_STI=m
 CONFIG_SND_SOC_STI_SAS=m
-CONFIG_SND_SIMPLE_CARD=m
+CONFIG_SND_SOC_WM8978=m
+CONFIG_SND_SIMPLE_SCU_CARD=m
 CONFIG_USB=y
 CONFIG_USB_OTG=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_MVEBU=y
-CONFIG_USB_XHCI_RCAR=m
 CONFIG_USB_XHCI_TEGRA=m
 CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_MSM=m
-CONFIG_USB_EHCI_EXYNOS=y
-CONFIG_USB_EHCI_TEGRA=y
 CONFIG_USB_EHCI_HCD_STI=y
-CONFIG_USB_EHCI_HCD_PLATFORM=y
-CONFIG_USB_ISP1760=y
+CONFIG_USB_EHCI_TEGRA=y
+CONFIG_USB_EHCI_EXYNOS=y
 CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_OHCI_HCD_STI=y
-CONFIG_USB_OHCI_HCD_PLATFORM=y
 CONFIG_USB_OHCI_EXYNOS=m
 CONFIG_USB_R8A66597_HCD=m
 CONFIG_USB_RENESAS_USBHS=m
@@ -746,18 +705,18 @@ CONFIG_USB_TI_CPPI41_DMA=y
 CONFIG_USB_TUSB_OMAP_DMA=y
 CONFIG_USB_DWC3=y
 CONFIG_USB_DWC2=y
-CONFIG_USB_HSIC_USB3503=y
 CONFIG_USB_CHIPIDEA=y
 CONFIG_USB_CHIPIDEA_UDC=y
 CONFIG_USB_CHIPIDEA_HOST=y
+CONFIG_USB_ISP1760=y
+CONFIG_USB_HSIC_USB3503=y
 CONFIG_AB8500_USB=y
-CONFIG_KEYSTONE_USB_PHY=y
+CONFIG_KEYSTONE_USB_PHY=m
 CONFIG_NOP_USB_XCEIV=m
 CONFIG_AM335X_PHY_USB=m
 CONFIG_TWL6030_USB=m
 CONFIG_USB_GPIO_VBUS=y
 CONFIG_USB_ISP1301=y
-CONFIG_USB_MSM_OTG=m
 CONFIG_USB_MXS_PHY=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_FSL_USB2=y
@@ -793,21 +752,20 @@ CONFIG_MMC_SDHCI_OF_ESDHC=y
 CONFIG_MMC_SDHCI_ESDHC_IMX=y
 CONFIG_MMC_SDHCI_DOVE=y
 CONFIG_MMC_SDHCI_TEGRA=y
+CONFIG_MMC_SDHCI_S3C=y
 CONFIG_MMC_SDHCI_PXAV3=y
 CONFIG_MMC_SDHCI_SPEAR=y
-CONFIG_MMC_SDHCI_S3C=y
 CONFIG_MMC_SDHCI_S3C_DMA=y
 CONFIG_MMC_SDHCI_BCM_KONA=y
+CONFIG_MMC_MESON_MX_SDIO=y
 CONFIG_MMC_SDHCI_ST=y
 CONFIG_MMC_OMAP=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_MMC_ATMELMCI=y
 CONFIG_MMC_SDHCI_MSM=y
-CONFIG_MMC_MESON_MX_SDIO=y
 CONFIG_MMC_MVSDIO=y
 CONFIG_MMC_SDHI=y
 CONFIG_MMC_DW=y
-CONFIG_MMC_DW_PLTFM=y
 CONFIG_MMC_DW_EXYNOS=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_MMC_SH_MMCIF=y
@@ -847,94 +805,85 @@ CONFIG_RTC_DRV_MAX77686=y
 CONFIG_RTC_DRV_RK808=m
 CONFIG_RTC_DRV_RS5C372=m
 CONFIG_RTC_DRV_BQ32K=m
-CONFIG_RTC_DRV_PALMAS=y
-CONFIG_RTC_DRV_ST_LPC=y
 CONFIG_RTC_DRV_TWL4030=y
+CONFIG_RTC_DRV_PALMAS=y
 CONFIG_RTC_DRV_TPS6586X=y
 CONFIG_RTC_DRV_TPS65910=y
 CONFIG_RTC_DRV_S35390A=m
 CONFIG_RTC_DRV_RX8581=m
 CONFIG_RTC_DRV_EM3027=y
+CONFIG_RTC_DRV_S5M=m
 CONFIG_RTC_DRV_DA9063=m
 CONFIG_RTC_DRV_EFI=m
 CONFIG_RTC_DRV_DIGICOLOR=m
-CONFIG_RTC_DRV_S5M=m
 CONFIG_RTC_DRV_S3C=m
 CONFIG_RTC_DRV_PL031=y
 CONFIG_RTC_DRV_AT91RM9200=m
 CONFIG_RTC_DRV_AT91SAM9=m
 CONFIG_RTC_DRV_VT8500=y
-CONFIG_RTC_DRV_SUN6I=y
 CONFIG_RTC_DRV_SUNXI=y
 CONFIG_RTC_DRV_MV=y
 CONFIG_RTC_DRV_TEGRA=y
+CONFIG_RTC_DRV_ST_LPC=y
 CONFIG_RTC_DRV_CPCAP=m
 CONFIG_DMADEVICES=y
-CONFIG_DW_DMAC=y
 CONFIG_AT_HDMAC=y
 CONFIG_AT_XDMAC=y
+CONFIG_DMA_BCM2835=y
+CONFIG_DMA_SUN6I=y
 CONFIG_FSL_EDMA=y
+CONFIG_IMX_DMA=y
+CONFIG_IMX_SDMA=y
 CONFIG_MV_XOR=y
+CONFIG_MXS_DMA=y
+CONFIG_PL330_DMA=y
+CONFIG_SIRF_DMA=y
+CONFIG_STE_DMA40=y
+CONFIG_ST_FDMA=m
 CONFIG_TEGRA20_APB_DMA=y
+CONFIG_XILINX_DMA=y
+CONFIG_QCOM_BAM_DMA=y
+CONFIG_DW_DMAC=y
 CONFIG_SH_DMAE=y
 CONFIG_RCAR_DMAC=y
 CONFIG_RENESAS_USB_DMAC=m
-CONFIG_STE_DMA40=y
-CONFIG_SIRF_DMA=y
-CONFIG_TI_EDMA=y
-CONFIG_PL330_DMA=y
-CONFIG_IMX_SDMA=y
-CONFIG_IMX_DMA=y
-CONFIG_MXS_DMA=y
-CONFIG_DMA_BCM2835=y
-CONFIG_DMA_OMAP=y
-CONFIG_QCOM_BAM_DMA=y
-CONFIG_XILINX_DMA=y
-CONFIG_DMA_SUN6I=y
-CONFIG_ST_FDMA=m
+CONFIG_VIRTIO_PCI=y
+CONFIG_VIRTIO_MMIO=y
 CONFIG_STAGING=y
-CONFIG_SENSORS_ISL29018=y
-CONFIG_SENSORS_ISL29028=y
 CONFIG_MFD_NVEC=y
 CONFIG_KEYBOARD_NVEC=y
 CONFIG_SERIO_NVEC_PS2=y
 CONFIG_NVEC_POWER=y
 CONFIG_NVEC_PAZ00=y
-CONFIG_BCMA=y
-CONFIG_BCMA_HOST_SOC=y
-CONFIG_BCMA_DRIVER_GMAC_CMN=y
-CONFIG_BCMA_DRIVER_GPIO=y
-CONFIG_QCOM_GSBI=y
-CONFIG_QCOM_PM=y
-CONFIG_QCOM_SMEM=y
-CONFIG_QCOM_SMD_RPM=y
-CONFIG_QCOM_SMP2P=y
-CONFIG_QCOM_SMSM=y
-CONFIG_QCOM_WCNSS_CTRL=m
-CONFIG_ROCKCHIP_PM_DOMAINS=y
-CONFIG_COMMON_CLK_QCOM=y
-CONFIG_QCOM_CLK_RPM=y
-CONFIG_CHROME_PLATFORMS=y
 CONFIG_STAGING_BOARD=y
-CONFIG_CROS_EC_CHARDEV=m
 CONFIG_COMMON_CLK_MAX77686=y
 CONFIG_COMMON_CLK_RK808=m
 CONFIG_COMMON_CLK_S2MPS11=m
+CONFIG_COMMON_CLK_QCOM=y
+CONFIG_QCOM_CLK_RPM=y
 CONFIG_APQ_MMCC_8084=y
 CONFIG_MSM_GCC_8660=y
 CONFIG_MSM_MMCC_8960=y
 CONFIG_MSM_MMCC_8974=y
-CONFIG_HWSPINLOCK_QCOM=y
+CONFIG_BCM2835_MBOX=y
 CONFIG_ROCKCHIP_IOMMU=y
 CONFIG_TEGRA_IOMMU_GART=y
 CONFIG_TEGRA_IOMMU_SMMU=y
 CONFIG_REMOTEPROC=m
 CONFIG_ST_REMOTEPROC=m
 CONFIG_RPMSG_VIRTIO=m
+CONFIG_RASPBERRYPI_POWER=y
+CONFIG_QCOM_GSBI=y
+CONFIG_QCOM_PM=y
+CONFIG_QCOM_SMD_RPM=m
+CONFIG_QCOM_WCNSS_CTRL=m
+CONFIG_ROCKCHIP_PM_DOMAINS=y
+CONFIG_ARCH_TEGRA_2x_SOC=y
+CONFIG_ARCH_TEGRA_3x_SOC=y
+CONFIG_ARCH_TEGRA_114_SOC=y
+CONFIG_ARCH_TEGRA_124_SOC=y
 CONFIG_PM_DEVFREQ=y
 CONFIG_ARM_TEGRA_DEVFREQ=m
-CONFIG_MEMORY=y
-CONFIG_EXTCON=y
 CONFIG_TI_AEMIF=y
 CONFIG_IIO=y
 CONFIG_IIO_SW_TRIGGER=y
@@ -947,56 +896,54 @@ CONFIG_VF610_ADC=m
 CONFIG_XILINX_XADC=y
 CONFIG_MPU3050_I2C=y
 CONFIG_CM36651=m
+CONFIG_SENSORS_ISL29018=y
+CONFIG_SENSORS_ISL29028=y
 CONFIG_AK8975=y
-CONFIG_RASPBERRYPI_POWER=y
 CONFIG_IIO_HRTIMER_TRIGGER=y
 CONFIG_PWM=y
 CONFIG_PWM_ATMEL=m
 CONFIG_PWM_ATMEL_HLCDC_PWM=m
 CONFIG_PWM_ATMEL_TCB=m
+CONFIG_PWM_BCM2835=y
+CONFIG_PWM_BRCMSTB=m
 CONFIG_PWM_FSL_FTM=m
 CONFIG_PWM_MESON=m
 CONFIG_PWM_RCAR=m
 CONFIG_PWM_RENESAS_TPU=y
 CONFIG_PWM_ROCKCHIP=m
 CONFIG_PWM_SAMSUNG=m
+CONFIG_PWM_STI=y
 CONFIG_PWM_SUN4I=y
 CONFIG_PWM_TEGRA=y
 CONFIG_PWM_VT8500=y
+CONFIG_KEYSTONE_IRQ=y
+CONFIG_PHY_SUN4I_USB=y
+CONFIG_PHY_SUN9I_USB=y
 CONFIG_PHY_HIX5HD2_SATA=y
-CONFIG_E1000E=y
-CONFIG_PWM_STI=y
-CONFIG_PWM_BCM2835=y
-CONFIG_PWM_BRCMSTB=m
-CONFIG_PHY_DM816X_USB=m
-CONFIG_OMAP_USB2=y
-CONFIG_TI_PIPE3=y
-CONFIG_TWL4030_USB=m
+CONFIG_PHY_BERLIN_SATA=y
 CONFIG_PHY_BERLIN_USB=y
 CONFIG_PHY_CPCAP_USB=m
-CONFIG_PHY_BERLIN_SATA=y
+CONFIG_PHY_QCOM_APQ8064_SATA=m
+CONFIG_PHY_RCAR_GEN2=m
 CONFIG_PHY_ROCKCHIP_DP=m
 CONFIG_PHY_ROCKCHIP_USB=y
-CONFIG_PHY_QCOM_APQ8064_SATA=m
+CONFIG_PHY_SAMSUNG_USB2=m
 CONFIG_PHY_MIPHY28LP=y
-CONFIG_PHY_RCAR_GEN2=m
 CONFIG_PHY_STIH407_USB=y
 CONFIG_PHY_STM32_USBPHYC=y
-CONFIG_PHY_SUN4I_USB=y
-CONFIG_PHY_SUN9I_USB=y
-CONFIG_PHY_SAMSUNG_USB2=m
 CONFIG_PHY_TEGRA_XUSB=y
-CONFIG_PHY_BRCM_SATA=y
-CONFIG_NVMEM=y
+CONFIG_PHY_DM816X_USB=m
+CONFIG_OMAP_USB2=y
+CONFIG_TI_PIPE3=y
+CONFIG_TWL4030_USB=m
 CONFIG_NVMEM_IMX_OCOTP=y
 CONFIG_NVMEM_SUNXI_SID=y
 CONFIG_NVMEM_VF610_OCOTP=y
-CONFIG_BCM2835_MBOX=y
 CONFIG_RASPBERRYPI_FIRMWARE=y
-CONFIG_EFI_VARS=m
-CONFIG_EFI_CAPSULE_LOADER=m
 CONFIG_BCM47XX_NVRAM=y
 CONFIG_BCM47XX_SPROM=y
+CONFIG_EFI_VARS=m
+CONFIG_EFI_CAPSULE_LOADER=m
 CONFIG_EXT4_FS=y
 CONFIG_AUTOFS4_FS=y
 CONFIG_MSDOS_FS=y
@@ -1004,7 +951,6 @@ CONFIG_VFAT_FS=y
 CONFIG_NTFS_FS=y
 CONFIG_TMPFS_POSIX_ACL=y
 CONFIG_UBIFS_FS=y
-CONFIG_TMPFS=y
 CONFIG_SQUASHFS=y
 CONFIG_SQUASHFS_LZO=y
 CONFIG_SQUASHFS_XZ=y
@@ -1020,13 +966,7 @@ CONFIG_NLS_CODEPAGE_437=y
 CONFIG_NLS_ISO8859_1=y
 CONFIG_NLS_UTF8=y
 CONFIG_PRINTK_TIME=y
-CONFIG_DEBUG_FS=y
 CONFIG_MAGIC_SYSRQ=y
-CONFIG_LOCKUP_DETECTOR=y
-CONFIG_CPUFREQ_DT=y
-CONFIG_KEYSTONE_IRQ=y
-CONFIG_HW_RANDOM=y
-CONFIG_HW_RANDOM_ST=y
 CONFIG_CRYPTO_USER=m
 CONFIG_CRYPTO_USER_API_HASH=m
 CONFIG_CRYPTO_USER_API_SKCIPHER=m
@@ -1035,27 +975,19 @@ CONFIG_CRYPTO_USER_API_AEAD=m
 CONFIG_CRYPTO_DEV_MARVELL_CESA=m
 CONFIG_CRYPTO_DEV_EXYNOS_RNG=m
 CONFIG_CRYPTO_DEV_S5P=m
+CONFIG_CRYPTO_DEV_ATMEL_AES=m
+CONFIG_CRYPTO_DEV_ATMEL_TDES=m
+CONFIG_CRYPTO_DEV_ATMEL_SHA=m
 CONFIG_CRYPTO_DEV_SUN4I_SS=m
 CONFIG_CRYPTO_DEV_ROCKCHIP=m
 CONFIG_ARM_CRYPTO=y
-CONFIG_CRYPTO_SHA1_ARM=m
 CONFIG_CRYPTO_SHA1_ARM_NEON=m
 CONFIG_CRYPTO_SHA1_ARM_CE=m
 CONFIG_CRYPTO_SHA2_ARM_CE=m
-CONFIG_CRYPTO_SHA256_ARM=m
 CONFIG_CRYPTO_SHA512_ARM=m
 CONFIG_CRYPTO_AES_ARM=m
 CONFIG_CRYPTO_AES_ARM_BS=m
 CONFIG_CRYPTO_AES_ARM_CE=m
-CONFIG_CRYPTO_CHACHA20_NEON=m
-CONFIG_CRYPTO_CRC32_ARM_CE=m
-CONFIG_CRYPTO_CRCT10DIF_ARM_CE=m
 CONFIG_CRYPTO_GHASH_ARM_CE=m
-CONFIG_CRYPTO_DEV_ATMEL_AES=m
-CONFIG_CRYPTO_DEV_ATMEL_TDES=m
-CONFIG_CRYPTO_DEV_ATMEL_SHA=m
-CONFIG_VIDEO_VIVID=m
-CONFIG_VIRTIO=y
-CONFIG_VIRTIO_PCI=y
-CONFIG_VIRTIO_PCI_LEGACY=y
-CONFIG_VIRTIO_MMIO=y
+CONFIG_CRYPTO_CRC32_ARM_CE=m
+CONFIG_CRYPTO_CHACHA20_NEON=m
index 3fb1b5a1dce968d028c8f17057c277e29302caaf..689e6565abfc4bea48e9425901387d6a096ed9d5 100644 (file)
 
 static unsigned long cpu_boot_addr;
 
-static void __naked tf_generic_smc(u32 type, u32 arg1, u32 arg2)
+static void tf_generic_smc(u32 type, u32 arg1, u32 arg2)
 {
+       register u32 r0 asm("r0") = type;
+       register u32 r1 asm("r1") = arg1;
+       register u32 r2 asm("r2") = arg2;
+
        asm volatile(
                ".arch_extension        sec\n\t"
-               "stmfd  sp!, {r4 - r11, lr}\n\t"
+               "stmfd  sp!, {r4 - r11}\n\t"
                __asmeq("%0", "r0")
                __asmeq("%1", "r1")
                __asmeq("%2", "r2")
                "mov    r3, #0\n\t"
                "mov    r4, #0\n\t"
                "smc    #0\n\t"
-               "ldmfd  sp!, {r4 - r11, pc}"
+               "ldmfd  sp!, {r4 - r11}\n\t"
                :
-               : "r" (type), "r" (arg1), "r" (arg2)
-               : "memory");
+               : "r" (r0), "r" (r1), "r" (r2)
+               : "memory", "r3", "r12", "lr");
 }
 
 static int tf_set_cpu_boot_addr(int cpu, unsigned long boot_addr)
index 97820a8df51ae7456c4f53a97fd5e8744ac4d25a..1c5f795587fc5681bc126dad8a44c7a26ad32f00 100644 (file)
@@ -1,3 +1,4 @@
+/* SPDX-License-Identifier: GPL-2.0 */
 /*
  * Renesas SCIF(A) debugging macro include header
  *
@@ -5,10 +6,6 @@
  *
  * Copyright (C) 2012-2013 Renesas Electronics Corporation
  * Copyright (C) 1994-1999 Russell King
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
  */
 
 #define SCIF_PHYS      CONFIG_DEBUG_UART_PHYS
index 849014c01cf4d62a465ec6e54b829d4ff45f05a6..e8f3d0f97e61947dfffb9b8bc804bbfefe3f4442 100644 (file)
@@ -40,15 +40,16 @@ extern void at91_pinctrl_gpio_resume(void);
 #endif
 
 static const match_table_t pm_modes __initconst = {
-       { 0, "standby" },
-       { AT91_PM_SLOW_CLOCK, "ulp0" },
+       { AT91_PM_STANDBY, "standby" },
+       { AT91_PM_ULP0, "ulp0" },
+       { AT91_PM_ULP1, "ulp1" },
        { AT91_PM_BACKUP, "backup" },
        { -1, NULL },
 };
 
 static struct at91_pm_data pm_data = {
-       .standby_mode = 0,
-       .suspend_mode = AT91_PM_SLOW_CLOCK,
+       .standby_mode = AT91_PM_STANDBY,
+       .suspend_mode = AT91_PM_ULP0,
 };
 
 #define at91_ramc_read(id, field) \
@@ -79,6 +80,90 @@ static struct at91_pm_bu {
        phys_addr_t resume;
 } *pm_bu;
 
+struct wakeup_source_info {
+       unsigned int pmc_fsmr_bit;
+       unsigned int shdwc_mr_bit;
+       bool set_polarity;
+};
+
+static const struct wakeup_source_info ws_info[] = {
+       { .pmc_fsmr_bit = AT91_PMC_FSTT(10),    .set_polarity = true },
+       { .pmc_fsmr_bit = AT91_PMC_RTCAL,       .shdwc_mr_bit = BIT(17) },
+       { .pmc_fsmr_bit = AT91_PMC_USBAL },
+       { .pmc_fsmr_bit = AT91_PMC_SDMMC_CD },
+};
+
+static const struct of_device_id sama5d2_ws_ids[] = {
+       { .compatible = "atmel,sama5d2-gem",            .data = &ws_info[0] },
+       { .compatible = "atmel,at91rm9200-rtc",         .data = &ws_info[1] },
+       { .compatible = "atmel,sama5d3-udc",            .data = &ws_info[2] },
+       { .compatible = "atmel,at91rm9200-ohci",        .data = &ws_info[2] },
+       { .compatible = "usb-ohci",                     .data = &ws_info[2] },
+       { .compatible = "atmel,at91sam9g45-ehci",       .data = &ws_info[2] },
+       { .compatible = "usb-ehci",                     .data = &ws_info[2] },
+       { .compatible = "atmel,sama5d2-sdhci",          .data = &ws_info[3] },
+       { /* sentinel */ }
+};
+
+static int at91_pm_config_ws(unsigned int pm_mode, bool set)
+{
+       const struct wakeup_source_info *wsi;
+       const struct of_device_id *match;
+       struct platform_device *pdev;
+       struct device_node *np;
+       unsigned int mode = 0, polarity = 0, val = 0;
+
+       if (pm_mode != AT91_PM_ULP1)
+               return 0;
+
+       if (!pm_data.pmc || !pm_data.shdwc)
+               return -EPERM;
+
+       if (!set) {
+               writel(mode, pm_data.pmc + AT91_PMC_FSMR);
+               return 0;
+       }
+
+       /* SHDWC.WUIR */
+       val = readl(pm_data.shdwc + 0x0c);
+       mode |= (val & 0x3ff);
+       polarity |= ((val >> 16) & 0x3ff);
+
+       /* SHDWC.MR */
+       val = readl(pm_data.shdwc + 0x04);
+
+       /* Loop through defined wakeup sources. */
+       for_each_matching_node_and_match(np, sama5d2_ws_ids, &match) {
+               pdev = of_find_device_by_node(np);
+               if (!pdev)
+                       continue;
+
+               if (device_may_wakeup(&pdev->dev)) {
+                       wsi = match->data;
+
+                       /* Check if enabled on SHDWC. */
+                       if (wsi->shdwc_mr_bit && !(val & wsi->shdwc_mr_bit))
+                               goto put_node;
+
+                       mode |= wsi->pmc_fsmr_bit;
+                       if (wsi->set_polarity)
+                               polarity |= wsi->pmc_fsmr_bit;
+               }
+
+put_node:
+               of_node_put(np);
+       }
+
+       if (mode) {
+               writel(mode, pm_data.pmc + AT91_PMC_FSMR);
+               writel(polarity, pm_data.pmc + AT91_PMC_FSPR);
+       } else {
+               pr_err("AT91: PM: no ULP1 wakeup sources found!");
+       }
+
+       return mode ? 0 : -EPERM;
+}
+
 /*
  * Called after processes are frozen, but before we shutdown devices.
  */
@@ -97,7 +182,7 @@ static int at91_pm_begin(suspend_state_t state)
                pm_data.mode = -1;
        }
 
-       return 0;
+       return at91_pm_config_ws(pm_data.mode, true);
 }
 
 /*
@@ -145,7 +230,7 @@ static int at91_pm_verify_clocks(void)
  */
 int at91_suspend_entering_slow_clock(void)
 {
-       return (pm_data.mode >= AT91_PM_SLOW_CLOCK);
+       return (pm_data.mode >= AT91_PM_ULP0);
 }
 EXPORT_SYMBOL(at91_suspend_entering_slow_clock);
 
@@ -186,7 +271,7 @@ static void at91_pm_suspend(suspend_state_t state)
  * event sources; and reduces DRAM power.  But otherwise it's identical to
  * PM_SUSPEND_ON: cpu idle, and nothing fancy done with main or cpu clocks.
  *
- * AT91_PM_SLOW_CLOCK is like STANDBY plus slow clock mode, so drivers must
+ * AT91_PM_ULP0 is like STANDBY plus slow clock mode, so drivers must
  * suspend more deeply, the master clock switches to the clk32k and turns off
  * the main oscillator
  *
@@ -204,7 +289,7 @@ static int at91_pm_enter(suspend_state_t state)
                /*
                 * Ensure that clocks are in a valid state.
                 */
-               if ((pm_data.mode >= AT91_PM_SLOW_CLOCK) &&
+               if (pm_data.mode >= AT91_PM_ULP0 &&
                    !at91_pm_verify_clocks())
                        goto error;
 
@@ -233,6 +318,7 @@ error:
  */
 static void at91_pm_end(void)
 {
+       at91_pm_config_ws(pm_data.mode, false);
 }
 
 
@@ -478,31 +564,28 @@ static void __init at91_pm_sram_init(void)
                        &at91_pm_suspend_in_sram, at91_pm_suspend_in_sram_sz);
 }
 
-static void __init at91_pm_backup_init(void)
+static bool __init at91_is_pm_mode_active(int pm_mode)
+{
+       return (pm_data.standby_mode == pm_mode ||
+               pm_data.suspend_mode == pm_mode);
+}
+
+static int __init at91_pm_backup_init(void)
 {
        struct gen_pool *sram_pool;
        struct device_node *np;
        struct platform_device *pdev = NULL;
+       int ret = -ENODEV;
 
-       if ((pm_data.standby_mode != AT91_PM_BACKUP) &&
-           (pm_data.suspend_mode != AT91_PM_BACKUP))
-               return;
+       if (!at91_is_pm_mode_active(AT91_PM_BACKUP))
+               return 0;
 
        pm_bu = NULL;
 
-       np = of_find_compatible_node(NULL, NULL, "atmel,sama5d2-shdwc");
-       if (!np) {
-               pr_warn("%s: failed to find shdwc!\n", __func__);
-               return;
-       }
-
-       pm_data.shdwc = of_iomap(np, 0);
-       of_node_put(np);
-
        np = of_find_compatible_node(NULL, NULL, "atmel,sama5d2-sfrbu");
        if (!np) {
                pr_warn("%s: failed to find sfrbu!\n", __func__);
-               goto sfrbu_fail;
+               return ret;
        }
 
        pm_data.sfrbu = of_iomap(np, 0);
@@ -529,6 +612,7 @@ static void __init at91_pm_backup_init(void)
        pm_bu = (void *)gen_pool_alloc(sram_pool, sizeof(struct at91_pm_bu));
        if (!pm_bu) {
                pr_warn("%s: unable to alloc securam!\n", __func__);
+               ret = -ENOMEM;
                goto securam_fail;
        }
 
@@ -536,19 +620,60 @@ static void __init at91_pm_backup_init(void)
        pm_bu->canary = __pa_symbol(&canary);
        pm_bu->resume = __pa_symbol(cpu_resume);
 
-       return;
+       return 0;
 
-sfrbu_fail:
-       iounmap(pm_data.shdwc);
-       pm_data.shdwc = NULL;
 securam_fail:
        iounmap(pm_data.sfrbu);
        pm_data.sfrbu = NULL;
+       return ret;
+}
 
-       if (pm_data.standby_mode == AT91_PM_BACKUP)
-               pm_data.standby_mode = AT91_PM_SLOW_CLOCK;
-       if (pm_data.suspend_mode == AT91_PM_BACKUP)
-               pm_data.suspend_mode = AT91_PM_SLOW_CLOCK;
+static void __init at91_pm_use_default_mode(int pm_mode)
+{
+       if (pm_mode != AT91_PM_ULP1 && pm_mode != AT91_PM_BACKUP)
+               return;
+
+       if (pm_data.standby_mode == pm_mode)
+               pm_data.standby_mode = AT91_PM_ULP0;
+       if (pm_data.suspend_mode == pm_mode)
+               pm_data.suspend_mode = AT91_PM_ULP0;
+}
+
+static void __init at91_pm_modes_init(void)
+{
+       struct device_node *np;
+       int ret;
+
+       if (!at91_is_pm_mode_active(AT91_PM_BACKUP) &&
+           !at91_is_pm_mode_active(AT91_PM_ULP1))
+               return;
+
+       np = of_find_compatible_node(NULL, NULL, "atmel,sama5d2-shdwc");
+       if (!np) {
+               pr_warn("%s: failed to find shdwc!\n", __func__);
+               goto ulp1_default;
+       }
+
+       pm_data.shdwc = of_iomap(np, 0);
+       of_node_put(np);
+
+       ret = at91_pm_backup_init();
+       if (ret) {
+               if (!at91_is_pm_mode_active(AT91_PM_ULP1))
+                       goto unmap;
+               else
+                       goto backup_default;
+       }
+
+       return;
+
+unmap:
+       iounmap(pm_data.shdwc);
+       pm_data.shdwc = NULL;
+ulp1_default:
+       at91_pm_use_default_mode(AT91_PM_ULP1);
+backup_default:
+       at91_pm_use_default_mode(AT91_PM_BACKUP);
 }
 
 struct pmc_info {
@@ -644,7 +769,7 @@ void __init sama5d2_pm_init(void)
        if (!IS_ENABLED(CONFIG_SOC_SAMA5D2))
                return;
 
-       at91_pm_backup_init();
+       at91_pm_modes_init();
        sama5_pm_init();
 }
 
index f95d31496f08f496242798b7d26911b1098ef363..9bd4e6ca672a3dadfffb9ada1ccc0440f9684eb9 100644 (file)
 #define AT91_MEMCTRL_SDRAMC    1
 #define AT91_MEMCTRL_DDRSDR    2
 
-#define        AT91_PM_SLOW_CLOCK      0x01
-#define        AT91_PM_BACKUP          0x02
+#define        AT91_PM_STANDBY         0x00
+#define AT91_PM_ULP0           0x01
+#define AT91_PM_ULP1           0x02
+#define        AT91_PM_BACKUP          0x03
 
 #ifndef __ASSEMBLY__
 struct at91_pm_data {
index daca91feea6a2603bf45822684adfcd5cf3e9c83..a7c6ae13c9453eb36d54ea3c44bf8bf4430867e2 100644 (file)
@@ -41,6 +41,15 @@ tmp2 .req    r5
        beq     1b
        .endm
 
+/*
+ * Wait for main oscillator selection is done
+ */
+       .macro wait_moscsels
+1:     ldr     tmp1, [pmc, #AT91_PMC_SR]
+       tst     tmp1, #AT91_PMC_MOSCSELS
+       beq     1b
+       .endm
+
 /*
  * Wait until PLLA has locked.
  */
@@ -112,19 +121,20 @@ ENTRY(at91_pm_suspend_in_sram)
        bl      at91_sramc_self_refresh
 
        ldr     r0, .pm_mode
-       cmp     r0, #AT91_PM_SLOW_CLOCK
-       beq     slow_clock
+       cmp     r0, #AT91_PM_STANDBY
+       beq     standby
        cmp     r0, #AT91_PM_BACKUP
        beq     backup_mode
 
+       bl      at91_ulp_mode
+       b       exit_suspend
+
+standby:
        /* Wait for interrupt */
        ldr     pmc, .pmc_base
        at91_cpu_idle
        b       exit_suspend
 
-slow_clock:
-       bl      at91_slowck_mode
-       b       exit_suspend
 backup_mode:
        bl      at91_backup_mode
        b       exit_suspend
@@ -151,7 +161,102 @@ ENTRY(at91_backup_mode)
        str     tmp1, [r0, #0]
 ENDPROC(at91_backup_mode)
 
-ENTRY(at91_slowck_mode)
+.macro at91_pm_ulp0_mode
+       ldr     pmc, .pmc_base
+
+       /* Turn off the crystal oscillator */
+       ldr     tmp1, [pmc, #AT91_CKGR_MOR]
+       bic     tmp1, tmp1, #AT91_PMC_MOSCEN
+       orr     tmp1, tmp1, #AT91_PMC_KEY
+       str     tmp1, [pmc, #AT91_CKGR_MOR]
+
+       /* Wait for interrupt */
+       at91_cpu_idle
+
+       /* Turn on the crystal oscillator */
+       ldr     tmp1, [pmc, #AT91_CKGR_MOR]
+       orr     tmp1, tmp1, #AT91_PMC_MOSCEN
+       orr     tmp1, tmp1, #AT91_PMC_KEY
+       str     tmp1, [pmc, #AT91_CKGR_MOR]
+
+       wait_moscrdy
+.endm
+
+/**
+ * Note: This procedure only applies on the platform which uses
+ * the external crystal oscillator as a main clock source.
+ */
+.macro at91_pm_ulp1_mode
+       ldr     pmc, .pmc_base
+
+       /* Switch the main clock source to 12-MHz RC oscillator */
+       ldr     tmp1, [pmc, #AT91_CKGR_MOR]
+       bic     tmp1, tmp1, #AT91_PMC_MOSCSEL
+       bic     tmp1, tmp1, #AT91_PMC_KEY_MASK
+       orr     tmp1, tmp1, #AT91_PMC_KEY
+       str     tmp1, [pmc, #AT91_CKGR_MOR]
+
+       wait_moscsels
+
+       /* Disable the crystal oscillator */
+       ldr     tmp1, [pmc, #AT91_CKGR_MOR]
+       bic     tmp1, tmp1, #AT91_PMC_MOSCEN
+       bic     tmp1, tmp1, #AT91_PMC_KEY_MASK
+       orr     tmp1, tmp1, #AT91_PMC_KEY
+       str     tmp1, [pmc, #AT91_CKGR_MOR]
+
+       /* Switch the master clock source to main clock */
+       ldr     tmp1, [pmc, #AT91_PMC_MCKR]
+       bic     tmp1, tmp1, #AT91_PMC_CSS
+       orr     tmp1, tmp1, #AT91_PMC_CSS_MAIN
+       str     tmp1, [pmc, #AT91_PMC_MCKR]
+
+       wait_mckrdy
+
+       /* Enter the ULP1 mode by set WAITMODE bit in CKGR_MOR */
+       ldr     tmp1, [pmc, #AT91_CKGR_MOR]
+       orr     tmp1, tmp1, #AT91_PMC_WAITMODE
+       bic     tmp1, tmp1, #AT91_PMC_KEY_MASK
+       orr     tmp1, tmp1, #AT91_PMC_KEY
+       str     tmp1, [pmc, #AT91_CKGR_MOR]
+
+       wait_mckrdy
+
+       /* Enable the crystal oscillator */
+       ldr     tmp1, [pmc, #AT91_CKGR_MOR]
+       orr     tmp1, tmp1, #AT91_PMC_MOSCEN
+       bic     tmp1, tmp1, #AT91_PMC_KEY_MASK
+       orr     tmp1, tmp1, #AT91_PMC_KEY
+       str     tmp1, [pmc, #AT91_CKGR_MOR]
+
+       wait_moscrdy
+
+       /* Switch the master clock source to slow clock */
+       ldr     tmp1, [pmc, #AT91_PMC_MCKR]
+       bic     tmp1, tmp1, #AT91_PMC_CSS
+       str     tmp1, [pmc, #AT91_PMC_MCKR]
+
+       wait_mckrdy
+
+       /* Switch main clock source to crystal oscillator */
+       ldr     tmp1, [pmc, #AT91_CKGR_MOR]
+       orr     tmp1, tmp1, #AT91_PMC_MOSCSEL
+       bic     tmp1, tmp1, #AT91_PMC_KEY_MASK
+       orr     tmp1, tmp1, #AT91_PMC_KEY
+       str     tmp1, [pmc, #AT91_CKGR_MOR]
+
+       wait_moscsels
+
+       /* Switch the master clock source to main clock */
+       ldr     tmp1, [pmc, #AT91_PMC_MCKR]
+       bic     tmp1, tmp1, #AT91_PMC_CSS
+       orr     tmp1, tmp1, #AT91_PMC_CSS_MAIN
+       str     tmp1, [pmc, #AT91_PMC_MCKR]
+
+       wait_mckrdy
+.endm
+
+ENTRY(at91_ulp_mode)
        ldr     pmc, .pmc_base
 
        /* Save Master clock setting */
@@ -174,22 +279,19 @@ ENTRY(at91_slowck_mode)
        orr     tmp1, tmp1, #(1 << 29)          /* bit 29 always set */
        str     tmp1, [pmc, #AT91_CKGR_PLLAR]
 
-       /* Turn off the main oscillator */
-       ldr     tmp1, [pmc, #AT91_CKGR_MOR]
-       bic     tmp1, tmp1, #AT91_PMC_MOSCEN
-       orr     tmp1, tmp1, #AT91_PMC_KEY
-       str     tmp1, [pmc, #AT91_CKGR_MOR]
+       ldr     r0, .pm_mode
+       cmp     r0, #AT91_PM_ULP1
+       beq     ulp1_mode
 
-       /* Wait for interrupt */
-       at91_cpu_idle
+       at91_pm_ulp0_mode
+       b       ulp_exit
 
-       /* Turn on the main oscillator */
-       ldr     tmp1, [pmc, #AT91_CKGR_MOR]
-       orr     tmp1, tmp1, #AT91_PMC_MOSCEN
-       orr     tmp1, tmp1, #AT91_PMC_KEY
-       str     tmp1, [pmc, #AT91_CKGR_MOR]
+ulp1_mode:
+       at91_pm_ulp1_mode
+       b       ulp_exit
 
-       wait_moscrdy
+ulp_exit:
+       ldr     pmc, .pmc_base
 
        /* Restore PLLA setting */
        ldr     tmp1, .saved_pllar
@@ -212,7 +314,7 @@ ENTRY(at91_slowck_mode)
        wait_mckrdy
 
        mov     pc, lr
-ENDPROC(at91_slowck_mode)
+ENDPROC(at91_ulp_mode)
 
 /*
  * void at91_sramc_self_refresh(unsigned int is_active)
index c46a728df44ead2a0b986a1f218e3c61e9820c34..25aac6ee2ab18cdd0189c27bac759efc02f2d1c5 100644 (file)
@@ -20,6 +20,7 @@ config ARCH_BCM_IPROC
        select GPIOLIB
        select ARM_AMBA
        select PINCTRL
+       select PCI_DOMAINS if PCI
        help
          This enables support for systems based on Broadcom IPROC architected SoCs.
          The IPROC complex contains one or more ARM CPUs along with common
index 05c3eecf47cb8364ae6a25f2c53c37dc8803f2fa..da8a039d65f9ac794ccebf80220ac8dcb2a3c928 100644 (file)
@@ -59,6 +59,7 @@ config MACH_DA8XX_DT
        default y
        depends on ARCH_DAVINCI_DA850
        select PINCTRL
+       select TIMER_OF
        help
          Say y here to include support for TI DaVinci DA850 based using
          Flattened Device Tree. More information at Documentation/devicetree
@@ -231,18 +232,6 @@ config DAVINCI_MUX_WARNINGS
          to change the pin multiplexing setup. When there are no warnings
          printed, it's safe to deselect DAVINCI_MUX for your product.
 
-config DAVINCI_RESET_CLOCKS
-       bool "Reset unused clocks during boot"
-       depends on ARCH_DAVINCI
-       help
-         Say Y if you want to reset unused clocks during boot.
-         This option saves power, but assumes all drivers are
-         using the clock framework. Broken drivers that do not
-         yet use clock framework may not work with this option.
-         If you are booting from another operating system, you
-         probably do not want this option enabled until your
-         device drivers work properly.
-
 endmenu
 
 endif
index 4e8178050027458779f6685e921d8953c33a0891..93d271b4d84bef2cbd8abd4d4df198fc4e0d6da1 100644 (file)
@@ -5,8 +5,8 @@
 #
 
 # Common objects
-obj-y                  := time.o clock.o serial.o psc.o \
-                          usb.o common.o sram.o aemif.o
+obj-y                                  := time.o serial.o usb.o \
+                                          common.o sram.o
 
 obj-$(CONFIG_DAVINCI_MUX)              += mux.o
 
diff --git a/arch/arm/mach-davinci/aemif.c b/arch/arm/mach-davinci/aemif.c
deleted file mode 100644 (file)
index e4ab3f3..0000000
+++ /dev/null
@@ -1,218 +0,0 @@
-/*
- * AEMIF support for DaVinci SoCs
- *
- * Copyright (C) 2010 Texas Instruments Incorporated. http://www.ti.com/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/kernel.h>
-#include <linux/io.h>
-#include <linux/err.h>
-#include <linux/clk.h>
-#include <linux/module.h>
-#include <linux/time.h>
-
-#include <linux/platform_data/mtd-davinci-aemif.h>
-#include <linux/platform_data/mtd-davinci.h>
-
-/* Timing value configuration */
-
-#define TA(x)          ((x) << 2)
-#define RHOLD(x)       ((x) << 4)
-#define RSTROBE(x)     ((x) << 7)
-#define RSETUP(x)      ((x) << 13)
-#define WHOLD(x)       ((x) << 17)
-#define WSTROBE(x)     ((x) << 20)
-#define WSETUP(x)      ((x) << 26)
-
-#define TA_MAX         0x3
-#define RHOLD_MAX      0x7
-#define RSTROBE_MAX    0x3f
-#define RSETUP_MAX     0xf
-#define WHOLD_MAX      0x7
-#define WSTROBE_MAX    0x3f
-#define WSETUP_MAX     0xf
-
-#define TIMING_MASK    (TA(TA_MAX) | \
-                               RHOLD(RHOLD_MAX) | \
-                               RSTROBE(RSTROBE_MAX) |  \
-                               RSETUP(RSETUP_MAX) | \
-                               WHOLD(WHOLD_MAX) | \
-                               WSTROBE(WSTROBE_MAX) | \
-                               WSETUP(WSETUP_MAX))
-
-static inline unsigned int davinci_aemif_readl(void __iomem *base, int offset)
-{
-       return readl_relaxed(base + offset);
-}
-
-static inline void davinci_aemif_writel(void __iomem *base,
-                                       int offset, unsigned long value)
-{
-       writel_relaxed(value, base + offset);
-}
-
-/*
- * aemif_calc_rate - calculate timing data.
- * @wanted: The cycle time needed in nanoseconds.
- * @clk: The input clock rate in kHz.
- * @max: The maximum divider value that can be programmed.
- *
- * On success, returns the calculated timing value minus 1 for easy
- * programming into AEMIF timing registers, else negative errno.
- */
-static int aemif_calc_rate(int wanted, unsigned long clk, int max)
-{
-       int result;
-
-       result = DIV_ROUND_UP((wanted * clk), NSEC_PER_MSEC) - 1;
-
-       pr_debug("%s: result %d from %ld, %d\n", __func__, result, clk, wanted);
-
-       /* It is generally OK to have a more relaxed timing than requested... */
-       if (result < 0)
-               result = 0;
-
-       /* ... But configuring tighter timings is not an option. */
-       else if (result > max)
-               result = -EINVAL;
-
-       return result;
-}
-
-/**
- * davinci_aemif_setup_timing - setup timing values for a given AEMIF interface
- * @t: timing values to be progammed
- * @base: The virtual base address of the AEMIF interface
- * @cs: chip-select to program the timing values for
- * @clkrate: the AEMIF clkrate
- *
- * This function programs the given timing values (in real clock) into the
- * AEMIF registers taking the AEMIF clock into account.
- *
- * This function does not use any locking while programming the AEMIF
- * because it is expected that there is only one user of a given
- * chip-select.
- *
- * Returns 0 on success, else negative errno.
- */
-static int davinci_aemif_setup_timing(struct davinci_aemif_timing *t,
-                                       void __iomem *base, unsigned cs,
-                                       unsigned long clkrate)
-{
-       unsigned set, val;
-       int ta, rhold, rstrobe, rsetup, whold, wstrobe, wsetup;
-       unsigned offset = A1CR_OFFSET + cs * 4;
-
-       if (!t)
-               return 0;       /* Nothing to do */
-
-       clkrate /= 1000;        /* turn clock into kHz for ease of use */
-
-       ta      = aemif_calc_rate(t->ta, clkrate, TA_MAX);
-       rhold   = aemif_calc_rate(t->rhold, clkrate, RHOLD_MAX);
-       rstrobe = aemif_calc_rate(t->rstrobe, clkrate, RSTROBE_MAX);
-       rsetup  = aemif_calc_rate(t->rsetup, clkrate, RSETUP_MAX);
-       whold   = aemif_calc_rate(t->whold, clkrate, WHOLD_MAX);
-       wstrobe = aemif_calc_rate(t->wstrobe, clkrate, WSTROBE_MAX);
-       wsetup  = aemif_calc_rate(t->wsetup, clkrate, WSETUP_MAX);
-
-       if (ta < 0 || rhold < 0 || rstrobe < 0 || rsetup < 0 ||
-                       whold < 0 || wstrobe < 0 || wsetup < 0) {
-               pr_err("%s: cannot get suitable timings\n", __func__);
-               return -EINVAL;
-       }
-
-       set = TA(ta) | RHOLD(rhold) | RSTROBE(rstrobe) | RSETUP(rsetup) |
-               WHOLD(whold) | WSTROBE(wstrobe) | WSETUP(wsetup);
-
-       val = __raw_readl(base + offset);
-       val &= ~TIMING_MASK;
-       val |= set;
-       __raw_writel(val, base + offset);
-
-       return 0;
-}
-
-/**
- * davinci_aemif_setup - setup AEMIF interface by davinci_nand_pdata
- * @pdev - link to platform device to setup settings for
- *
- * This function does not use any locking while programming the AEMIF
- * because it is expected that there is only one user of a given
- * chip-select.
- *
- * Returns 0 on success, else negative errno.
- */
-int davinci_aemif_setup(struct platform_device *pdev)
-{
-       struct davinci_nand_pdata *pdata = dev_get_platdata(&pdev->dev);
-       uint32_t val;
-       unsigned long clkrate;
-       struct resource *res;
-       void __iomem *base;
-       struct clk *clk;
-       int ret = 0;
-
-       clk = clk_get(&pdev->dev, "aemif");
-       if (IS_ERR(clk)) {
-               ret = PTR_ERR(clk);
-               dev_dbg(&pdev->dev, "unable to get AEMIF clock, err %d\n", ret);
-               return ret;
-       }
-
-       ret = clk_prepare_enable(clk);
-       if (ret < 0) {
-               dev_dbg(&pdev->dev, "unable to enable AEMIF clock, err %d\n",
-                       ret);
-               goto err_put;
-       }
-
-       res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
-       if (!res) {
-               dev_err(&pdev->dev, "cannot get IORESOURCE_MEM\n");
-               ret = -ENOMEM;
-               goto err;
-       }
-
-       base = ioremap(res->start, resource_size(res));
-       if (!base) {
-               dev_err(&pdev->dev, "ioremap failed for resource %pR\n", res);
-               ret = -ENOMEM;
-               goto err;
-       }
-
-       /*
-        * Setup Async configuration register in case we did not boot
-        * from NAND and so bootloader did not bother to set it up.
-        */
-       val = davinci_aemif_readl(base, A1CR_OFFSET + pdata->core_chipsel * 4);
-       /*
-        * Extended Wait is not valid and Select Strobe mode is not
-        * used
-        */
-       val &= ~(ACR_ASIZE_MASK | ACR_EW_MASK | ACR_SS_MASK);
-       if (pdata->options & NAND_BUSWIDTH_16)
-               val |= 0x1;
-
-       davinci_aemif_writel(base, A1CR_OFFSET + pdata->core_chipsel * 4, val);
-
-       clkrate = clk_get_rate(clk);
-
-       if (pdata->timing)
-               ret = davinci_aemif_setup_timing(pdata->timing, base,
-                                                pdata->core_chipsel, clkrate);
-
-       if (ret < 0)
-               dev_dbg(&pdev->dev, "NAND timing values setup fail\n");
-
-       iounmap(base);
-err:
-       clk_disable_unprepare(clk);
-err_put:
-       clk_put(clk);
-       return ret;
-}
index 14a6fc06174499ba031e4868add99aac34083d2f..7d8ab36ff83d95f0adee2df7babada977dfafb56 100644 (file)
@@ -28,6 +28,7 @@
 #include <linux/platform_data/mtd-davinci-aemif.h>
 #include <linux/platform_data/spi-davinci.h>
 #include <linux/platform_data/usb-davinci.h>
+#include <linux/platform_data/ti-aemif.h>
 #include <linux/regulator/machine.h>
 
 #include <asm/mach-types.h>
@@ -110,15 +111,9 @@ static __init void da830_evm_usb_init(void)
 {
        int ret;
 
-       /* USB_REFCLKIN is not used. */
-       ret = da8xx_register_usb20_phy_clk(false);
+       ret = da8xx_register_usb_phy_clocks();
        if (ret)
-               pr_warn("%s: USB 2.0 PHY CLK registration failed: %d\n",
-                       __func__, ret);
-
-       ret = da8xx_register_usb11_phy_clk(false);
-       if (ret)
-               pr_warn("%s: USB 1.1 PHY CLK registration failed: %d\n",
+               pr_warn("%s: USB PHY CLK registration failed: %d\n",
                        __func__, ret);
 
        ret = da8xx_register_usb_phy();
@@ -339,14 +334,48 @@ static struct resource da830_evm_nand_resources[] = {
        },
 };
 
-static struct platform_device da830_evm_nand_device = {
-       .name           = "davinci_nand",
-       .id             = 1,
-       .dev            = {
-               .platform_data  = &da830_evm_nand_pdata,
+static struct platform_device da830_evm_aemif_devices[] = {
+       {
+               .name           = "davinci_nand",
+               .id             = 1,
+               .dev            = {
+                       .platform_data  = &da830_evm_nand_pdata,
+               },
+               .num_resources  = ARRAY_SIZE(da830_evm_nand_resources),
+               .resource       = da830_evm_nand_resources,
+       },
+};
+
+static struct resource da830_evm_aemif_resource[] = {
+       {
+               .start  = DA8XX_AEMIF_CTL_BASE,
+               .end    = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1,
+               .flags  = IORESOURCE_MEM,
+       },
+};
+
+static struct aemif_abus_data da830_evm_aemif_abus_data[] = {
+       {
+               .cs     = 3,
        },
-       .num_resources  = ARRAY_SIZE(da830_evm_nand_resources),
-       .resource       = da830_evm_nand_resources,
+};
+
+static struct aemif_platform_data da830_evm_aemif_pdata = {
+       .abus_data              = da830_evm_aemif_abus_data,
+       .num_abus_data          = ARRAY_SIZE(da830_evm_aemif_abus_data),
+       .sub_devices            = da830_evm_aemif_devices,
+       .num_sub_devices        = ARRAY_SIZE(da830_evm_aemif_devices),
+       .cs_offset              = 2,
+};
+
+static struct platform_device da830_evm_aemif_device = {
+       .name           = "ti-aemif",
+       .id             = -1,
+       .dev = {
+               .platform_data = &da830_evm_aemif_pdata,
+       },
+       .resource       = da830_evm_aemif_resource,
+       .num_resources  = ARRAY_SIZE(da830_evm_aemif_resource),
 };
 
 /*
@@ -377,12 +406,9 @@ static inline void da830_evm_init_nand(int mux_mode)
        if (ret)
                pr_warn("%s: emif25 mux setup failed: %d\n", __func__, ret);
 
-       ret = platform_device_register(&da830_evm_nand_device);
+       ret = platform_device_register(&da830_evm_aemif_device);
        if (ret)
-               pr_warn("%s: NAND device not registered\n", __func__);
-
-       if (davinci_aemif_setup(&da830_evm_nand_device))
-               pr_warn("%s: Cannot configure AEMIF\n", __func__);
+               pr_warn("%s: AEMIF device not registered\n", __func__);
 
        gpio_direction_output(mux_mode, 1);
 }
@@ -557,6 +583,8 @@ static __init void da830_evm_init(void)
        struct davinci_soc_info *soc_info = &davinci_soc_info;
        int ret;
 
+       da830_register_clocks();
+
        ret = da830_register_gpio();
        if (ret)
                pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
index e22fb40e34bc55be6dd807de63fb9cd009107916..e1a949b47306d2eaf93a14b76e0ac720373e1c10 100644 (file)
@@ -33,6 +33,7 @@
 #include <linux/platform_data/gpio-davinci.h>
 #include <linux/platform_data/mtd-davinci.h>
 #include <linux/platform_data/mtd-davinci-aemif.h>
+#include <linux/platform_data/ti-aemif.h>
 #include <linux/platform_data/spi-davinci.h>
 #include <linux/platform_data/uio_pruss.h>
 #include <linux/regulator/machine.h>
@@ -185,16 +186,6 @@ static struct resource da850_evm_norflash_resource[] = {
        },
 };
 
-static struct platform_device da850_evm_norflash_device = {
-       .name           = "physmap-flash",
-       .id             = 0,
-       .dev            = {
-               .platform_data  = &da850_evm_norflash_data,
-       },
-       .num_resources  = 1,
-       .resource       = da850_evm_norflash_resource,
-};
-
 /* DA850/OMAP-L138 EVM includes a 512 MByte large-page NAND flash
  * (128K blocks). It may be used instead of the (default) SPI flash
  * to boot, using TI's tools to install the secondary boot loader
@@ -266,37 +257,58 @@ static struct resource da850_evm_nandflash_resource[] = {
        },
 };
 
-static struct platform_device da850_evm_nandflash_device = {
-       .name           = "davinci_nand",
-       .id             = 1,
-       .dev            = {
-               .platform_data  = &da850_evm_nandflash_data,
-       },
-       .num_resources  = ARRAY_SIZE(da850_evm_nandflash_resource),
-       .resource       = da850_evm_nandflash_resource,
+static struct resource da850_evm_aemif_resource[] = {
+       {
+               .start  = DA8XX_AEMIF_CTL_BASE,
+               .end    = DA8XX_AEMIF_CTL_BASE + SZ_32K,
+               .flags  = IORESOURCE_MEM,
+       }
 };
 
-static struct platform_device *da850_evm_devices[] = {
-       &da850_evm_nandflash_device,
-       &da850_evm_norflash_device,
+static struct aemif_abus_data da850_evm_aemif_abus_data[] = {
+       {
+               .cs     = 3,
+       }
 };
 
-#define DA8XX_AEMIF_CE2CFG_OFFSET      0x10
-#define DA8XX_AEMIF_ASIZE_16BIT                0x1
-
-static void __init da850_evm_init_nor(void)
-{
-       void __iomem *aemif_addr;
-
-       aemif_addr = ioremap(DA8XX_AEMIF_CTL_BASE, SZ_32K);
+static struct platform_device da850_evm_aemif_devices[] = {
+       {
+               .name           = "davinci_nand",
+               .id             = 1,
+               .dev            = {
+                       .platform_data  = &da850_evm_nandflash_data,
+               },
+               .num_resources  = ARRAY_SIZE(da850_evm_nandflash_resource),
+               .resource       = da850_evm_nandflash_resource,
+       },
+       {
+               .name           = "physmap-flash",
+               .id             = 0,
+               .dev            = {
+                       .platform_data  = &da850_evm_norflash_data,
+               },
+               .num_resources  = 1,
+               .resource       = da850_evm_norflash_resource,
+       }
+};
 
-       /* Configure data bus width of CS2 to 16 bit */
-       writel(readl(aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET) |
-               DA8XX_AEMIF_ASIZE_16BIT,
-               aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET);
+static struct aemif_platform_data da850_evm_aemif_pdata = {
+       .cs_offset = 2,
+       .abus_data = da850_evm_aemif_abus_data,
+       .num_abus_data = ARRAY_SIZE(da850_evm_aemif_abus_data),
+       .sub_devices = da850_evm_aemif_devices,
+       .num_sub_devices = ARRAY_SIZE(da850_evm_aemif_devices),
+};
 
-       iounmap(aemif_addr);
-}
+static struct platform_device da850_evm_aemif_device = {
+       .name           = "ti-aemif",
+       .id             = -1,
+       .dev = {
+               .platform_data  = &da850_evm_aemif_pdata,
+       },
+       .resource       = da850_evm_aemif_resource,
+       .num_resources  = ARRAY_SIZE(da850_evm_aemif_resource),
+};
 
 static const short da850_evm_nand_pins[] = {
        DA850_EMA_D_0, DA850_EMA_D_1, DA850_EMA_D_2, DA850_EMA_D_3,
@@ -339,13 +351,10 @@ static inline void da850_evm_setup_nor_nand(void)
                        pr_warn("%s: NOR mux setup failed: %d\n",
                                __func__, ret);
 
-               da850_evm_init_nor();
-
-               platform_add_devices(da850_evm_devices,
-                                       ARRAY_SIZE(da850_evm_devices));
-
-               if (davinci_aemif_setup(&da850_evm_nandflash_device))
-                       pr_warn("%s: Cannot configure AEMIF.\n", __func__);
+               ret = platform_device_register(&da850_evm_aemif_device);
+               if (ret)
+                       pr_warn("%s: registering aemif failed: %d\n",
+                               __func__, ret);
        }
 }
 
@@ -774,7 +783,7 @@ static struct gpiod_lookup_table mmc_gpios_table = {
                GPIO_LOOKUP("davinci_gpio.0", DA850_MMCSD_CD_PIN, "cd",
                            GPIO_ACTIVE_LOW),
                GPIO_LOOKUP("davinci_gpio.0", DA850_MMCSD_WP_PIN, "wp",
-                           GPIO_ACTIVE_LOW),
+                           GPIO_ACTIVE_HIGH),
        },
 };
 
@@ -1340,6 +1349,8 @@ static __init void da850_evm_init(void)
 {
        int ret;
 
+       da850_register_clocks();
+
        ret = da850_register_gpio();
        if (ret)
                pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
index a3377f95944489ed9051279bccb5a0cc392bba73..f53a461a606f60107e669e122b8acce63d5a37c9 100644 (file)
@@ -394,6 +394,8 @@ static __init void dm355_evm_init(void)
        struct clk *aemif;
        int ret;
 
+       dm355_register_clocks();
+
        ret = dm355_gpio_register();
        if (ret)
                pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
index 8249a0bf69f0426d9ceed1b65a29064b2378dcb2..0fdf1d03eb1107fffe7e69c2322eaffae0555620 100644 (file)
@@ -234,6 +234,8 @@ static __init void dm355_leopard_init(void)
        struct clk *aemif;
        int ret;
 
+       dm355_register_clocks();
+
        ret = dm355_gpio_register();
        if (ret)
                pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
index 435f7ec7d9afa92b4f35a39d7fd365a04b436624..8143756ff38b022be3011fc6c901d9097edcf02b 100644 (file)
@@ -28,6 +28,7 @@
 #include <linux/spi/spi.h>
 #include <linux/spi/eeprom.h>
 #include <linux/v4l2-dv-timings.h>
+#include <linux/platform_data/ti-aemif.h>
 
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -159,16 +160,49 @@ static struct resource davinci_nand_resources[] = {
        },
 };
 
-static struct platform_device davinci_nand_device = {
-       .name                   = "davinci_nand",
-       .id                     = 0,
-       .num_resources          = ARRAY_SIZE(davinci_nand_resources),
-       .resource               = davinci_nand_resources,
-       .dev                    = {
-               .platform_data  = &davinci_nand_data,
+static struct platform_device davinci_aemif_devices[] = {
+       {
+               .name           = "davinci_nand",
+               .id             = 0,
+               .num_resources  = ARRAY_SIZE(davinci_nand_resources),
+               .resource       = davinci_nand_resources,
+               .dev            = {
+                       .platform_data  = &davinci_nand_data,
+               },
+       }
+};
+
+static struct resource davinci_aemif_resources[] = {
+       {
+               .start          = DM365_ASYNC_EMIF_CONTROL_BASE,
+               .end            = DM365_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
+               .flags          = IORESOURCE_MEM,
        },
 };
 
+static struct aemif_abus_data da850_evm_aemif_abus_data[] = {
+       {
+               .cs             = 1,
+       },
+};
+
+static struct aemif_platform_data davinci_aemif_pdata = {
+       .abus_data              = da850_evm_aemif_abus_data,
+       .num_abus_data          = ARRAY_SIZE(da850_evm_aemif_abus_data),
+       .sub_devices            = davinci_aemif_devices,
+       .num_sub_devices        = ARRAY_SIZE(davinci_aemif_devices),
+};
+
+static struct platform_device davinci_aemif_device = {
+       .name                   = "ti-aemif",
+       .id                     = -1,
+       .dev = {
+               .platform_data  = &davinci_aemif_pdata,
+       },
+       .resource               = davinci_aemif_resources,
+       .num_resources          = ARRAY_SIZE(davinci_aemif_resources),
+};
+
 static struct at24_platform_data eeprom_info = {
        .byte_len       = (256*1024) / 8,
        .page_size      = 64,
@@ -537,10 +571,6 @@ static void __init evm_init_i2c(void)
        i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
 }
 
-static struct platform_device *dm365_evm_nand_devices[] __initdata = {
-       &davinci_nand_device,
-};
-
 static inline int have_leds(void)
 {
 #ifdef CONFIG_LEDS_CLASS
@@ -628,6 +658,7 @@ static void __init evm_init_cpld(void)
        u8 mux, resets;
        const char *label;
        struct clk *aemif_clk;
+       int rc;
 
        /* Make sure we can configure the CPLD through CS1.  Then
         * leave it on for later access to MMC and LED registers.
@@ -660,8 +691,10 @@ fail:
                /* external keypad mux */
                mux |= BIT(7);
 
-               platform_add_devices(dm365_evm_nand_devices,
-                               ARRAY_SIZE(dm365_evm_nand_devices));
+               rc = platform_device_register(&davinci_aemif_device);
+               if (rc)
+                       pr_warn("%s(): error registering the aemif device: %d\n",
+                               __func__, rc);
        } else {
                /* no OneNAND support yet */
        }
@@ -742,6 +775,8 @@ static __init void dm365_evm_init(void)
 {
        int ret;
 
+       dm365_register_clocks();
+
        ret = dm365_gpio_register();
        if (ret)
                pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
index 48436f74fd7108bdc984a0c5af7c9be14e808369..e4a8f9225d1667f7ab733bdf93e423ea9df1426c 100644 (file)
@@ -42,6 +42,7 @@
 #include <linux/platform_data/mmc-davinci.h>
 #include <linux/platform_data/usb-davinci.h>
 #include <linux/platform_data/mtd-davinci-aemif.h>
+#include <linux/platform_data/ti-aemif.h>
 
 #include "davinci.h"
 
@@ -174,14 +175,47 @@ static struct resource davinci_evm_nandflash_resource[] = {
        },
 };
 
-static struct platform_device davinci_evm_nandflash_device = {
-       .name           = "davinci_nand",
-       .id             = 0,
-       .dev            = {
-               .platform_data  = &davinci_evm_nandflash_data,
+static struct resource davinci_evm_aemif_resource[] = {
+       {
+               .start          = DM644X_ASYNC_EMIF_CONTROL_BASE,
+               .end            = DM644X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
+               .flags          = IORESOURCE_MEM,
+       },
+};
+
+static struct aemif_abus_data davinci_evm_aemif_abus_data[] = {
+       {
+               .cs             = 1,
+       },
+};
+
+static struct platform_device davinci_evm_nandflash_devices[] = {
+       {
+               .name           = "davinci_nand",
+               .id             = 0,
+               .dev            = {
+                       .platform_data  = &davinci_evm_nandflash_data,
+               },
+               .num_resources  = ARRAY_SIZE(davinci_evm_nandflash_resource),
+               .resource       = davinci_evm_nandflash_resource,
+       },
+};
+
+static struct aemif_platform_data davinci_evm_aemif_pdata = {
+       .abus_data = davinci_evm_aemif_abus_data,
+       .num_abus_data = ARRAY_SIZE(davinci_evm_aemif_abus_data),
+       .sub_devices = davinci_evm_nandflash_devices,
+       .num_sub_devices = ARRAY_SIZE(davinci_evm_nandflash_devices),
+};
+
+static struct platform_device davinci_evm_aemif_device = {
+       .name                   = "ti-aemif",
+       .id                     = -1,
+       .dev = {
+               .platform_data  = &davinci_evm_aemif_pdata,
        },
-       .num_resources  = ARRAY_SIZE(davinci_evm_nandflash_resource),
-       .resource       = davinci_evm_nandflash_resource,
+       .resource               = davinci_evm_aemif_resource,
+       .num_resources          = ARRAY_SIZE(davinci_evm_aemif_resource),
 };
 
 static u64 davinci_fb_dma_mask = DMA_BIT_MASK(32);
@@ -773,6 +807,8 @@ static __init void davinci_evm_init(void)
        struct clk *aemif_clk;
        struct davinci_soc_info *soc_info = &davinci_soc_info;
 
+       dm644x_register_clocks();
+
        dm644x_init_devices();
 
        ret = dm644x_gpio_register();
@@ -793,12 +829,7 @@ static __init void davinci_evm_init(void)
 
                /* only one device will be jumpered and detected */
                if (HAS_NAND) {
-                       platform_device_register(&davinci_evm_nandflash_device);
-
-                       if (davinci_aemif_setup(&davinci_evm_nandflash_device))
-                               pr_warn("%s: Cannot configure AEMIF\n",
-                                       __func__);
-
+                       platform_device_register(&davinci_evm_aemif_device);
 #ifdef CONFIG_I2C
                        evm_leds[7].default_trigger = "nand-disk";
 #endif
index 584064fdabf5bbb6466f7f19e7d686199258e542..3e5ee09ee717ea339428501b2d06b94909de315c 100644 (file)
@@ -24,6 +24,7 @@
 #include <linux/i2c.h>
 #include <linux/platform_data/at24.h>
 #include <linux/platform_data/pcf857x.h>
+#include <linux/platform_data/ti-aemif.h>
 
 #include <media/i2c/tvp514x.h>
 #include <media/i2c/adv7343.h>
@@ -106,18 +107,49 @@ static struct resource davinci_nand_resources[] = {
        },
 };
 
-static struct platform_device davinci_nand_device = {
-       .name                   = "davinci_nand",
-       .id                     = 0,
+static struct platform_device davinci_aemif_devices[] = {
+       {
+               .name           = "davinci_nand",
+               .id             = 0,
+               .num_resources  = ARRAY_SIZE(davinci_nand_resources),
+               .resource       = davinci_nand_resources,
+               .dev            = {
+                       .platform_data  = &davinci_nand_data,
+               },
+       },
+};
 
-       .num_resources          = ARRAY_SIZE(davinci_nand_resources),
-       .resource               = davinci_nand_resources,
+static struct resource davinci_aemif_resources[] = {
+       {
+               .start  = DM646X_ASYNC_EMIF_CONTROL_BASE,
+               .end    = DM646X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
+               .flags  = IORESOURCE_MEM,
+       },
+};
 
-       .dev                    = {
-               .platform_data  = &davinci_nand_data,
+static struct aemif_abus_data davinci_aemif_abus_data[] = {
+       {
+               .cs     = 1,
        },
 };
 
+static struct aemif_platform_data davinci_aemif_pdata = {
+       .abus_data              = davinci_aemif_abus_data,
+       .num_abus_data          = ARRAY_SIZE(davinci_aemif_abus_data),
+       .sub_devices            = davinci_aemif_devices,
+       .num_sub_devices        = ARRAY_SIZE(davinci_aemif_devices),
+};
+
+static struct platform_device davinci_aemif_device = {
+       .name           = "ti-aemif",
+       .id             = -1,
+       .dev = {
+               .platform_data  = &davinci_aemif_pdata,
+       },
+       .resource       = davinci_aemif_resources,
+       .num_resources  = ARRAY_SIZE(davinci_aemif_resources),
+};
+
 #define HAS_ATA                (IS_ENABLED(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \
                         IS_ENABLED(CONFIG_PATA_BK3710))
 
@@ -776,6 +808,8 @@ static __init void evm_init(void)
        int ret;
        struct davinci_soc_info *soc_info = &davinci_soc_info;
 
+       dm646x_register_clocks();
+
        ret = dm646x_gpio_register();
        if (ret)
                pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
@@ -791,10 +825,8 @@ static __init void evm_init(void)
        if (machine_is_davinci_dm6467tevm())
                davinci_nand_data.timing = &dm6467tevm_nandflash_timing;
 
-       platform_device_register(&davinci_nand_device);
-
-       if (davinci_aemif_setup(&davinci_nand_device))
-               pr_warn("%s: Cannot configure AEMIF.\n", __func__);
+       if (platform_device_register(&davinci_aemif_device))
+               pr_warn("%s: Cannot register AEMIF device.\n", __func__);
 
        dm646x_init_edma(dm646x_edma_rsv);
 
index 37b3e48a21d1b6d37741857dfbe170af5e2be7b8..2933e0c87cfacfe04d8da175d20b5374bf0cb648 100644 (file)
@@ -30,6 +30,7 @@
 #include <mach/da8xx.h>
 #include <linux/platform_data/mtd-davinci.h>
 #include <linux/platform_data/mtd-davinci-aemif.h>
+#include <linux/platform_data/ti-aemif.h>
 #include <mach/mux.h>
 #include <linux/platform_data/spi-davinci.h>
 
@@ -422,27 +423,53 @@ static struct resource mityomapl138_nandflash_resource[] = {
        },
 };
 
-static struct platform_device mityomapl138_nandflash_device = {
-       .name           = "davinci_nand",
-       .id             = 1,
-       .dev            = {
-               .platform_data  = &mityomapl138_nandflash_data,
+static struct platform_device mityomapl138_aemif_devices[] = {
+       {
+               .name           = "davinci_nand",
+               .id             = 1,
+               .dev            = {
+                       .platform_data  = &mityomapl138_nandflash_data,
+               },
+               .num_resources  = ARRAY_SIZE(mityomapl138_nandflash_resource),
+               .resource       = mityomapl138_nandflash_resource,
+       },
+};
+
+static struct resource mityomapl138_aemif_resources[] = {
+       {
+               .start  = DA8XX_AEMIF_CTL_BASE,
+               .end    = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1,
+               .flags  = IORESOURCE_MEM,
        },
-       .num_resources  = ARRAY_SIZE(mityomapl138_nandflash_resource),
-       .resource       = mityomapl138_nandflash_resource,
 };
 
-static struct platform_device *mityomapl138_devices[] __initdata = {
-       &mityomapl138_nandflash_device,
+static struct aemif_abus_data mityomapl138_aemif_abus_data[] = {
+       {
+               .cs     = 1,
+       },
+};
+
+static struct aemif_platform_data mityomapl138_aemif_pdata = {
+       .abus_data              = mityomapl138_aemif_abus_data,
+       .num_abus_data          = ARRAY_SIZE(mityomapl138_aemif_abus_data),
+       .sub_devices            = mityomapl138_aemif_devices,
+       .num_sub_devices        = ARRAY_SIZE(mityomapl138_aemif_devices),
+};
+
+static struct platform_device mityomapl138_aemif_device = {
+       .name           = "ti-aemif",
+       .id             = -1,
+       .dev = {
+               .platform_data  = &mityomapl138_aemif_pdata,
+       },
+       .resource       = mityomapl138_aemif_resources,
+       .num_resources  = ARRAY_SIZE(mityomapl138_aemif_resources),
 };
 
 static void __init mityomapl138_setup_nand(void)
 {
-       platform_add_devices(mityomapl138_devices,
-                                ARRAY_SIZE(mityomapl138_devices));
-
-       if (davinci_aemif_setup(&mityomapl138_nandflash_device))
-               pr_warn("%s: Cannot configure AEMIF\n", __func__);
+       if (platform_device_register(&mityomapl138_aemif_device))
+               pr_warn("%s: Cannot register AEMIF device\n", __func__);
 }
 
 static const short mityomap_mii_pins[] = {
@@ -503,6 +530,8 @@ static void __init mityomapl138_init(void)
 {
        int ret;
 
+       da850_register_clocks();
+
        /* for now, no special EDMA channels are reserved */
        ret = da850_register_edma(NULL);
        if (ret)
index 25ad9b0612bee50024f5c35fa1b62f15c134bf56..353f9e5a1454a67d674c90c663ccbabd6e0dcae1 100644 (file)
@@ -175,6 +175,8 @@ static __init void davinci_ntosd2_init(void)
        struct clk *aemif_clk;
        struct davinci_soc_info *soc_info = &davinci_soc_info;
 
+       dm644x_register_clocks();
+
        dm644x_init_devices();
 
        ret = dm644x_gpio_register();
index be8b892a6ea7061a8af9b932e007cc8652701b0f..8e8d51f4a2762275e5c3171ca6b3f988e61dea2b 100644 (file)
 #include <linux/interrupt.h>
 #include <linux/gpio.h>
 #include <linux/gpio/machine.h>
+#include <linux/mtd/partitions.h>
+#include <linux/mtd/rawnand.h>
 #include <linux/platform_data/gpio-davinci.h>
+#include <linux/platform_data/mtd-davinci.h>
+#include <linux/platform_data/mtd-davinci-aemif.h>
+#include <linux/platform_data/ti-aemif.h>
 #include <linux/regulator/machine.h>
 
 #include <asm/mach-types.h>
@@ -166,6 +171,129 @@ mmc_setup_mmcsd_fail:
        gpiod_remove_lookup_table(&mmc_gpios_table);
 }
 
+static struct mtd_partition omapl138_hawk_nandflash_partition[] = {
+       {
+               .name           = "u-boot env",
+               .offset         = 0,
+               .size           = SZ_128K,
+               .mask_flags     = MTD_WRITEABLE,
+        },
+       {
+               .name           = "u-boot",
+               .offset         = MTDPART_OFS_APPEND,
+               .size           = SZ_512K,
+               .mask_flags     = MTD_WRITEABLE,
+       },
+       {
+               .name           = "free space",
+               .offset         = MTDPART_OFS_APPEND,
+               .size           = MTDPART_SIZ_FULL,
+               .mask_flags     = 0,
+       },
+};
+
+static struct davinci_aemif_timing omapl138_hawk_nandflash_timing = {
+       .wsetup         = 24,
+       .wstrobe        = 21,
+       .whold          = 14,
+       .rsetup         = 19,
+       .rstrobe        = 50,
+       .rhold          = 0,
+       .ta             = 20,
+};
+
+static struct davinci_nand_pdata omapl138_hawk_nandflash_data = {
+       .core_chipsel   = 1,
+       .parts          = omapl138_hawk_nandflash_partition,
+       .nr_parts       = ARRAY_SIZE(omapl138_hawk_nandflash_partition),
+       .ecc_mode       = NAND_ECC_HW,
+       .ecc_bits       = 4,
+       .bbt_options    = NAND_BBT_USE_FLASH,
+       .options        = NAND_BUSWIDTH_16,
+       .timing         = &omapl138_hawk_nandflash_timing,
+       .mask_chipsel   = 0,
+       .mask_ale       = 0,
+       .mask_cle       = 0,
+};
+
+static struct resource omapl138_hawk_nandflash_resource[] = {
+       {
+               .start  = DA8XX_AEMIF_CS3_BASE,
+               .end    = DA8XX_AEMIF_CS3_BASE + SZ_32M,
+               .flags  = IORESOURCE_MEM,
+       },
+       {
+               .start  = DA8XX_AEMIF_CTL_BASE,
+               .end    = DA8XX_AEMIF_CTL_BASE + SZ_32K,
+               .flags  = IORESOURCE_MEM,
+       },
+};
+
+static struct resource omapl138_hawk_aemif_resource[] = {
+       {
+               .start  = DA8XX_AEMIF_CTL_BASE,
+               .end    = DA8XX_AEMIF_CTL_BASE + SZ_32K,
+               .flags  = IORESOURCE_MEM,
+       }
+};
+
+static struct aemif_abus_data omapl138_hawk_aemif_abus_data[] = {
+       {
+               .cs     = 3,
+       }
+};
+
+static struct platform_device omapl138_hawk_aemif_devices[] = {
+       {
+               .name           = "davinci_nand",
+               .id             = -1,
+               .dev            = {
+                       .platform_data  = &omapl138_hawk_nandflash_data,
+               },
+               .resource       = omapl138_hawk_nandflash_resource,
+               .num_resources  = ARRAY_SIZE(omapl138_hawk_nandflash_resource),
+       }
+};
+
+static struct aemif_platform_data omapl138_hawk_aemif_pdata = {
+       .cs_offset = 2,
+       .abus_data = omapl138_hawk_aemif_abus_data,
+       .num_abus_data = ARRAY_SIZE(omapl138_hawk_aemif_abus_data),
+       .sub_devices = omapl138_hawk_aemif_devices,
+       .num_sub_devices = ARRAY_SIZE(omapl138_hawk_aemif_devices),
+};
+
+static struct platform_device omapl138_hawk_aemif_device = {
+       .name           = "ti-aemif",
+       .id             = -1,
+       .dev = {
+               .platform_data  = &omapl138_hawk_aemif_pdata,
+       },
+       .resource       = omapl138_hawk_aemif_resource,
+       .num_resources  = ARRAY_SIZE(omapl138_hawk_aemif_resource),
+};
+
+static const short omapl138_hawk_nand_pins[] = {
+       DA850_EMA_WAIT_1, DA850_NEMA_OE, DA850_NEMA_WE, DA850_NEMA_CS_3,
+       DA850_EMA_D_0, DA850_EMA_D_1, DA850_EMA_D_2, DA850_EMA_D_3,
+       DA850_EMA_D_4, DA850_EMA_D_5, DA850_EMA_D_6, DA850_EMA_D_7,
+       DA850_EMA_D_8, DA850_EMA_D_9, DA850_EMA_D_10, DA850_EMA_D_11,
+       DA850_EMA_D_12, DA850_EMA_D_13, DA850_EMA_D_14, DA850_EMA_D_15,
+       DA850_EMA_A_1, DA850_EMA_A_2,
+       -1
+};
+
+static int omapl138_hawk_register_aemif(void)
+{
+       int ret;
+
+       ret = davinci_cfg_reg_list(omapl138_hawk_nand_pins);
+       if (ret)
+               pr_warn("%s: NAND mux setup failed: %d\n", __func__, ret);
+
+       return platform_device_register(&omapl138_hawk_aemif_device);
+}
+
 static irqreturn_t omapl138_hawk_usb_ocic_irq(int irq, void *dev_id);
 static da8xx_ocic_handler_t hawk_usb_ocic_handler;
 
@@ -236,14 +364,9 @@ static __init void omapl138_hawk_usb_init(void)
                return;
        }
 
-       ret = da8xx_register_usb20_phy_clk(false);
-       if (ret)
-               pr_warn("%s: USB 2.0 PHY CLK registration failed: %d\n",
-                       __func__, ret);
-
-       ret = da8xx_register_usb11_phy_clk(false);
+       ret = da8xx_register_usb_phy_clocks();
        if (ret)
-               pr_warn("%s: USB 1.1 PHY CLK registration failed: %d\n",
+               pr_warn("%s: USB PHY CLK registration failed: %d\n",
                        __func__, ret);
 
        ret = da8xx_register_usb_phy();
@@ -285,6 +408,8 @@ static __init void omapl138_hawk_init(void)
 {
        int ret;
 
+       da850_register_clocks();
+
        ret = da850_register_gpio();
        if (ret)
                pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
@@ -301,6 +426,10 @@ static __init void omapl138_hawk_init(void)
 
        omapl138_hawk_usb_init();
 
+       ret = omapl138_hawk_register_aemif();
+       if (ret)
+               pr_warn("%s: aemif registration failed: %d\n", __func__, ret);
+
        ret = da8xx_register_watchdog();
        if (ret)
                pr_warn("%s: watchdog registration failed: %d\n",
index e7c1728b0833a0b791de802866a3ef7578955c67..792bb84d50111e4e99a3380fee5373f8ed9640db 100644 (file)
@@ -134,6 +134,8 @@ static __init void davinci_sffsdr_init(void)
 {
        struct davinci_soc_info *soc_info = &davinci_soc_info;
 
+       dm644x_register_clocks();
+
        dm644x_init_devices();
 
        platform_add_devices(davinci_sffsdr_devices,
diff --git a/arch/arm/mach-davinci/clock.c b/arch/arm/mach-davinci/clock.c
deleted file mode 100644 (file)
index f77a4f7..0000000
+++ /dev/null
@@ -1,745 +0,0 @@
-/*
- * Clock and PLL control for DaVinci devices
- *
- * Copyright (C) 2006-2007 Texas Instruments.
- * Copyright (C) 2008-2009 Deep Root Systems, LLC
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/errno.h>
-#include <linux/clk.h>
-#include <linux/err.h>
-#include <linux/mutex.h>
-#include <linux/io.h>
-#include <linux/delay.h>
-
-#include <mach/hardware.h>
-
-#include <mach/clock.h>
-#include "psc.h"
-#include <mach/cputype.h>
-#include "clock.h"
-
-static LIST_HEAD(clocks);
-static DEFINE_MUTEX(clocks_mutex);
-static DEFINE_SPINLOCK(clockfw_lock);
-
-void davinci_clk_enable(struct clk *clk)
-{
-       if (clk->parent)
-               davinci_clk_enable(clk->parent);
-       if (clk->usecount++ == 0) {
-               if (clk->flags & CLK_PSC)
-                       davinci_psc_config(clk->domain, clk->gpsc, clk->lpsc,
-                                          true, clk->flags);
-               else if (clk->clk_enable)
-                       clk->clk_enable(clk);
-       }
-}
-
-void davinci_clk_disable(struct clk *clk)
-{
-       if (WARN_ON(clk->usecount == 0))
-               return;
-       if (--clk->usecount == 0) {
-               if (!(clk->flags & CLK_PLL) && (clk->flags & CLK_PSC))
-                       davinci_psc_config(clk->domain, clk->gpsc, clk->lpsc,
-                                          false, clk->flags);
-               else if (clk->clk_disable)
-                       clk->clk_disable(clk);
-       }
-       if (clk->parent)
-               davinci_clk_disable(clk->parent);
-}
-
-int davinci_clk_reset(struct clk *clk, bool reset)
-{
-       unsigned long flags;
-
-       if (clk == NULL || IS_ERR(clk))
-               return -EINVAL;
-
-       spin_lock_irqsave(&clockfw_lock, flags);
-       if (clk->flags & CLK_PSC)
-               davinci_psc_reset(clk->gpsc, clk->lpsc, reset);
-       spin_unlock_irqrestore(&clockfw_lock, flags);
-
-       return 0;
-}
-EXPORT_SYMBOL(davinci_clk_reset);
-
-int davinci_clk_reset_assert(struct clk *clk)
-{
-       if (clk == NULL || IS_ERR(clk) || !clk->reset)
-               return -EINVAL;
-
-       return clk->reset(clk, true);
-}
-EXPORT_SYMBOL(davinci_clk_reset_assert);
-
-int davinci_clk_reset_deassert(struct clk *clk)
-{
-       if (clk == NULL || IS_ERR(clk) || !clk->reset)
-               return -EINVAL;
-
-       return clk->reset(clk, false);
-}
-EXPORT_SYMBOL(davinci_clk_reset_deassert);
-
-int clk_enable(struct clk *clk)
-{
-       unsigned long flags;
-
-       if (!clk)
-               return 0;
-       else if (IS_ERR(clk))
-               return -EINVAL;
-
-       spin_lock_irqsave(&clockfw_lock, flags);
-       davinci_clk_enable(clk);
-       spin_unlock_irqrestore(&clockfw_lock, flags);
-
-       return 0;
-}
-EXPORT_SYMBOL(clk_enable);
-
-void clk_disable(struct clk *clk)
-{
-       unsigned long flags;
-
-       if (clk == NULL || IS_ERR(clk))
-               return;
-
-       spin_lock_irqsave(&clockfw_lock, flags);
-       davinci_clk_disable(clk);
-       spin_unlock_irqrestore(&clockfw_lock, flags);
-}
-EXPORT_SYMBOL(clk_disable);
-
-unsigned long clk_get_rate(struct clk *clk)
-{
-       if (clk == NULL || IS_ERR(clk))
-               return 0;
-
-       return clk->rate;
-}
-EXPORT_SYMBOL(clk_get_rate);
-
-long clk_round_rate(struct clk *clk, unsigned long rate)
-{
-       if (clk == NULL || IS_ERR(clk))
-               return 0;
-
-       if (clk->round_rate)
-               return clk->round_rate(clk, rate);
-
-       return clk->rate;
-}
-EXPORT_SYMBOL(clk_round_rate);
-
-/* Propagate rate to children */
-static void propagate_rate(struct clk *root)
-{
-       struct clk *clk;
-
-       list_for_each_entry(clk, &root->children, childnode) {
-               if (clk->recalc)
-                       clk->rate = clk->recalc(clk);
-               propagate_rate(clk);
-       }
-}
-
-int clk_set_rate(struct clk *clk, unsigned long rate)
-{
-       unsigned long flags;
-       int ret = -EINVAL;
-
-       if (!clk)
-               return 0;
-       else if (IS_ERR(clk))
-               return -EINVAL;
-
-       if (clk->set_rate)
-               ret = clk->set_rate(clk, rate);
-
-       spin_lock_irqsave(&clockfw_lock, flags);
-       if (ret == 0) {
-               if (clk->recalc)
-                       clk->rate = clk->recalc(clk);
-               propagate_rate(clk);
-       }
-       spin_unlock_irqrestore(&clockfw_lock, flags);
-
-       return ret;
-}
-EXPORT_SYMBOL(clk_set_rate);
-
-int clk_set_parent(struct clk *clk, struct clk *parent)
-{
-       unsigned long flags;
-
-       if (!clk)
-               return 0;
-       else if (IS_ERR(clk))
-               return -EINVAL;
-
-       /* Cannot change parent on enabled clock */
-       if (WARN_ON(clk->usecount))
-               return -EINVAL;
-
-       mutex_lock(&clocks_mutex);
-       if (clk->set_parent) {
-               int ret = clk->set_parent(clk, parent);
-
-               if (ret) {
-                       mutex_unlock(&clocks_mutex);
-                       return ret;
-               }
-       }
-       clk->parent = parent;
-       list_del_init(&clk->childnode);
-       list_add(&clk->childnode, &clk->parent->children);
-       mutex_unlock(&clocks_mutex);
-
-       spin_lock_irqsave(&clockfw_lock, flags);
-       if (clk->recalc)
-               clk->rate = clk->recalc(clk);
-       propagate_rate(clk);
-       spin_unlock_irqrestore(&clockfw_lock, flags);
-
-       return 0;
-}
-EXPORT_SYMBOL(clk_set_parent);
-
-struct clk *clk_get_parent(struct clk *clk)
-{
-       if (!clk)
-               return NULL;
-
-       return clk->parent;
-}
-EXPORT_SYMBOL(clk_get_parent);
-
-int clk_register(struct clk *clk)
-{
-       if (clk == NULL || IS_ERR(clk))
-               return -EINVAL;
-
-       if (WARN(clk->parent && !clk->parent->rate,
-                       "CLK: %s parent %s has no rate!\n",
-                       clk->name, clk->parent->name))
-               return -EINVAL;
-
-       INIT_LIST_HEAD(&clk->children);
-
-       mutex_lock(&clocks_mutex);
-       list_add_tail(&clk->node, &clocks);
-       if (clk->parent) {
-               if (clk->set_parent) {
-                       int ret = clk->set_parent(clk, clk->parent);
-
-                       if (ret) {
-                               mutex_unlock(&clocks_mutex);
-                               return ret;
-                       }
-               }
-               list_add_tail(&clk->childnode, &clk->parent->children);
-       }
-       mutex_unlock(&clocks_mutex);
-
-       /* If rate is already set, use it */
-       if (clk->rate)
-               return 0;
-
-       /* Else, see if there is a way to calculate it */
-       if (clk->recalc)
-               clk->rate = clk->recalc(clk);
-
-       /* Otherwise, default to parent rate */
-       else if (clk->parent)
-               clk->rate = clk->parent->rate;
-
-       return 0;
-}
-EXPORT_SYMBOL(clk_register);
-
-void clk_unregister(struct clk *clk)
-{
-       if (clk == NULL || IS_ERR(clk))
-               return;
-
-       mutex_lock(&clocks_mutex);
-       list_del(&clk->node);
-       list_del(&clk->childnode);
-       mutex_unlock(&clocks_mutex);
-}
-EXPORT_SYMBOL(clk_unregister);
-
-#ifdef CONFIG_DAVINCI_RESET_CLOCKS
-/*
- * Disable any unused clocks left on by the bootloader
- */
-int __init davinci_clk_disable_unused(void)
-{
-       struct clk *ck;
-
-       spin_lock_irq(&clockfw_lock);
-       list_for_each_entry(ck, &clocks, node) {
-               if (ck->usecount > 0)
-                       continue;
-               if (!(ck->flags & CLK_PSC))
-                       continue;
-
-               /* ignore if in Disabled or SwRstDisable states */
-               if (!davinci_psc_is_clk_active(ck->gpsc, ck->lpsc))
-                       continue;
-
-               pr_debug("Clocks: disable unused %s\n", ck->name);
-
-               davinci_psc_config(ck->domain, ck->gpsc, ck->lpsc,
-                               false, ck->flags);
-       }
-       spin_unlock_irq(&clockfw_lock);
-
-       return 0;
-}
-#endif
-
-static unsigned long clk_sysclk_recalc(struct clk *clk)
-{
-       u32 v, plldiv;
-       struct pll_data *pll;
-       unsigned long rate = clk->rate;
-
-       /* If this is the PLL base clock, no more calculations needed */
-       if (clk->pll_data)
-               return rate;
-
-       if (WARN_ON(!clk->parent))
-               return rate;
-
-       rate = clk->parent->rate;
-
-       /* Otherwise, the parent must be a PLL */
-       if (WARN_ON(!clk->parent->pll_data))
-               return rate;
-
-       pll = clk->parent->pll_data;
-
-       /* If pre-PLL, source clock is before the multiplier and divider(s) */
-       if (clk->flags & PRE_PLL)
-               rate = pll->input_rate;
-
-       if (!clk->div_reg)
-               return rate;
-
-       v = __raw_readl(pll->base + clk->div_reg);
-       if (v & PLLDIV_EN) {
-               plldiv = (v & pll->div_ratio_mask) + 1;
-               if (plldiv)
-                       rate /= plldiv;
-       }
-
-       return rate;
-}
-
-int davinci_set_sysclk_rate(struct clk *clk, unsigned long rate)
-{
-       unsigned v;
-       struct pll_data *pll;
-       unsigned long input;
-       unsigned ratio = 0;
-
-       /* If this is the PLL base clock, wrong function to call */
-       if (clk->pll_data)
-               return -EINVAL;
-
-       /* There must be a parent... */
-       if (WARN_ON(!clk->parent))
-               return -EINVAL;
-
-       /* ... the parent must be a PLL... */
-       if (WARN_ON(!clk->parent->pll_data))
-               return -EINVAL;
-
-       /* ... and this clock must have a divider. */
-       if (WARN_ON(!clk->div_reg))
-               return -EINVAL;
-
-       pll = clk->parent->pll_data;
-
-       input = clk->parent->rate;
-
-       /* If pre-PLL, source clock is before the multiplier and divider(s) */
-       if (clk->flags & PRE_PLL)
-               input = pll->input_rate;
-
-       if (input > rate) {
-               /*
-                * Can afford to provide an output little higher than requested
-                * only if maximum rate supported by hardware on this sysclk
-                * is known.
-                */
-               if (clk->maxrate) {
-                       ratio = DIV_ROUND_CLOSEST(input, rate);
-                       if (input / ratio > clk->maxrate)
-                               ratio = 0;
-               }
-
-               if (ratio == 0)
-                       ratio = DIV_ROUND_UP(input, rate);
-
-               ratio--;
-       }
-
-       if (ratio > pll->div_ratio_mask)
-               return -EINVAL;
-
-       do {
-               v = __raw_readl(pll->base + PLLSTAT);
-       } while (v & PLLSTAT_GOSTAT);
-
-       v = __raw_readl(pll->base + clk->div_reg);
-       v &= ~pll->div_ratio_mask;
-       v |= ratio | PLLDIV_EN;
-       __raw_writel(v, pll->base + clk->div_reg);
-
-       v = __raw_readl(pll->base + PLLCMD);
-       v |= PLLCMD_GOSET;
-       __raw_writel(v, pll->base + PLLCMD);
-
-       do {
-               v = __raw_readl(pll->base + PLLSTAT);
-       } while (v & PLLSTAT_GOSTAT);
-
-       return 0;
-}
-EXPORT_SYMBOL(davinci_set_sysclk_rate);
-
-static unsigned long clk_leafclk_recalc(struct clk *clk)
-{
-       if (WARN_ON(!clk->parent))
-               return clk->rate;
-
-       return clk->parent->rate;
-}
-
-int davinci_simple_set_rate(struct clk *clk, unsigned long rate)
-{
-       clk->rate = rate;
-       return 0;
-}
-
-static unsigned long clk_pllclk_recalc(struct clk *clk)
-{
-       u32 ctrl, mult = 1, prediv = 1, postdiv = 1;
-       u8 bypass;
-       struct pll_data *pll = clk->pll_data;
-       unsigned long rate = clk->rate;
-
-       ctrl = __raw_readl(pll->base + PLLCTL);
-       rate = pll->input_rate = clk->parent->rate;
-
-       if (ctrl & PLLCTL_PLLEN) {
-               bypass = 0;
-               mult = __raw_readl(pll->base + PLLM);
-               if (cpu_is_davinci_dm365())
-                       mult = 2 * (mult & PLLM_PLLM_MASK);
-               else
-                       mult = (mult & PLLM_PLLM_MASK) + 1;
-       } else
-               bypass = 1;
-
-       if (pll->flags & PLL_HAS_PREDIV) {
-               prediv = __raw_readl(pll->base + PREDIV);
-               if (prediv & PLLDIV_EN)
-                       prediv = (prediv & pll->div_ratio_mask) + 1;
-               else
-                       prediv = 1;
-       }
-
-       /* pre-divider is fixed, but (some?) chips won't report that */
-       if (cpu_is_davinci_dm355() && pll->num == 1)
-               prediv = 8;
-
-       if (pll->flags & PLL_HAS_POSTDIV) {
-               postdiv = __raw_readl(pll->base + POSTDIV);
-               if (postdiv & PLLDIV_EN)
-                       postdiv = (postdiv & pll->div_ratio_mask) + 1;
-               else
-                       postdiv = 1;
-       }
-
-       if (!bypass) {
-               rate /= prediv;
-               rate *= mult;
-               rate /= postdiv;
-       }
-
-       pr_debug("PLL%d: input = %lu MHz [ ",
-                pll->num, clk->parent->rate / 1000000);
-       if (bypass)
-               pr_debug("bypass ");
-       if (prediv > 1)
-               pr_debug("/ %d ", prediv);
-       if (mult > 1)
-               pr_debug("* %d ", mult);
-       if (postdiv > 1)
-               pr_debug("/ %d ", postdiv);
-       pr_debug("] --> %lu MHz output.\n", rate / 1000000);
-
-       return rate;
-}
-
-/**
- * davinci_set_pllrate - set the output rate of a given PLL.
- *
- * Note: Currently tested to work with OMAP-L138 only.
- *
- * @pll: pll whose rate needs to be changed.
- * @prediv: The pre divider value. Passing 0 disables the pre-divider.
- * @pllm: The multiplier value. Passing 0 leads to multiply-by-one.
- * @postdiv: The post divider value. Passing 0 disables the post-divider.
- */
-int davinci_set_pllrate(struct pll_data *pll, unsigned int prediv,
-                                       unsigned int mult, unsigned int postdiv)
-{
-       u32 ctrl;
-       unsigned int locktime;
-       unsigned long flags;
-
-       if (pll->base == NULL)
-               return -EINVAL;
-
-       /*
-        *  PLL lock time required per OMAP-L138 datasheet is
-        * (2000 * prediv)/sqrt(pllm) OSCIN cycles. We approximate sqrt(pllm)
-        * as 4 and OSCIN cycle as 25 MHz.
-        */
-       if (prediv) {
-               locktime = ((2000 * prediv) / 100);
-               prediv = (prediv - 1) | PLLDIV_EN;
-       } else {
-               locktime = PLL_LOCK_TIME;
-       }
-       if (postdiv)
-               postdiv = (postdiv - 1) | PLLDIV_EN;
-       if (mult)
-               mult = mult - 1;
-
-       /* Protect against simultaneous calls to PLL setting seqeunce */
-       spin_lock_irqsave(&clockfw_lock, flags);
-
-       ctrl = __raw_readl(pll->base + PLLCTL);
-
-       /* Switch the PLL to bypass mode */
-       ctrl &= ~(PLLCTL_PLLENSRC | PLLCTL_PLLEN);
-       __raw_writel(ctrl, pll->base + PLLCTL);
-
-       udelay(PLL_BYPASS_TIME);
-
-       /* Reset and enable PLL */
-       ctrl &= ~(PLLCTL_PLLRST | PLLCTL_PLLDIS);
-       __raw_writel(ctrl, pll->base + PLLCTL);
-
-       if (pll->flags & PLL_HAS_PREDIV)
-               __raw_writel(prediv, pll->base + PREDIV);
-
-       __raw_writel(mult, pll->base + PLLM);
-
-       if (pll->flags & PLL_HAS_POSTDIV)
-               __raw_writel(postdiv, pll->base + POSTDIV);
-
-       udelay(PLL_RESET_TIME);
-
-       /* Bring PLL out of reset */
-       ctrl |= PLLCTL_PLLRST;
-       __raw_writel(ctrl, pll->base + PLLCTL);
-
-       udelay(locktime);
-
-       /* Remove PLL from bypass mode */
-       ctrl |= PLLCTL_PLLEN;
-       __raw_writel(ctrl, pll->base + PLLCTL);
-
-       spin_unlock_irqrestore(&clockfw_lock, flags);
-
-       return 0;
-}
-EXPORT_SYMBOL(davinci_set_pllrate);
-
-/**
- * davinci_set_refclk_rate() - Set the reference clock rate
- * @rate:      The new rate.
- *
- * Sets the reference clock rate to a given value. This will most likely
- * result in the entire clock tree getting updated.
- *
- * This is used to support boards which use a reference clock different
- * than that used by default in <soc>.c file. The reference clock rate
- * should be updated early in the boot process; ideally soon after the
- * clock tree has been initialized once with the default reference clock
- * rate (davinci_clk_init()).
- *
- * Returns 0 on success, error otherwise.
- */
-int davinci_set_refclk_rate(unsigned long rate)
-{
-       struct clk *refclk;
-
-       refclk = clk_get(NULL, "ref");
-       if (IS_ERR(refclk)) {
-               pr_err("%s: failed to get reference clock\n", __func__);
-               return PTR_ERR(refclk);
-       }
-
-       clk_set_rate(refclk, rate);
-
-       clk_put(refclk);
-
-       return 0;
-}
-
-int __init davinci_clk_init(struct clk_lookup *clocks)
-{
-       struct clk_lookup *c;
-       struct clk *clk;
-       size_t num_clocks = 0;
-
-       for (c = clocks; c->clk; c++) {
-               clk = c->clk;
-
-               if (!clk->recalc) {
-
-                       /* Check if clock is a PLL */
-                       if (clk->pll_data)
-                               clk->recalc = clk_pllclk_recalc;
-
-                       /* Else, if it is a PLL-derived clock */
-                       else if (clk->flags & CLK_PLL)
-                               clk->recalc = clk_sysclk_recalc;
-
-                       /* Otherwise, it is a leaf clock (PSC clock) */
-                       else if (clk->parent)
-                               clk->recalc = clk_leafclk_recalc;
-               }
-
-               if (clk->pll_data) {
-                       struct pll_data *pll = clk->pll_data;
-
-                       if (!pll->div_ratio_mask)
-                               pll->div_ratio_mask = PLLDIV_RATIO_MASK;
-
-                       if (pll->phys_base && !pll->base) {
-                               pll->base = ioremap(pll->phys_base, SZ_4K);
-                               WARN_ON(!pll->base);
-                       }
-               }
-
-               if (clk->recalc)
-                       clk->rate = clk->recalc(clk);
-
-               if (clk->lpsc)
-                       clk->flags |= CLK_PSC;
-
-               if (clk->flags & PSC_LRST)
-                       clk->reset = davinci_clk_reset;
-
-               clk_register(clk);
-               num_clocks++;
-
-               /* Turn on clocks that Linux doesn't otherwise manage */
-               if (clk->flags & ALWAYS_ENABLED)
-                       clk_enable(clk);
-       }
-
-       clkdev_add_table(clocks, num_clocks);
-
-       return 0;
-}
-
-#ifdef CONFIG_DEBUG_FS
-
-#include <linux/debugfs.h>
-#include <linux/seq_file.h>
-
-#define CLKNAME_MAX    10              /* longest clock name */
-#define NEST_DELTA     2
-#define NEST_MAX       4
-
-static void
-dump_clock(struct seq_file *s, unsigned nest, struct clk *parent)
-{
-       char            *state;
-       char            buf[CLKNAME_MAX + NEST_DELTA * NEST_MAX];
-       struct clk      *clk;
-       unsigned        i;
-
-       if (parent->flags & CLK_PLL)
-               state = "pll";
-       else if (parent->flags & CLK_PSC)
-               state = "psc";
-       else
-               state = "";
-
-       /* <nest spaces> name <pad to end> */
-       memset(buf, ' ', sizeof(buf) - 1);
-       buf[sizeof(buf) - 1] = 0;
-       i = strlen(parent->name);
-       memcpy(buf + nest, parent->name,
-                       min(i, (unsigned)(sizeof(buf) - 1 - nest)));
-
-       seq_printf(s, "%s users=%2d %-3s %9ld Hz\n",
-                  buf, parent->usecount, state, clk_get_rate(parent));
-       /* REVISIT show device associations too */
-
-       /* cost is now small, but not linear... */
-       list_for_each_entry(clk, &parent->children, childnode) {
-               dump_clock(s, nest + NEST_DELTA, clk);
-       }
-}
-
-static int davinci_ck_show(struct seq_file *m, void *v)
-{
-       struct clk *clk;
-
-       /*
-        * Show clock tree; We trust nonzero usecounts equate to PSC enables...
-        */
-       mutex_lock(&clocks_mutex);
-       list_for_each_entry(clk, &clocks, node)
-               if (!clk->parent)
-                       dump_clock(m, 0, clk);
-       mutex_unlock(&clocks_mutex);
-
-       return 0;
-}
-
-static int davinci_ck_open(struct inode *inode, struct file *file)
-{
-       return single_open(file, davinci_ck_show, NULL);
-}
-
-static const struct file_operations davinci_ck_operations = {
-       .open           = davinci_ck_open,
-       .read           = seq_read,
-       .llseek         = seq_lseek,
-       .release        = single_release,
-};
-
-static int __init davinci_clk_debugfs_init(void)
-{
-       debugfs_create_file("davinci_clocks", S_IFREG | S_IRUGO, NULL, NULL,
-                                               &davinci_ck_operations);
-       return 0;
-
-}
-device_initcall(davinci_clk_debugfs_init);
-#endif /* CONFIG_DEBUG_FS */
index d7894d5aaa250b027d4f035369b0d3b2ec08efd2..307383472400d103888a4194daff7eeb93c43031 100644 (file)
 #ifndef __ARCH_ARM_DAVINCI_CLOCK_H
 #define __ARCH_ARM_DAVINCI_CLOCK_H
 
-#define DAVINCI_PLL1_BASE 0x01c40800
-#define DAVINCI_PLL2_BASE 0x01c40c00
-#define MAX_PLL 2
-
 /* PLL/Reset register offsets */
 #define PLLCTL          0x100
 #define PLLCTL_PLLEN    BIT(0)
  */
 #define PLL_LOCK_TIME          20
 
-#ifndef __ASSEMBLER__
-
-#include <linux/list.h>
-#include <linux/clkdev.h>
-
-#define PLLSTAT_GOSTAT BIT(0)
-#define PLLCMD_GOSET   BIT(0)
-
-struct pll_data {
-       u32 phys_base;
-       void __iomem *base;
-       u32 num;
-       u32 flags;
-       u32 input_rate;
-       u32 div_ratio_mask;
-};
-#define PLL_HAS_PREDIV          0x01
-#define PLL_HAS_POSTDIV         0x02
-
-struct clk {
-       struct list_head        node;
-       struct module           *owner;
-       const char              *name;
-       unsigned long           rate;
-       unsigned long           maxrate;        /* H/W supported max rate */
-       u8                      usecount;
-       u8                      lpsc;
-       u8                      gpsc;
-       u8                      domain;
-       u32                     flags;
-       struct clk              *parent;
-       struct list_head        children;       /* list of children */
-       struct list_head        childnode;      /* parent's child list node */
-       struct pll_data         *pll_data;
-       u32                     div_reg;
-       unsigned long (*recalc) (struct clk *);
-       int (*set_rate) (struct clk *clk, unsigned long rate);
-       int (*round_rate) (struct clk *clk, unsigned long rate);
-       int (*reset) (struct clk *clk, bool reset);
-       void (*clk_enable) (struct clk *clk);
-       void (*clk_disable) (struct clk *clk);
-       int (*set_parent) (struct clk *clk, struct clk *parent);
-};
-
-/* Clock flags: SoC-specific flags start at BIT(16) */
-#define ALWAYS_ENABLED         BIT(1)
-#define CLK_PSC                        BIT(2)
-#define CLK_PLL                        BIT(3) /* PLL-derived clock */
-#define PRE_PLL                        BIT(4) /* source is before PLL mult/div */
-#define PSC_SWRSTDISABLE       BIT(5) /* Disable state is SwRstDisable */
-#define PSC_FORCE              BIT(6) /* Force module state transtition */
-#define PSC_LRST               BIT(8) /* Use local reset on enable/disable */
-
-#define CLK(dev, con, ck)      \
-       {                       \
-               .dev_id = dev,  \
-               .con_id = con,  \
-               .clk = ck,      \
-       }                       \
-
-int davinci_clk_init(struct clk_lookup *clocks);
-int davinci_set_pllrate(struct pll_data *pll, unsigned int prediv,
-                               unsigned int mult, unsigned int postdiv);
-int davinci_set_sysclk_rate(struct clk *clk, unsigned long rate);
-int davinci_set_refclk_rate(unsigned long rate);
-int davinci_simple_set_rate(struct clk *clk, unsigned long rate);
-int davinci_clk_reset(struct clk *clk, bool reset);
-void davinci_clk_enable(struct clk *clk);
-void davinci_clk_disable(struct clk *clk);
-
-#endif
-
 #endif
index bcb6a7ba84e9ee4640d1b31e51f734354dff2378..e1d0f0d841ff4908fb2e249e9bdc96fd53ec8cbc 100644 (file)
@@ -20,8 +20,6 @@
 #include <mach/common.h>
 #include <mach/cputype.h>
 
-#include "clock.h"
-
 struct davinci_soc_info davinci_soc_info;
 EXPORT_SYMBOL(davinci_soc_info);
 
@@ -118,5 +116,4 @@ err:
 void __init davinci_init_late(void)
 {
        davinci_cpufreq_init();
-       davinci_clk_disable_unused();
 }
index 350d7673aa4d0222a91c2a2aa13ed87d57cab453..0bc5bd2665df8dd1433a78f93819727ae473b1f0 100644 (file)
@@ -8,21 +8,20 @@
  * is licensed "as is" without any warranty of any kind, whether express
  * or implied.
  */
+#include <linux/clk-provider.h>
+#include <linux/clk/davinci.h>
 #include <linux/gpio.h>
 #include <linux/init.h>
-#include <linux/clk.h>
 #include <linux/platform_data/gpio-davinci.h>
 
 #include <asm/mach/map.h>
 
-#include "psc.h"
-#include <mach/irqs.h>
-#include <mach/cputype.h>
 #include <mach/common.h>
-#include <mach/time.h>
+#include <mach/cputype.h>
 #include <mach/da8xx.h>
+#include <mach/irqs.h>
+#include <mach/time.h>
 
-#include "clock.h"
 #include "mux.h"
 
 /* Offsets of the 8 compare registers on the da830 */
 
 #define DA830_REF_FREQ         24000000
 
-static struct pll_data pll0_data = {
-       .num            = 1,
-       .phys_base      = DA8XX_PLL0_BASE,
-       .flags          = PLL_HAS_PREDIV | PLL_HAS_POSTDIV,
-};
-
-static struct clk ref_clk = {
-       .name           = "ref_clk",
-       .rate           = DA830_REF_FREQ,
-};
-
-static struct clk pll0_clk = {
-       .name           = "pll0",
-       .parent         = &ref_clk,
-       .pll_data       = &pll0_data,
-       .flags          = CLK_PLL,
-};
-
-static struct clk pll0_aux_clk = {
-       .name           = "pll0_aux_clk",
-       .parent         = &pll0_clk,
-       .flags          = CLK_PLL | PRE_PLL,
-};
-
-static struct clk pll0_sysclk2 = {
-       .name           = "pll0_sysclk2",
-       .parent         = &pll0_clk,
-       .flags          = CLK_PLL,
-       .div_reg        = PLLDIV2,
-};
-
-static struct clk pll0_sysclk3 = {
-       .name           = "pll0_sysclk3",
-       .parent         = &pll0_clk,
-       .flags          = CLK_PLL,
-       .div_reg        = PLLDIV3,
-};
-
-static struct clk pll0_sysclk4 = {
-       .name           = "pll0_sysclk4",
-       .parent         = &pll0_clk,
-       .flags          = CLK_PLL,
-       .div_reg        = PLLDIV4,
-};
-
-static struct clk pll0_sysclk5 = {
-       .name           = "pll0_sysclk5",
-       .parent         = &pll0_clk,
-       .flags          = CLK_PLL,
-       .div_reg        = PLLDIV5,
-};
-
-static struct clk pll0_sysclk6 = {
-       .name           = "pll0_sysclk6",
-       .parent         = &pll0_clk,
-       .flags          = CLK_PLL,
-       .div_reg        = PLLDIV6,
-};
-
-static struct clk pll0_sysclk7 = {
-       .name           = "pll0_sysclk7",
-       .parent         = &pll0_clk,
-       .flags          = CLK_PLL,
-       .div_reg        = PLLDIV7,
-};
-
-static struct clk i2c0_clk = {
-       .name           = "i2c0",
-       .parent         = &pll0_aux_clk,
-};
-
-static struct clk timerp64_0_clk = {
-       .name           = "timer0",
-       .parent         = &pll0_aux_clk,
-};
-
-static struct clk timerp64_1_clk = {
-       .name           = "timer1",
-       .parent         = &pll0_aux_clk,
-};
-
-static struct clk arm_rom_clk = {
-       .name           = "arm_rom",
-       .parent         = &pll0_sysclk2,
-       .lpsc           = DA8XX_LPSC0_ARM_RAM_ROM,
-       .flags          = ALWAYS_ENABLED,
-};
-
-static struct clk scr0_ss_clk = {
-       .name           = "scr0_ss",
-       .parent         = &pll0_sysclk2,
-       .lpsc           = DA8XX_LPSC0_SCR0_SS,
-       .flags          = ALWAYS_ENABLED,
-};
-
-static struct clk scr1_ss_clk = {
-       .name           = "scr1_ss",
-       .parent         = &pll0_sysclk2,
-       .lpsc           = DA8XX_LPSC0_SCR1_SS,
-       .flags          = ALWAYS_ENABLED,
-};
-
-static struct clk scr2_ss_clk = {
-       .name           = "scr2_ss",
-       .parent         = &pll0_sysclk2,
-       .lpsc           = DA8XX_LPSC0_SCR2_SS,
-       .flags          = ALWAYS_ENABLED,
-};
-
-static struct clk dmax_clk = {
-       .name           = "dmax",
-       .parent         = &pll0_sysclk2,
-       .lpsc           = DA8XX_LPSC0_PRUSS,
-       .flags          = ALWAYS_ENABLED,
-};
-
-static struct clk tpcc_clk = {
-       .name           = "tpcc",
-       .parent         = &pll0_sysclk2,
-       .lpsc           = DA8XX_LPSC0_TPCC,
-       .flags          = ALWAYS_ENABLED | CLK_PSC,
-};
-
-static struct clk tptc0_clk = {
-       .name           = "tptc0",
-       .parent         = &pll0_sysclk2,
-       .lpsc           = DA8XX_LPSC0_TPTC0,
-       .flags          = ALWAYS_ENABLED,
-};
-
-static struct clk tptc1_clk = {
-       .name           = "tptc1",
-       .parent         = &pll0_sysclk2,
-       .lpsc           = DA8XX_LPSC0_TPTC1,
-       .flags          = ALWAYS_ENABLED,
-};
-
-static struct clk mmcsd_clk = {
-       .name           = "mmcsd",
-       .parent         = &pll0_sysclk2,
-       .lpsc           = DA8XX_LPSC0_MMC_SD,
-};
-
-static struct clk uart0_clk = {
-       .name           = "uart0",
-       .parent         = &pll0_sysclk2,
-       .lpsc           = DA8XX_LPSC0_UART0,
-};
-
-static struct clk uart1_clk = {
-       .name           = "uart1",
-       .parent         = &pll0_sysclk2,
-       .lpsc           = DA8XX_LPSC1_UART1,
-       .gpsc           = 1,
-};
-
-static struct clk uart2_clk = {
-       .name           = "uart2",
-       .parent         = &pll0_sysclk2,
-       .lpsc           = DA8XX_LPSC1_UART2,
-       .gpsc           = 1,
-};
-
-static struct clk spi0_clk = {
-       .name           = "spi0",
-       .parent         = &pll0_sysclk2,
-       .lpsc           = DA8XX_LPSC0_SPI0,
-};
-
-static struct clk spi1_clk = {
-       .name           = "spi1",
-       .parent         = &pll0_sysclk2,
-       .lpsc           = DA8XX_LPSC1_SPI1,
-       .gpsc           = 1,
-};
-
-static struct clk ecap0_clk = {
-       .name           = "ecap0",
-       .parent         = &pll0_sysclk2,
-       .lpsc           = DA8XX_LPSC1_ECAP,
-       .gpsc           = 1,
-};
-
-static struct clk ecap1_clk = {
-       .name           = "ecap1",
-       .parent         = &pll0_sysclk2,
-       .lpsc           = DA8XX_LPSC1_ECAP,
-       .gpsc           = 1,
-};
-
-static struct clk ecap2_clk = {
-       .name           = "ecap2",
-       .parent         = &pll0_sysclk2,
-       .lpsc           = DA8XX_LPSC1_ECAP,
-       .gpsc           = 1,
-};
-
-static struct clk pwm0_clk = {
-       .name           = "pwm0",
-       .parent         = &pll0_sysclk2,
-       .lpsc           = DA8XX_LPSC1_PWM,
-       .gpsc           = 1,
-};
-
-static struct clk pwm1_clk = {
-       .name           = "pwm1",
-       .parent         = &pll0_sysclk2,
-       .lpsc           = DA8XX_LPSC1_PWM,
-       .gpsc           = 1,
-};
-
-static struct clk pwm2_clk = {
-       .name           = "pwm2",
-       .parent         = &pll0_sysclk2,
-       .lpsc           = DA8XX_LPSC1_PWM,
-       .gpsc           = 1,
-};
-
-static struct clk eqep0_clk = {
-       .name           = "eqep0",
-       .parent         = &pll0_sysclk2,
-       .lpsc           = DA830_LPSC1_EQEP,
-       .gpsc           = 1,
-};
-
-static struct clk eqep1_clk = {
-       .name           = "eqep1",
-       .parent         = &pll0_sysclk2,
-       .lpsc           = DA830_LPSC1_EQEP,
-       .gpsc           = 1,
-};
-
-static struct clk lcdc_clk = {
-       .name           = "lcdc",
-       .parent         = &pll0_sysclk2,
-       .lpsc           = DA8XX_LPSC1_LCDC,
-       .gpsc           = 1,
-};
-
-static struct clk mcasp0_clk = {
-       .name           = "mcasp0",
-       .parent         = &pll0_sysclk2,
-       .lpsc           = DA8XX_LPSC1_McASP0,
-       .gpsc           = 1,
-};
-
-static struct clk mcasp1_clk = {
-       .name           = "mcasp1",
-       .parent         = &pll0_sysclk2,
-       .lpsc           = DA830_LPSC1_McASP1,
-       .gpsc           = 1,
-};
-
-static struct clk mcasp2_clk = {
-       .name           = "mcasp2",
-       .parent         = &pll0_sysclk2,
-       .lpsc           = DA830_LPSC1_McASP2,
-       .gpsc           = 1,
-};
-
-static struct clk usb20_clk = {
-       .name           = "usb20",
-       .parent         = &pll0_sysclk2,
-       .lpsc           = DA8XX_LPSC1_USB20,
-       .gpsc           = 1,
-};
-
-static struct clk cppi41_clk = {
-       .name           = "cppi41",
-       .parent         = &usb20_clk,
-};
-
-static struct clk aemif_clk = {
-       .name           = "aemif",
-       .parent         = &pll0_sysclk3,
-       .lpsc           = DA8XX_LPSC0_EMIF25,
-       .flags          = ALWAYS_ENABLED,
-};
-
-static struct clk aintc_clk = {
-       .name           = "aintc",
-       .parent         = &pll0_sysclk4,
-       .lpsc           = DA8XX_LPSC0_AINTC,
-       .flags          = ALWAYS_ENABLED,
-};
-
-static struct clk secu_mgr_clk = {
-       .name           = "secu_mgr",
-       .parent         = &pll0_sysclk4,
-       .lpsc           = DA8XX_LPSC0_SECU_MGR,
-       .flags          = ALWAYS_ENABLED,
-};
-
-static struct clk emac_clk = {
-       .name           = "emac",
-       .parent         = &pll0_sysclk4,
-       .lpsc           = DA8XX_LPSC1_CPGMAC,
-       .gpsc           = 1,
-};
-
-static struct clk gpio_clk = {
-       .name           = "gpio",
-       .parent         = &pll0_sysclk4,
-       .lpsc           = DA8XX_LPSC1_GPIO,
-       .gpsc           = 1,
-};
-
-static struct clk i2c1_clk = {
-       .name           = "i2c1",
-       .parent         = &pll0_sysclk4,
-       .lpsc           = DA8XX_LPSC1_I2C,
-       .gpsc           = 1,
-};
-
-static struct clk usb11_clk = {
-       .name           = "usb11",
-       .parent         = &pll0_sysclk4,
-       .lpsc           = DA8XX_LPSC1_USB11,
-       .gpsc           = 1,
-};
-
-static struct clk emif3_clk = {
-       .name           = "emif3",
-       .parent         = &pll0_sysclk5,
-       .lpsc           = DA8XX_LPSC1_EMIF3C,
-       .gpsc           = 1,
-       .flags          = ALWAYS_ENABLED,
-};
-
-static struct clk arm_clk = {
-       .name           = "arm",
-       .parent         = &pll0_sysclk6,
-       .lpsc           = DA8XX_LPSC0_ARM,
-       .flags          = ALWAYS_ENABLED,
-};
-
-static struct clk rmii_clk = {
-       .name           = "rmii",
-       .parent         = &pll0_sysclk7,
-};
-
-static struct clk_lookup da830_clks[] = {
-       CLK(NULL,               "ref",          &ref_clk),
-       CLK(NULL,               "pll0",         &pll0_clk),
-       CLK(NULL,               "pll0_aux",     &pll0_aux_clk),
-       CLK(NULL,               "pll0_sysclk2", &pll0_sysclk2),
-       CLK(NULL,               "pll0_sysclk3", &pll0_sysclk3),
-       CLK(NULL,               "pll0_sysclk4", &pll0_sysclk4),
-       CLK(NULL,               "pll0_sysclk5", &pll0_sysclk5),
-       CLK(NULL,               "pll0_sysclk6", &pll0_sysclk6),
-       CLK(NULL,               "pll0_sysclk7", &pll0_sysclk7),
-       CLK("i2c_davinci.1",    NULL,           &i2c0_clk),
-       CLK(NULL,               "timer0",       &timerp64_0_clk),
-       CLK("davinci-wdt",      NULL,           &timerp64_1_clk),
-       CLK(NULL,               "arm_rom",      &arm_rom_clk),
-       CLK(NULL,               "scr0_ss",      &scr0_ss_clk),
-       CLK(NULL,               "scr1_ss",      &scr1_ss_clk),
-       CLK(NULL,               "scr2_ss",      &scr2_ss_clk),
-       CLK(NULL,               "dmax",         &dmax_clk),
-       CLK(NULL,               "tpcc",         &tpcc_clk),
-       CLK(NULL,               "tptc0",        &tptc0_clk),
-       CLK(NULL,               "tptc1",        &tptc1_clk),
-       CLK("da830-mmc.0",      NULL,           &mmcsd_clk),
-       CLK("serial8250.0",     NULL,           &uart0_clk),
-       CLK("serial8250.1",     NULL,           &uart1_clk),
-       CLK("serial8250.2",     NULL,           &uart2_clk),
-       CLK("spi_davinci.0",    NULL,           &spi0_clk),
-       CLK("spi_davinci.1",    NULL,           &spi1_clk),
-       CLK(NULL,               "ecap0",        &ecap0_clk),
-       CLK(NULL,               "ecap1",        &ecap1_clk),
-       CLK(NULL,               "ecap2",        &ecap2_clk),
-       CLK(NULL,               "pwm0",         &pwm0_clk),
-       CLK(NULL,               "pwm1",         &pwm1_clk),
-       CLK(NULL,               "pwm2",         &pwm2_clk),
-       CLK("eqep.0",           NULL,           &eqep0_clk),
-       CLK("eqep.1",           NULL,           &eqep1_clk),
-       CLK("da8xx_lcdc.0",     "fck",          &lcdc_clk),
-       CLK("davinci-mcasp.0",  NULL,           &mcasp0_clk),
-       CLK("davinci-mcasp.1",  NULL,           &mcasp1_clk),
-       CLK("davinci-mcasp.2",  NULL,           &mcasp2_clk),
-       CLK("musb-da8xx",       NULL,           &usb20_clk),
-       CLK("cppi41-dmaengine", NULL,           &cppi41_clk),
-       CLK(NULL,               "aemif",        &aemif_clk),
-       CLK(NULL,               "aintc",        &aintc_clk),
-       CLK(NULL,               "secu_mgr",     &secu_mgr_clk),
-       CLK("davinci_emac.1",   NULL,           &emac_clk),
-       CLK("davinci_mdio.0",   "fck",          &emac_clk),
-       CLK(NULL,               "gpio",         &gpio_clk),
-       CLK("i2c_davinci.2",    NULL,           &i2c1_clk),
-       CLK("ohci-da8xx",       NULL,   &usb11_clk),
-       CLK(NULL,               "emif3",        &emif3_clk),
-       CLK(NULL,               "arm",          &arm_clk),
-       CLK(NULL,               "rmii",         &rmii_clk),
-       CLK(NULL,               NULL,           NULL),
-};
-
 /*
  * Device specific mux setup
  *
@@ -1130,8 +733,6 @@ static struct map_desc da830_io_desc[] = {
        },
 };
 
-static u32 da830_psc_bases[] = { DA8XX_PSC0_BASE, DA8XX_PSC1_BASE };
-
 /* Contents of JTAG ID register used to identify exact cpu type */
 static struct davinci_id da830_ids[] = {
        {
@@ -1200,8 +801,6 @@ static const struct davinci_soc_info davinci_soc_info_da830 = {
        .jtag_id_reg            = DA8XX_SYSCFG0_BASE + DA8XX_JTAG_ID_REG,
        .ids                    = da830_ids,
        .ids_num                = ARRAY_SIZE(da830_ids),
-       .psc_bases              = da830_psc_bases,
-       .psc_bases_num          = ARRAY_SIZE(da830_psc_bases),
        .pinmux_base            = DA8XX_SYSCFG0_BASE + 0x120,
        .pinmux_pins            = da830_pins,
        .pinmux_pins_num        = ARRAY_SIZE(da830_pins),
@@ -1223,6 +822,53 @@ void __init da830_init(void)
 
 void __init da830_init_time(void)
 {
-       davinci_clk_init(da830_clks);
-       davinci_timer_init();
+       void __iomem *pll;
+       struct clk *clk;
+
+       clk_register_fixed_rate(NULL, "ref_clk", NULL, 0, DA830_REF_FREQ);
+
+       pll = ioremap(DA8XX_PLL0_BASE, SZ_4K);
+
+       da830_pll_init(NULL, pll, NULL);
+
+       clk = clk_get(NULL, "timer0");
+
+       davinci_timer_init(clk);
+}
+
+static struct resource da830_psc0_resources[] = {
+       {
+               .start  = DA8XX_PSC0_BASE,
+               .end    = DA8XX_PSC0_BASE + SZ_4K - 1,
+               .flags  = IORESOURCE_MEM,
+       },
+};
+
+static struct platform_device da830_psc0_device = {
+       .name           = "da830-psc0",
+       .id             = -1,
+       .resource       = da830_psc0_resources,
+       .num_resources  = ARRAY_SIZE(da830_psc0_resources),
+};
+
+static struct resource da830_psc1_resources[] = {
+       {
+               .start  = DA8XX_PSC1_BASE,
+               .end    = DA8XX_PSC1_BASE + SZ_4K - 1,
+               .flags  = IORESOURCE_MEM,
+       },
+};
+
+static struct platform_device da830_psc1_device = {
+       .name           = "da830-psc1",
+       .id             = -1,
+       .resource       = da830_psc1_resources,
+       .num_resources  = ARRAY_SIZE(da830_psc1_resources),
+};
+
+void __init da830_register_clocks(void)
+{
+       /* PLL is registered in da830_init_time() */
+       platform_device_register(&da830_psc0_device);
+       platform_device_register(&da830_psc1_device);
 }
index 34117e614e08ddf692835b97d4776189feeb1268..4528bbf0c86187b91413c74242a5d82cfed4de01 100644 (file)
  * is licensed "as is" without any warranty of any kind, whether express
  * or implied.
  */
+
+#include <linux/clk-provider.h>
+#include <linux/clk/davinci.h>
 #include <linux/clkdev.h>
+#include <linux/cpufreq.h>
 #include <linux/gpio.h>
 #include <linux/init.h>
-#include <linux/clk.h>
+#include <linux/mfd/da8xx-cfgchip.h>
+#include <linux/platform_data/clk-da8xx-cfgchip.h>
+#include <linux/platform_data/clk-davinci-pll.h>
+#include <linux/platform_data/gpio-davinci.h>
 #include <linux/platform_device.h>
-#include <linux/cpufreq.h>
+#include <linux/regmap.h>
 #include <linux/regulator/consumer.h>
-#include <linux/platform_data/gpio-davinci.h>
 
 #include <asm/mach/map.h>
 
-#include "psc.h"
-#include <mach/irqs.h>
-#include <mach/cputype.h>
 #include <mach/common.h>
-#include <mach/time.h>
-#include <mach/da8xx.h>
 #include <mach/cpufreq.h>
+#include <mach/cputype.h>
+#include <mach/da8xx.h>
+#include <mach/irqs.h>
 #include <mach/pm.h>
+#include <mach/time.h>
 
-#include "clock.h"
 #include "mux.h"
 
 #define DA850_PLL1_BASE                0x01e1a000
 
 #define DA850_REF_FREQ         24000000
 
-#define CFGCHIP3_ASYNC3_CLKSRC BIT(4)
-#define CFGCHIP3_PLL1_MASTER_LOCK      BIT(5)
-#define CFGCHIP0_PLL_MASTER_LOCK       BIT(4)
-
-static int da850_set_armrate(struct clk *clk, unsigned long rate);
-static int da850_round_armrate(struct clk *clk, unsigned long rate);
-static int da850_set_pll0rate(struct clk *clk, unsigned long armrate);
-
-static struct pll_data pll0_data = {
-       .num            = 1,
-       .phys_base      = DA8XX_PLL0_BASE,
-       .flags          = PLL_HAS_PREDIV | PLL_HAS_POSTDIV,
-};
-
-static struct clk ref_clk = {
-       .name           = "ref_clk",
-       .rate           = DA850_REF_FREQ,
-       .set_rate       = davinci_simple_set_rate,
-};
-
-static struct clk pll0_clk = {
-       .name           = "pll0",
-       .parent         = &ref_clk,
-       .pll_data       = &pll0_data,
-       .flags          = CLK_PLL,
-       .set_rate       = da850_set_pll0rate,
-};
-
-static struct clk pll0_aux_clk = {
-       .name           = "pll0_aux_clk",
-       .parent         = &pll0_clk,
-       .flags          = CLK_PLL | PRE_PLL,
-};
-
-static struct clk pll0_sysclk1 = {
-       .name           = "pll0_sysclk1",
-       .parent         = &pll0_clk,
-       .flags          = CLK_PLL,
-       .div_reg        = PLLDIV1,
-};
-
-static struct clk pll0_sysclk2 = {
-       .name           = "pll0_sysclk2",
-       .parent         = &pll0_clk,
-       .flags          = CLK_PLL,
-       .div_reg        = PLLDIV2,
-};
-
-static struct clk pll0_sysclk3 = {
-       .name           = "pll0_sysclk3",
-       .parent         = &pll0_clk,
-       .flags          = CLK_PLL,
-       .div_reg        = PLLDIV3,
-       .set_rate       = davinci_set_sysclk_rate,
-       .maxrate        = 100000000,
-};
-
-static struct clk pll0_sysclk4 = {
-       .name           = "pll0_sysclk4",
-       .parent         = &pll0_clk,
-       .flags          = CLK_PLL,
-       .div_reg        = PLLDIV4,
-};
-
-static struct clk pll0_sysclk5 = {
-       .name           = "pll0_sysclk5",
-       .parent         = &pll0_clk,
-       .flags          = CLK_PLL,
-       .div_reg        = PLLDIV5,
-};
-
-static struct clk pll0_sysclk6 = {
-       .name           = "pll0_sysclk6",
-       .parent         = &pll0_clk,
-       .flags          = CLK_PLL,
-       .div_reg        = PLLDIV6,
-};
-
-static struct clk pll0_sysclk7 = {
-       .name           = "pll0_sysclk7",
-       .parent         = &pll0_clk,
-       .flags          = CLK_PLL,
-       .div_reg        = PLLDIV7,
-};
-
-static struct pll_data pll1_data = {
-       .num            = 2,
-       .phys_base      = DA850_PLL1_BASE,
-       .flags          = PLL_HAS_POSTDIV,
-};
-
-static struct clk pll1_clk = {
-       .name           = "pll1",
-       .parent         = &ref_clk,
-       .pll_data       = &pll1_data,
-       .flags          = CLK_PLL,
-};
-
-static struct clk pll1_aux_clk = {
-       .name           = "pll1_aux_clk",
-       .parent         = &pll1_clk,
-       .flags          = CLK_PLL | PRE_PLL,
-};
-
-static struct clk pll1_sysclk2 = {
-       .name           = "pll1_sysclk2",
-       .parent         = &pll1_clk,
-       .flags          = CLK_PLL,
-       .div_reg        = PLLDIV2,
-};
-
-static struct clk pll1_sysclk3 = {
-       .name           = "pll1_sysclk3",
-       .parent         = &pll1_clk,
-       .flags          = CLK_PLL,
-       .div_reg        = PLLDIV3,
-};
-
-static int da850_async3_set_parent(struct clk *clk, struct clk *parent)
-{
-       u32 val;
-
-       val = readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG));
-
-       if (parent == &pll0_sysclk2) {
-               val &= ~CFGCHIP3_ASYNC3_CLKSRC;
-       } else if (parent == &pll1_sysclk2) {
-               val |= CFGCHIP3_ASYNC3_CLKSRC;
-       } else {
-               pr_err("Bad parent on async3 clock mux\n");
-               return -EINVAL;
-       }
-
-       writel(val, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG));
-
-       return 0;
-}
-
-static struct clk async3_clk = {
-       .name           = "async3",
-       .parent         = &pll1_sysclk2,
-       .set_parent     = da850_async3_set_parent,
-};
-
-static struct clk i2c0_clk = {
-       .name           = "i2c0",
-       .parent         = &pll0_aux_clk,
-};
-
-static struct clk timerp64_0_clk = {
-       .name           = "timer0",
-       .parent         = &pll0_aux_clk,
-};
-
-static struct clk timerp64_1_clk = {
-       .name           = "timer1",
-       .parent         = &pll0_aux_clk,
-};
-
-static struct clk arm_rom_clk = {
-       .name           = "arm_rom",
-       .parent         = &pll0_sysclk2,
-       .lpsc           = DA8XX_LPSC0_ARM_RAM_ROM,
-       .flags          = ALWAYS_ENABLED,
-};
-
-static struct clk tpcc0_clk = {
-       .name           = "tpcc0",
-       .parent         = &pll0_sysclk2,
-       .lpsc           = DA8XX_LPSC0_TPCC,
-       .flags          = ALWAYS_ENABLED | CLK_PSC,
-};
-
-static struct clk tptc0_clk = {
-       .name           = "tptc0",
-       .parent         = &pll0_sysclk2,
-       .lpsc           = DA8XX_LPSC0_TPTC0,
-       .flags          = ALWAYS_ENABLED,
-};
-
-static struct clk tptc1_clk = {
-       .name           = "tptc1",
-       .parent         = &pll0_sysclk2,
-       .lpsc           = DA8XX_LPSC0_TPTC1,
-       .flags          = ALWAYS_ENABLED,
-};
-
-static struct clk tpcc1_clk = {
-       .name           = "tpcc1",
-       .parent         = &pll0_sysclk2,
-       .lpsc           = DA850_LPSC1_TPCC1,
-       .gpsc           = 1,
-       .flags          = CLK_PSC | ALWAYS_ENABLED,
-};
-
-static struct clk tptc2_clk = {
-       .name           = "tptc2",
-       .parent         = &pll0_sysclk2,
-       .lpsc           = DA850_LPSC1_TPTC2,