Merge tag 'tegra-for-4.18-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git...
authorOlof Johansson <olof@lixom.net>
Fri, 25 May 2018 12:15:34 +0000 (05:15 -0700)
committerOlof Johansson <olof@lixom.net>
Fri, 25 May 2018 12:15:34 +0000 (05:15 -0700)
ARM: tegra: Device tree changes for v4.18-rc1

Contains a fix for the high-speed UART on Toradex Apalis TK1 boards as
well as IOMMU enablement for various devices on Tegra30 and Tegra30.

* tag 'tegra-for-4.18-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  ARM: dts: tegra114: Add IOMMU nodes to Host1x and its clients
  ARM: dts: tegra30: Add IOMMU nodes to Host1x and its clients
  ARM: tegra: apalis-tk1: Fix high speed UART compatible

Signed-off-by: Olof Johansson <olof@lixom.net>
arch/arm/boot/dts/tegra114.dtsi
arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi
arch/arm/boot/dts/tegra124-apalis.dtsi
arch/arm/boot/dts/tegra30.dtsi

index 0e4a13295d8aa73fe63b1cb600d1f7fc2acf01cd..84c4358dacac7e7cc71fbdae100f0d04e1af72b6 100644 (file)
@@ -19,6 +19,7 @@
                clocks = <&tegra_car TEGRA114_CLK_HOST1X>;
                resets = <&tegra_car 28>;
                reset-names = "host1x";
+               iommus = <&mc TEGRA_SWGROUP_HC>;
 
                #address-cells = <1>;
                #size-cells = <1>;
@@ -32,6 +33,8 @@
                        clocks = <&tegra_car TEGRA114_CLK_GR2D>;
                        resets = <&tegra_car 21>;
                        reset-names = "2d";
+
+                       iommus = <&mc TEGRA_SWGROUP_G2>;
                };
 
                gr3d@54180000 {
@@ -40,6 +43,8 @@
                        clocks = <&tegra_car TEGRA114_CLK_GR3D>;
                        resets = <&tegra_car 24>;
                        reset-names = "3d";
+
+                       iommus = <&mc TEGRA_SWGROUP_NV>;
                };
 
                dc@54200000 {
index bb67edb016c5890b32ad7e9a7690b1e32e008824..3455822350c5984fb483d7e7f5d66708436af3e6 100644 (file)
        };
 
        serial@70006040 {
-               compatible = "nvidia,tegra124-hsuart";
+               compatible = "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart";
        };
 
        serial@70006200 {
-               compatible = "nvidia,tegra124-hsuart";
+               compatible = "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart";
        };
 
        serial@70006300 {
-               compatible = "nvidia,tegra124-hsuart";
+               compatible = "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart";
        };
 
        hdmi_ddc: i2c@7000c700 {
index 65a2161b9b8eebb6e64ad11c6b4e88dd25f47fd4..9f960c84ba10ce0c0b2e0ec5e37e067b5cc7ef20 100644 (file)
        };
 
        serial@70006040 {
-               compatible = "nvidia,tegra124-hsuart";
+               compatible = "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart";
        };
 
        serial@70006200 {
-               compatible = "nvidia,tegra124-hsuart";
+               compatible = "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart";
        };
 
        serial@70006300 {
-               compatible = "nvidia,tegra124-hsuart";
+               compatible = "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart";
        };
 
        hdmi_ddc: i2c@7000c400 {
index a110cf84d85fb9505d9b279a44dac9b58aaeadf8..09087b9c5e26ce2b9989e26ee0f7bae011a5b77c 100644 (file)
                clocks = <&tegra_car TEGRA30_CLK_HOST1X>;
                resets = <&tegra_car 28>;
                reset-names = "host1x";
+               iommus = <&mc TEGRA_SWGROUP_HC>;
 
                #address-cells = <1>;
                #size-cells = <1>;
                        clocks = <&tegra_car TEGRA30_CLK_MPE>;
                        resets = <&tegra_car 60>;
                        reset-names = "mpe";
+
+                       iommus = <&mc TEGRA_SWGROUP_MPE>;
                };
 
                vi@54080000 {
                        clocks = <&tegra_car TEGRA30_CLK_VI>;
                        resets = <&tegra_car 20>;
                        reset-names = "vi";
+
+                       iommus = <&mc TEGRA_SWGROUP_VI>;
                };
 
                epp@540c0000 {
                        clocks = <&tegra_car TEGRA30_CLK_EPP>;
                        resets = <&tegra_car 19>;
                        reset-names = "epp";
+
+                       iommus = <&mc TEGRA_SWGROUP_EPP>;
                };
 
                isp@54100000 {
                        clocks = <&tegra_car TEGRA30_CLK_ISP>;
                        resets = <&tegra_car 23>;
                        reset-names = "isp";
+
+                       iommus = <&mc TEGRA_SWGROUP_ISP>;
                };
 
                gr2d@54140000 {
                        clocks = <&tegra_car TEGRA30_CLK_GR2D>;
                        resets = <&tegra_car 21>;
                        reset-names = "2d";
+
+                       iommus = <&mc TEGRA_SWGROUP_G2>;
                };
 
                gr3d@54180000 {
                        resets = <&tegra_car 24>,
                                 <&tegra_car 98>;
                        reset-names = "3d", "3d2";
+
+                       iommus = <&mc TEGRA_SWGROUP_NV>,
+                                <&mc TEGRA_SWGROUP_NV2>;
                };
 
                dc@54200000 {