Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
authorLinus Torvalds <torvalds@linux-foundation.org>
Wed, 28 Mar 2018 23:52:13 +0000 (13:52 -1000)
committerLinus Torvalds <torvalds@linux-foundation.org>
Wed, 28 Mar 2018 23:52:13 +0000 (13:52 -1000)
Pull ARM SoC fixes from Arnd Bergmann:
 "Here are are a couple of last-minute fixes for 4.16, mostly for
  regressions. As usual, the majory are device tree changes:

   - USB 3 support on rk3399 didn't work and is being reverted for now

   - One fix for an old suspend/resume bug on rk3399

   - A few regulator related fixes on Banana Pi M2, and on imx7d-sdb

   - A boot regression fix for all Aspeed SoCs failing to find their
     memory

   - One more dtc warning fix

  The other changes are:

   - A few updates to the MAINTAINERS file

   - A revert for an incorrect orion5x cleanup

   - Two power management fixes for OMAP"

* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  ARM: OMAP: Fix SRAM W+X mapping
  ARM: dts: aspeed: Add default memory node
  mailmap: Update email address for Gregory CLEMENT
  ARM: davinci: fix the GPIO lookup for omapl138-hawk
  MAINTAINERS: Update Tegra IOMMU maintainer
  ARM: dts: imx7d-sdb: Fix regulator-usb-otg2-vbus node name
  ARM: ux500: Fix PMU IRQ regression
  ARM: dts: rockchip: Add missing #sound-dai-cells on rk3288
  Revert "arm64: dts: rockchip: add usb3-phy otg-port support for rk3399"
  arm64: dts: rockchip: Fix rk3399-gru-* s2r (pinctrl hogs, wifi reset)
  ARM: OMAP: Fix dmtimer init for omap1
  MAINTAINERS: update email address for Maxime Ripard
  ARM: dts: sun6i: a31s: bpi-m2: add missing regulators
  ARM: dts: sun6i: a31s: bpi-m2: improve pmic properties

14 files changed:
.mailmap
MAINTAINERS
arch/arm/boot/dts/aspeed-g4.dtsi
arch/arm/boot/dts/aspeed-g5.dtsi
arch/arm/boot/dts/imx7d-sdb.dts
arch/arm/boot/dts/rk3288.dtsi
arch/arm/boot/dts/sun6i-a31s-sinovoip-bpi-m2.dts
arch/arm/mach-davinci/board-omapl138-hawk.c
arch/arm/mach-ux500/cpu-db8500.c
arch/arm/plat-omap/dmtimer.c
arch/arm/plat-omap/include/plat/sram.h
arch/arm/plat-omap/sram.c
arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi
arch/arm64/boot/dts/rockchip/rk3399.dtsi

index e18cab73e209a7b3057cfd672356dab6d9846483..a2ce89a456c225610d38ca38499dbbe5dfd1a703 100644 (file)
--- a/.mailmap
+++ b/.mailmap
@@ -62,6 +62,7 @@ Frank Zago <fzago@systemfabricworks.com>
 Greg Kroah-Hartman <greg@echidna.(none)>
 Greg Kroah-Hartman <gregkh@suse.de>
 Greg Kroah-Hartman <greg@kroah.com>
+Gregory CLEMENT <gregory.clement@bootlin.com> <gregory.clement@free-electrons.com>
 Henk Vergonet <Henk.Vergonet@gmail.com>
 Henrik Kretzschmar <henne@nachtwindheim.de>
 Henrik Rydberg <rydberg@bitmath.org>
index 73c0cdabf7556ccb13f182f0191d03bdb379aae2..0660ce9fd1219f2fd96868ea6395c86f662ebb01 100644 (file)
@@ -1152,7 +1152,7 @@ S:        Maintained
 F:     drivers/clk/sunxi/
 
 ARM/Allwinner sunXi SoC support
-M:     Maxime Ripard <maxime.ripard@free-electrons.com>
+M:     Maxime Ripard <maxime.ripard@bootlin.com>
 M:     Chen-Yu Tsai <wens@csie.org>
 L:     linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
 S:     Maintained
@@ -4626,7 +4626,7 @@ F:        include/uapi/drm/drm*
 F:     include/linux/vga*
 
 DRM DRIVERS FOR ALLWINNER A10
-M:     Maxime Ripard  <maxime.ripard@free-electrons.com>
+M:     Maxime Ripard  <maxime.ripard@bootlin.com>
 L:     dri-devel@lists.freedesktop.org
 S:     Supported
 F:     drivers/gpu/drm/sun4i/
@@ -13644,7 +13644,8 @@ S:      Supported
 F:     drivers/i2c/busses/i2c-tegra.c
 
 TEGRA IOMMU DRIVERS
-M:     Hiroshi Doyu <hdoyu@nvidia.com>
+M:     Thierry Reding <thierry.reding@gmail.com>
+L:     linux-tegra@vger.kernel.org
 S:     Supported
 F:     drivers/iommu/tegra*
 
index b0d8431a3700378f2bd4f5b9daf97b6a952a8271..ae2b8c952e80d7102f9aa262c7422d676c390adf 100644 (file)
                };
        };
 
+       memory@40000000 {
+               device_type = "memory";
+               reg = <0x40000000 0>;
+       };
+
        ahb {
                compatible = "simple-bus";
                #address-cells = <1>;
index 40de3b66c33f56ad4d8f8981c2a88f8a6d73544b..2477ebc11d9db4dfdd62fe09fcdf6a00c9f80161 100644 (file)
                };
        };
 
+       memory@80000000 {
+               device_type = "memory";
+               reg = <0x80000000 0>;
+       };
+
        ahb {
                compatible = "simple-bus";
                #address-cells = <1>;
index a7a5dc7b270083ffc6172a5d4cd499f74a7c67d6..e7d2db839d70790fe0ace3e62c6fcd3e9def6e59 100644 (file)
@@ -82,7 +82,7 @@
                enable-active-high;
        };
 
-       reg_usb_otg2_vbus: regulator-usb-otg1-vbus {
+       reg_usb_otg2_vbus: regulator-usb-otg2-vbus {
                compatible = "regulator-fixed";
                regulator-name = "usb_otg2_vbus";
                regulator-min-microvolt = <5000000>;
index 6102e4e7f35c15bcb809152453ef3ed82dd579d7..354aff45c1afca2dcec62e420602c01237c5b04e 100644 (file)
        i2s: i2s@ff890000 {
                compatible = "rockchip,rk3288-i2s", "rockchip,rk3066-i2s";
                reg = <0x0 0xff890000 0x0 0x10000>;
+               #sound-dai-cells = <0>;
                interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
                #address-cells = <1>;
                #size-cells = <0>;
                compatible = "rockchip,rk3288-dw-hdmi";
                reg = <0x0 0xff980000 0x0 0x20000>;
                reg-io-width = <4>;
+               #sound-dai-cells = <0>;
                rockchip,grf = <&grf>;
                interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&cru  PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_HDCP>, <&cru SCLK_HDMI_CEC>;
index 51e6f1d21c32b745957fe82dfc6eeeafb9b67bb7..b2758dd8ce438abdfd53a0a347f496b6d8ddbe7d 100644 (file)
@@ -42,7 +42,6 @@
 
 /dts-v1/;
 #include "sun6i-a31s.dtsi"
-#include "sunxi-common-regulators.dtsi"
 #include <dt-bindings/gpio/gpio.h>
 
 / {
@@ -99,6 +98,7 @@
        pinctrl-0 = <&gmac_pins_rgmii_a>, <&gmac_phy_reset_pin_bpi_m2>;
        phy = <&phy1>;
        phy-mode = "rgmii";
+       phy-supply = <&reg_dldo1>;
        snps,reset-gpio = <&pio 0 21 GPIO_ACTIVE_HIGH>; /* PA21 */
        snps,reset-active-low;
        snps,reset-delays-us = <0 10000 30000>;
 &mmc0 {
        pinctrl-names = "default";
        pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_bpi_m2>;
-       vmmc-supply = <&reg_vcc3v0>;
+       vmmc-supply = <&reg_dcdc1>;
        bus-width = <4>;
        cd-gpios = <&pio 0 4 GPIO_ACTIVE_HIGH>; /* PA4 */
        cd-inverted;
 &mmc2 {
        pinctrl-names = "default";
        pinctrl-0 = <&mmc2_pins_a>;
-       vmmc-supply = <&reg_vcc3v0>;
+       vmmc-supply = <&reg_aldo1>;
        mmc-pwrseq = <&mmc2_pwrseq>;
        bus-width = <4>;
        non-removable;
                reg = <0x68>;
                interrupt-parent = <&nmi_intc>;
                interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+               eldoin-supply = <&reg_dcdc1>;
+               x-powers,drive-vbus-en;
        };
 };
 
 
 #include "axp22x.dtsi"
 
+&reg_aldo1 {
+       regulator-min-microvolt = <3300000>;
+       regulator-max-microvolt = <3300000>;
+       regulator-name = "vcc-wifi";
+};
+
+&reg_aldo2 {
+       regulator-always-on;
+       regulator-min-microvolt = <2500000>;
+       regulator-max-microvolt = <2500000>;
+       regulator-name = "vcc-gmac";
+};
+
+&reg_aldo3 {
+       regulator-always-on;
+       regulator-min-microvolt = <3000000>;
+       regulator-max-microvolt = <3000000>;
+       regulator-name = "avcc";
+};
+
 &reg_dc5ldo {
+       regulator-always-on;
        regulator-min-microvolt = <700000>;
        regulator-max-microvolt = <1320000>;
        regulator-name = "vdd-cpus";
        regulator-name = "vcc-dram";
 };
 
+&reg_dldo1 {
+       regulator-min-microvolt = <3000000>;
+       regulator-max-microvolt = <3000000>;
+       regulator-name = "vcc-mac";
+};
+
+&reg_dldo2 {
+       regulator-min-microvolt = <2800000>;
+       regulator-max-microvolt = <2800000>;
+       regulator-name = "avdd-csi";
+};
+
+&reg_dldo3 {
+       regulator-always-on;
+       regulator-min-microvolt = <3300000>;
+       regulator-max-microvolt = <3300000>;
+       regulator-name = "vcc-pb";
+};
+
+&reg_eldo1 {
+       regulator-min-microvolt = <1800000>;
+       regulator-max-microvolt = <1800000>;
+       regulator-name = "vdd-csi";
+       status = "okay";
+};
+
+&reg_ldo_io1 {
+       regulator-always-on;
+       regulator-min-microvolt = <1800000>;
+       regulator-max-microvolt = <1800000>;
+       regulator-name = "vcc-pm-cpus";
+       status = "okay";
+};
+
 &uart0 {
        pinctrl-names = "default";
        pinctrl-0 = <&uart0_pins_a>;
index a3e78074be701a3a6abec03ff7e5586f79acfcbe..62eb7d6688900f244f546bd88da951e4ef934ac0 100644 (file)
@@ -127,8 +127,8 @@ static struct gpiod_lookup_table mmc_gpios_table = {
        .dev_id = "da830-mmc.0",
        .table = {
                /* CD: gpio3_12: gpio60: chip 1 contains gpio range 32-63*/
-               GPIO_LOOKUP("davinci_gpio.1", 28, "cd", GPIO_ACTIVE_LOW),
-               GPIO_LOOKUP("davinci_gpio.1", 29, "wp", GPIO_ACTIVE_LOW),
+               GPIO_LOOKUP("davinci_gpio.0", 28, "cd", GPIO_ACTIVE_LOW),
+               GPIO_LOOKUP("davinci_gpio.0", 29, "wp", GPIO_ACTIVE_LOW),
        },
 };
 
index 7e5d7a083707074b639dc35ba18c40a14312a38c..36cd23c8be9b0f147c87e952c101ef14b0b8db93 100644 (file)
@@ -133,6 +133,9 @@ static void __init u8500_init_machine(void)
        if (of_machine_is_compatible("st-ericsson,u8540"))
                of_platform_populate(NULL, u8500_local_bus_nodes,
                                     u8540_auxdata_lookup, NULL);
+       else
+               of_platform_populate(NULL, u8500_local_bus_nodes,
+                                    NULL, NULL);
 }
 
 static const char * stericsson_dt_platform_compat[] = {
index d443e481c3e94aeddcc82ec199a4be82e6bb06ca..8805a59bae538e1835860b08db17628c9b20b30a 100644 (file)
@@ -888,11 +888,8 @@ static int omap_dm_timer_probe(struct platform_device *pdev)
        timer->irq = irq->start;
        timer->pdev = pdev;
 
-       /* Skip pm_runtime_enable for OMAP1 */
-       if (!(timer->capability & OMAP_TIMER_NEEDS_RESET)) {
-               pm_runtime_enable(dev);
-               pm_runtime_irq_safe(dev);
-       }
+       pm_runtime_enable(dev);
+       pm_runtime_irq_safe(dev);
 
        if (!timer->reserved) {
                ret = pm_runtime_get_sync(dev);
index fb061cf0d736d3203cf670d366cab227776e8264..30a07730807a86b2f5440702d17094b2f6a4bb26 100644 (file)
@@ -5,13 +5,4 @@ void omap_map_sram(unsigned long start, unsigned long size,
                        unsigned long skip, int cached);
 void omap_sram_reset(void);
 
-extern void *omap_sram_push_address(unsigned long size);
-
-/* Macro to push a function to the internal SRAM, using the fncpy API */
-#define omap_sram_push(funcp, size) ({                         \
-       typeof(&(funcp)) _res = NULL;                           \
-       void *_sram_address = omap_sram_push_address(size);     \
-       if (_sram_address)                                      \
-               _res = fncpy(_sram_address, &(funcp), size);    \
-       _res;                                                   \
-})
+extern void *omap_sram_push(void *funcp, unsigned long size);
index a5bc92d7e4765b81315379c41618fff7f84cbec2..921840acf65c83a5ac785ac5e514591a404a8a46 100644 (file)
@@ -23,6 +23,7 @@
 #include <asm/fncpy.h>
 #include <asm/tlb.h>
 #include <asm/cacheflush.h>
+#include <asm/set_memory.h>
 
 #include <asm/mach/map.h>
 
@@ -42,7 +43,7 @@ static void __iomem *omap_sram_ceil;
  * Note that fncpy requires the returned address to be aligned
  * to an 8-byte boundary.
  */
-void *omap_sram_push_address(unsigned long size)
+static void *omap_sram_push_address(unsigned long size)
 {
        unsigned long available, new_ceil = (unsigned long)omap_sram_ceil;
 
@@ -60,6 +61,30 @@ void *omap_sram_push_address(unsigned long size)
        return (void *)omap_sram_ceil;
 }
 
+void *omap_sram_push(void *funcp, unsigned long size)
+{
+       void *sram;
+       unsigned long base;
+       int pages;
+       void *dst = NULL;
+
+       sram = omap_sram_push_address(size);
+       if (!sram)
+               return NULL;
+
+       base = (unsigned long)sram & PAGE_MASK;
+       pages = PAGE_ALIGN(size) / PAGE_SIZE;
+
+       set_memory_rw(base, pages);
+
+       dst = fncpy(sram, funcp, size);
+
+       set_memory_ro(base, pages);
+       set_memory_x(base, pages);
+
+       return dst;
+}
+
 /*
  * The SRAM context is lost during off-idle and stack
  * needs to be reset.
@@ -75,6 +100,9 @@ void omap_sram_reset(void)
 void __init omap_map_sram(unsigned long start, unsigned long size,
                                 unsigned long skip, int cached)
 {
+       unsigned long base;
+       int pages;
+
        if (size == 0)
                return;
 
@@ -95,4 +123,10 @@ void __init omap_map_sram(unsigned long start, unsigned long size,
         */
        memset_io(omap_sram_base + omap_sram_skip, 0,
                  omap_sram_size - omap_sram_skip);
+
+       base = (unsigned long)omap_sram_base;
+       pages = PAGE_ALIGN(omap_sram_size) / PAGE_SIZE;
+
+       set_memory_ro(base, pages);
+       set_memory_x(base, pages);
 }
index 03f195025390d6b8e32c4fb5cccf7045e1cf5069..204bdb9857b9cbd3517c0ff2307aa9af30ae2f8c 100644 (file)
        wlan_pd_n: wlan-pd-n {
                compatible = "regulator-fixed";
                regulator-name = "wlan_pd_n";
+               pinctrl-names = "default";
+               pinctrl-0 = <&wlan_module_reset_l>;
 
-               /* Note the wlan_module_reset_l pinctrl */
                enable-active-high;
                gpio = <&gpio1 11 GPIO_ACTIVE_HIGH>;
 
@@ -983,12 +984,6 @@ ap_i2c_audio: &i2c8 {
        pinctrl-0 = <
                &ap_pwroff      /* AP will auto-assert this when in S3 */
                &clk_32k        /* This pin is always 32k on gru boards */
-
-               /*
-                * We want this driven low ASAP; firmware should help us, but
-                * we can help ourselves too.
-                */
-               &wlan_module_reset_l
        >;
 
        pcfg_output_low: pcfg-output-low {
@@ -1168,12 +1163,7 @@ ap_i2c_audio: &i2c8 {
                };
 
                wlan_module_reset_l: wlan-module-reset-l {
-                       /*
-                        * We want this driven low ASAP (As {Soon,Strongly} As
-                        * Possible), to avoid leakage through the powered-down
-                        * WiFi.
-                        */
-                       rockchip,pins = <1 11 RK_FUNC_GPIO &pcfg_output_low>;
+                       rockchip,pins = <1 11 RK_FUNC_GPIO &pcfg_pull_none>;
                };
 
                bt_host_wake_l: bt-host-wake-l {
index 2605118d4b4ce74755ced75843d91ca22ad38ce8..0b81ca1d07e7e900705d71f8e9cdacd5ce9b1217 100644 (file)
                        reg = <0x0 0xfe800000 0x0 0x100000>;
                        interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH 0>;
                        dr_mode = "otg";
-                       phys = <&u2phy0_otg>, <&tcphy0_usb3>;
-                       phy-names = "usb2-phy", "usb3-phy";
+                       phys = <&u2phy0_otg>;
+                       phy-names = "usb2-phy";
                        phy_type = "utmi_wide";
                        snps,dis_enblslpm_quirk;
                        snps,dis-u2-freeclk-exists-quirk;
                        reg = <0x0 0xfe900000 0x0 0x100000>;
                        interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 0>;
                        dr_mode = "otg";
-                       phys = <&u2phy1_otg>, <&tcphy1_usb3>;
-                       phy-names = "usb2-phy", "usb3-phy";
+                       phys = <&u2phy1_otg>;
+                       phy-names = "usb2-phy";
                        phy_type = "utmi_wide";
                        snps,dis_enblslpm_quirk;
                        snps,dis-u2-freeclk-exists-quirk;