Merge tag 'renesas-dt-bindings-for-v4.20' of git://git.kernel.org/pub/scm/linux/kerne...
authorArnd Bergmann <arnd@arndb.de>
Fri, 28 Sep 2018 15:44:38 +0000 (17:44 +0200)
committerArnd Bergmann <arnd@arndb.de>
Fri, 28 Sep 2018 15:44:56 +0000 (17:44 +0200)
Renesas ARM Based SoC DT Bindings Updates for v4.20

* Document bindings for:
  - RZ/G2E (r8a774c0), RZ/G2M (r8a774a1) and RZ/A2 (r7s9210) SoCs
  - R-Car M3-N (r8a77965) SoC based ULCB board

* tag 'renesas-dt-bindings-for-v4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  dt-bindings: arm: Document RZ/G2E SoC DT bindings
  dt-bindings: arm: Document Renesas R-Car M3-N-based ULCB board
  dt-bindings: arm: Document RZ/A2 SoC DT bindings
  dt-bindings: arm: Document RZ/G2M SoC DT bindings

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
453 files changed:
Documentation/ABI/stable/sysfs-bus-xen-backend
Documentation/ABI/testing/sysfs-driver-xen-blkback
Documentation/arm/Samsung/Bootloader-interface.txt
Documentation/arm64/sve.txt
Documentation/devicetree/bindings/arm/amlogic.txt
Documentation/devicetree/bindings/arm/bcm/brcm,bcm2835.txt
Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
Documentation/devicetree/bindings/arm/marvell/marvell,berlin.txt [deleted file]
Documentation/devicetree/bindings/arm/rockchip.txt
Documentation/devicetree/bindings/arm/scu.txt
Documentation/devicetree/bindings/arm/syna.txt [new file with mode: 0644]
Documentation/devicetree/bindings/arm/tegra.txt
Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-pmc.txt
Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt
Documentation/devicetree/bindings/arm/ux500/boards.txt
Documentation/devicetree/bindings/interrupt-controller/riscv,cpu-intc.txt
Documentation/devicetree/bindings/net/dsa/b53.txt
Documentation/devicetree/bindings/soc/rockchip/grf.txt
Documentation/devicetree/bindings/vendor-prefixes.txt
Documentation/devicetree/bindings/watchdog/renesas-wdt.txt
Documentation/hwmon/ina2xx
Documentation/i2c/DMA-considerations
MAINTAINERS
Makefile
arch/arm/boot/dts/Makefile
arch/arm/boot/dts/am335x-osd3358-sm-red.dts [changed mode: 0755->0644]
arch/arm/boot/dts/am4372.dtsi
arch/arm/boot/dts/arm-realview-eb.dtsi
arch/arm/boot/dts/arm-realview-pb1176.dts
arch/arm/boot/dts/arm-realview-pb11mp.dts
arch/arm/boot/dts/arm-realview-pbx.dtsi
arch/arm/boot/dts/aspeed-bmc-arm-stardragon4800-rep2.dts [new file with mode: 0644]
arch/arm/boot/dts/aspeed-bmc-facebook-tiogapass.dts [new file with mode: 0644]
arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts
arch/arm/boot/dts/aspeed-g4.dtsi
arch/arm/boot/dts/aspeed-g5.dtsi
arch/arm/boot/dts/at91-dvk_su60_somc.dtsi
arch/arm/boot/dts/at91-dvk_su60_somc_lcm.dtsi
arch/arm/boot/dts/at91-nattis-2-natte-2.dts
arch/arm/boot/dts/at91-sama5d27_som1_ek.dts
arch/arm/boot/dts/at91-sama5d2_xplained.dts
arch/arm/boot/dts/at91-tse850-3.dts
arch/arm/boot/dts/at91-vinco.dts
arch/arm/boot/dts/at91sam9260ek.dts
arch/arm/boot/dts/at91sam9261ek.dts
arch/arm/boot/dts/at91sam9g20ek_common.dtsi
arch/arm/boot/dts/at91sam9g45.dtsi
arch/arm/boot/dts/bcm-hr2.dtsi
arch/arm/boot/dts/bcm-nsp.dtsi
arch/arm/boot/dts/bcm2837-rpi-cm3-io3.dts [new file with mode: 0644]
arch/arm/boot/dts/bcm2837-rpi-cm3.dtsi [new file with mode: 0644]
arch/arm/boot/dts/bcm283x-rpi-lan7515.dtsi
arch/arm/boot/dts/bcm47081-tplink-archer-c5-v2.dts
arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts
arch/arm/boot/dts/bcm4709-tplink-archer-c9-v1.dts
arch/arm/boot/dts/bcm5301x-nand-cs0.dtsi
arch/arm/boot/dts/bcm5301x.dtsi
arch/arm/boot/dts/bcm958625hr.dts
arch/arm/boot/dts/exynos3250-artik5.dtsi
arch/arm/boot/dts/exynos4210-origen.dts
arch/arm/boot/dts/exynos4210-trats.dts
arch/arm/boot/dts/exynos4210-universal_c210.dts
arch/arm/boot/dts/exynos4412-midas.dtsi
arch/arm/boot/dts/exynos4412-odroid-common.dtsi
arch/arm/boot/dts/exynos5250-arndale.dts
arch/arm/boot/dts/exynos5250-pinctrl.dtsi
arch/arm/boot/dts/exynos5250-snow-rev5.dts
arch/arm/boot/dts/exynos5250.dtsi
arch/arm/boot/dts/exynos5420-peach-pit.dts
arch/arm/boot/dts/exynos5422-odroid-core.dtsi
arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
arch/arm/boot/dts/exynos5422-odroidxu3.dts
arch/arm/boot/dts/exynos5800-peach-pi.dts
arch/arm/boot/dts/hip04.dtsi
arch/arm/boot/dts/imx23-evk.dts
arch/arm/boot/dts/imx28-evk.dts
arch/arm/boot/dts/imx7d.dtsi
arch/arm/boot/dts/iwg20d-q7-common.dtsi
arch/arm/boot/dts/lpc32xx.dtsi
arch/arm/boot/dts/meson8.dtsi
arch/arm/boot/dts/meson8b-ec100.dts [new file with mode: 0644]
arch/arm/boot/dts/meson8b-odroidc1.dts
arch/arm/boot/dts/meson8b.dtsi
arch/arm/boot/dts/omap4-droid4-xt894.dts
arch/arm/boot/dts/pxa25x.dtsi
arch/arm/boot/dts/pxa27x.dtsi
arch/arm/boot/dts/pxa2xx.dtsi
arch/arm/boot/dts/r8a7743-iwg20d-q7-dbcm-ca.dts
arch/arm/boot/dts/r8a7743-iwg20d-q7.dts
arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts
arch/arm/boot/dts/r8a77470.dtsi
arch/arm/boot/dts/r8a7778-bockw.dts
arch/arm/boot/dts/r8a7778.dtsi
arch/arm/boot/dts/r8a7779-marzen.dts
arch/arm/boot/dts/r8a7779.dtsi
arch/arm/boot/dts/r8a7790-stout.dts
arch/arm/boot/dts/r8a7790.dtsi
arch/arm/boot/dts/r8a7791.dtsi
arch/arm/boot/dts/r8a7792.dtsi
arch/arm/boot/dts/r8a7793-gose.dts
arch/arm/boot/dts/r8a7793.dtsi
arch/arm/boot/dts/r8a7794-silk.dts
arch/arm/boot/dts/r8a7794.dtsi
arch/arm/boot/dts/r9a06g032.dtsi
arch/arm/boot/dts/s5pv210.dtsi
arch/arm/boot/dts/sama5d2.dtsi
arch/arm/boot/dts/sama5d4.dtsi
arch/arm/boot/dts/socfpga.dtsi
arch/arm/boot/dts/socfpga_arria10.dtsi
arch/arm/boot/dts/socfpga_cyclone5_de0_nano_soc.dts [new file with mode: 0644]
arch/arm/boot/dts/socfpga_cyclone5_de0_sockit.dts [deleted file]
arch/arm/boot/dts/socfpga_cyclone5_socrates.dts
arch/arm/boot/dts/socfpga_cyclone5_vining_fpga.dts
arch/arm/boot/dts/ste-dbx5x0.dtsi
arch/arm/boot/dts/ste-href-family-pinctrl.dtsi
arch/arm/boot/dts/ste-href.dtsi
arch/arm/boot/dts/ste-hrefprev60.dtsi
arch/arm/boot/dts/ste-snowball.dts
arch/arm/boot/dts/ste-u300.dts
arch/arm/boot/dts/stih410-b2260.dts
arch/arm/boot/dts/stihxxx-b2120.dtsi
arch/arm/boot/dts/stm32429i-eval.dts
arch/arm/boot/dts/stm32f429.dtsi
arch/arm/boot/dts/stm32f469-disco.dts
arch/arm/boot/dts/stm32f746-disco.dts
arch/arm/boot/dts/stm32f769-disco.dts
arch/arm/boot/dts/stm32h743.dtsi
arch/arm/boot/dts/stm32mp157c-ev1.dts
arch/arm/boot/dts/stm32mp157c.dtsi
arch/arm/boot/dts/tegra124-apalis-eval.dts
arch/arm/boot/dts/tegra124-apalis-v1.2-eval.dts
arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi
arch/arm/boot/dts/tegra124-apalis.dtsi
arch/arm/boot/dts/tegra20-colibri-eval-v3.dts [new file with mode: 0644]
arch/arm/boot/dts/tegra20-colibri-iris.dts
arch/arm/boot/dts/tegra20-colibri.dtsi
arch/arm/boot/dts/tegra20-paz00.dts
arch/arm/boot/dts/tegra20.dtsi
arch/arm/boot/dts/tegra30-apalis-eval.dts
arch/arm/boot/dts/tegra30-apalis-v1.1-eval.dts [new file with mode: 0644]
arch/arm/boot/dts/tegra30-apalis-v1.1.dtsi [new file with mode: 0644]
arch/arm/boot/dts/tegra30-apalis.dtsi
arch/arm/boot/dts/tegra30-colibri-eval-v3.dts
arch/arm/boot/dts/tegra30-colibri.dtsi
arch/arm/boot/dts/tegra30.dtsi
arch/arm/boot/dts/versatile-ab.dts
arch/arm/boot/dts/zynq-zc702.dts
arch/arm/boot/dts/zynq-zc770-xm010.dts
arch/arm/boot/dts/zynq-zc770-xm013.dts
arch/arm/configs/imx_v6_v7_defconfig
arch/arm/configs/mxs_defconfig
arch/arm/configs/versatile_defconfig
arch/arm/mach-exynos/common.h
arch/arm/mach-exynos/firmware.c
arch/arm/mach-exynos/suspend.c
arch/arm/mach-omap2/omap_hwmod.c
arch/arm/mach-s3c24xx/mach-gta02.c
arch/arm/mach-s3c24xx/mach-mini2440.c
arch/arm64/Kconfig
arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts
arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi
arch/arm64/boot/dts/amlogic/Makefile
arch/arm64/boot/dts/amlogic/meson-axg-s400.dts
arch/arm64/boot/dts/amlogic/meson-axg.dtsi
arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts [new file with mode: 0644]
arch/arm64/boot/dts/amlogic/meson-g12a.dtsi [new file with mode: 0644]
arch/arm64/boot/dts/amlogic/meson-gx.dtsi
arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts
arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
arch/arm64/boot/dts/arm/juno-base.dtsi
arch/arm64/boot/dts/arm/juno-cs-r1r2.dtsi
arch/arm64/boot/dts/arm/juno.dts
arch/arm64/boot/dts/broadcom/Makefile
arch/arm64/boot/dts/broadcom/bcm2837-rpi-cm3-io3.dts [new file with mode: 0644]
arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi
arch/arm64/boot/dts/broadcom/stingray/bcm958742-base.dtsi
arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi
arch/arm64/boot/dts/hisilicon/Makefile
arch/arm64/boot/dts/hisilicon/hi3670-hikey970.dts [new file with mode: 0644]
arch/arm64/boot/dts/hisilicon/hi3670.dtsi [new file with mode: 0644]
arch/arm64/boot/dts/hisilicon/hi6220-coresight.dtsi
arch/arm64/boot/dts/hisilicon/hi6220.dtsi
arch/arm64/boot/dts/lg/lg1312.dtsi
arch/arm64/boot/dts/lg/lg1313.dtsi
arch/arm64/boot/dts/nvidia/tegra186.dtsi
arch/arm64/boot/dts/nvidia/tegra194.dtsi
arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi
arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi
arch/arm64/boot/dts/nvidia/tegra210.dtsi
arch/arm64/boot/dts/renesas/Makefile
arch/arm64/boot/dts/renesas/r8a774a1.dtsi [new file with mode: 0644]
arch/arm64/boot/dts/renesas/r8a7795-es1-salvator-x.dts
arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi
arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
arch/arm64/boot/dts/renesas/r8a7795-salvator-xs.dts
arch/arm64/boot/dts/renesas/r8a7795.dtsi
arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts
arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts
arch/arm64/boot/dts/renesas/r8a7796.dtsi
arch/arm64/boot/dts/renesas/r8a77965-m3nulcb-kf.dts [new file with mode: 0644]
arch/arm64/boot/dts/renesas/r8a77965-m3nulcb.dts [new file with mode: 0644]
arch/arm64/boot/dts/renesas/r8a77965-salvator-xs.dts
arch/arm64/boot/dts/renesas/r8a77965.dtsi
arch/arm64/boot/dts/renesas/r8a77970-v3msk.dts
arch/arm64/boot/dts/renesas/r8a77970.dtsi
arch/arm64/boot/dts/renesas/r8a77980-condor.dts
arch/arm64/boot/dts/renesas/r8a77980-v3hsk.dts
arch/arm64/boot/dts/renesas/r8a77980.dtsi
arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts
arch/arm64/boot/dts/renesas/r8a77990.dtsi
arch/arm64/boot/dts/renesas/r8a77995-draak.dts
arch/arm64/boot/dts/renesas/r8a77995.dtsi
arch/arm64/boot/dts/renesas/salvator-common.dtsi
arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
arch/arm64/boot/dts/renesas/ulcb.dtsi
arch/arm64/boot/dts/rockchip/Makefile
arch/arm64/boot/dts/rockchip/px30-evb.dts [new file with mode: 0644]
arch/arm64/boot/dts/rockchip/px30.dtsi [new file with mode: 0644]
arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts
arch/arm64/boot/dts/rockchip/rk3328-rock64.dts
arch/arm64/boot/dts/rockchip/rk3328.dtsi
arch/arm64/boot/dts/rockchip/rk3399-firefly.dts
arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dts [new file with mode: 0644]
arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi
arch/arm64/boot/dts/rockchip/rk3399.dtsi
arch/arm64/boot/dts/synaptics/as370.dtsi [new file with mode: 0644]
arch/arm64/boot/dts/ti/k3-am65-main.dtsi
arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi [new file with mode: 0644]
arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi [new file with mode: 0644]
arch/arm64/boot/dts/ti/k3-am65.dtsi
arch/arm64/boot/dts/ti/k3-am654-base-board.dts
arch/arm64/configs/defconfig
arch/arm64/crypto/ghash-ce-glue.c
arch/arm64/crypto/sm4-ce-glue.c
arch/m68k/mac/misc.c
arch/nios2/Kconfig.debug
arch/powerpc/Kconfig
arch/riscv/include/asm/tlb.h
arch/riscv/kernel/sys_riscv.c
arch/x86/Kconfig
arch/x86/Makefile
arch/x86/crypto/aesni-intel_asm.S
arch/x86/events/core.c
arch/x86/include/asm/irqflags.h
arch/x86/include/asm/pgtable-3level.h
arch/x86/include/asm/processor.h
arch/x86/include/asm/signal.h
arch/x86/include/asm/stacktrace.h
arch/x86/include/asm/tlbflush.h
arch/x86/include/asm/vgtod.h
arch/x86/kernel/alternative.c
arch/x86/kernel/cpu/bugs.c
arch/x86/kernel/cpu/common.c
arch/x86/kernel/cpu/intel.c
arch/x86/kernel/dumpstack.c
arch/x86/lib/usercopy.c
arch/x86/mm/fault.c
arch/x86/mm/pageattr.c
arch/x86/mm/pti.c
arch/x86/mm/tlb.c
arch/x86/platform/efi/efi_32.c
arch/x86/xen/mmu_pv.c
block/blk-wbt.c
block/bsg.c
block/elevator.c
drivers/ata/pata_ftide010.c
drivers/base/power/clock_ops.c
drivers/block/xen-blkback/blkback.c
drivers/block/xen-blkback/common.h
drivers/block/xen-blkfront.c
drivers/bluetooth/Kconfig
drivers/bluetooth/btmtkuart.c
drivers/bus/ti-sysc.c
drivers/cdrom/cdrom.c
drivers/clk/clk-npcm7xx.c
drivers/clk/x86/clk-st.c
drivers/cpuidle/governors/menu.c
drivers/crypto/caam/caamalg_qi.c
drivers/crypto/caam/caampkc.c
drivers/crypto/caam/jr.c
drivers/crypto/cavium/nitrox/nitrox_dev.h
drivers/crypto/cavium/nitrox/nitrox_lib.c
drivers/crypto/cavium/nitrox/nitrox_reqmgr.c
drivers/crypto/chelsio/chtls/chtls.h
drivers/crypto/chelsio/chtls/chtls_main.c
drivers/crypto/vmx/aes_cbc.c
drivers/crypto/vmx/aes_xts.c
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
drivers/gpu/drm/amd/amdgpu/kv_dpm.c
drivers/gpu/drm/amd/amdgpu/si_dpm.c
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
drivers/gpu/drm/amd/display/dc/core/dc_link.c
drivers/gpu/drm/i915/i915_vma.c
drivers/gpu/drm/i915/intel_audio.c
drivers/gpu/drm/i915/intel_display.c
drivers/gpu/drm/i915/intel_hdmi.c
drivers/gpu/drm/i915/intel_lspcon.c
drivers/gpu/drm/mediatek/mtk_disp_ovl.c
drivers/gpu/drm/mediatek/mtk_disp_rdma.c
drivers/gpu/drm/mediatek/mtk_drm_crtc.c
drivers/gpu/drm/mediatek/mtk_drm_crtc.h
drivers/gpu/drm/mediatek/mtk_drm_ddp.c
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
drivers/gpu/drm/mediatek/mtk_drm_drv.c
drivers/hwmon/adt7475.c
drivers/hwmon/ina2xx.c
drivers/hwmon/nct6775.c
drivers/i2c/algos/i2c-algo-bit.c
drivers/i2c/busses/i2c-designware-master.c
drivers/i2c/busses/i2c-designware-platdrv.c
drivers/i2c/busses/i2c-i801.c
drivers/i2c/busses/i2c-sh_mobile.c
drivers/i2c/i2c-core-base.c
drivers/mmc/core/queue.c
drivers/mmc/core/queue.h
drivers/mmc/host/android-goldfish.c
drivers/mmc/host/atmel-mci.c
drivers/mmc/host/renesas_sdhi_internal_dmac.c
drivers/mtd/nand/raw/denali.c
drivers/mtd/nand/raw/docg4.c
drivers/net/ethernet/broadcom/bnxt/bnxt_tc.c
drivers/net/ethernet/cadence/macb_main.c
drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_flower.c
drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_u32.c
drivers/net/ethernet/hisilicon/hns/hnae.h
drivers/net/ethernet/hisilicon/hns/hns_enet.c
drivers/net/ethernet/hisilicon/hns3/hns3_enet.c
drivers/net/ethernet/hisilicon/hns3/hns3_enet.h
drivers/net/ethernet/intel/e1000/e1000_ethtool.c
drivers/net/ethernet/intel/i40e/i40e_ethtool.c
drivers/net/ethernet/intel/i40e/i40e_main.c
drivers/net/ethernet/intel/ice/ice.h
drivers/net/ethernet/intel/ice/ice_adminq_cmd.h
drivers/net/ethernet/intel/ice/ice_common.c
drivers/net/ethernet/intel/ice/ice_controlq.c
drivers/net/ethernet/intel/ice/ice_ethtool.c
drivers/net/ethernet/intel/ice/ice_hw_autogen.h
drivers/net/ethernet/intel/ice/ice_lan_tx_rx.h
drivers/net/ethernet/intel/ice/ice_main.c
drivers/net/ethernet/intel/ice/ice_nvm.c
drivers/net/ethernet/intel/ice/ice_sched.c
drivers/net/ethernet/intel/ice/ice_switch.c
drivers/net/ethernet/intel/ice/ice_switch.h
drivers/net/ethernet/intel/ice/ice_txrx.h
drivers/net/ethernet/intel/ice/ice_type.h
drivers/net/ethernet/intel/igb/igb_ethtool.c
drivers/net/ethernet/intel/igb/igb_main.c
drivers/net/ethernet/intel/ixgb/ixgb_main.c
drivers/net/ethernet/intel/ixgbe/ixgbe_fcoe.c
drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c
drivers/net/ethernet/intel/ixgbe/ixgbe_type.h
drivers/net/ethernet/mellanox/mlx5/core/en_tc.c
drivers/net/ethernet/mellanox/mlxsw/spectrum.c
drivers/net/ethernet/mellanox/mlxsw/spectrum.h
drivers/net/ethernet/mellanox/mlxsw/spectrum_flower.c
drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c
drivers/net/ethernet/mellanox/mlxsw/spectrum_switchdev.c
drivers/net/ethernet/netronome/nfp/flower/action.c
drivers/net/ethernet/qlogic/qed/qed_init_ops.c
drivers/net/ethernet/qlogic/qed/qed_mcp.c
drivers/net/ethernet/qlogic/qed/qed_mcp.h
drivers/net/ethernet/qlogic/qed/qed_reg_addr.h
drivers/net/ethernet/qlogic/qede/qede_filter.c
drivers/net/ethernet/qlogic/qlge/qlge_main.c
drivers/net/ethernet/renesas/ravb.h
drivers/net/ethernet/renesas/ravb_main.c
drivers/net/ethernet/renesas/sh_eth.c
drivers/net/ethernet/renesas/sh_eth.h
drivers/net/ethernet/stmicro/stmmac/Kconfig
drivers/net/ethernet/stmicro/stmmac/stmmac_tc.c
drivers/net/hyperv/netvsc_drv.c
drivers/net/usb/r8152.c
drivers/nvme/host/pci.c
drivers/nvme/target/core.c
drivers/nvme/target/fcloop.c
drivers/of/base.c
drivers/thermal/of-thermal.c
drivers/thermal/qoriq_thermal.c
drivers/thermal/rcar_gen3_thermal.c
drivers/thermal/rcar_thermal.c
drivers/vhost/vhost.c
drivers/xen/xenbus/xenbus_probe.c
fs/buffer.c
fs/isofs/inode.c
fs/notify/mark.c
fs/quota/quota.c
fs/udf/super.c
include/dt-bindings/pinctrl/pinctrl-tegra-io-pad.h [new file with mode: 0644]
include/linux/arm-smccc.h
include/linux/i2c.h
include/linux/of.h
include/linux/platform_data/ina2xx.h
include/linux/quota.h
include/net/act_api.h
include/net/pkt_cls.h
kernel/bpf/hashtab.c
kernel/bpf/sockmap.c
kernel/cpu.c
kernel/printk/printk.c
kernel/watchdog.c
kernel/watchdog_hld.c
kernel/workqueue.c
lib/percpu_counter.c
lib/rhashtable.c
mm/page-writeback.c
mm/page_alloc.c
mm/slub.c
net/core/dev.c
net/dsa/slave.c
net/ipv4/tcp_bbr.c
net/ipv4/tcp_ipv4.c
net/ipv6/addrconf.c
net/ipv6/ip6_fib.c
net/ipv6/ip6_vti.c
net/ipv6/route.c
net/ncsi/ncsi-netlink.c
net/rds/tcp.c
net/sched/act_api.c
net/sched/act_bpf.c
net/sched/act_connmark.c
net/sched/act_csum.c
net/sched/act_gact.c
net/sched/act_ife.c
net/sched/act_ipt.c
net/sched/act_mirred.c
net/sched/act_nat.c
net/sched/act_pedit.c
net/sched/act_police.c
net/sched/act_sample.c
net/sched/act_simple.c
net/sched/act_skbedit.c
net/sched/act_skbmod.c
net/sched/act_tunnel_key.c
net/sched/act_vlan.c
net/sched/cls_u32.c
net/sched/sch_cake.c
net/tls/tls_main.c
net/xdp/xdp_umem.c
scripts/Kbuild.include
scripts/Makefile.build
tools/bpf/bpftool/map_perf_ring.c

index 3d5951c..e8b60bd 100644 (file)
@@ -73,3 +73,12 @@ KernelVersion:       3.0
 Contact:       Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
 Description:
                 Number of sectors written by the frontend.
+
+What:          /sys/bus/xen-backend/devices/*/state
+Date:          August 2018
+KernelVersion: 4.19
+Contact:       Joe Jin <joe.jin@oracle.com>
+Description:
+                The state of the device. One of: 'Unknown',
+                'Initialising', 'Initialised', 'Connected', 'Closing',
+                'Closed', 'Reconfiguring', 'Reconfigured'.
index 8bb43b6..4e7babb 100644 (file)
@@ -15,3 +15,13 @@ Description:
                 blkback. If the frontend tries to use more than
                 max_persistent_grants, the LRU kicks in and starts
                 removing 5% of max_persistent_grants every 100ms.
+
+What:           /sys/module/xen_blkback/parameters/persistent_grant_unused_seconds
+Date:           August 2018
+KernelVersion:  4.19
+Contact:        Roger Pau MonnĂ© <roger.pau@citrix.com>
+Description:
+                How long a persistent grant is allowed to remain
+                allocated without being in use. The time is in
+                seconds, 0 means indefinitely long.
+                The default is 60 seconds.
index ed494ac..d17ed51 100644 (file)
@@ -26,6 +26,7 @@ Offset        Value                                        Purpose
 0x20          0xfcba0d10 (Magic cookie)                    AFTR
 0x24          exynos_cpu_resume_ns                         AFTR
 0x28 + 4*cpu  0x8 (Magic cookie, Exynos3250)               AFTR
+0x28          0x0 or last value during resume (Exynos542x) System suspend
 
 
 2. Secure mode
index f128f73..7169a0e 100644 (file)
@@ -200,7 +200,7 @@ prctl(PR_SVE_SET_VL, unsigned long arg)
       thread.
 
     * Changing the vector length causes all of P0..P15, FFR and all bits of
-      Z0..V31 except for Z0 bits [127:0] .. Z31 bits [127:0] to become
+      Z0..Z31 except for Z0 bits [127:0] .. Z31 bits [127:0] to become
       unspecified.  Calling PR_SVE_SET_VL with vl equal to the thread's current
       vector length, or calling PR_SVE_SET_VL with the PR_SVE_SET_VL_ONEXEC
       flag, does not constitute a change to the vector length for this purpose.
@@ -500,7 +500,7 @@ References
 [2] arch/arm64/include/uapi/asm/ptrace.h
     AArch64 Linux ptrace ABI definitions
 
-[3] linux/Documentation/arm64/cpu-feature-registers.txt
+[3] Documentation/arm64/cpu-feature-registers.txt
 
 [4] ARM IHI0055C
     http://infocenter.arm.com/help/topic/com.arm.doc.ihi0055c/IHI0055C_beta_aapcs64.pdf
index b5c2b5c..4498292 100644 (file)
@@ -57,12 +57,17 @@ Boards with the Amlogic Meson AXG A113D SoC shall have the following properties:
   Required root node property:
     compatible: "amlogic,a113d", "amlogic,meson-axg";
 
+Boards with the Amlogic Meson G12A S905D2 SoC shall have the following properties:
+  Required root node property:
+    compatible: "amlogic,g12a";
+
 Board compatible values (alphabetically, grouped by SoC):
 
   - "geniatech,atv1200" (Meson6)
 
   - "minix,neo-x8" (Meson8)
 
+  - "endless,ec100" (Meson8b)
   - "hardkernel,odroid-c1" (Meson8b)
   - "tronfy,mxq" (Meson8b)
 
@@ -101,6 +106,8 @@ Board compatible values (alphabetically, grouped by SoC):
 
   - "amlogic,s400" (Meson axg a113d)
 
+  - "amlogic,u200" (Meson g12a s905d2)
+
 Amlogic Meson Firmware registers Interface
 ------------------------------------------
 
index 1e3e29a..0dcc3ea 100644 (file)
@@ -42,6 +42,14 @@ Raspberry Pi Compute Module
 Required root node properties:
 compatible = "raspberrypi,compute-module", "brcm,bcm2835";
 
+Raspberry Pi Compute Module 3
+Required root node properties:
+compatible = "raspberrypi,3-compute-module", "brcm,bcm2837";
+
+Raspberry Pi Compute Module 3 Lite
+Required root node properties:
+compatible = "raspberrypi,3-compute-module-lite", "brcm,bcm2837";
+
 Raspberry Pi Zero
 Required root node properties:
 compatible = "raspberrypi,model-zero", "brcm,bcm2835";
index 199cd36..a97f643 100644 (file)
@@ -8,6 +8,14 @@ HiKey960 Board
 Required root node properties:
        - compatible = "hisilicon,hi3660-hikey960", "hisilicon,hi3660";
 
+Hi3670 SoC
+Required root node properties:
+       - compatible = "hisilicon,hi3670";
+
+HiKey970 Board
+Required root node properties:
+       - compatible = "hisilicon,hi3670-hikey970", "hisilicon,hi3670";
+
 Hi3798cv200 SoC
 Required root node properties:
        - compatible = "hisilicon,hi3798cv200";
diff --git a/Documentation/devicetree/bindings/arm/marvell/marvell,berlin.txt b/Documentation/devicetree/bindings/arm/marvell/marvell,berlin.txt
deleted file mode 100644 (file)
index 3bab184..0000000
+++ /dev/null
@@ -1,96 +0,0 @@
-Marvell Berlin SoC Family Device Tree Bindings
----------------------------------------------------------------
-
-Work in progress statement:
-
-Device tree files and bindings applying to Marvell Berlin SoCs and boards are
-considered "unstable". Any Marvell Berlin device tree binding may change at any
-time. Be sure to use a device tree binary and a kernel image generated from the
-same source tree.
-
-Please refer to Documentation/devicetree/bindings/ABI.txt for a definition of a
-stable binding/ABI.
-
----------------------------------------------------------------
-
-Boards with a SoC of the Marvell Berlin family, e.g. Armada 1500
-shall have the following properties:
-
-* Required root node properties:
-compatible: must contain "marvell,berlin"
-
-In addition, the above compatible shall be extended with the specific
-SoC and board used. Currently known SoC compatibles are:
-    "marvell,berlin2"      for Marvell Armada 1500 (BG2, 88DE3100),
-    "marvell,berlin2cd"    for Marvell Armada 1500-mini (BG2CD, 88DE3005)
-    "marvell,berlin2ct"    for Marvell Armada ? (BG2CT, 88DE????)
-    "marvell,berlin2q"     for Marvell Armada 1500-pro (BG2Q, 88DE3114)
-    "marvell,berlin3"      for Marvell Armada ? (BG3, 88DE????)
-
-* Example:
-
-/ {
-       model = "Sony NSZ-GS7";
-       compatible = "sony,nsz-gs7", "marvell,berlin2", "marvell,berlin";
-
-       ...
-}
-
-* Marvell Berlin CPU control bindings
-
-CPU control register allows various operations on CPUs, like resetting them
-independently.
-
-Required properties:
-- compatible: should be "marvell,berlin-cpu-ctrl"
-- reg: address and length of the register set
-
-Example:
-
-cpu-ctrl@f7dd0000 {
-       compatible = "marvell,berlin-cpu-ctrl";
-       reg = <0xf7dd0000 0x10000>;
-};
-
-* Marvell Berlin2 chip control binding
-
-Marvell Berlin SoCs have a chip control register set providing several
-individual registers dealing with pinmux, padmux, clock, reset, and secondary
-CPU boot address. Unfortunately, the individual registers are spread among the
-chip control registers, so there should be a single DT node only providing the
-different functions which are described below.
-
-Required properties:
-- compatible:
-       * the first and second values must be:
-               "simple-mfd", "syscon"
-- reg: address and length of following register sets for
-  BG2/BG2CD: chip control register set
-  BG2Q: chip control register set and cpu pll registers
-
-* Marvell Berlin2 system control binding
-
-Marvell Berlin SoCs have a system control register set providing several
-individual registers dealing with pinmux, padmux, and reset.
-
-Required properties:
-- compatible:
-       * the first and second values must be:
-               "simple-mfd", "syscon"
-- reg: address and length of the system control register set
-
-Example:
-
-chip: chip-control@ea0000 {
-       compatible = "simple-mfd", "syscon";
-       reg = <0xea0000 0x400>;
-
-       /* sub-device nodes */
-};
-
-sysctrl: system-controller@d000 {
-       compatible = "simple-mfd", "syscon";
-       reg = <0xd000 0x100>;
-
-       /* sub-device nodes */
-};
index acfd3c7..5fc9c23 100644 (file)
@@ -59,6 +59,10 @@ Rockchip platforms device tree bindings
     Required root node properties:
       - compatible = "firefly,roc-rk3328-cc", "rockchip,rk3328";
 
+- Firefly ROC-RK3399-PC board:
+    Required root node properties:
+      - compatible = "firefly,roc-rk3399-pc", "rockchip,rk3399";
+
 - ChipSPARK PopMetal-RK3288 board:
     Required root node properties:
       - compatible = "chipspark,popmetal-rk3288", "rockchip,rk3288";
@@ -168,6 +172,10 @@ Rockchip platforms device tree bindings
     Required root node properties:
       - compatible = "rockchip,px5-evb", "rockchip,px5", "rockchip,rk3368";
 
+- Rockchip PX30 Evaluation board:
+    Required root node properties:
+      - compatible = "rockchip,px30-evb", "rockchip,px30";
+
 - Rockchip RV1108 Evaluation board
     Required root node properties:
       - compatible = "rockchip,rv1108-evb", "rockchip,rv1108";
index 08a5878..74d0a78 100644 (file)
@@ -22,7 +22,7 @@ References:
 
 Example:
 
-scu@a04100000 {
+scu@a0410000 {
        compatible = "arm,cortex-a9-scu";
        reg = <0xa0410000 0x100>;
 };
diff --git a/Documentation/devicetree/bindings/arm/syna.txt b/Documentation/devicetree/bindings/arm/syna.txt
new file mode 100644 (file)
index 0000000..2face46
--- /dev/null
@@ -0,0 +1,105 @@
+Synaptics SoC Device Tree Bindings
+
+According to https://www.synaptics.com/company/news/conexant-marvell
+Synaptics has acquired the Multimedia Solutions Business of Marvell, so
+berlin SoCs are now Synaptics' SoCs now.
+
+---------------------------------------------------------------
+
+Work in progress statement:
+
+Device tree files and bindings applying to Marvell Berlin SoCs and boards are
+considered "unstable". Any Marvell Berlin device tree binding may change at any
+time. Be sure to use a device tree binary and a kernel image generated from the
+same source tree.
+
+Please refer to Documentation/devicetree/bindings/ABI.txt for a definition of a
+stable binding/ABI.
+
+---------------------------------------------------------------
+
+Boards with the Synaptics AS370 SoC shall have the following properties:
+  Required root node property:
+    compatible: "syna,as370"
+
+Boards with a SoC of the Marvell Berlin family, e.g. Armada 1500
+shall have the following properties:
+
+* Required root node properties:
+compatible: must contain "marvell,berlin"
+
+In addition, the above compatible shall be extended with the specific
+SoC and board used. Currently known SoC compatibles are:
+    "marvell,berlin2"      for Marvell Armada 1500 (BG2, 88DE3100),
+    "marvell,berlin2cd"    for Marvell Armada 1500-mini (BG2CD, 88DE3005)
+    "marvell,berlin2ct"    for Marvell Armada ? (BG2CT, 88DE????)
+    "marvell,berlin2q"     for Marvell Armada 1500-pro (BG2Q, 88DE3114)
+    "marvell,berlin3"      for Marvell Armada ? (BG3, 88DE????)
+
+* Example:
+
+/ {
+       model = "Sony NSZ-GS7";
+       compatible = "sony,nsz-gs7", "marvell,berlin2", "marvell,berlin";
+
+       ...
+}
+
+* Marvell Berlin CPU control bindings
+
+CPU control register allows various operations on CPUs, like resetting them
+independently.
+
+Required properties:
+- compatible: should be "marvell,berlin-cpu-ctrl"
+- reg: address and length of the register set
+
+Example:
+
+cpu-ctrl@f7dd0000 {
+       compatible = "marvell,berlin-cpu-ctrl";
+       reg = <0xf7dd0000 0x10000>;
+};
+
+* Marvell Berlin2 chip control binding
+
+Marvell Berlin SoCs have a chip control register set providing several
+individual registers dealing with pinmux, padmux, clock, reset, and secondary
+CPU boot address. Unfortunately, the individual registers are spread among the
+chip control registers, so there should be a single DT node only providing the
+different functions which are described below.
+
+Required properties:
+- compatible:
+       * the first and second values must be:
+               "simple-mfd", "syscon"
+- reg: address and length of following register sets for
+  BG2/BG2CD: chip control register set
+  BG2Q: chip control register set and cpu pll registers
+
+* Marvell Berlin2 system control binding
+
+Marvell Berlin SoCs have a system control register set providing several
+individual registers dealing with pinmux, padmux, and reset.
+
+Required properties:
+- compatible:
+       * the first and second values must be:
+               "simple-mfd", "syscon"
+- reg: address and length of the system control register set
+
+Example:
+
+chip: chip-control@ea0000 {
+       compatible = "simple-mfd", "syscon";
+       reg = <0xea0000 0x400>;
+
+       /* sub-device nodes */
+};
+
+sysctrl: system-controller@d000 {
+       compatible = "simple-mfd", "syscon";
+       reg = <0xd000 0x100>;
+
+       /* sub-device nodes */
+};
index 32f62bb..c59b15f 100644 (file)
@@ -47,12 +47,17 @@ board-specific compatible values:
   nvidia,ventana
   toradex,apalis_t30
   toradex,apalis_t30-eval
+  toradex,apalis_t30-v1.1
+  toradex,apalis_t30-v1.1-eval
   toradex,apalis-tk1
   toradex,apalis-tk1-eval
-  toradex,colibri_t20-512
+  toradex,apalis-tk1-v1.2
+  toradex,apalis-tk1-v1.2-eval
+  toradex,colibri_t20
+  toradex,colibri_t20-eval-v3
+  toradex,colibri_t20-iris
   toradex,colibri_t30
   toradex,colibri_t30-eval-v3
-  toradex,iris
 
 Trusted Foundations
 -------------------------------------------
index 5a3bf7c..c9fd6d1 100644 (file)
@@ -34,3 +34,96 @@ Board DTS:
        pmc@c360000 {
                nvidia,invert-interrupt;
        };
+
+== Pad Control ==
+
+On Tegra SoCs a pad is a set of pins which are configured as a group.
+The pin grouping is a fixed attribute of the hardware. The PMC can be
+used to set pad power state and signaling voltage. A pad can be either
+in active or power down mode. The support for power state and signaling
+voltage configuration varies depending on the pad in question. 3.3 V and
+1.8 V signaling voltages are supported on pins where software
+controllable signaling voltage switching is available.
+
+Pad configurations are described with pin configuration nodes which
+are placed under the pmc node and they are referred to by the pinctrl
+client properties. For more information see
+Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt.
+
+The following pads are present on Tegra186:
+csia           csib            dsi             mipi-bias
+pex-clk-bias   pex-clk3        pex-clk2        pex-clk1
+usb0           usb1            usb2            usb-bias
+uart           audio           hsic            dbg
+hdmi-dp0       hdmi-dp1        pex-cntrl       sdmmc2-hv
+sdmmc4         cam             dsib            dsic
+dsid           csic            csid            csie
+dsif           spi             ufs             dmic-hv
+edp            sdmmc1-hv       sdmmc3-hv       conn
+audio-hv       ao-hv
+
+Required pin configuration properties:
+  - pins: A list of strings, each of which contains the name of a pad
+         to be configured.
+
+Optional pin configuration properties:
+  - low-power-enable: Configure the pad into power down mode
+  - low-power-disable: Configure the pad into active mode
+  - power-source: Must contain either TEGRA_IO_PAD_VOLTAGE_1V8 or
+    TEGRA_IO_PAD_VOLTAGE_3V3 to select between signaling voltages.
+    The values are defined in
+    include/dt-bindings/pinctrl/pinctrl-tegra-io-pad.h.
+
+Note: The power state can be configured on all of the above pads except
+      for ao-hv. Following pads have software configurable signaling
+      voltages: sdmmc2-hv, dmic-hv, sdmmc1-hv, sdmmc3-hv, audio-hv,
+      ao-hv.
+
+Pad configuration state example:
+       pmc: pmc@7000e400 {
+               compatible = "nvidia,tegra186-pmc";
+               reg = <0 0x0c360000 0 0x10000>,
+                     <0 0x0c370000 0 0x10000>,
+                     <0 0x0c380000 0 0x10000>,
+                     <0 0x0c390000 0 0x10000>;
+               reg-names = "pmc", "wake", "aotag", "scratch";
+
+               ...
+
+               sdmmc1_3v3: sdmmc1-3v3 {
+                       pins = "sdmmc1-hv";
+                       power-source = <TEGRA_IO_PAD_VOLTAGE_3V3>;
+               };
+
+               sdmmc1_1v8: sdmmc1-1v8 {
+                       pins = "sdmmc1-hv";
+                       power-source = <TEGRA_IO_PAD_VOLTAGE_1V8>;
+               };
+
+               hdmi_off: hdmi-off {
+                       pins = "hdmi";
+                       low-power-enable;
+               }
+
+               hdmi_on: hdmi-on {
+                       pins = "hdmi";
+                       low-power-disable;
+               }
+       };
+
+Pinctrl client example:
+       sdmmc1: sdhci@3400000 {
+               ...
+               pinctrl-names = "sdmmc-3v3", "sdmmc-1v8";
+               pinctrl-0 = <&sdmmc1_3v3>;
+               pinctrl-1 = <&sdmmc1_1v8>;
+       };
+
+       ...
+
+       sor0: sor@15540000 {
+               ...
+               pinctrl-0 = <&hdmi_off>;
+               pinctrl-1 = <&hdmi_on>;
+               pinctrl-names = "hdmi-on", "hdmi-off";
+       };
index a74b37b..cb12f33 100644 (file)
@@ -195,3 +195,106 @@ Example:
                power-domains = <&pd_audio>;
                ...
        };
+
+== Pad Control ==
+
+On Tegra SoCs a pad is a set of pins which are configured as a group.
+The pin grouping is a fixed attribute of the hardware. The PMC can be
+used to set pad power state and signaling voltage. A pad can be either
+in active or power down mode. The support for power state and signaling
+voltage configuration varies depending on the pad in question. 3.3 V and
+1.8 V signaling voltages are supported on pins where software
+controllable signaling voltage switching is available.
+
+The pad configuration state nodes are placed under the pmc node and they
+are referred to by the pinctrl client properties. For more information
+see Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt.
+The pad name should be used as the value of the pins property in pin
+configuration nodes.
+
+The following pads are present on Tegra124 and Tegra132:
+audio          bb              cam             comp
+csia           csb             cse             dsi
+dsib           dsic            dsid            hdmi
+hsic           hv              lvds            mipi-bias
+nand           pex-bias        pex-clk1        pex-clk2
+pex-cntrl      sdmmc1          sdmmc3          sdmmc4
+sys_ddc                uart            usb0            usb1
+usb2           usb_bias
+
+The following pads are present on Tegra210:
+audio          audio-hv        cam             csia
+csib           csic            csid            csie
+csif           dbg             debug-nonao     dmic
+dp             dsi             dsib            dsic
+dsid           emmc            emmc2           gpio
+hdmi           hsic            lvds            mipi-bias
+pex-bias       pex-clk1        pex-clk2        pex-cntrl
+sdmmc1         sdmmc3          spi             spi-hv
+uart           usb0            usb1            usb2
+usb3           usb-bias
+
+Required pin configuration properties:
+  - pins: Must contain name of the pad(s) to be configured.
+
+Optional pin configuration properties:
+  - low-power-enable: Configure the pad into power down mode
+  - low-power-disable: Configure the pad into active mode
+  - power-source: Must contain either TEGRA_IO_PAD_VOLTAGE_1V8
+    or TEGRA_IO_PAD_VOLTAGE_3V3 to select between signaling voltages.
+    The values are defined in
+    include/dt-bindings/pinctrl/pinctrl-tegra-io-pad.h.
+
+Note: The power state can be configured on all of the Tegra124 and
+      Tegra132 pads. None of the Tegra124 or Tegra132 pads support
+      signaling voltage switching.
+
+Note: All of the listed Tegra210 pads except pex-cntrl support power
+      state configuration. Signaling voltage switching is supported on
+      following Tegra210 pads: audio, audio-hv, cam, dbg, dmic, gpio,
+      pex-cntrl, sdmmc1, sdmmc3, spi, spi-hv, and uart.
+
+Pad configuration state example:
+       pmc: pmc@7000e400 {
+               compatible = "nvidia,tegra210-pmc";
+               reg = <0x0 0x7000e400 0x0 0x400>;
+               clocks = <&tegra_car TEGRA210_CLK_PCLK>, <&clk32k_in>;
+               clock-names = "pclk", "clk32k_in";
+
+               ...
+
+               sdmmc1_3v3: sdmmc1-3v3 {
+                       pins = "sdmmc1";
+                       power-source = <TEGRA_IO_PAD_VOLTAGE_3V3>;
+               };
+
+               sdmmc1_1v8: sdmmc1-1v8 {
+                       pins = "sdmmc1";
+                       power-source = <TEGRA_IO_PAD_VOLTAGE_1V8>;
+               };
+
+               hdmi_off: hdmi-off {
+                       pins = "hdmi";
+                       low-power-enable;
+               }
+
+               hdmi_on: hdmi-on {
+                       pins = "hdmi";
+                       low-power-disable;
+               }
+       };
+
+Pinctrl client example:
+       sdmmc1: sdhci@700b0000 {
+               ...
+               pinctrl-names = "sdmmc-3v3", "sdmmc-1v8";
+               pinctrl-0 = <&sdmmc1_3v3>;
+               pinctrl-1 = <&sdmmc1_1v8>;
+       };
+       ...
+       sor@54540000 {
+               ...
+               pinctrl-0 = <&hdmi_off>;
+               pinctrl-1 = <&hdmi_on>;
+               pinctrl-names = "hdmi-on", "hdmi-off";
+       };
index 0fa4295..89408de 100644 (file)
@@ -60,7 +60,7 @@ Example:
                              <0xa0410100 0x100>;
                };
 
-               scu@a04100000 {
+               scu@a0410000 {
                        compatible = "arm,cortex-a9-scu";
                        reg = <0xa0410000 0x100>;
                };
index b0a8af5..265b223 100644 (file)
@@ -11,7 +11,7 @@ The RISC-V supervisor ISA manual specifies three interrupt sources that are
 attached to every HLIC: software interrupts, the timer interrupt, and external
 interrupts.  Software interrupts are used to send IPIs between cores.  The
 timer interrupt comes from an architecturally mandated real-time timer that is
-controller via Supervisor Binary Interface (SBI) calls and CSR reads.  External
+controlled via Supervisor Binary Interface (SBI) calls and CSR reads.  External
 interrupts connect all other device interrupts to the HLIC, which are routed
 via the platform-level interrupt controller (PLIC).
 
@@ -25,7 +25,15 @@ in the system.
 
 Required properties:
 - compatible : "riscv,cpu-intc"
-- #interrupt-cells : should be <1>
+- #interrupt-cells : should be <1>.  The interrupt sources are defined by the
+  RISC-V supervisor ISA manual, with only the following three interrupts being
+  defined for supervisor mode:
+    - Source 1 is the supervisor software interrupt, which can be sent by an SBI
+      call and is reserved for use by software.
+    - Source 5 is the supervisor timer interrupt, which can be configured by
+      SBI calls and implements a one-shot timer.
+    - Source 9 is the supervisor external interrupt, which chains to all other
+      device interrupts.
 - interrupt-controller : Identifies the node as an interrupt controller
 
 Furthermore, this interrupt-controller MUST be embedded inside the cpu
@@ -38,7 +46,7 @@ An example device tree entry for a HLIC is show below.
                ...
                cpu1-intc: interrupt-controller {
                        #interrupt-cells = <1>;
-                       compatible = "riscv,cpu-intc", "sifive,fu540-c000-cpu-intc";
+                       compatible = "sifive,fu540-c000-cpu-intc", "riscv,cpu-intc";
                        interrupt-controller;
                };
        };
index 1811e19..5201bc1 100644 (file)
@@ -46,6 +46,42 @@ Required properties:
       "brcm,bcm6328-switch"
       "brcm,bcm6368-switch" and the mandatory "brcm,bcm63xx-switch"
 
+Required properties for BCM585xx/586xx/88312 SoCs:
+
+ - reg: a total of 3 register base addresses, the first one must be the
+   Switch Register Access block base, the second is the port 5/4 mux
+   configuration register and the third one is the SGMII configuration
+   and status register base address.
+
+ - interrupts: a total of 13 interrupts must be specified, in the following
+   order: port 0-5, 7-8 link status change, then the integrated PHY interrupt,
+   then the timestamping interrupt and the sleep timer interrupts for ports
+   5,7,8.
+
+Optional properties for BCM585xx/586xx/88312 SoCs:
+
+  - reg-names: a total of 3 names matching the 3 base register address, must
+    be in the following order:
+       "srab"
+       "mux_config"
+       "sgmii_config"
+
+  - interrupt-names: a total of 13 names matching the 13 interrupts specified
+    must be in the following order:
+       "link_state_p0"
+       "link_state_p1"
+       "link_state_p2"
+       "link_state_p3"
+       "link_state_p4"
+       "link_state_p5"
+       "link_state_p7"
+       "link_state_p8"
+       "phy"
+       "ts"
+       "imp_sleep_timer_p5"
+       "imp_sleep_timer_p7"
+       "imp_sleep_timer_p8"
+
 See Documentation/devicetree/bindings/net/dsa/dsa.txt for a list of additional
 required and optional properties.
 
index 7dc5ce8..46e27cd 100644 (file)
@@ -13,6 +13,7 @@ On RK3328 SoCs, the GRF adds a section for USB2PHYGRF,
 Required Properties:
 
 - compatible: GRF should be one of the following:
+   - "rockchip,px30-grf", "syscon": for px30
    - "rockchip,rk3036-grf", "syscon": for rk3036
    - "rockchip,rk3066-grf", "syscon": for rk3066
    - "rockchip,rk3188-grf", "syscon": for rk3188
@@ -23,6 +24,7 @@ Required Properties:
    - "rockchip,rk3399-grf", "syscon": for rk3399
    - "rockchip,rv1108-grf", "syscon": for rv1108
 - compatible: PMUGRF should be one of the following:
+   - "rockchip,px30-pmugrf", "syscon": for px30
    - "rockchip,rk3368-pmugrf", "syscon": for rk3368
    - "rockchip,rk3399-pmugrf", "syscon": for rk3399
 - compatible: SGRF should be one of the following
index 2c3fc51..b84a705 100644 (file)
@@ -114,6 +114,7 @@ elan        Elan Microelectronic Corp.
 embest Shenzhen Embest Technology Co., Ltd.
 emmicro        EM Microelectronic
 emtrion        emtrion GmbH
+endless        Endless Mobile, Inc.
 energymicro    Silicon Laboratories (formerly Energy Micro AS)
 engicam        Engicam S.r.l.
 epcos  EPCOS AG
@@ -297,6 +298,7 @@ pine64      Pine64
 pixcir  PIXCIR MICROELECTRONICS Co., Ltd
 plathome       Plat'Home Co., Ltd.
 plda   PLDA
+plx    Broadcom Corporation (formerly PLX Technology)
 portwell       Portwell Inc.
 poslab Poslab Technology Co., Ltd.
 powervr        PowerVR (deprecated, use img)
index 5d47a26..9407212 100644 (file)
@@ -7,6 +7,7 @@ Required properties:
               Examples with soctypes are:
                 - "renesas,r8a7743-wdt" (RZ/G1M)
                 - "renesas,r8a7745-wdt" (RZ/G1E)
+                - "renesas,r8a774a1-wdt" (RZ/G2M)
                 - "renesas,r8a7790-wdt" (R-Car H2)
                 - "renesas,r8a7791-wdt" (R-Car M2-W)
                 - "renesas,r8a7792-wdt" (R-Car V2H)
@@ -21,8 +22,8 @@ Required properties:
                 - "renesas,r7s72100-wdt" (RZ/A1)
                The generic compatible string must be:
                 - "renesas,rza-wdt" for RZ/A
-                - "renesas,rcar-gen2-wdt" for R-Car Gen2 and RZ/G
-                - "renesas,rcar-gen3-wdt" for R-Car Gen3
+                - "renesas,rcar-gen2-wdt" for R-Car Gen2 and RZ/G1
+                - "renesas,rcar-gen3-wdt" for R-Car Gen3 and RZ/G2
 
 - reg : Should contain WDT registers location and length
 - clocks : the clock feeding the watchdog timer.
index 72d16f0..b8df81f 100644 (file)
@@ -32,7 +32,7 @@ Supported chips:
     Datasheet: Publicly available at the Texas Instruments website
                http://www.ti.com/
 
-Author: Lothar Felten <l-felten@ti.com>
+Author: Lothar Felten <lothar.felten@gmail.com>
 
 Description
 -----------
index 966610a..2030020 100644 (file)
@@ -50,10 +50,14 @@ bounce buffer. But you don't need to care about that detail, just use the
 returned buffer. If NULL is returned, the threshold was not met or a bounce
 buffer could not be allocated. Fall back to PIO in that case.
 
-In any case, a buffer obtained from above needs to be released. It ensures data
-is copied back to the message and a potentially used bounce buffer is freed::
+In any case, a buffer obtained from above needs to be released. Another helper
+function ensures a potentially used bounce buffer is freed::
 
-       i2c_release_dma_safe_msg_buf(msg, dma_buf);
+       i2c_put_dma_safe_msg_buf(dma_buf, msg, xferred);
+
+The last argument 'xferred' controls if the buffer is synced back to the
+message or not. No syncing is needed in cases setting up DMA had an error and
+there was no data transferred.
 
 The bounce buffer handling from the core is generic and simple. It will always
 allocate a new bounce buffer. If you want a more sophisticated handling (e.g.
index a5b256b..9ad052a 100644 (file)
@@ -8255,9 +8255,9 @@ F:        drivers/ata/pata_arasan_cf.c
 
 LIBATA PATA DRIVERS
 M:     Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
-M:     Jens Axboe <kernel.dk>
+M:     Jens Axboe <axboe@kernel.dk>
 L:     linux-ide@vger.kernel.org
-T:     git git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata.git
+T:     git git://git.kernel.org/pub/scm/linux/kernel/git/axboe/linux-block.git
 S:     Maintained
 F:     drivers/ata/pata_*.c
 F:     drivers/ata/ata_generic.c
@@ -8275,7 +8275,7 @@ LIBATA SATA AHCI PLATFORM devices support
 M:     Hans de Goede <hdegoede@redhat.com>
 M:     Jens Axboe <axboe@kernel.dk>
 L:     linux-ide@vger.kernel.org
-T:     git git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata.git
+T:     git git://git.kernel.org/pub/scm/linux/kernel/git/axboe/linux-block.git
 S:     Maintained
 F:     drivers/ata/ahci_platform.c
 F:     drivers/ata/libahci_platform.c
@@ -8291,7 +8291,7 @@ F:        drivers/ata/sata_promise.*
 LIBATA SUBSYSTEM (Serial and Parallel ATA drivers)
 M:     Jens Axboe <axboe@kernel.dk>
 L:     linux-ide@vger.kernel.org
-T:     git git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata.git
+T:     git git://git.kernel.org/pub/scm/linux/kernel/git/axboe/linux-block.git
 S:     Maintained
 F:     drivers/ata/
 F:     include/linux/ata.h
index 2b45880..19948e5 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -2,7 +2,7 @@
 VERSION = 4
 PATCHLEVEL = 19
 SUBLEVEL = 0
-EXTRAVERSION = -rc1
+EXTRAVERSION = -rc2
 NAME = Merciless Moray
 
 # *DOCUMENTATION*
@@ -807,6 +807,9 @@ KBUILD_CFLAGS += $(call cc-option,-Wdeclaration-after-statement,)
 # disable pointer signed / unsigned warnings in gcc 4.0
 KBUILD_CFLAGS += $(call cc-disable-warning, pointer-sign)
 
+# disable stringop warnings in gcc 8+
+KBUILD_CFLAGS += $(call cc-disable-warning, stringop-truncation)
+
 # disable invalid "can't wrap" optimizations for signed / pointers
 KBUILD_CFLAGS  += $(call cc-option,-fno-strict-overflow)
 
index b5bd3de..626e731 100644 (file)
@@ -81,6 +81,7 @@ dtb-$(CONFIG_ARCH_BCM2835) += \
        bcm2836-rpi-2-b.dtb \
        bcm2837-rpi-3-b.dtb \
        bcm2837-rpi-3-b-plus.dtb \
+       bcm2837-rpi-cm3-io3.dtb \
        bcm2835-rpi-zero.dtb \
        bcm2835-rpi-zero-w.dtb
 dtb-$(CONFIG_ARCH_BCM_5301X) += \
@@ -321,6 +322,7 @@ dtb-$(CONFIG_MACH_MESON6) += \
        meson6-atv1200.dtb
 dtb-$(CONFIG_MACH_MESON8) += \
        meson8-minix-neo-x8.dtb \
+       meson8b-ec100.dtb \
        meson8b-mxq.dtb \
        meson8b-odroidc1.dtb \
        meson8m2-mxiii-plus.dtb
@@ -892,7 +894,7 @@ dtb-$(CONFIG_ARCH_SOCFPGA) += \
        socfpga_arria10_socdk_sdmmc.dtb \
        socfpga_cyclone5_mcvevk.dtb \
        socfpga_cyclone5_socdk.dtb \
-       socfpga_cyclone5_de0_sockit.dtb \
+       socfpga_cyclone5_de0_nano_soc.dtb \
        socfpga_cyclone5_sockit.dtb \
        socfpga_cyclone5_socrates.dtb \
        socfpga_cyclone5_sodia.dtb \
@@ -1061,6 +1063,7 @@ dtb-$(CONFIG_ARCH_TANGO) += \
        tango4-vantage-1172.dtb
 dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += \
        tegra20-harmony.dtb \
+       tegra20-colibri-eval-v3.dtb \
        tegra20-colibri-iris.dtb \
        tegra20-medcom-wide.dtb \
        tegra20-paz00.dtb \
@@ -1071,6 +1074,7 @@ dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += \
        tegra20-ventana.dtb
 dtb-$(CONFIG_ARCH_TEGRA_3x_SOC) += \
        tegra30-apalis-eval.dtb \
+       tegra30-apalis-v1.1-eval.dtb \
        tegra30-beaver.dtb \
        tegra30-cardhu-a02.dtb \
        tegra30-cardhu-a04.dtb \
@@ -1199,6 +1203,8 @@ dtb-$(CONFIG_ARCH_ZX) += zx296702-ad1.dtb
 dtb-$(CONFIG_ARCH_ASPEED) += \
        aspeed-ast2500-evb.dtb \
        aspeed-bmc-arm-centriq2400-rep.dtb \
+       aspeed-bmc-arm-stardragon4800-rep2.dtb \
+       aspeed-bmc-facebook-tiogapass.dtb \
        aspeed-bmc-intel-s2600wf.dtb \
        aspeed-bmc-opp-lanyang.dtb \
        aspeed-bmc-opp-palmetto.dtb \
old mode 100755 (executable)
new mode 100644 (file)
index f0cbd86..d4b7c59 100644 (file)
                        ti,hwmods = "rtc";
                        clocks = <&clk_32768_ck>;
                        clock-names = "int-clk";
+                       system-power-controller;
                        status = "disabled";
                };
 
index a917cf8..0e4c7c4 100644 (file)
                        clock-names = "uartclk", "apb_pclk";
                };
 
-               ssp: ssp@1000d000 {
+               ssp: spi@1000d000 {
                        compatible = "arm,pl022", "arm,primecell";
                        reg = <0x1000d000 0x1000>;
                        clocks = <&sspclk>, <&pclk>;
index f935b72..f2a1d25 100644 (file)
                        clock-names = "apb_pclk";
                };
 
-               pb1176_ssp: ssp@1010b000 {
+               pb1176_ssp: spi@1010b000 {
                        compatible = "arm,pl022", "arm,primecell";
                        reg = <0x1010b000 0x1000>;
                        interrupt-parent = <&intc_dc1176>;
index 3620328..7f9cbdf 100644 (file)
                        clock-names = "uartclk", "apb_pclk";
                };
 
-               ssp@1000d000 {
+               spi@1000d000 {
                        compatible = "arm,pl022", "arm,primecell";
                        reg = <0x1000d000 0x1000>;
                        interrupt-parent = <&intc_pb11mp>;
index 10868ba..a567669 100644 (file)
                        clock-names = "uartclk", "apb_pclk";
                };
 
-               ssp: ssp@1000d000 {
+               ssp: spi@1000d000 {
                        compatible = "arm,pl022", "arm,primecell";
                        reg = <0x1000d000 0x1000>;
                        clocks = <&sspclk>, <&pclk>;
diff --git a/arch/arm/boot/dts/aspeed-bmc-arm-stardragon4800-rep2.dts b/arch/arm/boot/dts/aspeed-bmc-arm-stardragon4800-rep2.dts
new file mode 100644 (file)
index 0000000..bdfd8c9
--- /dev/null
@@ -0,0 +1,207 @@
+// SPDX-License-Identifier: GPL-2.0+
+/dts-v1/;
+
+#include "aspeed-g5.dtsi"
+#include <dt-bindings/gpio/aspeed-gpio.h>
+
+/ {
+       model = "HXT StarDragon 4800 REP2 AST2520";
+       compatible = "hxt,stardragon4800-rep2-bmc", "aspeed,ast2500";
+
+       chosen {
+               stdout-path = &uart5;
+               bootargs = "console=ttyS4,115200 earlyprintk";
+       };
+
+       memory@80000000 {
+               reg = <0x80000000 0x40000000>;
+       };
+
+       iio-hwmon {
+               compatible = "iio-hwmon";
+               io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
+                                               <&adc 4>, <&adc 5>, <&adc 6>, <&adc 8>;
+       };
+
+       iio-hwmon-battery {
+               compatible = "iio-hwmon";
+               io-channels = <&adc 7>;
+       };
+
+       leds {
+               compatible = "gpio-leds";
+
+               system_fault1 {
+                       label = "System_fault1";
+                       gpios = <&gpio ASPEED_GPIO(I, 3) GPIO_ACTIVE_LOW>;
+               };
+
+               system_fault2 {
+                       label = "System_fault2";
+                       gpios = <&gpio ASPEED_GPIO(I, 2) GPIO_ACTIVE_LOW>;
+               };
+       };
+};
+
+&fmc {
+       status = "okay";
+       flash@0 {
+               status = "okay";
+               m25p,fast-read;
+               label = "bmc";
+#include "openbmc-flash-layout.dtsi"
+       };
+};
+
+&spi1 {
+       status = "okay";
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_spi1_default>;
+       flash@0 {
+               status = "okay";
+       };
+};
+
+&spi2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_spi2ck_default
+                       &pinctrl_spi2miso_default
+                       &pinctrl_spi2mosi_default
+                       &pinctrl_spi2cs0_default>;
+};
+
+&uart3 {
+       status = "okay";
+
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_txd3_default &pinctrl_rxd3_default>;
+       current-speed = <115200>;
+};
+
+&uart5 {
+       status = "okay";
+};
+
+&mac0 {
+       status = "okay";
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_rgmii1_default &pinctrl_mdio1_default>;
+};
+
+&mac1 {
+       status = "okay";
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_rmii2_default>;
+       use-ncsi;
+};
+
+&i2c0 {
+       status = "okay";
+};
+
+&i2c1 {
+       status = "okay";
+
+       tmp421@1e {
+               compatible = "ti,tmp421";
+               reg = <0x1e>;
+       };
+       tmp421@2a {
+               compatible = "ti,tmp421";
+               reg = <0x2a>;
+       };
+       tmp421@1c {
+               compatible = "ti,tmp421";
+               reg = <0x1c>;
+       };
+};
+
+&i2c2 {
+       status = "okay";
+};
+
+&i2c3 {
+       status = "okay";
+};
+
+&i2c4 {
+       status = "okay";
+};
+
+&i2c5 {
+       status = "okay";
+};
+
+&i2c6 {
+       status = "okay";
+
+       tmp421@1f {
+               compatible = "ti,tmp421";
+               reg = <0x1f>;
+       };
+       nvt210@4c {
+               compatible = "nvt210";
+               reg = <0x4c>;
+       };
+       eeprom@50 {
+               compatible = "atmel,24c128";
+               reg = <0x50>;
+               pagesize = <128>;
+       };
+};
+
+&i2c7 {
+       status = "okay";
+};
+
+&i2c8 {
+       status = "okay";
+
+       pca9641@70 {
+               compatible = "nxp,pca9641";
+               reg = <0x70>;
+               i2c-arb {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       eeprom@50 {
+                               compatible = "atmel,24c02";
+                               reg = <0x50>;
+                       };
+                       dps650ab@58 {
+                               compatible = "dps650ab";
+                               reg = <0x58>;
+                       };
+               };
+       };
+};
+
+&i2c9 {
+       status = "okay";
+};
+
+&vuart {
+       status = "okay";
+};
+
+&gfx {
+       status = "okay";
+};
+
+&pinctrl {
+       aspeed,external-nodes = <&gfx &lhc>;
+};
+
+&gpio {
+       pin_gpio_c7 {
+               gpio-hog;
+               gpios = <ASPEED_GPIO(C, 7) GPIO_ACTIVE_HIGH>;
+               output-low;
+               line-name = "BIOS_SPI_MUX_S";
+       };
+       pin_gpio_d1 {
+               gpio-hog;
+               gpios = <ASPEED_GPIO(D, 1) GPIO_ACTIVE_HIGH>;
+               output-high;
+               line-name = "PHY2_RESET_N";
+       };
+};
diff --git a/arch/arm/boot/dts/aspeed-bmc-facebook-tiogapass.dts b/arch/arm/boot/dts/aspeed-bmc-facebook-tiogapass.dts
new file mode 100644 (file)
index 0000000..f8e7b71
--- /dev/null
@@ -0,0 +1,146 @@
+// SPDX-License-Identifier: GPL-2.0+
+// Copyright (c) 2018 Facebook Inc.
+// Author: Vijay Khemka <vijaykhemka@fb.com>
+/dts-v1/;
+
+#include "aspeed-g5.dtsi"
+#include <dt-bindings/gpio/aspeed-gpio.h>
+
+/ {
+       model = "Facebook TiogaPass BMC";
+       compatible = "facebook,tiogapass-bmc", "aspeed,ast2500";
+       aliases {
+               serial0 = &uart1;
+               serial4 = &uart5;
+       };
+       chosen {
+               stdout-path = &uart5;
+               bootargs = "console=ttyS4,115200 earlyprintk";
+       };
+
+       memory@80000000 {
+               reg = <0x80000000 0x20000000>;
+       };
+};
+
+&fmc {
+       status = "okay";
+       flash@0 {
+               status = "okay";
+               m25p,fast-read;
+#include "openbmc-flash-layout.dtsi"
+       };
+};
+
+&spi1 {
+       status = "okay";
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_spi1_default>;
+       flash@0 {
+               status = "okay";
+               m25p,fast-read;
+               label = "pnor";
+       };
+};
+
+&uart1 {
+       // Host Console
+       status = "okay";
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_txd1_default
+                    &pinctrl_rxd1_default>;
+};
+
+&uart5 {
+       // BMC Console
+       status = "okay";
+};
+
+&mac0 {
+       status = "okay";
+
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_rmii1_default>;
+       use-ncsi;
+};
+
+&i2c0 {
+       status = "okay";
+       //Airmax Conn B, CPU0 PIROM, CPU1 PIROM
+};
+
+&i2c1 {
+       status = "okay";
+       //X24 Riser
+};
+
+&i2c2 {
+       status = "okay";
+       // Mezz Management SMBus
+};
+
+&i2c3 {
+       status = "okay";
+       // SMBus to Board ID EEPROM
+};
+
+&i2c4 {
+       status = "okay";
+       // BMC Debug Header
+};
+
+&i2c5 {
+       status = "okay";
+       // CPU Voltage regulators
+};
+
+&i2c6 {
+       status = "okay";
+       tpm@20 {
+               compatible = "infineon,slb9645tt";
+               reg = <0x20>;
+       };
+       tmp421@4e {
+               compatible = "ti,tmp421";
+               reg = <0x4e>;
+       };
+       tmp421@4f {
+               compatible = "ti,tmp421";
+               reg = <0x4f>;
+       };
+       eeprom@54 {
+               compatible = "atmel,24c64";
+               reg = <0x54>;
+               pagesize = <32>;
+       };
+};
+
+&i2c7 {
+       status = "okay";
+       //HSC, AirMax Conn A
+};
+
+&i2c8 {
+       status = "okay";
+       //Mezz Sensor SMBus
+};
+
+&i2c9 {
+       status = "okay";
+       //USB Debug Connector
+};
+
+&pwm_tacho {
+       status = "okay";
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default>;
+       fan@0 {
+               reg = <0x00>;
+               aspeed,fan-tach-ch = /bits/ 8 <0x00>;
+       };
+
+       fan@1 {
+               reg = <0x00>;
+               aspeed,fan-tach-ch = /bits/ 8 <0x01>;
+       };
+};
index 76aa6ea..385c0f4 100644 (file)
@@ -7,6 +7,25 @@
        model = "Quanta Q71L BMC";
        compatible = "quanta,q71l-bmc", "aspeed,ast2400";
 
+       aliases {
+               i2c14 = &i2c_pcie2;
+               i2c15 = &i2c_pcie3;
+               i2c16 = &i2c_pcie6;
+               i2c17 = &i2c_pcie7;
+               i2c18 = &i2c_pcie1;
+               i2c19 = &i2c_pcie4;
+               i2c20 = &i2c_pcie5;
+               i2c21 = &i2c_pcie8;
+               i2c22 = &i2c_pcie9;
+               i2c23 = &i2c_pcie10;
+               i2c24 = &i2c_ssd1;
+               i2c25 = &i2c_ssd2;
+               i2c26 = &i2c_psu4;
+               i2c27 = &i2c_psu1;
+               i2c28 = &i2c_psu3;
+               i2c29 = &i2c_psu2;
+       };
+
        chosen {
                stdout-path = &uart5;
                bootargs = "console=ttyS4,115200 earlyprintk";
                        &pinctrl_ddcclk_default &pinctrl_ddcdat_default>;
 };
 
+&ibt {
+       status = "okay";
+};
+
 &lpc_snoop {
        status = "okay";
        snoop-ports = <0x80>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        reg = <0>;
+
+                       psu@59 {
+                               compatible = "pmbus";
+                               reg = <0x59>;
+                       };
                };
 
                i2c_psu1: i2c@1 {
                        #address-cells = <1>;
                        #size-cells = <0>;
                        reg = <1>;
+
+                       psu@58 {
+                               compatible = "pmbus";
+                               reg = <0x58>;
+                       };
                };
 
                i2c_psu3: i2c@2 {
                        #address-cells = <1>;
                        #size-cells = <0>;
                        reg = <2>;
+
+                       psu@58 {
+                               compatible = "pmbus";
+                               reg = <0x58>;
+                       };
                };
 
                i2c_psu2: i2c@3 {
                        #address-cells = <1>;
                        #size-cells = <0>;
                        reg = <3>;
+
+                       psu@59 {
+                               compatible = "pmbus";
+                               reg = <0x59>;
+                       };
                };
        };
 
        status = "okay";
 };
 
+&adc {
+       status = "okay";
+};
+
 &pwm_tacho {
        status = "okay";
 
index b23a983..69f6b9d 100644 (file)
                                status = "disabled";
                        };
 
-                       i2c: i2c@1e78a000 {
+                       i2c: bus@1e78a000 {
                                compatible = "simple-bus";
                                #address-cells = <1>;
                                #size-cells = <1>;
index 87fdc14..d107459 100644 (file)
                                status = "disabled";
                        };
 
-                       i2c: i2c@1e78a000 {
+                       i2c: bus@1e78a000 {
                                compatible = "simple-bus";
                                #address-cells = <1>;
                                #size-cells = <1>;
index bb86f17..21876da 100644 (file)
@@ -70,9 +70,9 @@
 &i2c1 {
        status = "okay";
 
-       eeprom@87 {
+       eeprom@57 {
                compatible = "giantec,gt24c32a", "atmel,24c32";
-               reg = <87>;
+               reg = <0x57>;
                pagesize = <32>;
        };
 };
index 4b9176d..df0f0cc 100644 (file)
@@ -59,9 +59,9 @@
 &i2c1 {
        status = "okay";
 
-       ft5426@56 {
+       ft5426@38 {
                compatible = "focaltech,ft5426", "edt,edt-ft5406";
-               reg = <56>;
+               reg = <0x38>;
                pinctrl-names = "default";
                pinctrl-0 = <&pinctrl_lcd_ctp_int>;
 
index af9f384..911d2c7 100644 (file)
        compatible = "axentia,nattis-2", "axentia,natte-2", "axentia,linea",
                     "atmel,sama5d31", "atmel,sama5d3", "atmel,sama5";
 
-       ahb {
-               apb {
-                       pinctrl@fffff200 {
-                               nattis {
-                                       pinctrl_usba_vbus: usba_vbus {
-                                               atmel,pins =
-                                                       <AT91_PIOD 28
-                                                        AT91_PERIPH_GPIO
-                                                        AT91_PINCTRL_DEGLITCH>;
-                                       };
-
-                                       pinctrl_mmc0_cd: mmc0_cd {
-                                               atmel,pins =
-                                                       <AT91_PIOD 5
-                                                        AT91_PERIPH_GPIO
-                                                        AT91_PINCTRL_PULL_UP_DEGLITCH>;
-                                       };
-
-                                       pinctrl_lcd_prlud0: lcd_prlud0 {
-                                               atmel,pins =
-                                                       <AT91_PIOA 21
-                                                        AT91_PERIPH_GPIO
-                                                        AT91_PINCTRL_OUTPUT_VAL(0)>;
-                                       };
-
-                                       pinctrl_lcd_hipow0: lcd_hipow0 {
-                                               atmel,pins =
-                                                       <AT91_PIOA 23
-                                                        AT91_PERIPH_GPIO
-                                                        AT91_PINCTRL_OUTPUT_VAL(0)>;
-                                       };
-                               };
-                       };
-
-                       watchdog@fffffe40 {
-                               status = "okay";
-                       };
-               };
-       };
-
        gpio-keys {
                compatible = "gpio-keys";
 
        };
 
        panel: panel {
-               compatible = "sharp,lq150x1lg11";
+               compatible = "sharp,lq150x1lg11", "panel-lvds";
+
                backlight = <&panel_bl>;
                power-supply = <&panel_reg>;
 
+               width-mm = <304>;
+               height-mm = <228>;
+
+               data-mapping = "jeida-18";
+
+               panel-timing {
+                       // 1024x768 @ 60Hz (typical)
+                       clock-frequency = <50000000 65000000 80000000>;
+                       hactive = <1024>;
+                       vactive = <768>;
+                       hfront-porch = <48 88 88>;
+                       hback-porch = <96 168 168>;
+                       hsync-len = <32 64 64>;
+                       vsync-len = <3 13 74>;
+                       vfront-porch = <3 13 74>;
+                       vback-porch = <3 12 74>;
+               };
+
                port {
                        panel_input: endpoint {
                                remote-endpoint = <&lvds_encoder_output>;
        };
 
        lvds-encoder {
-               compatible = "lvds-encoder";
+               compatible = "ti,ds90c185", "lvds-encoder";
+
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_lvds_prlud0 &pinctrl_lvds_hipow0>;
 
                ports {
                        #address-cells = <1>;
        };
 };
 
+&pinctrl {
+       nattis {
+               pinctrl_usba_vbus: usba_vbus {
+                       atmel,pins = <AT91_PIOD 28 AT91_PERIPH_GPIO
+                                     AT91_PINCTRL_DEGLITCH>;
+               };
+
+               pinctrl_mmc0_cd: mmc0_cd {
+                       atmel,pins = <AT91_PIOD  5 AT91_PERIPH_GPIO
+                                     AT91_PINCTRL_PULL_UP_DEGLITCH>;
+               };
+
+               pinctrl_lvds_prlud0: lvds_prlud0 {
+                       atmel,pins = <AT91_PIOA 21 AT91_PERIPH_GPIO
+                                     (AT91_PINCTRL_OUTPUT |
+                                      AT91_PINCTRL_OUTPUT_VAL(0))>;
+               };
+
+               pinctrl_lvds_hipow0: lvds_hipow0 {
+                       atmel,pins = <AT91_PIOA 23 AT91_PERIPH_GPIO
+                                     (AT91_PINCTRL_OUTPUT |
+                                      AT91_PINCTRL_OUTPUT_VAL(0))>;
+               };
+       };
+};
+
+&watchdog {
+       status = "okay";
+};
+
 &i2c0 {
        status = "okay";
 
 
        hlcdc-display-controller {
                pinctrl-names = "default";
-               pinctrl-0 = <&pinctrl_lcd_base
-                            &pinctrl_lcd_rgb565
-                            &pinctrl_lcd_prlud0
-                            &pinctrl_lcd_hipow0>;
+               pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_rgb565>;
 
                port@0 {
                        hlcdc_output: endpoint {
                                remote-endpoint = <&lvds_encoder_input>;
+                               bus-width = <16>;
                        };
                };
        };
                reg = <0>;
                bus-width = <4>;
                cd-gpios = <&pioD 5 GPIO_ACTIVE_HIGH>;
+               cd-inverted;
        };
 };
 
index e86e0c0..363a43d 100644 (file)
                                status = "okay";
                        };
 
+                       adc: adc@fc030000 {
+                               vddana-supply = <&vddana>;
+                               vref-supply = <&advref>;
+
+                               status = "disabled";
+                       };
+
                        pinctrl@fc038000 {
 
                                pinctrl_can1_default: can1_default {
                        linux,default-trigger = "heartbeat";
                };
        };
+
+       vddin_3v3: fixed-regulator-vddin_3v3 {
+               compatible = "regulator-fixed";
+
+               regulator-name = "VDDIN_3V3";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               regulator-always-on;
+               regulator-boot-on;
+               status = "okay";
+       };
+
+       vddana: fixed-regulator-vddana {
+               compatible = "regulator-fixed";
+
+               regulator-name = "VDDANA";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               regulator-always-on;
+               regulator-boot-on;
+               vin-supply = <&vddin_3v3>;
+               status = "okay";
+       };
+
+       advref: fixed-regulator-advref {
+               compatible = "regulator-fixed";
+
+               regulator-name = "advref";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               regulator-always-on;
+               regulator-boot-on;
+               vin-supply = <&vddana>;
+               status = "okay";
+       };
 };
index fcc85d7..518e2b0 100644 (file)
                                status = "okay";
                        };
 
+                       i2s0: i2s@f8050000 {
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&pinctrl_i2s0_default>;
+                               status = "disabled"; /* conflict with can0 */
+                       };
+
                        can0: can@f8054000 {
                                pinctrl-names = "default";
                                pinctrl-0 = <&pinctrl_can0_default>;
                                        bias-disable;
                                };
 
+                               pinctrl_i2s0_default: i2s0_default {
+                                       pinmux = <PIN_PC1__I2SC0_CK>,
+                                                <PIN_PC2__I2SC0_MCK>,
+                                                <PIN_PC3__I2SC0_WS>,
+                                                <PIN_PC4__I2SC0_DI0>,
+                                                <PIN_PC5__I2SC0_DO0>;
+                                       bias-disable;
+                               };
+
+                               pinctrl_i2s1_default: i2s1_default {
+                                       pinmux = <PIN_PA15__I2SC1_CK>,
+                                                <PIN_PA14__I2SC1_MCK>,
+                                                <PIN_PA16__I2SC1_WS>,
+                                                <PIN_PA17__I2SC1_DI0>,
+                                                <PIN_PA18__I2SC1_DO0>;
+                                       bias-disable;
+                               };
+
                                pinctrl_key_gpio_default: key_gpio_default {
                                        pinmux = <PIN_PB9__GPIO>;
                                        bias-pull-up;
                                status = "okay";
                        };
 
+                       i2s1: i2s@fc04c000 {
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&pinctrl_i2s1_default>;
+                               status = "disabled"; /* conflict with spi0, sdmmc1 */
+                       };
+
                        can1: can@fc050000 {
                                pinctrl-names = "default";
                                pinctrl-0 = <&pinctrl_can1_default>;
index 2fbec69..fe8876e 100644 (file)
        compatible = "axentia,tse850v3", "axentia,linea",
                     "atmel,sama5d31", "atmel,sama5d3", "atmel,sama5";
 
-       ahb {
-               apb {
-                       pinctrl@fffff200 {
-                               tse850 {
-                                       pinctrl_usba_vbus: usba-vbus {
-                                               atmel,pins =
-                                                       <AT91_PIOC 31
-                                                        AT91_PERIPH_GPIO
-                                                        AT91_PINCTRL_DEGLITCH>;
-                                       };
-                               };
-                       };
-
-                       watchdog@fffffe40 {
-                               status = "okay";
-                       };
-               };
-       };
-
        sck: oscillator {
                compatible = "fixed-clock";
 
        };
 };
 
+&pinctrl {
+       tse850 {
+               pinctrl_usba_vbus: usba-vbus {
+                       atmel,pins = <AT91_PIOC 31 AT91_PERIPH_GPIO
+                                     AT91_PINCTRL_DEGLITCH>;
+               };
+       };
+};
+
+&watchdog {
+       status = "okay";
+};
+
 &usart0 {
        status = "okay";
 
index 1be9889..4302772 100644 (file)
                        i2c2: i2c@f8024000 {
                                status = "okay";
 
-                               rtc1: rtc@64 {
+                               rtc1: rtc@32 {
                                        compatible = "epson,rx8900";
                                        reg = <0x32>;
                                };
index d2b865f..07d1b57 100644 (file)
 
                        spi0: spi@fffc8000 {
                                cs-gpios = <0>, <&pioC 11 0>, <0>, <0>;
-                               mtd_dataflash@0 {
+                               mtd_dataflash@1 {
                                        compatible = "atmel,at45", "atmel,dataflash";
                                        spi-max-frequency = <50000000>;
                                        reg = <1>;
index a29fc04..a57f2d4 100644 (file)
                                        spi-max-frequency = <15000000>;
                                };
 
-                               tsc2046@0 {
+                               tsc2046@2 {
                                        reg = <2>;
                                        compatible = "ti,ads7843";
                                        interrupts-extended = <&pioC 2 IRQ_TYPE_EDGE_BOTH>;
index 71df3ad..ec1f17a 100644 (file)
 
                        spi0: spi@fffc8000 {
                                cs-gpios = <0>, <&pioC 11 0>, <0>, <0>;
-                               mtd_dataflash@0 {
+                               mtd_dataflash@1 {
                                        compatible = "atmel,at45", "atmel,dataflash";
                                        spi-max-frequency = <50000000>;
                                        reg = <1>;
index 1ee25a4..d16db1f 100644 (file)
                                        };
                                };
 
-                               uart1 {
+                               usart1 {
                                        pinctrl_usart1: usart1-0 {
                                                atmel,pins =
                                                        <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE
index 3084a7c..e4d4973 100644 (file)
                        reg = <0x33000 0x14>;
                };
 
-               qspi: qspi@27200 {
+               qspi: spi@27200 {
                        compatible = "brcm,spi-bcm-qspi", "brcm,spi-nsp-qspi";
                        reg = <0x027200 0x184>,
                              <0x027000 0x124>,
index 09ba850..2fd111d 100644 (file)
                        brcm,nand-has-wp;
                };
 
-               qspi: qspi@27200 {
+               qspi: spi@27200 {
                        compatible = "brcm,spi-bcm-qspi", "brcm,spi-nsp-qspi";
                        reg = <0x027200 0x184>,
                              <0x027000 0x124>,
 
                srab: srab@36000 {
                        compatible = "brcm,nsp-srab";
-                       reg = <0x36000 0x1000>;
+                       reg = <0x36000 0x1000>,
+                             <0x3f308 0x8>,
+                             <0x3f410 0xc>;
+                       reg-names = "srab", "mux_config", "sgmii";
+                       interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "link_state_p0",
+                                         "link_state_p1",
+                                         "link_state_p2",
+                                         "link_state_p3",
+                                         "link_state_p4",
+                                         "link_state_p5",
+                                         "link_state_p7",
+                                         "link_state_p8",
+                                         "phy",
+                                         "ts",
+                                         "imp_sleep_timer_p5",
+                                         "imp_sleep_timer_p7",
+                                         "imp_sleep_timer_p8";
                        #address-cells = <1>;
                        #size-cells = <0>;
 
diff --git a/arch/arm/boot/dts/bcm2837-rpi-cm3-io3.dts b/arch/arm/boot/dts/bcm2837-rpi-cm3-io3.dts
new file mode 100644 (file)
index 0000000..6c8233a
--- /dev/null
@@ -0,0 +1,87 @@
+// SPDX-License-Identifier: GPL-2.0
+/dts-v1/;
+#include "bcm2837-rpi-cm3.dtsi"
+#include "bcm283x-rpi-usb-host.dtsi"
+
+/ {
+       compatible = "raspberrypi,3-compute-module", "brcm,bcm2837";
+       model = "Raspberry Pi Compute Module 3 IO board V3.0";
+};
+
+&gpio {
+       /*
+        * This is based on the official GPU firmware DT blob.
+        *
+        * Legend:
+        * "NC" = not connected (no rail from the SoC)
+        * "FOO" = GPIO line named "FOO" on the schematic
+        * "FOO_N" = GPIO line named "FOO" on schematic, active low
+        */
+       gpio-line-names = "GPIO0",
+                         "GPIO1",
+                         "GPIO2",
+                         "GPIO3",
+                         "GPIO4",
+                         "GPIO5",
+                         "GPIO6",
+                         "GPIO7",
+                         "GPIO8",
+                         "GPIO9",
+                         "GPIO10",
+                         "GPIO11",
+                         "GPIO12",
+                         "GPIO13",
+                         "GPIO14",
+                         "GPIO15",
+                         "GPIO16",
+                         "GPIO17",
+                         "GPIO18",
+                         "GPIO19",
+                         "GPIO20",
+                         "GPIO21",
+                         "GPIO22",
+                         "GPIO23",
+                         "GPIO24",
+                         "GPIO25",
+                         "GPIO26",
+                         "GPIO27",
+                         "GPIO28",
+                         "GPIO29",
+                         "GPIO30",
+                         "GPIO31",
+                         "GPIO32",
+                         "GPIO33",
+                         "GPIO34",
+                         "GPIO35",
+                         "GPIO36",
+                         "GPIO37",
+                         "GPIO38",
+                         "GPIO39",
+                         "GPIO40",
+                         "GPIO41",
+                         "GPIO42",
+                         "GPIO43",
+                         "GPIO44",
+                         "GPIO45",
+                         "GPIO46",
+                         "GPIO47",
+                         /* Used by eMMC */
+                         "SD_CLK_R",
+                         "SD_CMD_R",
+                         "SD_DATA0_R",
+                         "SD_DATA1_R",
+                         "SD_DATA2_R",
+                         "SD_DATA3_R";
+
+       pinctrl-0 = <&gpioout &alt0>;
+};
+
+&hdmi {
+       hpd-gpios = <&expgpio 1 GPIO_ACTIVE_LOW>;
+};
+
+&uart0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart0_gpio14>;
+       status = "okay";
+};
diff --git a/arch/arm/boot/dts/bcm2837-rpi-cm3.dtsi b/arch/arm/boot/dts/bcm2837-rpi-cm3.dtsi
new file mode 100644 (file)
index 0000000..7b7ab6a
--- /dev/null
@@ -0,0 +1,52 @@
+// SPDX-License-Identifier: GPL-2.0
+/dts-v1/;
+#include "bcm2837.dtsi"
+#include "bcm2835-rpi.dtsi"
+
+/ {
+       memory {
+               reg = <0 0x40000000>;
+       };
+
+       reg_3v3: fixed-regulator {
+               compatible = "regulator-fixed";
+               regulator-name = "3V3";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               regulator-always-on;
+       };
+
+       reg_1v8: fixed-regulator {
+               compatible = "regulator-fixed";
+               regulator-name = "1V8";
+               regulator-min-microvolt = <1800000>;
+               regulator-max-microvolt = <1800000>;
+               regulator-always-on;
+       };
+};
+
+&firmware {
+       expgpio: gpio {
+               compatible = "raspberrypi,firmware-gpio";
+               gpio-controller;
+               #gpio-cells = <2>;
+               gpio-line-names = "HDMI_HPD_N",
+                                 "EMMC_EN_N",
+                                 "NC",
+                                 "NC",
+                                 "NC",
+                                 "NC",
+                                 "NC",
+                                 "NC";
+               status = "okay";
+       };
+};
+
+&sdhost {
+       pinctrl-names = "default";
+       pinctrl-0 = <&sdhost_gpio48>;
+       bus-width = <4>;
+       vmmc-supply = <&reg_3v3>;
+       vqmmc-supply = <&reg_1v8>;
+       status = "okay";
+};
index 9403da0..70bece6 100644 (file)
@@ -1,4 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0
+#include <dt-bindings/net/microchip-lan78xx.h>
+
 / {
        aliases {
                ethernet0 = &ethernet;
                        ethernet: ethernet@1 {
                                compatible = "usb424,7800";
                                reg = <1>;
+
+                               mdio {
+                                       #address-cells = <0x1>;
+                                       #size-cells = <0x0>;
+                                       eth_phy: ethernet-phy@1 {
+                                               reg = <1>;
+                                               microchip,led-modes = <
+                                                       LAN78XX_LINK_1000_ACTIVITY
+                                                       LAN78XX_LINK_10_100_ACTIVITY
+                                               >;
+                                       };
+                               };
                        };
                };
        };
index 5f663f8..189cc3d 100644 (file)
 
 &spi_nor {
        status = "okay";
+
+       partitions {
+               compatible = "fixed-partitions";
+               #address-cells = <1>;
+               #size-cells = <1>;
+
+               boot@0 {
+                       label = "boot";
+                       reg = <0x000000 0x040000>;
+                       read-only;
+               };
+
+               os-image@100000 {
+                       label = "os-image";
+                       reg = <0x040000 0x200000>;
+                       compatible = "brcm,trx";
+               };
+
+               rootfs@240000 {
+                       label = "rootfs";
+                       reg = <0x240000 0xc00000>;
+               };
+
+               nvram@ff0000 {
+                       label = "nvram";
+                       reg = <0xff0000 0x010000>;
+               };
+       };
 };
 
 &usb2 {
index 2033411..4cb10f8 100644 (file)
 &usb3_phy {
        status = "okay";
 };
+
+&nandcs {
+       partitions {
+               compatible = "fixed-partitions";
+               #address-cells = <1>;
+               #size-cells = <1>;
+
+               boot@0 {
+                       label = "boot";
+                       reg = <0x00000000 0x00080000>;
+                       read-only;
+               };
+
+               nvram@80000 {
+                       label = "nvram";
+                       reg = <0x00080000 0x00180000>;
+               };
+
+               firmware@200000 {
+                       label = "firmware";
+                       reg = <0x00200000 0x07cc0000>;
+                       compatible = "brcm,trx";
+               };
+
+               asus@7ec0000 {
+                       label = "asus";
+                       reg = <0x07ec0000 0x00140000>;
+                       read-only;
+               };
+       };
+};
index c7143a9..b527d2f 100644 (file)
 
 &spi_nor {
        status = "okay";
+
+       partitions {
+               compatible = "fixed-partitions";
+               #address-cells = <1>;
+               #size-cells = <1>;
+
+               boot@0 {
+                       label = "boot";
+                       reg = <0x000000 0x040000>;
+                       read-only;
+               };
+
+               os-image@100000 {
+                       label = "os-image";
+                       reg = <0x040000 0x200000>;
+                       compatible = "brcm,trx";
+               };
+
+               rootfs@240000 {
+                       label = "rootfs";
+                       reg = <0x240000 0xc00000>;
+               };
+
+               nvram@ff0000 {
+                       label = "nvram";
+                       reg = <0xff0000 0x010000>;
+               };
+       };
 };
 
 &usb3_phy {
index e5a2d62..925a7c9 100644 (file)
                        reg = <0>;
                        #address-cells = <1>;
                        #size-cells = <1>;
+
+                       partitions {
+                               compatible = "brcm,bcm947xx-cfe-partitions";
+                       };
                };
        };
 };
index bc607d1..7a5c188 100644 (file)
                        compatible = "jedec,spi-nor";
                        reg = <0>;
                        spi-max-frequency = <20000000>;
-                       linux,part-probe = "ofpart", "bcm47xxpart";
                        status = "disabled";
+
+                       partitions {
+                               compatible = "brcm,bcm947xx-cfe-partitions";
+                       };
                };
        };
 
index ea3fc19..a53a2f6 100644 (file)
                open-source;
                priority = <200>;
        };
+
+       /* Hardware I2C block cannot do more than 63 bytes per transfer,
+        * which would prevent reading from a SFP's EEPROM (256 byte).
+        */
+       i2c1: i2c {
+               compatible = "i2c-gpio";
+               sda-gpios = <&gpioa 5 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+               scl-gpios = <&gpioa 4 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+       };
+
+       sfp: sfp {
+               compatible = "sff,sfp";
+               i2c-bus = <&i2c1>;
+               mod-def0-gpios = <&gpioa 28 GPIO_ACTIVE_LOW>;
+               los-gpios = <&gpioa 24 GPIO_ACTIVE_HIGH>;
+               tx-fault-gpios = <&gpioa 30 GPIO_ACTIVE_HIGH>;
+               tx-disable-gpios = <&gpioa 26 GPIO_ACTIVE_HIGH>;
+       };
 };
 
 &amac0 {
                        reg = <4>;
                };
 
+               port@5 {
+                       label = "sfp";
+                       phy-mode = "sgmii";
+                       reg = <5>;
+                       sfp = <&sfp>;
+                       managed = "in-band-status";
+               };
+
                port@8 {
                        ethernet = <&amac2>;
                        label = "cpu";
index 620b50c..7c22cbf 100644 (file)
@@ -69,6 +69,8 @@
                compatible = "samsung,s2mps14-pmic";
                interrupt-parent = <&gpx3>;
                interrupts = <5 IRQ_TYPE_NONE>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&s2mps14_irq>;
                reg = <0x66>;
 
                s2mps14_osc: clocks {
                samsung,pin-drv = <EXYNOS4_PIN_DRV_LV3>;
                samsung,pin-val = <1>;
        };
+
+       s2mps14_irq: s2mps14-irq {
+               samsung,pins = "gpx3-5";
+               samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+       };
 };
 
 &rtc {
index 2ab99f9..dd9ec05 100644 (file)
                reg = <0x66>;
                interrupt-parent = <&gpx0>;
                interrupts = <4 IRQ_TYPE_NONE>, <3 IRQ_TYPE_NONE>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&max8997_irq>;
 
                max8997,pmic-buck1-dvs-voltage = <1350000>;
                max8997,pmic-buck2-dvs-voltage = <1100000>;
        };
 };
 
+&pinctrl_1 {
+       max8997_irq: max8997-irq {
+               samsung,pins = "gpx0-3", "gpx0-4";
+               samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+       };
+};
+
 &sdhci_0 {
        bus-width = <4>;
        pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_cd>;
index 6f1d76c..f9bbc63 100644 (file)
                             regulator-max-microvolt = <1800000>;
                        };
 
+                       tflash_reg: LDO17 {
+                            regulator-name = "VTF_2.8V";
+                            regulator-min-microvolt = <2800000>;
+                            regulator-max-microvolt = <2800000>;
+                       };
+
                        vddq_reg: LDO21 {
                             regulator-name = "VDDQ_M1M2_1.2V";
                             regulator-min-microvolt = <1200000>;
        status = "okay";
 };
 
+&sdhci_2 {
+       bus-width = <4>;
+       pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus4>;
+       pinctrl-names = "default";
+       vmmc-supply = <&tflash_reg>;
+       cd-gpios = <&gpx3 4 GPIO_ACTIVE_LOW>;
+       status = "okay";
+};
+
 &serial_0 {
        status = "okay";
 };
index 4e6ff97..5c3d986 100644 (file)
 
        pmic@66 {
                compatible = "national,lp3974";
+               interrupts-extended = <&gpx0 7 0>, <&gpx2 7 0>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&lp3974_irq>;
                reg = <0x66>;
 
                max8998,pmic-buck1-default-dvs-idx = <0>;
 };
 
 &pinctrl_1 {
+       lp3974_irq: lp3974-irq {
+               samsung,pins = "gpx0-7", "gpx2-7";
+               samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+       };
+
        hdmi_hpd: hdmi-hpd {
                samsung,pins = "gpx3-7";
                samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
        pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus4>;
        pinctrl-names = "default";
        vmmc-supply = <&ldo5_reg>;
-       cd-gpios = <&gpx3 4 GPIO_ACTIVE_HIGH>;
-       cd-inverted;
+       cd-gpios = <&gpx3 4 GPIO_ACTIVE_LOW>;
        status = "okay";
 };
 
index c0476c2..aed2f2e 100644 (file)
 
 &sdhci_2 {
        bus-width = <4>;
-       cd-gpios = <&gpx3 4 GPIO_ACTIVE_HIGH>;
-       cd-inverted;
+       cd-gpios = <&gpx3 4 GPIO_ACTIVE_LOW>;
        pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus4 &sdhci2_cd>;
        pinctrl-names = "default";
        vmmc-supply = <&ldo21_reg>;
index a09e46c..2caa313 100644 (file)
        pinctrl-names = "default";
        vmmc-supply = <&ldo21_reg>;
        vqmmc-supply = <&ldo4_reg>;
-       cd-gpios = <&gpk2 2 GPIO_ACTIVE_HIGH>;
-       cd-inverted;
+       cd-gpios = <&gpk2 2 GPIO_ACTIVE_LOW>;
        status = "okay";
 };
 
index 7a8a5c5..7d1f2dc 100644 (file)
                };
        };
 
+       panel: panel {
+               compatible = "boe,hv070wsa-100";
+               power-supply = <&vcc_3v3_reg>;
+               enable-gpios = <&gpd1 3 GPIO_ACTIVE_HIGH>;
+               port {
+                       panel_ep: endpoint {
+                               remote-endpoint = <&bridge_out_ep>;
+                       };
+               };
+       };
+
        regulators {
                compatible = "simple-bus";
                #address-cells = <1>;
                        reg = <2>;
                        regulator-name = "hdmi-en";
                };
+
+               vcc_1v2_reg: regulator@3 {
+                       compatible = "regulator-fixed";
+                       reg = <3>;
+                       regulator-name = "VCC_1V2";
+                       regulator-min-microvolt = <1200000>;
+                       regulator-max-microvolt = <1200000>;
+               };
+
+               vcc_1v8_reg: regulator@4 {
+                       compatible = "regulator-fixed";
+                       reg = <4>;
+                       regulator-name = "VCC_1V8";
+                       regulator-min-microvolt = <1800000>;
+                       regulator-max-microvolt = <1800000>;
+               };
+
+               vcc_3v3_reg: regulator@5 {
+                       compatible = "regulator-fixed";
+                       reg = <5>;
+                       regulator-name = "VCC_3V3";
+                       regulator-min-microvolt = <3300000>;
+                       regulator-max-microvolt = <3300000>;
+               };
        };
 
        fixed-rate-clocks {
        cpu0-supply = <&buck2_reg>;
 };
 
+&dsi_0 {
+       vddcore-supply = <&ldo8_reg>;
+       vddio-supply = <&ldo10_reg>;
+       samsung,pll-clock-frequency = <24000000>;
+       samsung,burst-clock-frequency = <320000000>;
+       samsung,esc-clock-frequency = <10000000>;
+       status = "okay";
+
+       bridge@0 {
+               reg = <0>;
+               compatible = "toshiba,tc358764";
+               vddc-supply = <&vcc_1v2_reg>;
+               vddio-supply = <&vcc_1v8_reg>;
+               vddlvds-supply = <&vcc_3v3_reg>;
+               reset-gpios = <&gpd1 6 GPIO_ACTIVE_LOW>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               port@1 {
+                       reg = <1>;
+                       bridge_out_ep: endpoint {
+                               remote-endpoint = <&panel_ep>;
+                       };
+               };
+       };
+};
+
 &dp {
        status = "okay";
        samsung,color-space = <0>;
 };
 
 &hdmi {
+       pinctrl-names = "default";
+       pinctrl-0 = <&hdmi_hpd>;
        status = "okay";
-       ddc = <&i2c_2>;
-       hpd-gpios = <&gpx3 7 GPIO_ACTIVE_LOW>;
+       ddc = <&i2c_ddc>;
+       hpd-gpios = <&gpx3 7 GPIO_ACTIVE_HIGH>;
        vdd_osc-supply = <&ldo10_reg>;
        vdd_pll-supply = <&ldo8_reg>;
        vdd-supply = <&ldo8_reg>;
                reg = <0x66>;
                interrupt-parent = <&gpx3>;
                interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&s5m8767_irq>;
 
                vinb1-supply = <&main_dc_reg>;
                vinb2-supply = <&main_dc_reg>;
        };
 };
 
-&i2c_2 {
-       status = "okay";
-       /* used by HDMI DDC */
-       samsung,i2c-sda-delay = <100>;
-       samsung,i2c-max-bus-freq = <66000>;
-};
-
 &i2c_3 {
        status = "okay";
 
        cap-sd-highspeed;
 };
 
+&pinctrl_0 {
+       s5m8767_irq: s5m8767-irq {
+               samsung,pins = "gpx3-2";
+               samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+       };
+};
+
 &rtc {
        status = "okay";
 };
        status = "okay";
        samsung,exynos-sataphy-i2c-phandle = <&sata_phy_i2c>;
 };
+
+&soc {
+       /*
+        * For unknown reasons HDMI-DDC does not work with Exynos I2C
+        * controllers. Lets use software I2C over GPIO pins as a workaround.
+        */
+       i2c_ddc: i2c-gpio {
+               pinctrl-names = "default";
+               pinctrl-0 = <&i2c2_gpio_bus>;
+               status = "okay";
+               compatible = "i2c-gpio";
+               gpios = <&gpa0 6 0 /* sda */
+                        &gpa0 7 0 /* scl */
+                       >;
+               i2c-gpio,delay-us = <2>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+       };
+};
index 6ff6dea..d31a686 100644 (file)
                samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
        };
 
+       i2c2_gpio_bus: i2c2-gpio-bus {
+               samsung,pins = "gpa0-6", "gpa0-7";
+               samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+               samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
+       };
+
        uart2_data: uart2-data {
                samsung,pins = "gpa1-0", "gpa1-1";
                samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
                samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
                samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
        };
+
+       hdmi_hpd: hdmi-hpd {
+               samsung,pins = "gpx3-7";
+               samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+       };
 };
 
 &pinctrl_1 {
index 0348b1c..7cbfc6f 100644 (file)
 
                samsung,model = "Snow-I2S-MAX98090";
                samsung,audio-codec = <&max98090>;
+
+               cpu {
+                       sound-dai = <&i2s0 0>;
+               };
+
+               codec {
+                       sound-dai = <&max98090 0>, <&hdmi>;
+               };
        };
 };
 
@@ -31,6 +39,9 @@
                interrupt-parent = <&gpx0>;
                pinctrl-names = "default";
                pinctrl-0 = <&max98090_irq>;
+               clocks = <&pmu_system_controller 0>;
+               clock-names = "mclk";
+               #sound-dai-cells = <1>;
        };
 };
 
index da163a4..5044f75 100644 (file)
                        device_type = "cpu";
                        compatible = "arm,cortex-a15";
                        reg = <0>;
-                       clock-frequency = <1700000000>;
                        clocks = <&clock CLK_ARM_CLK>;
                        clock-names = "cpu";
-                       clock-latency = <140000>;
-
-                       operating-points = <
-                               1700000 1300000
-                               1600000 1250000
-                               1500000 1225000
-                               1400000 1200000
-                               1300000 1150000
-                               1200000 1125000
-                               1100000 1100000
-                               1000000 1075000
-                                900000 1050000
-                                800000 1025000
-                                700000 1012500
-                                600000 1000000
-                                500000  975000
-                                400000  950000
-                                300000  937500
-                                200000  925000
-                       >;
+                       operating-points-v2 = <&cpu0_opp_table>;
                        #cooling-cells = <2>; /* min followed by max */
                };
                cpu@1 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a15";
                        reg = <1>;
-                       clock-frequency = <1700000000>;
                        clocks = <&clock CLK_ARM_CLK>;
                        clock-names = "cpu";
-                       clock-latency = <140000>;
-
-                       operating-points = <
-                               1700000 1300000
-                               1600000 1250000
-                               1500000 1225000
-                               1400000 1200000
-                               1300000 1150000
-                               1200000 1125000
-                               1100000 1100000
-                               1000000 1075000
-                                900000 1050000
-                                800000 1025000
-                                700000 1012500
-                                600000 1000000
-                                500000  975000
-                                400000  950000
-                                300000  937500
-                                200000  925000
-                       >;
+                       operating-points-v2 = <&cpu0_opp_table>;
                        #cooling-cells = <2>; /* min followed by max */
                };
        };
 
+       cpu0_opp_table: opp_table0 {
+               compatible = "operating-points-v2";
+               opp-shared;
+
+               opp-200000000 {
+                       opp-hz = /bits/ 64 <200000000>;
+                       opp-microvolt = <925000>;
+                       clock-latency-ns = <140000>;
+               };
+               opp-300000000 {
+                       opp-hz = /bits/ 64 <300000000>;
+                       opp-microvolt = <937500>;
+                       clock-latency-ns = <140000>;
+               };
+               opp-400000000 {
+                       opp-hz = /bits/ 64 <400000000>;
+                       opp-microvolt = <950000>;
+                       clock-latency-ns = <140000>;
+               };
+               opp-500000000 {
+                       opp-hz = /bits/ 64 <500000000>;
+                       opp-microvolt = <975000>;
+                       clock-latency-ns = <140000>;
+               };
+               opp-600000000 {
+                       opp-hz = /bits/ 64 <600000000>;
+                       opp-microvolt = <1000000>;
+                       clock-latency-ns = <140000>;
+               };
+               opp-700000000 {
+                       opp-hz = /bits/ 64 <700000000>;
+                       opp-microvolt = <1012500>;
+                       clock-latency-ns = <140000>;
+               };
+               opp-800000000 {
+                       opp-hz = /bits/ 64 <800000000>;
+                       opp-microvolt = <1025000>;
+                       clock-latency-ns = <140000>;
+               };
+               opp-900000000 {
+                       opp-hz = /bits/ 64 <900000000>;
+                       opp-microvolt = <1050000>;
+                       clock-latency-ns = <140000>;
+               };
+               opp-1000000000 {
+                       opp-hz = /bits/ 64 <1000000000>;
+                       opp-microvolt = <1075000>;
+                       clock-latency-ns = <140000>;
+                       opp-suspend;
+               };
+               opp-1100000000 {
+                       opp-hz = /bits/ 64 <1100000000>;
+                       opp-microvolt = <1100000>;
+                       clock-latency-ns = <140000>;
+               };
+               opp-1200000000 {
+                       opp-hz = /bits/ 64 <1200000000>;
+                       opp-microvolt = <1125000>;
+                       clock-latency-ns = <140000>;
+               };
+               opp-1300000000 {
+                       opp-hz = /bits/ 64 <1300000000>;
+                       opp-microvolt = <1150000>;
+                       clock-latency-ns = <140000>;
+               };
+               opp-1400000000 {
+                       opp-hz = /bits/ 64 <1400000000>;
+                       opp-microvolt = <1200000>;
+                       clock-latency-ns = <140000>;
+               };
+               opp-1500000000 {
+                       opp-hz = /bits/ 64 <1500000000>;
+                       opp-microvolt = <1225000>;
+                       clock-latency-ns = <140000>;
+               };
+               opp-1600000000 {
+                       opp-hz = /bits/ 64 <1600000000>;
+                       opp-microvolt = <1250000>;
+                       clock-latency-ns = <140000>;
+               };
+               opp-1700000000 {
+                       opp-hz = /bits/ 64 <1700000000>;
+                       opp-microvolt = <1300000>;
+                       clock-latency-ns = <140000>;
+               };
+       };
+
        soc: soc {
                sysram@2020000 {
                        compatible = "mmio-sram";
                        #phy-cells = <0>;
                };
 
+               mipi_phy: video-phy@10040710 {
+                       compatible = "samsung,s5pv210-mipi-video-phy";
+                       reg = <0x10040710 0x100>;
+                       #phy-cells = <1>;
+                       syscon = <&pmu_system_controller>;
+               };
+
+               dsi_0: dsi@14500000 {
+                       compatible = "samsung,exynos4210-mipi-dsi";
+                       reg = <0x14500000 0x10000>;
+                       interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
+                       samsung,power-domain = <&pd_disp1>;
+                       phys = <&mipi_phy 3>;
+                       phy-names = "dsim";
+                       clocks = <&clock CLK_DSIM0>, <&clock CLK_SCLK_MIPI1>;
+                       clock-names = "bus_clk", "sclk_mipi";
+                       status = "disabled";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+
                adc: adc@12d10000 {
                        compatible = "samsung,exynos-adc-v1";
                        reg = <0x12D10000 0x100>;
index 57c2332..f78db68 100644 (file)
 
 &clock_audss {
        assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>;
-       assigned-clock-parents = <&clock CLK_FOUT_EPLL>;
+       assigned-clock-parents = <&clock CLK_MAU_EPLL>;
 };
 
 &cpu0 {
                                regulator-name = "vdd_1v35";
                                regulator-min-microvolt = <1350000>;
                                regulator-max-microvolt = <1350000>;
+                               regulator-always-on;
                                regulator-boot-on;
                                regulator-state-mem {
                                        regulator-on-in-suspend;
                                regulator-name = "vdd_2v";
                                regulator-min-microvolt = <2000000>;
                                regulator-max-microvolt = <2000000>;
+                               regulator-always-on;
                                regulator-boot-on;
                                regulator-state-mem {
                                        regulator-on-in-suspend;
                                regulator-name = "vdd_1v8";
                                regulator-min-microvolt = <1800000>;
                                regulator-max-microvolt = <1800000>;
+                               regulator-always-on;
                                regulator-boot-on;
                                regulator-state-mem {
                                        regulator-on-in-suspend;
index 2f4f408..2fac4ba 100644 (file)
                                regulator-always-on;
                        };
 
+                       ldo2_reg: LDO2 {
+                               regulator-name = "vdd_ldo2";
+                               regulator-min-microvolt = <1800000>;
+                               regulator-max-microvolt = <1800000>;
+                               regulator-always-on;
+                       };
+
                        ldo3_reg: LDO3 {
                                regulator-name = "vddq_mmc0";
                                regulator-min-microvolt = <1800000>;
                        };
 
                        ldo12_reg: LDO12 {
+                               /* Unused */
                                regulator-name = "vdd_ldo12";
-                               regulator-min-microvolt = <1800000>;
-                               regulator-max-microvolt = <1800000>;
-                               regulator-always-on;
+                               regulator-min-microvolt = <800000>;
+                               regulator-max-microvolt = <2375000>;
                        };
 
                        ldo13_reg: LDO13 {
                                regulator-max-microvolt = <2800000>;
                        };
 
+                       ldo14_reg: LDO14 {
+                               /* Unused */
+                               regulator-name = "vdd_ldo14";
+                               regulator-min-microvolt = <800000>;
+                               regulator-max-microvolt = <3950000>;
+                       };
+
                        ldo15_reg: LDO15 {
                                regulator-name = "vdd_ldo15";
                                regulator-min-microvolt = <3300000>;
                        };
 
                        ldo16_reg: LDO16 {
+                               /* Unused */
                                regulator-name = "vdd_ldo16";
-                               regulator-min-microvolt = <2200000>;
-                               regulator-max-microvolt = <2200000>;
-                               regulator-always-on;
+                               regulator-min-microvolt = <800000>;
+                               regulator-max-microvolt = <3950000>;
                        };
 
                        ldo17_reg: LDO17 {
                                regulator-max-microvolt = <2800000>;
                        };
 
-                       ldo24_reg: LDO24 {
-                               regulator-name = "tsp_io";
-                               regulator-min-microvolt = <2800000>;
-                               regulator-max-microvolt = <2800000>;
+                       ldo20_reg: LDO20 {
+                               /* Unused */
+                               regulator-name = "vdd_ldo20";
+                               regulator-min-microvolt = <800000>;
+                               regulator-max-microvolt = <3950000>;
+                       };
+
+                       ldo21_reg: LDO21 {
+                               /* Unused */
+                               regulator-name = "vdd_ldo21";
+                               regulator-min-microvolt = <800000>;
+                               regulator-max-microvolt = <3950000>;
+                       };
+
+                       ldo22_reg: LDO22 {
+                               /* Unused */
+                               regulator-name = "vdd_ldo22";
+                               regulator-min-microvolt = <800000>;
+                               regulator-max-microvolt = <2375000>;
+                       };
+
+                       ldo23_reg: LDO23 {
+                               regulator-name = "vdd_mifs";
+                               regulator-min-microvolt = <1100000>;
+                               regulator-max-microvolt = <1100000>;
                                regulator-always-on;
                        };
 
+                       ldo24_reg: LDO24 {
+                               /* Unused */
+                               regulator-name = "vdd_ldo24";
+                               regulator-min-microvolt = <800000>;
+                               regulator-max-microvolt = <3950000>;
+                       };
+
+                       ldo25_reg: LDO25 {
+                               /* Unused */
+                               regulator-name = "vdd_ldo25";
+                               regulator-min-microvolt = <800000>;
+                               regulator-max-microvolt = <3950000>;
+                       };
+
                        ldo26_reg: LDO26 {
+                               /* Used on XU3, XU3-Lite and XU4 */
                                regulator-name = "vdd_ldo26";
-                               regulator-min-microvolt = <3000000>;
-                               regulator-max-microvolt = <3000000>;
+                               regulator-min-microvolt = <800000>;
+                               regulator-max-microvolt = <3950000>;
+                       };
+
+                       ldo27_reg: LDO27 {
+                               regulator-name = "vdd_g3ds";
+                               regulator-min-microvolt = <1000000>;
+                               regulator-max-microvolt = <1000000>;
                                regulator-always-on;
                        };
 
+                       ldo28_reg: LDO28 {
+                               /* Used on XU3 */
+                               regulator-name = "vdd_ldo28";
+                               regulator-min-microvolt = <800000>;
+                               regulator-max-microvolt = <3950000>;
+                       };
+
+                       ldo29_reg: LDO29 {
+                               /* Unused */
+                               regulator-name = "vdd_ldo29";
+                               regulator-min-microvolt = <800000>;
+                               regulator-max-microvolt = <3950000>;
+                       };
+
+                       ldo30_reg: LDO30 {
+                               /* Unused */
+                               regulator-name = "vdd_ldo30";
+                               regulator-min-microvolt = <800000>;
+                               regulator-max-microvolt = <3950000>;
+                       };
+
+                       ldo31_reg: LDO31 {
+                               /* Unused */
+                               regulator-name = "vdd_ldo31";
+                               regulator-min-microvolt = <800000>;
+                               regulator-max-microvolt = <3950000>;
+                       };
+
+                       ldo32_reg: LDO32 {
+                               /* Unused */
+                               regulator-name = "vdd_ldo32";
+                               regulator-min-microvolt = <800000>;
+                               regulator-max-microvolt = <3950000>;
+                       };
+
+                       ldo33_reg: LDO33 {
+                               /* Unused */
+                               regulator-name = "vdd_ldo33";
+                               regulator-min-microvolt = <800000>;
+                               regulator-max-microvolt = <3950000>;
+                       };
+
+                       ldo34_reg: LDO34 {
+                               /* Unused */
+                               regulator-name = "vdd_ldo34";
+                               regulator-min-microvolt = <800000>;
+                               regulator-max-microvolt = <3950000>;
+                       };
+
+                       ldo35_reg: LDO35 {
+                               /* Unused */
+                               regulator-name = "vdd_ldo35";
+                               regulator-min-microvolt = <800000>;
+                               regulator-max-microvolt = <2375000>;
+                       };
+
+                       ldo36_reg: LDO36 {
+                               /* Unused */
+                               regulator-name = "vdd_ldo36";
+                               regulator-min-microvolt = <800000>;
+                               regulator-max-microvolt = <3950000>;
+                       };
+
+                       ldo37_reg: LDO37 {
+                               /* Unused */
+                               regulator-name = "vdd_ldo37";
+                               regulator-min-microvolt = <800000>;
+                               regulator-max-microvolt = <3950000>;
+                       };
+
+                       ldo38_reg: LDO38 {
+                               /* Unused */
+                               regulator-name = "vdd_ldo38";
+                               regulator-min-microvolt = <800000>;
+                               regulator-max-microvolt = <3950000>;
+                       };
+
                        buck1_reg: BUCK1 {
                                regulator-name = "vdd_mif";
                                regulator-min-microvolt = <800000>;
index 96e281c..e522edb 100644 (file)
        status = "okay";
 };
 
+&ldo26_reg {
+       regulator-min-microvolt = <3000000>;
+       regulator-max-microvolt = <3000000>;
+       regulator-always-on;
+};
+
 &mixer {
        status = "okay";
 };
index 0322f28..db0bc17 100644 (file)
        };
 };
 
+&ldo28_reg {
+       regulator-name = "dp_p3v3";
+       regulator-min-microvolt = <3300000>;
+       regulator-max-microvolt = <3300000>;
+};
+
 &pwm {
        /*
         * PWM 0 -- fan
index d80ab90..e0f470f 100644 (file)
 
 &clock_audss {
        assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>;
-       assigned-clock-parents = <&clock CLK_FOUT_EPLL>;
+       assigned-clock-parents = <&clock CLK_MAU_EPLL>;
 };
 
 &cpu0 {
                                regulator-name = "vdd_1v35";
                                regulator-min-microvolt = <1350000>;
                                regulator-max-microvolt = <1350000>;
+                               regulator-always-on;
                                regulator-boot-on;
                                regulator-state-mem {
                                        regulator-on-in-suspend;
                                regulator-name = "vdd_2v";
                                regulator-min-microvolt = <2000000>;
                                regulator-max-microvolt = <2000000>;
+                               regulator-always-on;
                                regulator-boot-on;
                                regulator-state-mem {
                                        regulator-on-in-suspend;
                                regulator-name = "vdd_1v8";
                                regulator-min-microvolt = <1800000>;
                                regulator-max-microvolt = <1800000>;
+                               regulator-always-on;
                                regulator-boot-on;
                                regulator-state-mem {
                                        regulator-on-in-suspend;
index 44044f2..0f917b2 100644 (file)
 
                clocks = <&clk_375m>;
                clock-names = "apb_pclk";
-               port {
-                       etb0_in_port: endpoint@0 {
-                               slave-mode;
-                               remote-endpoint = <&replicator0_out_port0>;
+               in-ports {
+                       port {
+                               etb0_in_port: endpoint@0 {
+                                       remote-endpoint = <&replicator0_out_port0>;
+                               };
                        };
                };
        };
 
                clocks = <&clk_375m>;
                clock-names = "apb_pclk";
-               port {
-                       etb1_in_port: endpoint@0 {
-                               slave-mode;
-                               remote-endpoint = <&replicator1_out_port0>;
+               in-ports {
+                       port {
+                               etb1_in_port: endpoint@0 {
+                                       remote-endpoint = <&replicator1_out_port0>;
+                               };
                        };
                };
        };
 
                clocks = <&clk_375m>;
                clock-names = "apb_pclk";
-               port {
-                       etb2_in_port: endpoint@0 {
-                               slave-mode;
-                               remote-endpoint = <&replicator2_out_port0>;
+               in-ports {
+                       port {
+                               etb2_in_port: endpoint@0 {
+                                       remote-endpoint = <&replicator2_out_port0>;
+                               };
                        };
                };
        };
 
                clocks = <&clk_375m>;
                clock-names = "apb_pclk";
-               port {
-                       etb3_in_port: endpoint@0 {
-                               slave-mode;
-                               remote-endpoint = <&replicator3_out_port0>;
+               in-ports {
+                       port {
+                               etb3_in_port: endpoint@0 {
+                                       remote-endpoint = <&replicator3_out_port0>;
+                               };
                        };
                };
        };
 
                clocks = <&clk_375m>;
                clock-names = "apb_pclk";
-               port {
-                       tpiu_in_port: endpoint@0 {
-                               slave-mode;
-                               remote-endpoint = <&funnel4_out_port0>;
+               in-ports {
+                       port {
+                               tpiu_in_port: endpoint@0 {
+                                       remote-endpoint = <&funnel4_out_port0>;
+                               };
                        };
                };
        };
                 */
                compatible = "arm,coresight-replicator";
 
-               ports {
+               out-ports {
                        #address-cells = <1>;
                        #size-cells = <0>;
 
                                        remote-endpoint = <&funnel4_in_port0>;
                                };
                        };
+               };
 
-                       /* replicator input port */
-                       port@2 {
-                               reg = <0>;
+               in-ports {
+                       port {
                                replicator0_in_port0: endpoint {
-                                       slave-mode;
                                        remote-endpoint = <&funnel0_out_port0>;
                                };
                        };
                 */
                compatible = "arm,coresight-replicator";
 
-               ports {
+               out-ports {
                        #address-cells = <1>;
                        #size-cells = <0>;
 
                                        remote-endpoint = <&funnel4_in_port1>;
                                };
                        };
+               };
 
-                       /* replicator input port */
-                       port@2 {
-                               reg = <0>;
+               in-ports {
+                       port {
                                replicator1_in_port0: endpoint {
-                                       slave-mode;
                                        remote-endpoint = <&funnel1_out_port0>;
                                };
                        };
                 */
                compatible = "arm,coresight-replicator";
 
-               ports {
+               out-ports {
                        #address-cells = <1>;
                        #size-cells = <0>;
 
-                       /* replicator output ports */
                        port@0 {
                                reg = <0>;
                                replicator2_out_port0: endpoint {
                                        remote-endpoint = <&funnel4_in_port2>;
                                };
                        };
+               };
 
-                       /* replicator input port */
-                       port@2 {
-                               reg = <0>;
+               in-ports {
+                       port {
                                replicator2_in_port0: endpoint {
-                                       slave-mode;
                                        remote-endpoint = <&funnel2_out_port0>;
                                };
                        };
                 */
                compatible = "arm,coresight-replicator";
 
-               ports {
+               out-ports {
                        #address-cells = <1>;
                        #size-cells = <0>;
 
-                       /* replicator output ports */
                        port@0 {
                                reg = <0>;
                                replicator3_out_port0: endpoint {
                                        remote-endpoint = <&funnel4_in_port3>;
                                };
                        };
+               };
 
-                       /* replicator input port */
-                       port@2 {
-                               reg = <0>;
+               in-ports {
+                       port {
                                replicator3_in_port0: endpoint {
-                                       slave-mode;
                                        remote-endpoint = <&funnel3_out_port0>;
                                };
                        };
 
                clocks = <&clk_375m>;
                clock-names = "apb_pclk";
-               ports {
-                       #address-cells = <1>;
-                       #size-cells = <0>;
-
-                       /* funnel output port */
-                       port@0 {
-                               reg = <0>;
+               out-ports {
+                       port {
                                funnel0_out_port0: endpoint {
                                        remote-endpoint =
                                                <&replicator0_in_port0>;
                                };
                        };
+               };
 
-                       /* funnel input ports */
-                       port@1 {
+               in-ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       port@0 {
                                reg = <0>;
                                funnel0_in_port0: endpoint {
-                                       slave-mode;
                                        remote-endpoint = <&ptm0_out_port>;
                                };
                        };
 
-                       port@2 {
+                       port@1 {
                                reg = <1>;
                                funnel0_in_port1: endpoint {
-                                       slave-mode;
                                        remote-endpoint = <&ptm1_out_port>;
                                };
                        };
 
-                       port@3 {
+                       port@2 {
                                reg = <2>;
                                funnel0_in_port2: endpoint {
-                                       slave-mode;
                                        remote-endpoint = <&ptm2_out_port>;
                                };
                        };
 
-                       port@4 {
+                       port@3 {
                                reg = <3>;
                                funnel0_in_port3: endpoint {
-                                       slave-mode;
                                        remote-endpoint = <&ptm3_out_port>;
                                };
                        };
 
                clocks = <&clk_375m>;
                clock-names = "apb_pclk";
-               ports {
-                       #address-cells = <1>;
-                       #size-cells = <0>;
-
-                       /* funnel output port */
-                       port@0 {
-                               reg = <0>;
+               out-ports {
+                       port {
                                funnel1_out_port0: endpoint {
                                        remote-endpoint =
                                                <&replicator1_in_port0>;
                                };
                        };
+               };
 
-                       /* funnel input ports */
-                       port@1 {
+               in-ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       port@0 {
                                reg = <0>;
                                funnel1_in_port0: endpoint {
-                                       slave-mode;
                                        remote-endpoint = <&ptm4_out_port>;
                                };
                        };
 
-                       port@2 {
+                       port@1 {
                                reg = <1>;
                                funnel1_in_port1: endpoint {
-                                       slave-mode;
                                        remote-endpoint = <&ptm5_out_port>;
                                };
                        };
 
-                       port@3 {
+                       port@2 {
                                reg = <2>;
                                funnel1_in_port2: endpoint {
-                                       slave-mode;
                                        remote-endpoint = <&ptm6_out_port>;
                                };
                        };
 
-                       port@4 {
+                       port@3 {
                                reg = <3>;
                                funnel1_in_port3: endpoint {
-                                       slave-mode;
                                        remote-endpoint = <&ptm7_out_port>;
                                };
                        };
 
                clocks = <&clk_375m>;
                clock-names = "apb_pclk";
-               ports {
-                       #address-cells = <1>;
-                       #size-cells = <0>;
-
-                       /* funnel output port */
-                       port@0 {
-                               reg = <0>;
+               out-ports {
+                       port {
                                funnel2_out_port0: endpoint {
                                        remote-endpoint =
                                                <&replicator2_in_port0>;
                                };
                        };
+               };
 
-                       /* funnel input ports */
-                       port@1 {
+               in-ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       port@0 {
                                reg = <0>;
                                funnel2_in_port0: endpoint {
-                                       slave-mode;
                                        remote-endpoint = <&ptm8_out_port>;
                                };
                        };
 
-                       port@2 {
+                       port@1 {
                                reg = <1>;
                                funnel2_in_port1: endpoint {
-                                       slave-mode;
                                        remote-endpoint = <&ptm9_out_port>;
                                };
                        };
 
-                       port@3 {
+                       port@2 {
                                reg = <2>;
                                funnel2_in_port2: endpoint {
-                                       slave-mode;
                                        remote-endpoint = <&ptm10_out_port>;
                                };
                        };
 
-                       port@4 {
+                       port@3 {
                                reg = <3>;
                                funnel2_in_port3: endpoint {
-                                       slave-mode;
                                        remote-endpoint = <&ptm11_out_port>;
                                };
                        };
 
                clocks = <&clk_375m>;
                clock-names = "apb_pclk";
-               ports {
-                       #address-cells = <1>;
-                       #size-cells = <0>;
-
-                       /* funnel output port */
-                       port@0 {
-                               reg = <0>;
+               out-ports {
+                       port {
                                funnel3_out_port0: endpoint {
                                        remote-endpoint =
                                                <&replicator3_in_port0>;
                                };
                        };
+               };
 
-                       /* funnel input ports */
-                       port@1 {
+               in-ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       port@0 {
                                reg = <0>;
                                funnel3_in_port0: endpoint {
-                                       slave-mode;
                                        remote-endpoint = <&ptm12_out_port>;
                                };
                        };
 
-                       port@2 {
+                       port@1 {
                                reg = <1>;
                                funnel3_in_port1: endpoint {
-                                       slave-mode;
                                        remote-endpoint = <&ptm13_out_port>;
                                };
                        };
 
-                       port@3 {
+                       port@2 {
                                reg = <2>;
                                funnel3_in_port2: endpoint {
-                                       slave-mode;
                                        remote-endpoint = <&ptm14_out_port>;
                                };
                        };
 
-                       port@4 {
+                       port@3 {
                                reg = <3>;
                                funnel3_in_port3: endpoint {
-                                       slave-mode;
                                        remote-endpoint = <&ptm15_out_port>;
                                };
                        };
 
                clocks = <&clk_375m>;
                clock-names = "apb_pclk";
-               ports {
-                       #address-cells = <1>;
-                       #size-cells = <0>;
-
-                       /* funnel output port */
-                       port@0 {
-                               reg = <0>;
+               out-ports {
+                       port {
                                funnel4_out_port0: endpoint {
                                        remote-endpoint = <&tpiu_in_port>;
                                };
                        };
+               };
 
-                       /* funnel input ports */
-                       port@1 {
+               in-ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       port@0 {
                                reg = <0>;
                                funnel4_in_port0: endpoint {
-                                       slave-mode;
                                        remote-endpoint =
                                                <&replicator0_out_port1>;
                                };
                        };
 
-                       port@2 {
+                       port@1 {
                                reg = <1>;
                                funnel4_in_port1: endpoint {
-                                       slave-mode;
                                        remote-endpoint =
                                                <&replicator1_out_port1>;
                                };
                        };
 
-                       port@3 {
+                       port@2 {
                                reg = <2>;
                                funnel4_in_port2: endpoint {
-                                       slave-mode;
                                        remote-endpoint =
                                                <&replicator2_out_port1>;
                                };
                        };
 
-                       port@4 {
+                       port@3 {
                                reg = <3>;
                                funnel4_in_port3: endpoint {
-                                       slave-mode;
                                        remote-endpoint =
                                                <&replicator3_out_port1>;
                                };
                clocks = <&clk_375m>;
                clock-names = "apb_pclk";
                cpu = <&CPU0>;
-               port {
-                       ptm0_out_port: endpoint {
-                               remote-endpoint = <&funnel0_in_port0>;
+               out-ports {
+                       port {
+                               ptm0_out_port: endpoint {
+                                       remote-endpoint = <&funnel0_in_port0>;
+                               };
                        };
                };
        };
                clocks = <&clk_375m>;
                clock-names = "apb_pclk";
                cpu = <&CPU1>;
-               port {
-                       ptm1_out_port: endpoint {
-                               remote-endpoint = <&funnel0_in_port1>;
+               out-ports {
+                       port {
+                               ptm1_out_port: endpoint {
+                                       remote-endpoint = <&funnel0_in_port1>;
+                               };
                        };
                };
        };
                clocks = <&clk_375m>;
                clock-names = "apb_pclk";
                cpu = <&CPU2>;
-               port {
-                       ptm2_out_port: endpoint {
-                               remote-endpoint = <&funnel0_in_port2>;
+               out-ports {
+                       port {
+                               ptm2_out_port: endpoint {
+                                       remote-endpoint = <&funnel0_in_port2>;
+                               };
                        };
                };
        };
                clocks = <&clk_375m>;
                clock-names = "apb_pclk";
                cpu = <&CPU3>;
-               port {
-                       ptm3_out_port: endpoint {
-                               remote-endpoint = <&funnel0_in_port3>;
+               out-ports {
+                       port {
+                               ptm3_out_port: endpoint {
+                                       remote-endpoint = <&funnel0_in_port3>;
+                               };
                        };
                };
        };
                clocks = <&clk_375m>;
                clock-names = "apb_pclk";
                cpu = <&CPU4>;
-               port {
-                       ptm4_out_port: endpoint {
-                               remote-endpoint = <&funnel1_in_port0>;
+               out-ports {
+                       port {
+                               ptm4_out_port: endpoint {
+                                       remote-endpoint = <&funnel1_in_port0>;
+                               };
                        };
                };
        };
                clocks = <&clk_375m>;
                clock-names = "apb_pclk";
                cpu = <&CPU5>;
-               port {
-                       ptm5_out_port: endpoint {
-                               remote-endpoint = <&funnel1_in_port1>;
+               out-ports {
+                       port {
+                               ptm5_out_port: endpoint {
+                                       remote-endpoint = <&funnel1_in_port1>;
+                               };
                        };
                };
        };
                clocks = <&clk_375m>;
                clock-names = "apb_pclk";
                cpu = <&CPU6>;
-               port {
-                       ptm6_out_port: endpoint {
-                               remote-endpoint = <&funnel1_in_port2>;
+               out-ports {
+                       port {
+                               ptm6_out_port: endpoint {
+                                       remote-endpoint = <&funnel1_in_port2>;
+                               };
                        };
                };
        };
                clocks = <&clk_375m>;
                clock-names = "apb_pclk";
                cpu = <&CPU7>;
-               port {
-                       ptm7_out_port: endpoint {
-                               remote-endpoint = <&funnel1_in_port3>;
+               out-ports {
+                       port {
+                               ptm7_out_port: endpoint {
+                                       remote-endpoint = <&funnel1_in_port3>;
+                               };
                        };
                };
        };
                clocks = <&clk_375m>;
                clock-names = "apb_pclk";
                cpu = <&CPU8>;
-               port {
-                       ptm8_out_port: endpoint {
-                               remote-endpoint = <&funnel2_in_port0>;
+               out-ports {
+                       port {
+                               ptm8_out_port: endpoint {
+                                       remote-endpoint = <&funnel2_in_port0>;
+                               };
                        };
                };
        };
                clocks = <&clk_375m>;
                clock-names = "apb_pclk";
                cpu = <&CPU9>;
-               port {
-                       ptm9_out_port: endpoint {
-                               remote-endpoint = <&funnel2_in_port1>;
+               out-ports {
+                       port {
+                               ptm9_out_port: endpoint {
+                                       remote-endpoint = <&funnel2_in_port1>;
+                               };
                        };
                };
        };
                clocks = <&clk_375m>;
                clock-names = "apb_pclk";
                cpu = <&CPU10>;
-               port {
-                       ptm10_out_port: endpoint {
-                               remote-endpoint = <&funnel2_in_port2>;
+               out-ports {
+                       port {
+                               ptm10_out_port: endpoint {
+                                       remote-endpoint = <&funnel2_in_port2>;
+                               };
                        };
                };
        };
                clocks = <&clk_375m>;
                clock-names = "apb_pclk";
                cpu = <&CPU11>;
-               port {
-                       ptm11_out_port: endpoint {
-                               remote-endpoint = <&funnel2_in_port3>;
+               out-ports {
+                       port {
+                               ptm11_out_port: endpoint {
+                                       remote-endpoint = <&funnel2_in_port3>;
+                               };
                        };
                };
        };
                clocks = <&clk_375m>;
                clock-names = "apb_pclk";
                cpu = <&CPU12>;
-               port {
-                       ptm12_out_port: endpoint {
-                               remote-endpoint = <&funnel3_in_port0>;
+               out-ports {
+                       port {
+                               ptm12_out_port: endpoint {
+                                       remote-endpoint = <&funnel3_in_port0>;
+                               };
                        };
                };
        };
                clocks = <&clk_375m>;
                clock-names = "apb_pclk";
                cpu = <&CPU13>;
-               port {
-                       ptm13_out_port: endpoint {
-                               remote-endpoint = <&funnel3_in_port1>;
+               out-ports {
+                       port {
+                               ptm13_out_port: endpoint {
+                                       remote-endpoint = <&funnel3_in_port1>;
+                               };
                        };
                };
        };
                clocks = <&clk_375m>;
                clock-names = "apb_pclk";
                cpu = <&CPU14>;
-               port {
-