Merge branch 'fixes' of git://git.armlinux.org.uk/~rmk/linux-arm
authorLinus Torvalds <torvalds@linux-foundation.org>
Fri, 20 Oct 2017 22:20:17 +0000 (18:20 -0400)
committerLinus Torvalds <torvalds@linux-foundation.org>
Fri, 20 Oct 2017 22:20:17 +0000 (18:20 -0400)
Pull ARM fixes from Russell King:
 "Three fixes this time around:

   - ensure sparse realises that we're building for a 32-bit arch on
     64-bit hosts.

   - use the correct instruction for semihosting on v7m (nommu) CPUs.

   - reserve address 0 to prevent the first page of memory being used on
     nommu systems"

* 'fixes' of git://git.armlinux.org.uk/~rmk/linux-arm:
  ARM: 8704/1: semihosting: use proper instruction on v7m processors
  ARM: 8701/1: fix sparse flags for build on 64bit machines
  ARM: 8700/1: nommu: always reserve address 0 away

arch/arm/Makefile
arch/arm/boot/compressed/debug.S
arch/arm/kernel/debug.S
arch/arm/mm/nommu.c

index 47d3a1ab08d2491aff178040b309180226d131e8..817e5cfef83a933e8d66bfd62a7c908a1af92f2c 100644 (file)
@@ -131,7 +131,7 @@ endif
 KBUILD_CFLAGS  +=$(CFLAGS_ABI) $(CFLAGS_ISA) $(arch-y) $(tune-y) $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) -msoft-float -Uarm
 KBUILD_AFLAGS  +=$(CFLAGS_ABI) $(AFLAGS_ISA) $(arch-y) $(tune-y) -include asm/unified.h -msoft-float
 
-CHECKFLAGS     += -D__arm__
+CHECKFLAGS     += -D__arm__ -m32
 
 #Default value
 head-y         := arch/arm/kernel/head$(MMUEXT).o
index 5392ee63338fac3453f30b125366e03241158133..8f6e37177de132252c560765440698ac08b69408 100644 (file)
@@ -23,7 +23,11 @@ ENTRY(putc)
        strb    r0, [r1]
        mov     r0, #0x03               @ SYS_WRITEC
    ARM(        svc     #0x123456       )
+#ifdef CONFIG_CPU_V7M
+ THUMB(        bkpt    #0xab           )
+#else
  THUMB(        svc     #0xab           )
+#endif
        mov     pc, lr
        .align  2
 1:     .word   _GLOBAL_OFFSET_TABLE_ - .
index ea9646cc2a0ed7eba2fa4f7f7638c0802642edcc..0a498cb3fad88d046c23073a5d1b7785fdfaf1a7 100644 (file)
@@ -115,7 +115,11 @@ ENTRY(printascii)
                mov     r1, r0
                mov     r0, #0x04               @ SYS_WRITE0
        ARM(    svc     #0x123456       )
+#ifdef CONFIG_CPU_V7M
+       THUMB(  bkpt    #0xab           )
+#else
        THUMB(  svc     #0xab           )
+#endif
                ret     lr
 ENDPROC(printascii)
 
@@ -124,7 +128,11 @@ ENTRY(printch)
                strb    r0, [r1]
                mov     r0, #0x03               @ SYS_WRITEC
        ARM(    svc     #0x123456       )
+#ifdef CONFIG_CPU_V7M
+       THUMB(  bkpt    #0xab           )
+#else
        THUMB(  svc     #0xab           )
+#endif
                ret     lr
 ENDPROC(printch)
 
index 3b8e728cc9443975c6cd66c63350a2074df310b7..91537d90f5f526e4e9135b2b0e5403141172a4cb 100644 (file)
@@ -344,6 +344,11 @@ void __init arm_mm_memblock_reserve(void)
         * reserved here.
         */
 #endif
+       /*
+        * In any case, always ensure address 0 is never used as many things
+        * get very confused if 0 is returned as a legitimate address.
+        */
+       memblock_reserve(0, 1);
 }
 
 void __init adjust_lowmem_bounds(void)