arm64: dts: hisilicon: Source SoC clock for UART6
authorManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Fri, 21 Sep 2018 06:01:02 +0000 (23:01 -0700)
committerWei Xu <xuwei5@hisilicon.com>
Wed, 28 Nov 2018 15:17:50 +0000 (15:17 +0000)
Remove fixed clock and source SoC clock for UART6 for
HiSilicon Hi3670 SoC.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
arch/arm64/boot/dts/hisilicon/hi3670.dtsi

index 8a0ee4b0888690e55d97c196f7f5360367956af6..34a2f0dbc6f7e6e10f72ee7a9b1eb205a0ed5cbc 100644 (file)
                        #clock-cells = <1>;
                };
 
                        #clock-cells = <1>;
                };
 
-               uart6_clk: clk_19_2M {
-                       compatible = "fixed-clock";
-                       #clock-cells = <0>;
-                       clock-frequency = <19200000>;
-               };
-
                uart6: serial@fff32000 {
                        compatible = "arm,pl011", "arm,primecell";
                        reg = <0x0 0xfff32000 0x0 0x1000>;
                        interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
                uart6: serial@fff32000 {
                        compatible = "arm,pl011", "arm,primecell";
                        reg = <0x0 0xfff32000 0x0 0x1000>;
                        interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&uart6_clk &uart6_clk>;
+                       clocks = <&crg_ctrl HI3670_CLK_UART6>,
+                                <&crg_ctrl HI3670_PCLK>;
                        clock-names = "uartclk", "apb_pclk";
                        status = "disabled";
                };
                        clock-names = "uartclk", "apb_pclk";
                        status = "disabled";
                };