spi: a3700: Set frequency limits at startup
authorMaxime Chevallier <maxime.chevallier@smile.fr>
Wed, 17 Jan 2018 16:15:26 +0000 (17:15 +0100)
committerMark Brown <broonie@kernel.org>
Thu, 18 Jan 2018 10:59:18 +0000 (10:59 +0000)
Armada 3700 SPI controller has an internal clock divider which can
divide the parent clock frequency by up to 30.

This patch sets the limits in the spi_controller fields so that we can
detect when a non-supported frequency is requested by a device for a
transfer.

Signed-off-by: Maxime Chevallier <maxime.chevallier@smile.fr>
Signed-off-by: Mark Brown <broonie@kernel.org>
drivers/spi/spi-armada-3700.c

index 4857b01..07f227e 100644 (file)
@@ -27,6 +27,8 @@
 
 #define DRIVER_NAME                    "armada_3700_spi"
 
+#define A3700_SPI_MAX_SPEED_HZ         100000000
+#define A3700_SPI_MAX_PRESCALE         30
 #define A3700_SPI_TIMEOUT              10
 
 /* SPI Register Offest */
@@ -815,6 +817,11 @@ static int a3700_spi_probe(struct platform_device *pdev)
                goto error;
        }
 
+       master->max_speed_hz = min_t(unsigned long, A3700_SPI_MAX_SPEED_HZ,
+                                       clk_get_rate(spi->clk));
+       master->min_speed_hz = DIV_ROUND_UP(clk_get_rate(spi->clk),
+                                               A3700_SPI_MAX_PRESCALE);
+
        ret = a3700_spi_init(spi);
        if (ret)
                goto error_clk;