arm64: dts: clearfog-gt-8k: fix SGMII PHY reset signal
authorBaruch Siach <baruch@tkos.co.il>
Sun, 17 Feb 2019 18:21:40 +0000 (20:21 +0200)
committerGregory CLEMENT <gregory.clement@bootlin.com>
Tue, 19 Feb 2019 15:09:11 +0000 (16:09 +0100)
The PHY reset signal goes to mpp43 on CP0.

Fixes: babc5544c293 ("arm64: dts: clearfog-gt-8k: 1G eth PHY reset signal")
Reported-by: Denis Odintsov <oversun@me.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts

index 5b4a960..2468762 100644 (file)
                reg = <0>;
                pinctrl-names = "default";
                pinctrl-0 = <&cp0_copper_eth_phy_reset>;
                reg = <0>;
                pinctrl-names = "default";
                pinctrl-0 = <&cp0_copper_eth_phy_reset>;
-               reset-gpios = <&cp1_gpio1 11 GPIO_ACTIVE_LOW>;
+               reset-gpios = <&cp0_gpio2 11 GPIO_ACTIVE_LOW>;
                reset-assert-us = <10000>;
        };
 
                reset-assert-us = <10000>;
        };