arm64: dts: hisilicon: Add clock nodes for Hi3670 SoC
authorManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Fri, 21 Sep 2018 06:01:01 +0000 (23:01 -0700)
committerWei Xu <xuwei5@hisilicon.com>
Wed, 28 Nov 2018 14:35:59 +0000 (14:35 +0000)
Add clock nodes for HiSilicon Hi3670 SoC.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
arch/arm64/boot/dts/hisilicon/hi3670.dtsi

index c90e6f6a34ec04880c5f374681319a866476812e..8a0ee4b0888690e55d97c196f7f5360367956af6 100644 (file)
@@ -7,6 +7,7 @@
  */
 
 #include <dt-bindings/interrupt-controller/arm-gic.h>
  */
 
 #include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/clock/hi3670-clock.h>
 
 / {
        compatible = "hisilicon,hi3670";
 
 / {
        compatible = "hisilicon,hi3670";
                #size-cells = <2>;
                ranges;
 
                #size-cells = <2>;
                ranges;
 
+               crg_ctrl: crg_ctrl@fff35000 {
+                       compatible = "hisilicon,hi3670-crgctrl", "syscon";
+                       reg = <0x0 0xfff35000 0x0 0x1000>;
+                       #clock-cells = <1>;
+               };
+
+               pctrl: pctrl@e8a09000 {
+                       compatible = "hisilicon,hi3670-pctrl", "syscon";
+                       reg = <0x0 0xe8a09000 0x0 0x1000>;
+                       #clock-cells = <1>;
+               };
+
+               pmuctrl: crg_ctrl@fff34000 {
+                       compatible = "hisilicon,hi3670-pmuctrl", "syscon";
+                       reg = <0x0 0xfff34000 0x0 0x1000>;
+                       #clock-cells = <1>;
+               };
+
+               sctrl: sctrl@fff0a000 {
+                       compatible = "hisilicon,hi3670-sctrl", "syscon";
+                       reg = <0x0 0xfff0a000 0x0 0x1000>;
+                       #clock-cells = <1>;
+               };
+
+               iomcu: iomcu@ffd7e000 {
+                       compatible = "hisilicon,hi3670-iomcu", "syscon";
+                       reg = <0x0 0xffd7e000 0x0 0x1000>;
+                       #clock-cells = <1>;
+               };
+
+               media1_crg: media1_crgctrl@e87ff000 {
+                       compatible = "hisilicon,hi3670-media1-crg", "syscon";
+                       reg = <0x0 0xe87ff000 0x0 0x1000>;
+                       #clock-cells = <1>;
+               };
+
+               media2_crg: media2_crgctrl@e8900000 {
+                       compatible = "hisilicon,hi3670-media2-crg","syscon";
+                       reg = <0x0 0xe8900000 0x0 0x1000>;
+                       #clock-cells = <1>;
+               };
+
                uart6_clk: clk_19_2M {
                        compatible = "fixed-clock";
                        #clock-cells = <0>;
                uart6_clk: clk_19_2M {
                        compatible = "fixed-clock";
                        #clock-cells = <0>;