Merge tag 'v4.18-rockchip-drivers-2' of git://git.kernel.org/pub/scm/linux/kernel...
authorOlof Johansson <olof@lixom.net>
Fri, 25 May 2018 21:57:10 +0000 (14:57 -0700)
committerOlof Johansson <olof@lixom.net>
Fri, 25 May 2018 21:57:10 +0000 (14:57 -0700)
Power-domain support for Rockchip socs px30, rk3128, rk3228 and rk3036.

* tag 'v4.18-rockchip-drivers-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  soc: rockchip: power-domain: add power domain support for px30
  dt-bindings: power: add binding for px30 power domains
  dt-bindings: power: add PX30 SoCs header for power-domain
  soc: rockchip: power-domain: add power domain support for rk3228
  dt-bindings: power: add binding for rk3228 power domains
  dt-bindings: power: add RK3228 SoCs header for power-domain
  soc: rockchip: power-domain: add power domain support for rk3128
  dt-bindings: power: add binding for rk3128 power domains
  dt-bindings: power: add RK3128 SoCs header for power-domain
  soc: rockchip: power-domain: add power domain support for rk3036
  dt-bindings: power: add binding for rk3036 power domains
  dt-bindings: power: add RK3036 SoCs header for power-domain

Signed-off-by: Olof Johansson <olof@lixom.net>
Documentation/devicetree/bindings/soc/rockchip/power_domain.txt
drivers/soc/rockchip/pm_domains.c
include/dt-bindings/power/px30-power.h [new file with mode: 0644]
include/dt-bindings/power/rk3036-power.h [new file with mode: 0644]
include/dt-bindings/power/rk3128-power.h [new file with mode: 0644]
include/dt-bindings/power/rk3228-power.h [new file with mode: 0644]

index 301d2a9bc1b8bb2ab0e213e6656b03691c2c71e8..5d49d0a2ff29df92201d62f1171eeaec5e5f9d22 100644 (file)
@@ -5,6 +5,10 @@ powered up/down by software based on different application scenes to save power.
 
 Required properties for power domain controller:
 - compatible: Should be one of the following.
+       "rockchip,px30-power-controller" - for PX30 SoCs.
+       "rockchip,rk3036-power-controller" - for RK3036 SoCs.
+       "rockchip,rk3128-power-controller" - for RK3128 SoCs.
+       "rockchip,rk3228-power-controller" - for RK3228 SoCs.
        "rockchip,rk3288-power-controller" - for RK3288 SoCs.
        "rockchip,rk3328-power-controller" - for RK3328 SoCs.
        "rockchip,rk3366-power-controller" - for RK3366 SoCs.
@@ -17,6 +21,10 @@ Required properties for power domain controller:
 
 Required properties for power domain sub nodes:
 - reg: index of the power domain, should use macros in:
+       "include/dt-bindings/power/px30-power.h" - for PX30 type power domain.
+       "include/dt-bindings/power/rk3036-power.h" - for RK3036 type power domain.
+       "include/dt-bindings/power/rk3128-power.h" - for RK3128 type power domain.
+       "include/dt-bindings/power/rk3228-power.h" - for RK3228 type power domain.
        "include/dt-bindings/power/rk3288-power.h" - for RK3288 type power domain.
        "include/dt-bindings/power/rk3328-power.h" - for RK3328 type power domain.
        "include/dt-bindings/power/rk3366-power.h" - for RK3366 type power domain.
@@ -93,6 +101,10 @@ Node of a device using power domains must have a power-domains property,
 containing a phandle to the power device node and an index specifying which
 power domain to use.
 The index should use macros in:
+       "include/dt-bindings/power/px30-power.h" - for px30 type power domain.
+       "include/dt-bindings/power/rk3036-power.h" - for rk3036 type power domain.
+       "include/dt-bindings/power/rk3128-power.h" - for rk3128 type power domain.
+       "include/dt-bindings/power/rk3128-power.h" - for rk3228 type power domain.
        "include/dt-bindings/power/rk3288-power.h" - for rk3288 type power domain.
        "include/dt-bindings/power/rk3328-power.h" - for rk3328 type power domain.
        "include/dt-bindings/power/rk3366-power.h" - for rk3366 type power domain.
index df7f30a425c6f3e032ce68ee25a73fb2f7dc4ba3..09a34e3a9375f37608cce21cbf35e5f406d143fc 100644 (file)
 #include <linux/clk.h>
 #include <linux/regmap.h>
 #include <linux/mfd/syscon.h>
+#include <dt-bindings/power/px30-power.h>
+#include <dt-bindings/power/rk3036-power.h>
+#include <dt-bindings/power/rk3128-power.h>
+#include <dt-bindings/power/rk3228-power.h>
 #include <dt-bindings/power/rk3288-power.h>
 #include <dt-bindings/power/rk3328-power.h>
 #include <dt-bindings/power/rk3366-power.h>
@@ -103,6 +107,18 @@ struct rockchip_pmu {
        .active_wakeup = wakeup,                        \
 }
 
+#define DOMAIN_RK3036(req, ack, idle, wakeup)          \
+{                                                      \
+       .req_mask = (req >= 0) ? BIT(req) : 0,          \
+       .req_w_mask = (req >= 0) ?  BIT(req + 16) : 0,  \
+       .ack_mask = (ack >= 0) ? BIT(ack) : 0,          \
+       .idle_mask = (idle >= 0) ? BIT(idle) : 0,       \
+       .active_wakeup = wakeup,                        \
+}
+
+#define DOMAIN_PX30(pwr, status, req, wakeup)          \
+       DOMAIN_M(pwr, status, req, (req) + 16, req, wakeup)
+
 #define DOMAIN_RK3288(pwr, status, req, wakeup)                \
        DOMAIN(pwr, status, req, req, (req) + 16, wakeup)
 
@@ -701,6 +717,49 @@ err_out:
        return error;
 }
 
+static const struct rockchip_domain_info px30_pm_domains[] = {
+       [PX30_PD_USB]           = DOMAIN_PX30(5, 5, 10, false),
+       [PX30_PD_SDCARD]        = DOMAIN_PX30(8, 8, 9, false),
+       [PX30_PD_GMAC]          = DOMAIN_PX30(10, 10, 6, false),
+       [PX30_PD_MMC_NAND]      = DOMAIN_PX30(11, 11, 5, false),
+       [PX30_PD_VPU]           = DOMAIN_PX30(12, 12, 14, false),
+       [PX30_PD_VO]            = DOMAIN_PX30(13, 13, 7, false),
+       [PX30_PD_VI]            = DOMAIN_PX30(14, 14, 8, false),
+       [PX30_PD_GPU]           = DOMAIN_PX30(15, 15, 2, false),
+};
+
+static const struct rockchip_domain_info rk3036_pm_domains[] = {
+       [RK3036_PD_MSCH]        = DOMAIN_RK3036(14, 23, 30, true),
+       [RK3036_PD_CORE]        = DOMAIN_RK3036(13, 17, 24, false),
+       [RK3036_PD_PERI]        = DOMAIN_RK3036(12, 18, 25, false),
+       [RK3036_PD_VIO]         = DOMAIN_RK3036(11, 19, 26, false),
+       [RK3036_PD_VPU]         = DOMAIN_RK3036(10, 20, 27, false),
+       [RK3036_PD_GPU]         = DOMAIN_RK3036(9, 21, 28, false),
+       [RK3036_PD_SYS]         = DOMAIN_RK3036(8, 22, 29, false),
+};
+
+static const struct rockchip_domain_info rk3128_pm_domains[] = {
+       [RK3128_PD_CORE]        = DOMAIN_RK3288(0, 0, 4, false),
+       [RK3128_PD_MSCH]        = DOMAIN_RK3288(-1, -1, 6, true),
+       [RK3128_PD_VIO]         = DOMAIN_RK3288(3, 3, 2, false),
+       [RK3128_PD_VIDEO]       = DOMAIN_RK3288(2, 2, 1, false),
+       [RK3128_PD_GPU]         = DOMAIN_RK3288(1, 1, 3, false),
+};
+
+static const struct rockchip_domain_info rk3228_pm_domains[] = {
+       [RK3228_PD_CORE]        = DOMAIN_RK3036(0, 0, 16, true),
+       [RK3228_PD_MSCH]        = DOMAIN_RK3036(1, 1, 17, true),
+       [RK3228_PD_BUS]         = DOMAIN_RK3036(2, 2, 18, true),
+       [RK3228_PD_SYS]         = DOMAIN_RK3036(3, 3, 19, true),
+       [RK3228_PD_VIO]         = DOMAIN_RK3036(4, 4, 20, false),
+       [RK3228_PD_VOP]         = DOMAIN_RK3036(5, 5, 21, false),
+       [RK3228_PD_VPU]         = DOMAIN_RK3036(6, 6, 22, false),
+       [RK3228_PD_RKVDEC]      = DOMAIN_RK3036(7, 7, 23, false),
+       [RK3228_PD_GPU]         = DOMAIN_RK3036(8, 8, 24, false),
+       [RK3228_PD_PERI]        = DOMAIN_RK3036(9, 9, 25, true),
+       [RK3228_PD_GMAC]        = DOMAIN_RK3036(10, 10, 26, false),
+};
+
 static const struct rockchip_domain_info rk3288_pm_domains[] = {
        [RK3288_PD_VIO]         = DOMAIN_RK3288(7, 7, 4, false),
        [RK3288_PD_HEVC]        = DOMAIN_RK3288(14, 10, 9, false),
@@ -768,6 +827,46 @@ static const struct rockchip_domain_info rk3399_pm_domains[] = {
        [RK3399_PD_SDIOAUDIO]   = DOMAIN_RK3399(31, 31, 29, true),
 };
 
+static const struct rockchip_pmu_info px30_pmu = {
+       .pwr_offset = 0x18,
+       .status_offset = 0x20,
+       .req_offset = 0x64,
+       .idle_offset = 0x6c,
+       .ack_offset = 0x6c,
+
+       .num_domains = ARRAY_SIZE(px30_pm_domains),
+       .domain_info = px30_pm_domains,
+};
+
+static const struct rockchip_pmu_info rk3036_pmu = {
+       .req_offset = 0x148,
+       .idle_offset = 0x14c,
+       .ack_offset = 0x14c,
+
+       .num_domains = ARRAY_SIZE(rk3036_pm_domains),
+       .domain_info = rk3036_pm_domains,
+};
+
+static const struct rockchip_pmu_info rk3128_pmu = {
+       .pwr_offset = 0x04,
+       .status_offset = 0x08,
+       .req_offset = 0x0c,
+       .idle_offset = 0x10,
+       .ack_offset = 0x10,
+
+       .num_domains = ARRAY_SIZE(rk3128_pm_domains),
+       .domain_info = rk3128_pm_domains,
+};
+
+static const struct rockchip_pmu_info rk3228_pmu = {
+       .req_offset = 0x40c,
+       .idle_offset = 0x488,
+       .ack_offset = 0x488,
+
+       .num_domains = ARRAY_SIZE(rk3228_pm_domains),
+       .domain_info = rk3228_pm_domains,
+};
+
 static const struct rockchip_pmu_info rk3288_pmu = {
        .pwr_offset = 0x08,
        .status_offset = 0x0c,
@@ -842,6 +941,22 @@ static const struct rockchip_pmu_info rk3399_pmu = {
 };
 
 static const struct of_device_id rockchip_pm_domain_dt_match[] = {
+       {
+               .compatible = "rockchip,px30-power-controller",
+               .data = (void *)&px30_pmu,
+       },
+       {
+               .compatible = "rockchip,rk3036-power-controller",
+               .data = (void *)&rk3036_pmu,
+       },
+       {
+               .compatible = "rockchip,rk3128-power-controller",
+               .data = (void *)&rk3128_pmu,
+       },
+       {
+               .compatible = "rockchip,rk3228-power-controller",
+               .data = (void *)&rk3228_pmu,
+       },
        {
                .compatible = "rockchip,rk3288-power-controller",
                .data = (void *)&rk3288_pmu,
diff --git a/include/dt-bindings/power/px30-power.h b/include/dt-bindings/power/px30-power.h
new file mode 100644 (file)
index 0000000..30917a9
--- /dev/null
@@ -0,0 +1,27 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef __DT_BINDINGS_POWER_PX30_POWER_H__
+#define __DT_BINDINGS_POWER_PX30_POWER_H__
+
+/* VD_CORE */
+#define PX30_PD_A35_0          0
+#define PX30_PD_A35_1          1
+#define PX30_PD_A35_2          2
+#define PX30_PD_A35_3          3
+#define PX30_PD_SCU            4
+
+/* VD_LOGIC */
+#define PX30_PD_USB            5
+#define PX30_PD_DDR            6
+#define PX30_PD_SDCARD         7
+#define PX30_PD_CRYPTO         8
+#define PX30_PD_GMAC           9
+#define PX30_PD_MMC_NAND       10
+#define PX30_PD_VPU            11
+#define PX30_PD_VO             12
+#define PX30_PD_VI             13
+#define PX30_PD_GPU            14
+
+/* VD_PMU */
+#define PX30_PD_PMU            15
+
+#endif
diff --git a/include/dt-bindings/power/rk3036-power.h b/include/dt-bindings/power/rk3036-power.h
new file mode 100644 (file)
index 0000000..0bc6b5d
--- /dev/null
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef __DT_BINDINGS_POWER_RK3036_POWER_H__
+#define __DT_BINDINGS_POWER_RK3036_POWER_H__
+
+#define RK3036_PD_MSCH         0
+#define RK3036_PD_CORE         1
+#define RK3036_PD_PERI         2
+#define RK3036_PD_VIO          3
+#define RK3036_PD_VPU          4
+#define RK3036_PD_GPU          5
+#define RK3036_PD_SYS          6
+
+#endif
diff --git a/include/dt-bindings/power/rk3128-power.h b/include/dt-bindings/power/rk3128-power.h
new file mode 100644 (file)
index 0000000..c051dc3
--- /dev/null
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef __DT_BINDINGS_POWER_RK3128_POWER_H__
+#define __DT_BINDINGS_POWER_RK3128_POWER_H__
+
+/* VD_CORE */
+#define RK3128_PD_CORE         0
+
+/* VD_LOGIC */
+#define RK3128_PD_VIO          1
+#define RK3128_PD_VIDEO                2
+#define RK3128_PD_GPU          3
+#define RK3128_PD_MSCH         4
+
+#endif
diff --git a/include/dt-bindings/power/rk3228-power.h b/include/dt-bindings/power/rk3228-power.h
new file mode 100644 (file)
index 0000000..6a8dc1b
--- /dev/null
@@ -0,0 +1,21 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef __DT_BINDINGS_POWER_RK3228_POWER_H__
+#define __DT_BINDINGS_POWER_RK3228_POWER_H__
+
+/**
+ * RK3228 idle id Summary.
+ */
+
+#define RK3228_PD_CORE         0
+#define RK3228_PD_MSCH         1
+#define RK3228_PD_BUS          2
+#define RK3228_PD_SYS          3
+#define RK3228_PD_VIO          4
+#define RK3228_PD_VOP          5
+#define RK3228_PD_VPU          6
+#define RK3228_PD_RKVDEC       7
+#define RK3228_PD_GPU          8
+#define RK3228_PD_PERI         9
+#define RK3228_PD_GMAC         10
+
+#endif