drm/amdgpu: Add copy_pte_num_dw member in amdgpu_vm_pte_funcs
authorYong Zhao <yong.zhao@amd.com>
Tue, 19 Sep 2017 16:58:15 +0000 (12:58 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 26 Sep 2017 19:14:22 +0000 (15:14 -0400)
Use it to replace the hard coded value in amdgpu_vm_bo_update_mapping().

Signed-off-by: Yong Zhao <yong.zhao@amd.com>
Reviewed-by: Christian K├Ânig <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu.h
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
drivers/gpu/drm/amd/amdgpu/cik_sdma.c
drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c
drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
drivers/gpu/drm/amd/amdgpu/si_dma.c

index 1bf42a8..7c43add 100644 (file)
@@ -294,10 +294,14 @@ struct amdgpu_buffer_funcs {
 
 /* provided by hw blocks that can write ptes, e.g., sdma */
 struct amdgpu_vm_pte_funcs {
+       /* number of dw to reserve per operation */
+       unsigned        copy_pte_num_dw;
+
        /* copy pte entries from GART */
        void (*copy_pte)(struct amdgpu_ib *ib,
                         uint64_t pe, uint64_t src,
                         unsigned count);
+
        /* write pte one entry at a time with addr mapping */
        void (*write_pte)(struct amdgpu_ib *ib, uint64_t pe,
                          uint64_t value, unsigned count,
index 28d1678..8fcc743 100644 (file)
@@ -1597,7 +1597,7 @@ static int amdgpu_vm_bo_update_mapping(struct amdgpu_device *adev,
 
        if (pages_addr) {
                /* copy commands needed */
-               ndw += ncmds * 7;
+               ndw += ncmds * adev->vm_manager.vm_pte_funcs->copy_pte_num_dw;
 
                /* and also PTEs */
                ndw += nptes * 2;
index c64dcd1..60cecd1 100644 (file)
@@ -1387,7 +1387,9 @@ static void cik_sdma_set_buffer_funcs(struct amdgpu_device *adev)
 }
 
 static const struct amdgpu_vm_pte_funcs cik_sdma_vm_pte_funcs = {
+       .copy_pte_num_dw = 7,
        .copy_pte = cik_sdma_vm_copy_pte,
+
        .write_pte = cik_sdma_vm_write_pte,
 
        .set_max_nums_pte_pde = 0x1fffff >> 3,
index c05eb74..acdee3a 100644 (file)
@@ -1324,7 +1324,9 @@ static void sdma_v2_4_set_buffer_funcs(struct amdgpu_device *adev)
 }
 
 static const struct amdgpu_vm_pte_funcs sdma_v2_4_vm_pte_funcs = {
+       .copy_pte_num_dw = 7,
        .copy_pte = sdma_v2_4_vm_copy_pte,
+
        .write_pte = sdma_v2_4_vm_write_pte,
 
        .set_max_nums_pte_pde = 0x1fffff >> 3,
index 2079340..72f31cc 100644 (file)
@@ -1748,7 +1748,9 @@ static void sdma_v3_0_set_buffer_funcs(struct amdgpu_device *adev)
 }
 
 static const struct amdgpu_vm_pte_funcs sdma_v3_0_vm_pte_funcs = {
+       .copy_pte_num_dw = 7,
        .copy_pte = sdma_v3_0_vm_copy_pte,
+
        .write_pte = sdma_v3_0_vm_write_pte,
 
        /* not 0x3fffff due to HW limitation */
index 2605faf..61572c5 100644 (file)
@@ -1714,7 +1714,9 @@ static void sdma_v4_0_set_buffer_funcs(struct amdgpu_device *adev)
 }
 
 static const struct amdgpu_vm_pte_funcs sdma_v4_0_vm_pte_funcs = {
+       .copy_pte_num_dw = 7,
        .copy_pte = sdma_v4_0_vm_copy_pte,
+
        .write_pte = sdma_v4_0_vm_write_pte,
 
        .set_max_nums_pte_pde = 0x400000 >> 3,
index adb6ae7..3fa2fbf 100644 (file)
@@ -887,7 +887,9 @@ static void si_dma_set_buffer_funcs(struct amdgpu_device *adev)
 }
 
 static const struct amdgpu_vm_pte_funcs si_dma_vm_pte_funcs = {
+       .copy_pte_num_dw = 5,
        .copy_pte = si_dma_vm_copy_pte,
+
        .write_pte = si_dma_vm_write_pte,
 
        .set_max_nums_pte_pde = 0xffff8 >> 3,