Merge tag 'am654-for-v4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/kristo...
authorOlof Johansson <olof@lixom.net>
Sun, 23 Sep 2018 13:31:04 +0000 (06:31 -0700)
committerOlof Johansson <olof@lixom.net>
Sun, 23 Sep 2018 13:31:04 +0000 (06:31 -0700)
TI AM654 support for v4.20 merge window.

This branch adds changes for the Texas Instruments AM654 SoC. Included
changes are:
- Add uart nodes
- Change address cells and size-cells of interconnect tfrom 1 to 2
- Add secure proxy instance for main domain
- Add DMSC support

* tag 'am654-for-v4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/kristo/linux:
  arm64: dts: ti: k3-am6: Add Device Management Security Controller support
  arm64: dts: ti: am654: Add secure proxy instance for main domain
  arm64: dts: ti: am654: Add uart nodes
  arm64: dts: ti: k3-am65: Change #address-cells and #size-cells of interconnect to 2

Signed-off-by: Olof Johansson <olof@lixom.net>
arch/arm64/boot/dts/ti/k3-am65-main.dtsi
arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi [new file with mode: 0644]
arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi [new file with mode: 0644]
arch/arm64/boot/dts/ti/k3-am65.dtsi
arch/arm64/boot/dts/ti/k3-am654-base-board.dts

index 2409344df4fa2f50ee9e91feddc483e0a4a10279..adcd6341e40c02aabef992516a075eb2a14245a8 100644 (file)
@@ -8,13 +8,13 @@
 &cbass_main {
        gic500: interrupt-controller@1800000 {
                compatible = "arm,gic-v3";
-               #address-cells = <1>;
-               #size-cells = <1>;
+               #address-cells = <2>;
+               #size-cells = <2>;
                ranges;
                #interrupt-cells = <3>;
                interrupt-controller;
-               reg = <0x01800000 0x10000>,     /* GICD */
-                     <0x01880000 0x90000>;     /* GICR */
+               reg = <0x00 0x01800000 0x00 0x10000>,   /* GICD */
+                     <0x00 0x01880000 0x00 0x90000>;   /* GICR */
                /*
                 * vcpumntirq:
                 * virtual CPU interface maintenance interrupt
 
                gic_its: gic-its@18200000 {
                        compatible = "arm,gic-v3-its";
-                       reg = <0x01820000 0x10000>;
+                       reg = <0x00 0x01820000 0x00 0x10000>;
                        msi-controller;
                        #msi-cells = <1>;
                };
        };
+
+       secure_proxy_main: mailbox@32c00000 {
+               compatible = "ti,am654-secure-proxy";
+               #mbox-cells = <1>;
+               reg-names = "target_data", "rt", "scfg";
+               reg = <0x00 0x32c00000 0x00 0x100000>,
+                     <0x00 0x32400000 0x00 0x100000>,
+                     <0x00 0x32800000 0x00 0x100000>;
+               interrupt-names = "rx_011";
+               interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+       };
+
+       main_uart0: serial@2800000 {
+               compatible = "ti,am654-uart";
+               reg = <0x00 0x02800000 0x00 0x100>;
+               reg-shift = <2>;
+               reg-io-width = <4>;
+               interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
+               clock-frequency = <48000000>;
+               current-speed = <115200>;
+       };
+
+       main_uart1: serial@2810000 {
+               compatible = "ti,am654-uart";
+               reg = <0x00 0x02810000 0x00 0x100>;
+               reg-shift = <2>;
+               reg-io-width = <4>;
+               interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
+               clock-frequency = <48000000>;
+               current-speed = <115200>;
+       };
+
+       main_uart2: serial@2820000 {
+               compatible = "ti,am654-uart";
+               reg = <0x00 0x02820000 0x00 0x100>;
+               reg-shift = <2>;
+               reg-io-width = <4>;
+               interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>;
+               clock-frequency = <48000000>;
+               current-speed = <115200>;
+       };
 };
diff --git a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi
new file mode 100644 (file)
index 0000000..8c611d1
--- /dev/null
@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source for AM6 SoC Family MCU Domain peripherals
+ *
+ * Copyright (C) 2016-2018 Texas Instruments Incorporated - http://www.ti.com/
+ */
+
+&cbass_mcu {
+       mcu_uart0: serial@40a00000 {
+               compatible = "ti,am654-uart";
+                       reg = <0x00 0x40a00000 0x00 0x100>;
+                       reg-shift = <2>;
+                       reg-io-width = <4>;
+                       interrupts = <GIC_SPI 565 IRQ_TYPE_LEVEL_HIGH>;
+                       clock-frequency = <96000000>;
+                       current-speed = <115200>;
+       };
+};
diff --git a/arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi
new file mode 100644 (file)
index 0000000..affc3c3
--- /dev/null
@@ -0,0 +1,46 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source for AM6 SoC Family Wakeup Domain peripherals
+ *
+ * Copyright (C) 2016-2018 Texas Instruments Incorporated - http://www.ti.com/
+ */
+
+&cbass_wakeup {
+       dmsc: dmsc {
+               compatible = "ti,k2g-sci";
+               ti,host-id = <12>;
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges;
+
+               mbox-names = "rx", "tx";
+
+               mboxes= <&secure_proxy_main 11>,
+                       <&secure_proxy_main 13>;
+
+               k3_pds: power-controller {
+                       compatible = "ti,sci-pm-domain";
+                       #power-domain-cells = <1>;
+               };
+
+               k3_clks: clocks {
+                       compatible = "ti,k2g-sci-clk";
+                       #clock-cells = <2>;
+               };
+
+               k3_reset: reset-controller {
+                       compatible = "ti,sci-reset";
+                       #reset-cells = <2>;
+               };
+       };
+
+       wkup_uart0: serial@42300000 {
+               compatible = "ti,am654-uart";
+               reg = <0x00 0x42300000 0x00 0x100>;
+               reg-shift = <2>;
+               reg-io-width = <4>;
+               interrupts = <GIC_SPI 697 IRQ_TYPE_LEVEL_HIGH>;
+               clock-frequency = <48000000>;
+               current-speed = <115200>;
+       };
+};
index cede1fa0983c9321511649251cff09c1cdaa4e63..3d4bf369d0304a3afb8bcb43e18ca1eeb2648413 100644 (file)
        #address-cells = <2>;
        #size-cells = <2>;
 
+       aliases {
+               serial0 = &wkup_uart0;
+               serial1 = &mcu_uart0;
+               serial2 = &main_uart0;
+               serial3 = &main_uart1;
+               serial4 = &main_uart2;
+       };
+
        chosen { };
 
        firmware {
 
        cbass_main: interconnect@100000 {
                compatible = "simple-bus";
-               #address-cells = <1>;
-               #size-cells = <1>;
-               ranges = <0x00100000 0x00 0x00100000 0x00020000>, /* ctrl mmr */
-                        <0x00600000 0x00 0x00600000 0x00001100>, /* GPIO */
-                        <0x00900000 0x00 0x00900000 0x00012000>, /* serdes */
-                        <0x01000000 0x00 0x01000000 0x0af02400>, /* Most peripherals */
-                        <0x30800000 0x00 0x30800000 0x0bc00000>, /* MAIN NAVSS */
+               #address-cells = <2>;
+               #size-cells = <2>;
+               ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */
+                        <0x00 0x00600000 0x00 0x00600000 0x00 0x00001100>, /* GPIO */
+                        <0x00 0x00900000 0x00 0x00900000 0x00 0x00012000>, /* serdes */
+                        <0x00 0x01000000 0x00 0x01000000 0x00 0x0af02400>, /* Most peripherals */
+                        <0x00 0x30800000 0x00 0x30800000 0x00 0x0bc00000>, /* MAIN NAVSS */
                         /* MCUSS Range */
-                        <0x28380000 0x00 0x28380000 0x03880000>,
-                        <0x40200000 0x00 0x40200000 0x00900100>,
-                        <0x42040000 0x00 0x42040000 0x03ac2400>,
-                        <0x45100000 0x00 0x45100000 0x00c24000>,
-                        <0x46000000 0x00 0x46000000 0x00200000>,
-                        <0x47000000 0x00 0x47000000 0x00068400>;
+                        <0x00 0x28380000 0x00 0x28380000 0x00 0x03880000>,
+                        <0x00 0x40200000 0x00 0x40200000 0x00 0x00900100>,
+                        <0x00 0x42040000 0x00 0x42040000 0x00 0x03ac2400>,
+                        <0x00 0x45100000 0x00 0x45100000 0x00 0x00c24000>,
+                        <0x00 0x46000000 0x00 0x46000000 0x00 0x00200000>,
+                        <0x00 0x47000000 0x00 0x47000000 0x00 0x00068400>;
 
                cbass_mcu: interconnect@28380000 {
                        compatible = "simple-bus";
-                       #address-cells = <1>;
-                       #size-cells = <1>;
-                       ranges = <0x28380000 0x28380000 0x03880000>, /* MCU NAVSS*/
-                                <0x40200000 0x40200000 0x00900100>, /* First peripheral window */
-                                <0x42040000 0x42040000 0x03ac2400>, /* WKUP */
-                                <0x45100000 0x45100000 0x00c24000>, /* MMRs, remaining NAVSS */
-                                <0x46000000 0x46000000 0x00200000>, /* CPSW */
-                                <0x47000000 0x47000000 0x00068400>; /* OSPI space 1 */
+                       #address-cells = <2>;
+                       #size-cells = <2>;
+                       ranges = <0x00 0x28380000 0x00 0x28380000 0x00 0x03880000>, /* MCU NAVSS*/
+                                <0x00 0x40200000 0x00 0x40200000 0x00 0x00900100>, /* First peripheral window */
+                                <0x00 0x42040000 0x00 0x42040000 0x00 0x03ac2400>, /* WKUP */
+                                <0x00 0x45100000 0x00 0x45100000 0x00 0x00c24000>, /* MMRs, remaining NAVSS */
+                                <0x00 0x46000000 0x00 0x46000000 0x00 0x00200000>, /* CPSW */
+                                <0x00 0x47000000 0x00 0x47000000 0x00 0x00068400>; /* OSPI space 1 */
 
                        cbass_wakeup: interconnect@42040000 {
                                compatible = "simple-bus";
                                #address-cells = <1>;
                                #size-cells = <1>;
                                /* WKUP  Basic peripherals */
-                               ranges = <0x42040000 0x42040000 0x03ac2400>;
+                               ranges = <0x42040000 0x00 0x42040000 0x03ac2400>;
                        };
                };
        };
@@ -85,3 +93,5 @@
 
 /* Now include the peripherals for each bus segments */
 #include "k3-am65-main.dtsi"
+#include "k3-am65-mcu.dtsi"
+#include "k3-am65-wakeup.dtsi"
index af6956fdc13f49662c47e2750b4296b843851a2e..e146ac2ad781b1f27ad0787f9f6a7b06b0f1a805 100644 (file)
@@ -34,3 +34,8 @@
                };
        };
 };
+
+&wkup_uart0 {
+       /* Wakeup UART is used by System firmware */
+       status = "disabled";
+};