Merge ath-next from git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/ath.git
authorKalle Valo <kvalo@codeaurora.org>
Fri, 19 May 2017 08:47:44 +0000 (11:47 +0300)
committerKalle Valo <kvalo@codeaurora.org>
Fri, 19 May 2017 08:47:44 +0000 (11:47 +0300)
ath.git patches for 4.13. Major changes:

ath10k

* add initial SDIO support (still work in progress)

22 files changed:
drivers/net/wireless/ath/ath10k/Kconfig
drivers/net/wireless/ath/ath10k/Makefile
drivers/net/wireless/ath/ath10k/bmi.c
drivers/net/wireless/ath/ath10k/bmi.h
drivers/net/wireless/ath/ath10k/core.c
drivers/net/wireless/ath/ath10k/core.h
drivers/net/wireless/ath/ath10k/debug.c
drivers/net/wireless/ath/ath10k/debug.h
drivers/net/wireless/ath/ath10k/htc.c
drivers/net/wireless/ath/ath10k/htc.h
drivers/net/wireless/ath/ath10k/hw.h
drivers/net/wireless/ath/ath10k/sdio.c [new file with mode: 0644]
drivers/net/wireless/ath/ath10k/sdio.h [new file with mode: 0644]
drivers/net/wireless/ath/ath10k/targaddrs.h
drivers/net/wireless/ath/ath10k/testmode.c
drivers/net/wireless/ath/ath10k/testmode_i.h
drivers/net/wireless/ath/ath5k/debug.c
drivers/net/wireless/ath/ath6kl/txrx.c
drivers/net/wireless/ath/ath9k/common.c
drivers/net/wireless/ath/ath9k/eeprom.c
drivers/net/wireless/ath/ath9k/tx99.c
drivers/net/wireless/ath/wil6210/debugfs.c

index b4241cf..412eb13 100644 (file)
@@ -22,6 +22,13 @@ config ATH10K_AHB
        ---help---
          This module adds support for AHB bus
 
+config ATH10K_SDIO
+       tristate "Atheros ath10k SDIO support (EXPERIMENTAL)"
+       depends on ATH10K && MMC
+       ---help---
+         This module adds experimental support for SDIO/MMC bus. Currently
+         work in progress and will not fully work.
+
 config ATH10K_DEBUG
        bool "Atheros ath10k debugging"
        depends on ATH10K
index 930fadd..b0b19a7 100644 (file)
@@ -27,5 +27,8 @@ ath10k_pci-y += pci.o \
 
 ath10k_pci-$(CONFIG_ATH10K_AHB) += ahb.o
 
+obj-$(CONFIG_ATH10K_SDIO) += ath10k_sdio.o
+ath10k_sdio-y += sdio.o
+
 # for tracing framework to find trace.h
 CFLAGS_trace.o := -I$(src)
index abeee20..2d3a2f3 100644 (file)
@@ -97,6 +97,77 @@ int ath10k_bmi_get_target_info(struct ath10k *ar,
        return 0;
 }
 
+#define TARGET_VERSION_SENTINAL 0xffffffffu
+
+int ath10k_bmi_get_target_info_sdio(struct ath10k *ar,
+                                   struct bmi_target_info *target_info)
+{
+       struct bmi_cmd cmd;
+       union bmi_resp resp;
+       u32 cmdlen = sizeof(cmd.id) + sizeof(cmd.get_target_info);
+       u32 resplen, ver_len;
+       __le32 tmp;
+       int ret;
+
+       ath10k_dbg(ar, ATH10K_DBG_BMI, "bmi get target info SDIO\n");
+
+       if (ar->bmi.done_sent) {
+               ath10k_warn(ar, "BMI Get Target Info Command disallowed\n");
+               return -EBUSY;
+       }
+
+       cmd.id = __cpu_to_le32(BMI_GET_TARGET_INFO);
+
+       /* Step 1: Read 4 bytes of the target info and check if it is
+        * the special sentinal version word or the first word in the
+        * version response.
+        */
+       resplen = sizeof(u32);
+       ret = ath10k_hif_exchange_bmi_msg(ar, &cmd, cmdlen, &tmp, &resplen);
+       if (ret) {
+               ath10k_warn(ar, "unable to read from device\n");
+               return ret;
+       }
+
+       /* Some SDIO boards have a special sentinal byte before the real
+        * version response.
+        */
+       if (__le32_to_cpu(tmp) == TARGET_VERSION_SENTINAL) {
+               /* Step 1b: Read the version length */
+               resplen = sizeof(u32);
+               ret = ath10k_hif_exchange_bmi_msg(ar, NULL, 0, &tmp,
+                                                 &resplen);
+               if (ret) {
+                       ath10k_warn(ar, "unable to read from device\n");
+                       return ret;
+               }
+       }
+
+       ver_len = __le32_to_cpu(tmp);
+
+       /* Step 2: Check the target info length */
+       if (ver_len != sizeof(resp.get_target_info)) {
+               ath10k_warn(ar, "Unexpected target info len: %u. Expected: %zu\n",
+                           ver_len, sizeof(resp.get_target_info));
+               return -EINVAL;
+       }
+
+       /* Step 3: Read the rest of the version response */
+       resplen = sizeof(resp.get_target_info) - sizeof(u32);
+       ret = ath10k_hif_exchange_bmi_msg(ar, NULL, 0,
+                                         &resp.get_target_info.version,
+                                         &resplen);
+       if (ret) {
+               ath10k_warn(ar, "unable to read from device\n");
+               return ret;
+       }
+
+       target_info->version = __le32_to_cpu(resp.get_target_info.version);
+       target_info->type    = __le32_to_cpu(resp.get_target_info.type);
+
+       return 0;
+}
+
 int ath10k_bmi_read_memory(struct ath10k *ar,
                           u32 address, void *buffer, u32 length)
 {
index cc45b63..0342073 100644 (file)
@@ -198,6 +198,8 @@ void ath10k_bmi_start(struct ath10k *ar);
 int ath10k_bmi_done(struct ath10k *ar);
 int ath10k_bmi_get_target_info(struct ath10k *ar,
                               struct bmi_target_info *target_info);
+int ath10k_bmi_get_target_info_sdio(struct ath10k *ar,
+                                   struct bmi_target_info *target_info);
 int ath10k_bmi_read_memory(struct ath10k *ar, u32 address,
                           void *buffer, u32 length);
 int ath10k_bmi_write_memory(struct ath10k *ar, u32 address,
index 5a06389..eea111d 100644 (file)
@@ -389,6 +389,21 @@ static void ath10k_send_suspend_complete(struct ath10k *ar)
        complete(&ar->target_suspend);
 }
 
+static void ath10k_init_sdio(struct ath10k *ar)
+{
+       u32 param = 0;
+
+       ath10k_bmi_write32(ar, hi_mbox_io_block_sz, 256);
+       ath10k_bmi_write32(ar, hi_mbox_isr_yield_limit, 99);
+       ath10k_bmi_read32(ar, hi_acs_flags, &param);
+
+       param |= (HI_ACS_FLAGS_SDIO_SWAP_MAILBOX_SET |
+                 HI_ACS_FLAGS_SDIO_REDUCE_TX_COMPL_SET |
+                 HI_ACS_FLAGS_ALT_DATA_CREDIT_SIZE);
+
+       ath10k_bmi_write32(ar, hi_acs_flags, param);
+}
+
 static int ath10k_init_configure_target(struct ath10k *ar)
 {
        u32 param_host;
@@ -1395,7 +1410,18 @@ err:
 static void ath10k_core_get_fw_name(struct ath10k *ar, char *fw_name,
                                    size_t fw_name_len, int fw_api)
 {
-       scnprintf(fw_name, fw_name_len, "%s-%d.bin", ATH10K_FW_FILE_BASE, fw_api);
+       switch (ar->hif.bus) {
+       case ATH10K_BUS_SDIO:
+               scnprintf(fw_name, fw_name_len, "%s-%s-%d.bin",
+                         ATH10K_FW_FILE_BASE, ath10k_bus_str(ar->hif.bus),
+                         fw_api);
+               break;
+       case ATH10K_BUS_PCI:
+       case ATH10K_BUS_AHB:
+               scnprintf(fw_name, fw_name_len, "%s-%d.bin",
+                         ATH10K_FW_FILE_BASE, fw_api);
+               break;
+       }
 }
 
 static int ath10k_core_fetch_firmware_files(struct ath10k *ar)
@@ -1953,6 +1979,9 @@ int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode,
        if (status)
                goto err;
 
+       if (ar->hif.bus == ATH10K_BUS_SDIO)
+               ath10k_init_sdio(ar);
+
        ar->htc.htc_ops.target_send_suspend_complete =
                ath10k_send_suspend_complete;
 
@@ -2200,7 +2229,10 @@ static int ath10k_core_probe_fw(struct ath10k *ar)
        }
 
        memset(&target_info, 0, sizeof(target_info));
-       ret = ath10k_bmi_get_target_info(ar, &target_info);
+       if (ar->hif.bus == ATH10K_BUS_SDIO)
+               ret = ath10k_bmi_get_target_info_sdio(ar, &target_info);
+       else
+               ret = ath10k_bmi_get_target_info(ar, &target_info);
        if (ret) {
                ath10k_err(ar, "could not get target info (%d)\n", ret);
                goto err_power_down;
index bf09151..8fc08a5 100644 (file)
@@ -91,6 +91,7 @@ struct ath10k;
 enum ath10k_bus {
        ATH10K_BUS_PCI,
        ATH10K_BUS_AHB,
+       ATH10K_BUS_SDIO,
 };
 
 static inline const char *ath10k_bus_str(enum ath10k_bus bus)
@@ -100,6 +101,8 @@ static inline const char *ath10k_bus_str(enum ath10k_bus bus)
                return "pci";
        case ATH10K_BUS_AHB:
                return "ahb";
+       case ATH10K_BUS_SDIO:
+               return "sdio";
        }
 
        return "unknown";
index 4cd2a0f..389fcb7 100644 (file)
@@ -625,17 +625,21 @@ static ssize_t ath10k_write_simulate_fw_crash(struct file *file,
                                              size_t count, loff_t *ppos)
 {
        struct ath10k *ar = file->private_data;
-       char buf[32];
+       char buf[32] = {0};
+       ssize_t rc;
        int ret;
 
-       simple_write_to_buffer(buf, sizeof(buf) - 1, ppos, user_buf, count);
+       /* filter partial writes and invalid commands */
+       if (*ppos != 0 || count >= sizeof(buf) || count == 0)
+               return -EINVAL;
 
-       /* make sure that buf is null terminated */
-       buf[sizeof(buf) - 1] = 0;
+       rc = simple_write_to_buffer(buf, sizeof(buf) - 1, ppos, user_buf, count);
+       if (rc < 0)
+               return rc;
 
        /* drop the possible '\n' from the end */
-       if (buf[count - 1] == '\n')
-               buf[count - 1] = 0;
+       if (buf[*ppos - 1] == '\n')
+               buf[*ppos - 1] = '\0';
 
        mutex_lock(&ar->conf_mutex);
 
index 2368f47..257d109 100644 (file)
@@ -38,6 +38,8 @@ enum ath10k_debug_mask {
        ATH10K_DBG_WMI_PRINT    = 0x00002000,
        ATH10K_DBG_PCI_PS       = 0x00004000,
        ATH10K_DBG_AHB          = 0x00008000,
+       ATH10K_DBG_SDIO         = 0x00010000,
+       ATH10K_DBG_SDIO_DUMP    = 0x00020000,
        ATH10K_DBG_ANY          = 0xffffffff,
 };
 
index b7669b2..e5c80f5 100644 (file)
@@ -57,8 +57,8 @@ static inline void ath10k_htc_restore_tx_skb(struct ath10k_htc *htc,
        skb_pull(skb, sizeof(struct ath10k_htc_hdr));
 }
 
-static void ath10k_htc_notify_tx_completion(struct ath10k_htc_ep *ep,
-                                           struct sk_buff *skb)
+void ath10k_htc_notify_tx_completion(struct ath10k_htc_ep *ep,
+                                    struct sk_buff *skb)
 {
        struct ath10k *ar = ep->htc->ar;
 
@@ -75,6 +75,7 @@ static void ath10k_htc_notify_tx_completion(struct ath10k_htc_ep *ep,
 
        ep->ep_ops.ep_tx_complete(ep->htc->ar, skb);
 }
+EXPORT_SYMBOL(ath10k_htc_notify_tx_completion);
 
 static void ath10k_htc_prepare_tx_skb(struct ath10k_htc_ep *ep,
                                      struct sk_buff *skb)
@@ -230,12 +231,79 @@ ath10k_htc_process_credit_report(struct ath10k_htc *htc,
        spin_unlock_bh(&htc->tx_lock);
 }
 
-static int ath10k_htc_process_trailer(struct ath10k_htc *htc,
-                                     u8 *buffer,
-                                     int length,
-                                     enum ath10k_htc_ep_id src_eid)
+static int
+ath10k_htc_process_lookahead(struct ath10k_htc *htc,
+                            const struct ath10k_htc_lookahead_report *report,
+                            int len,
+                            enum ath10k_htc_ep_id eid,
+                            void *next_lookaheads,
+                            int *next_lookaheads_len)
 {
        struct ath10k *ar = htc->ar;
+
+       /* Invalid lookahead flags are actually transmitted by
+        * the target in the HTC control message.
+        * Since this will happen at every boot we silently ignore
+        * the lookahead in this case
+        */
+       if (report->pre_valid != ((~report->post_valid) & 0xFF))
+               return 0;
+
+       if (next_lookaheads && next_lookaheads_len) {
+               ath10k_dbg(ar, ATH10K_DBG_HTC,
+                          "htc rx lookahead found pre_valid 0x%x post_valid 0x%x\n",
+                          report->pre_valid, report->post_valid);
+
+               /* look ahead bytes are valid, copy them over */
+               memcpy((u8 *)next_lookaheads, report->lookahead, 4);
+
+               *next_lookaheads_len = 1;
+       }
+
+       return 0;
+}
+
+static int
+ath10k_htc_process_lookahead_bundle(struct ath10k_htc *htc,
+                                   const struct ath10k_htc_lookahead_bundle *report,
+                                   int len,
+                                   enum ath10k_htc_ep_id eid,
+                                   void *next_lookaheads,
+                                   int *next_lookaheads_len)
+{
+       struct ath10k *ar = htc->ar;
+       int bundle_cnt = len / sizeof(*report);
+
+       if (!bundle_cnt || (bundle_cnt > HTC_HOST_MAX_MSG_PER_BUNDLE)) {
+               ath10k_warn(ar, "Invalid lookahead bundle count: %d\n",
+                           bundle_cnt);
+               return -EINVAL;
+       }
+
+       if (next_lookaheads && next_lookaheads_len) {
+               int i;
+
+               for (i = 0; i < bundle_cnt; i++) {
+                       memcpy(((u8 *)next_lookaheads) + 4 * i,
+                              report->lookahead, 4);
+                       report++;
+               }
+
+               *next_lookaheads_len = bundle_cnt;
+       }
+
+       return 0;
+}
+
+int ath10k_htc_process_trailer(struct ath10k_htc *htc,
+                              u8 *buffer,
+                              int length,
+                              enum ath10k_htc_ep_id src_eid,
+                              void *next_lookaheads,
+                              int *next_lookaheads_len)
+{
+       struct ath10k_htc_lookahead_bundle *bundle;
+       struct ath10k *ar = htc->ar;
        int status = 0;
        struct ath10k_htc_record *record;
        u8 *orig_buffer;
@@ -274,6 +342,29 @@ static int ath10k_htc_process_trailer(struct ath10k_htc *htc,
                                                         record->hdr.len,
                                                         src_eid);
                        break;
+               case ATH10K_HTC_RECORD_LOOKAHEAD:
+                       len = sizeof(struct ath10k_htc_lookahead_report);
+                       if (record->hdr.len < len) {
+                               ath10k_warn(ar, "Lookahead report too long\n");
+                               status = -EINVAL;
+                               break;
+                       }
+                       status = ath10k_htc_process_lookahead(htc,
+                                                             record->lookahead_report,
+                                                             record->hdr.len,
+                                                             src_eid,
+                                                             next_lookaheads,
+                                                             next_lookaheads_len);
+                       break;
+               case ATH10K_HTC_RECORD_LOOKAHEAD_BUNDLE:
+                       bundle = record->lookahead_bundle;
+                       status = ath10k_htc_process_lookahead_bundle(htc,
+                                                                    bundle,
+                                                                    record->hdr.len,
+                                                                    src_eid,
+                                                                    next_lookaheads,
+                                                                    next_lookaheads_len);
+                       break;
                default:
                        ath10k_warn(ar, "Unhandled record: id:%d length:%d\n",
                                    record->hdr.id, record->hdr.len);
@@ -294,6 +385,7 @@ static int ath10k_htc_process_trailer(struct ath10k_htc *htc,
 
        return status;
 }
+EXPORT_SYMBOL(ath10k_htc_process_trailer);
 
 void ath10k_htc_rx_completion_handler(struct ath10k *ar, struct sk_buff *skb)
 {
@@ -360,7 +452,8 @@ void ath10k_htc_rx_completion_handler(struct ath10k *ar, struct sk_buff *skb)
                trailer += payload_len;
                trailer -= trailer_len;
                status = ath10k_htc_process_trailer(htc, trailer,
-                                                   trailer_len, hdr->eid);
+                                                   trailer_len, hdr->eid,
+                                                   NULL, NULL);
                if (status)
                        goto out;
 
@@ -371,42 +464,6 @@ void ath10k_htc_rx_completion_handler(struct ath10k *ar, struct sk_buff *skb)
                /* zero length packet with trailer data, just drop these */
                goto out;
 
-       if (eid == ATH10K_HTC_EP_0) {
-               struct ath10k_htc_msg *msg = (struct ath10k_htc_msg *)skb->data;
-
-               switch (__le16_to_cpu(msg->hdr.message_id)) {
-               case ATH10K_HTC_MSG_READY_ID:
-               case ATH10K_HTC_MSG_CONNECT_SERVICE_RESP_ID:
-                       /* handle HTC control message */
-                       if (completion_done(&htc->ctl_resp)) {
-                               /*
-                                * this is a fatal error, target should not be
-                                * sending unsolicited messages on the ep 0
-                                */
-                               ath10k_warn(ar, "HTC rx ctrl still processing\n");
-                               complete(&htc->ctl_resp);
-                               goto out;
-                       }
-
-                       htc->control_resp_len =
-                               min_t(int, skb->len,
-                                     ATH10K_HTC_MAX_CTRL_MSG_LEN);
-
-                       memcpy(htc->control_resp_buffer, skb->data,
-                              htc->control_resp_len);
-
-                       complete(&htc->ctl_resp);
-                       break;
-               case ATH10K_HTC_MSG_SEND_SUSPEND_COMPLETE:
-                       htc->htc_ops.target_send_suspend_complete(ar);
-                       break;
-               default:
-                       ath10k_warn(ar, "ignoring unsolicited htc ep0 event\n");
-                       break;
-               }
-               goto out;
-       }
-
        ath10k_dbg(ar, ATH10K_DBG_HTC, "htc rx completion ep %d skb %pK\n",
                   eid, skb);
        ep->ep_ops.ep_rx_complete(ar, skb);
@@ -421,10 +478,40 @@ EXPORT_SYMBOL(ath10k_htc_rx_completion_handler);
 static void ath10k_htc_control_rx_complete(struct ath10k *ar,
                                           struct sk_buff *skb)
 {
-       /* This is unexpected. FW is not supposed to send regular rx on this
-        * endpoint.
-        */
-       ath10k_warn(ar, "unexpected htc rx\n");
+       struct ath10k_htc *htc = &ar->htc;
+       struct ath10k_htc_msg *msg = (struct ath10k_htc_msg *)skb->data;
+
+       switch (__le16_to_cpu(msg->hdr.message_id)) {
+       case ATH10K_HTC_MSG_READY_ID:
+       case ATH10K_HTC_MSG_CONNECT_SERVICE_RESP_ID:
+               /* handle HTC control message */
+               if (completion_done(&htc->ctl_resp)) {
+                       /* this is a fatal error, target should not be
+                        * sending unsolicited messages on the ep 0
+                        */
+                       ath10k_warn(ar, "HTC rx ctrl still processing\n");
+                       complete(&htc->ctl_resp);
+                       goto out;
+               }
+
+               htc->control_resp_len =
+                       min_t(int, skb->len,
+                             ATH10K_HTC_MAX_CTRL_MSG_LEN);
+
+               memcpy(htc->control_resp_buffer, skb->data,
+                      htc->control_resp_len);
+
+               complete(&htc->ctl_resp);
+               break;
+       case ATH10K_HTC_MSG_SEND_SUSPEND_COMPLETE:
+               htc->htc_ops.target_send_suspend_complete(ar);
+               break;
+       default:
+               ath10k_warn(ar, "ignoring unsolicited htc ep0 event\n");
+               break;
+       }
+
+out:
        kfree_skb(skb);
 }
 
@@ -497,12 +584,8 @@ int ath10k_htc_wait_target(struct ath10k_htc *htc)
        struct ath10k *ar = htc->ar;
        int i, status = 0;
        unsigned long time_left;
-       struct ath10k_htc_svc_conn_req conn_req;
-       struct ath10k_htc_svc_conn_resp conn_resp;
        struct ath10k_htc_msg *msg;
        u16 message_id;
-       u16 credit_count;
-       u16 credit_size;
 
        time_left = wait_for_completion_timeout(&htc->ctl_resp,
                                                ATH10K_HTC_WAIT_TIMEOUT_HZ);
@@ -539,16 +622,14 @@ int ath10k_htc_wait_target(struct ath10k_htc *htc)
 
        msg = (struct ath10k_htc_msg *)htc->control_resp_buffer;
        message_id   = __le16_to_cpu(msg->hdr.message_id);
-       credit_count = __le16_to_cpu(msg->ready.credit_count);
-       credit_size  = __le16_to_cpu(msg->ready.credit_size);
 
        if (message_id != ATH10K_HTC_MSG_READY_ID) {
                ath10k_err(ar, "Invalid HTC ready msg: 0x%x\n", message_id);
                return -ECOMM;
        }
 
-       htc->total_transmit_credits = credit_count;
-       htc->target_credit_size = credit_size;
+       htc->total_transmit_credits = __le16_to_cpu(msg->ready.credit_count);
+       htc->target_credit_size = __le16_to_cpu(msg->ready.credit_size);
 
        ath10k_dbg(ar, ATH10K_DBG_HTC,
                   "Target ready! transmit resources: %d size:%d\n",
@@ -561,20 +642,17 @@ int ath10k_htc_wait_target(struct ath10k_htc *htc)
                return -ECOMM;
        }
 
-       /* setup our pseudo HTC control endpoint connection */
-       memset(&conn_req, 0, sizeof(conn_req));
-       memset(&conn_resp, 0, sizeof(conn_resp));
-       conn_req.ep_ops.ep_tx_complete = ath10k_htc_control_tx_complete;
-       conn_req.ep_ops.ep_rx_complete = ath10k_htc_control_rx_complete;
-       conn_req.max_send_queue_depth = ATH10K_NUM_CONTROL_TX_BUFFERS;
-       conn_req.service_id = ATH10K_HTC_SVC_ID_RSVD_CTRL;
-
-       /* connect fake service */
-       status = ath10k_htc_connect_service(htc, &conn_req, &conn_resp);
-       if (status) {
-               ath10k_err(ar, "could not connect to htc service (%d)\n",
-                          status);
-               return status;
+       /* The only way to determine if the ready message is an extended
+        * message is from the size.
+        */
+       if (htc->control_resp_len >=
+           sizeof(msg->hdr) + sizeof(msg->ready_ext)) {
+               htc->max_msgs_per_htc_bundle =
+                       min_t(u8, msg->ready_ext.max_msgs_per_htc_bundle,
+                             HTC_HOST_MAX_MSG_PER_BUNDLE);
+               ath10k_dbg(ar, ATH10K_DBG_HTC,
+                          "Extended ready message. RX bundle size: %d\n",
+                          htc->max_msgs_per_htc_bundle);
        }
 
        return 0;
@@ -772,6 +850,13 @@ int ath10k_htc_start(struct ath10k_htc *htc)
        msg->hdr.message_id =
                __cpu_to_le16(ATH10K_HTC_MSG_SETUP_COMPLETE_EX_ID);
 
+       if (ar->hif.bus == ATH10K_BUS_SDIO) {
+               /* Extra setup params used by SDIO */
+               msg->setup_complete_ext.flags =
+                       __cpu_to_le32(ATH10K_HTC_SETUP_COMPLETE_FLAGS_RX_BNDL_EN);
+               msg->setup_complete_ext.max_msgs_per_bundled_recv =
+                       htc->max_msgs_per_htc_bundle;
+       }
        ath10k_dbg(ar, ATH10K_DBG_HTC, "HTC is using TX credit flow control\n");
 
        status = ath10k_htc_send(htc, ATH10K_HTC_EP_0, skb);
@@ -786,8 +871,10 @@ int ath10k_htc_start(struct ath10k_htc *htc)
 /* registered target arrival callback from the HIF layer */
 int ath10k_htc_init(struct ath10k *ar)
 {
-       struct ath10k_htc_ep *ep = NULL;
+       int status;
        struct ath10k_htc *htc = &ar->htc;
+       struct ath10k_htc_svc_conn_req conn_req;
+       struct ath10k_htc_svc_conn_resp conn_resp;
 
        spin_lock_init(&htc->tx_lock);
 
@@ -795,10 +882,21 @@ int ath10k_htc_init(struct ath10k *ar)
 
        htc->ar = ar;
 
-       /* Get HIF default pipe for HTC message exchange */
-       ep = &htc->endpoint[ATH10K_HTC_EP_0];
+       /* setup our pseudo HTC control endpoint connection */
+       memset(&conn_req, 0, sizeof(conn_req));
+       memset(&conn_resp, 0, sizeof(conn_resp));
+       conn_req.ep_ops.ep_tx_complete = ath10k_htc_control_tx_complete;
+       conn_req.ep_ops.ep_rx_complete = ath10k_htc_control_rx_complete;
+       conn_req.max_send_queue_depth = ATH10K_NUM_CONTROL_TX_BUFFERS;
+       conn_req.service_id = ATH10K_HTC_SVC_ID_RSVD_CTRL;
 
-       ath10k_hif_get_default_pipe(ar, &ep->ul_pipe_id, &ep->dl_pipe_id);
+       /* connect fake service */
+       status = ath10k_htc_connect_service(htc, &conn_req, &conn_resp);
+       if (status) {
+               ath10k_err(ar, "could not connect to htc service (%d)\n",
+                          status);
+               return status;
+       }
 
        init_completion(&htc->ctl_resp);
 
index 6ababa3..24663b0 100644 (file)
@@ -50,6 +50,8 @@ struct ath10k;
  * 4-byte aligned.
  */
 
+#define HTC_HOST_MAX_MSG_PER_BUNDLE        8
+
 enum ath10k_htc_tx_flags {
        ATH10K_HTC_FLAG_NEED_CREDIT_UPDATE = 0x01,
        ATH10K_HTC_FLAG_SEND_BUNDLE        = 0x02
@@ -110,6 +112,10 @@ enum ath10k_htc_conn_svc_status {
        ATH10K_HTC_CONN_SVC_STATUS_NO_MORE_EP   = 4
 };
 
+enum ath10k_htc_setup_complete_flags {
+       ATH10K_HTC_SETUP_COMPLETE_FLAGS_RX_BNDL_EN = 1
+};
+
 struct ath10k_ath10k_htc_msg_hdr {
        __le16 message_id; /* @enum htc_message_id */
 } __packed;
@@ -174,8 +180,10 @@ struct ath10k_htc_msg {
 } __packed __aligned(4);
 
 enum ath10k_ath10k_htc_record_id {
-       ATH10K_HTC_RECORD_NULL    = 0,
-       ATH10K_HTC_RECORD_CREDITS = 1
+       ATH10K_HTC_RECORD_NULL             = 0,
+       ATH10K_HTC_RECORD_CREDITS          = 1,
+       ATH10K_HTC_RECORD_LOOKAHEAD        = 2,
+       ATH10K_HTC_RECORD_LOOKAHEAD_BUNDLE = 3,
 };
 
 struct ath10k_ath10k_htc_record_hdr {
@@ -192,10 +200,28 @@ struct ath10k_htc_credit_report {
        u8 pad1;
 } __packed;
 
+struct ath10k_htc_lookahead_report {
+       u8 pre_valid;
+       u8 pad0;
+       u8 pad1;
+       u8 pad2;
+       u8 lookahead[4];
+       u8 post_valid;
+       u8 pad3;
+       u8 pad4;
+       u8 pad5;
+} __packed;
+
+struct ath10k_htc_lookahead_bundle {
+       u8 lookahead[4];
+} __packed;
+
 struct ath10k_htc_record {
        struct ath10k_ath10k_htc_record_hdr hdr;
        union {
                struct ath10k_htc_credit_report credit_report[0];
+               struct ath10k_htc_lookahead_report lookahead_report[0];
+               struct ath10k_htc_lookahead_bundle lookahead_bundle[0];
                u8 pauload[0];
        };
 } __packed __aligned(4);
@@ -338,6 +364,7 @@ struct ath10k_htc {
 
        int total_transmit_credits;
        int target_credit_size;
+       u8 max_msgs_per_htc_bundle;
 };
 
 int ath10k_htc_init(struct ath10k *ar);
@@ -351,5 +378,13 @@ int ath10k_htc_send(struct ath10k_htc *htc, enum ath10k_htc_ep_id eid,
 struct sk_buff *ath10k_htc_alloc_skb(struct ath10k *ar, int size);
 void ath10k_htc_tx_completion_handler(struct ath10k *ar, struct sk_buff *skb);
 void ath10k_htc_rx_completion_handler(struct ath10k *ar, struct sk_buff *skb);
+void ath10k_htc_notify_tx_completion(struct ath10k_htc_ep *ep,
+                                    struct sk_buff *skb);
+int ath10k_htc_process_trailer(struct ath10k_htc *htc,
+                              u8 *buffer,
+                              int length,
+                              enum ath10k_htc_ep_id src_eid,
+                              void *next_lookaheads,
+                              int *next_lookaheads_len);
 
 #endif
index 5b1e90b..d342728 100644 (file)
@@ -863,6 +863,59 @@ ath10k_rx_desc_get_l3_pad_bytes(struct ath10k_hw_params *hw,
 #define QCA9887_EEPROM_ADDR_LO_MASK            0x00ff0000
 #define QCA9887_EEPROM_ADDR_LO_LSB             16
 
+#define MBOX_RESET_CONTROL_ADDRESS             0x00000000
+#define MBOX_HOST_INT_STATUS_ADDRESS           0x00000800
+#define MBOX_HOST_INT_STATUS_ERROR_LSB         7
+#define MBOX_HOST_INT_STATUS_ERROR_MASK                0x00000080
+#define MBOX_HOST_INT_STATUS_CPU_LSB           6
+#define MBOX_HOST_INT_STATUS_CPU_MASK          0x00000040
+#define MBOX_HOST_INT_STATUS_COUNTER_LSB       4
+#define MBOX_HOST_INT_STATUS_COUNTER_MASK      0x00000010
+#define MBOX_CPU_INT_STATUS_ADDRESS            0x00000801
+#define MBOX_ERROR_INT_STATUS_ADDRESS          0x00000802
+#define MBOX_ERROR_INT_STATUS_WAKEUP_LSB       2
+#define MBOX_ERROR_INT_STATUS_WAKEUP_MASK      0x00000004
+#define MBOX_ERROR_INT_STATUS_RX_UNDERFLOW_LSB 1
+#define MBOX_ERROR_INT_STATUS_RX_UNDERFLOW_MASK        0x00000002
+#define MBOX_ERROR_INT_STATUS_TX_OVERFLOW_LSB  0
+#define MBOX_ERROR_INT_STATUS_TX_OVERFLOW_MASK 0x00000001
+#define MBOX_COUNTER_INT_STATUS_ADDRESS                0x00000803
+#define MBOX_COUNTER_INT_STATUS_COUNTER_LSB    0
+#define MBOX_COUNTER_INT_STATUS_COUNTER_MASK   0x000000ff
+#define MBOX_RX_LOOKAHEAD_VALID_ADDRESS                0x00000805
+#define MBOX_INT_STATUS_ENABLE_ADDRESS         0x00000828
+#define MBOX_INT_STATUS_ENABLE_ERROR_LSB       7
+#define MBOX_INT_STATUS_ENABLE_ERROR_MASK      0x00000080
+#define MBOX_INT_STATUS_ENABLE_CPU_LSB         6
+#define MBOX_INT_STATUS_ENABLE_CPU_MASK                0x00000040
+#define MBOX_INT_STATUS_ENABLE_INT_LSB         5
+#define MBOX_INT_STATUS_ENABLE_INT_MASK                0x00000020
+#define MBOX_INT_STATUS_ENABLE_COUNTER_LSB     4
+#define MBOX_INT_STATUS_ENABLE_COUNTER_MASK    0x00000010
+#define MBOX_INT_STATUS_ENABLE_MBOX_DATA_LSB   0
+#define MBOX_INT_STATUS_ENABLE_MBOX_DATA_MASK  0x0000000f
+#define MBOX_CPU_INT_STATUS_ENABLE_ADDRESS     0x00000819
+#define MBOX_CPU_INT_STATUS_ENABLE_BIT_LSB     0
+#define MBOX_CPU_INT_STATUS_ENABLE_BIT_MASK    0x000000ff
+#define MBOX_ERROR_STATUS_ENABLE_ADDRESS       0x0000081a
+#define MBOX_ERROR_STATUS_ENABLE_RX_UNDERFLOW_LSB  1
+#define MBOX_ERROR_STATUS_ENABLE_RX_UNDERFLOW_MASK 0x00000002
+#define MBOX_ERROR_STATUS_ENABLE_TX_OVERFLOW_LSB   0
+#define MBOX_ERROR_STATUS_ENABLE_TX_OVERFLOW_MASK  0x00000001
+#define MBOX_COUNTER_INT_STATUS_ENABLE_ADDRESS 0x0000081b
+#define MBOX_COUNTER_INT_STATUS_ENABLE_BIT_LSB 0
+#define MBOX_COUNTER_INT_STATUS_ENABLE_BIT_MASK        0x000000ff
+#define MBOX_COUNT_ADDRESS                     0x00000820
+#define MBOX_COUNT_DEC_ADDRESS                 0x00000840
+#define MBOX_WINDOW_DATA_ADDRESS               0x00000874
+#define MBOX_WINDOW_WRITE_ADDR_ADDRESS         0x00000878
+#define MBOX_WINDOW_READ_ADDR_ADDRESS          0x0000087c
+#define MBOX_CPU_DBG_SEL_ADDRESS               0x00000883
+#define MBOX_CPU_DBG_ADDRESS                   0x00000884
+#define MBOX_RTC_BASE_ADDRESS                  0x00000000
+#define MBOX_GPIO_BASE_ADDRESS                 0x00005000
+#define MBOX_MBOX_BASE_ADDRESS                 0x00008000
+
 #define RTC_STATE_V_GET(x) (((x) & RTC_STATE_V_MASK) >> RTC_STATE_V_LSB)
 
 /* Register definitions for first generation ath10k cards. These cards include
diff --git a/drivers/net/wireless/ath/ath10k/sdio.c b/drivers/net/wireless/ath/ath10k/sdio.c
new file mode 100644 (file)
index 0000000..9e78fba
--- /dev/null
@@ -0,0 +1,2113 @@
+/*
+ * Copyright (c) 2004-2011 Atheros Communications Inc.
+ * Copyright (c) 2011-2012,2017 Qualcomm Atheros, Inc.
+ * Copyright (c) 2016-2017 Erik Stromdahl <erik.stromdahl@gmail.com>
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#include <linux/module.h>
+#include <linux/mmc/card.h>
+#include <linux/mmc/mmc.h>
+#include <linux/mmc/host.h>
+#include <linux/mmc/sdio_func.h>
+#include <linux/mmc/sdio_ids.h>
+#include <linux/mmc/sdio.h>
+#include <linux/mmc/sd.h>
+#include <linux/bitfield.h>
+#include "core.h"
+#include "bmi.h"
+#include "debug.h"
+#include "hif.h"
+#include "htc.h"
+#include "targaddrs.h"
+#include "trace.h"
+#include "sdio.h"
+
+/* inlined helper functions */
+
+static inline int ath10k_sdio_calc_txrx_padded_len(struct ath10k_sdio *ar_sdio,
+                                                  size_t len)
+{
+       return __ALIGN_MASK((len), ar_sdio->mbox_info.block_mask);
+}
+
+static inline enum ath10k_htc_ep_id pipe_id_to_eid(u8 pipe_id)
+{
+       return (enum ath10k_htc_ep_id)pipe_id;
+}
+
+static inline void ath10k_sdio_mbox_free_rx_pkt(struct ath10k_sdio_rx_data *pkt)
+{
+       dev_kfree_skb(pkt->skb);
+       pkt->skb = NULL;
+       pkt->alloc_len = 0;
+       pkt->act_len = 0;
+       pkt->trailer_only = false;
+}
+
+static inline int ath10k_sdio_mbox_alloc_rx_pkt(struct ath10k_sdio_rx_data *pkt,
+                                               size_t act_len, size_t full_len,
+                                               bool part_of_bundle,
+                                               bool last_in_bundle)
+{
+       pkt->skb = dev_alloc_skb(full_len);
+       if (!pkt->skb)
+               return -ENOMEM;
+
+       pkt->act_len = act_len;
+       pkt->alloc_len = full_len;
+       pkt->part_of_bundle = part_of_bundle;
+       pkt->last_in_bundle = last_in_bundle;
+       pkt->trailer_only = false;
+
+       return 0;
+}
+
+static inline bool is_trailer_only_msg(struct ath10k_sdio_rx_data *pkt)
+{
+       bool trailer_only = false;
+       struct ath10k_htc_hdr *htc_hdr =
+               (struct ath10k_htc_hdr *)pkt->skb->data;
+       u16 len = __le16_to_cpu(htc_hdr->len);
+
+       if (len == htc_hdr->trailer_len)
+               trailer_only = true;
+
+       return trailer_only;
+}
+
+/* sdio/mmc functions */
+
+static inline void ath10k_sdio_set_cmd52_arg(u32 *arg, u8 write, u8 raw,
+                                            unsigned int address,
+                                            unsigned char val)
+{
+       *arg = FIELD_PREP(BIT(31), write) |
+              FIELD_PREP(BIT(27), raw) |
+              FIELD_PREP(BIT(26), 1) |
+              FIELD_PREP(GENMASK(25, 9), address) |
+              FIELD_PREP(BIT(8), 1) |
+              FIELD_PREP(GENMASK(7, 0), val);
+}
+
+static int ath10k_sdio_func0_cmd52_wr_byte(struct mmc_card *card,
+                                          unsigned int address,
+                                          unsigned char byte)
+{
+       struct mmc_command io_cmd;
+
+       memset(&io_cmd, 0, sizeof(io_cmd));
+       ath10k_sdio_set_cmd52_arg(&io_cmd.arg, 1, 0, address, byte);
+       io_cmd.opcode = SD_IO_RW_DIRECT;
+       io_cmd.flags = MMC_RSP_R5 | MMC_CMD_AC;
+
+       return mmc_wait_for_cmd(card->host, &io_cmd, 0);
+}
+
+static int ath10k_sdio_func0_cmd52_rd_byte(struct mmc_card *card,
+                                          unsigned int address,
+                                          unsigned char *byte)
+{
+       struct mmc_command io_cmd;
+       int ret;
+
+       memset(&io_cmd, 0, sizeof(io_cmd));
+       ath10k_sdio_set_cmd52_arg(&io_cmd.arg, 0, 0, address, 0);
+       io_cmd.opcode = SD_IO_RW_DIRECT;
+       io_cmd.flags = MMC_RSP_R5 | MMC_CMD_AC;
+
+       ret = mmc_wait_for_cmd(card->host, &io_cmd, 0);
+       if (!ret)
+               *byte = io_cmd.resp[0];
+
+       return ret;
+}
+
+static int ath10k_sdio_config(struct ath10k *ar)
+{
+       struct ath10k_sdio *ar_sdio = ath10k_sdio_priv(ar);
+       struct sdio_func *func = ar_sdio->func;
+       unsigned char byte, asyncintdelay = 2;
+       int ret;
+
+       ath10k_dbg(ar, ATH10K_DBG_BOOT, "sdio configuration\n");
+
+       sdio_claim_host(func);
+
+       byte = 0;
+       ret = ath10k_sdio_func0_cmd52_rd_byte(func->card,
+                                             SDIO_CCCR_DRIVE_STRENGTH,
+                                             &byte);
+
+       byte &= ~ATH10K_SDIO_DRIVE_DTSX_MASK;
+       byte |= FIELD_PREP(ATH10K_SDIO_DRIVE_DTSX_MASK,
+                          ATH10K_SDIO_DRIVE_DTSX_TYPE_D);
+
+       ret = ath10k_sdio_func0_cmd52_wr_byte(func->card,
+                                             SDIO_CCCR_DRIVE_STRENGTH,
+                                             byte);
+
+       byte = 0;
+       ret = ath10k_sdio_func0_cmd52_rd_byte(
+               func->card,
+               CCCR_SDIO_DRIVER_STRENGTH_ENABLE_ADDR,
+               &byte);
+
+       byte |= (CCCR_SDIO_DRIVER_STRENGTH_ENABLE_A |
+                CCCR_SDIO_DRIVER_STRENGTH_ENABLE_C |
+                CCCR_SDIO_DRIVER_STRENGTH_ENABLE_D);
+
+       ret = ath10k_sdio_func0_cmd52_wr_byte(func->card,
+                                             CCCR_SDIO_DRIVER_STRENGTH_ENABLE_ADDR,
+                                             byte);
+       if (ret) {
+               ath10k_warn(ar, "failed to enable driver strength: %d\n", ret);
+               goto out;
+       }
+
+       byte = 0;
+       ret = ath10k_sdio_func0_cmd52_rd_byte(func->card,
+                                             CCCR_SDIO_IRQ_MODE_REG_SDIO3,
+                                             &byte);
+
+       byte |= SDIO_IRQ_MODE_ASYNC_4BIT_IRQ_SDIO3;
+
+       ret = ath10k_sdio_func0_cmd52_wr_byte(func->card,
+                                             CCCR_SDIO_IRQ_MODE_REG_SDIO3,
+                                             byte);
+       if (ret) {
+               ath10k_warn(ar, "failed to enable 4-bit async irq mode: %d\n",
+                           ret);
+               goto out;
+       }
+
+       byte = 0;
+       ret = ath10k_sdio_func0_cmd52_rd_byte(func->card,
+                                             CCCR_SDIO_ASYNC_INT_DELAY_ADDRESS,
+                                             &byte);
+
+       byte &= ~CCCR_SDIO_ASYNC_INT_DELAY_MASK;
+       byte |= FIELD_PREP(CCCR_SDIO_ASYNC_INT_DELAY_MASK, asyncintdelay);
+
+       ret = ath10k_sdio_func0_cmd52_wr_byte(func->card,
+                                             CCCR_SDIO_ASYNC_INT_DELAY_ADDRESS,
+                                             byte);
+
+       /* give us some time to enable, in ms */
+       func->enable_timeout = 100;
+
+       ret = sdio_set_block_size(func, ar_sdio->mbox_info.block_size);
+       if (ret) {
+               ath10k_warn(ar, "failed to set sdio block size to %d: %d\n",
+                           ar_sdio->mbox_info.block_size, ret);
+               goto out;
+       }
+
+out:
+       sdio_release_host(func);
+       return ret;
+}
+
+static int ath10k_sdio_write32(struct ath10k *ar, u32 addr, u32 val)
+{
+       struct ath10k_sdio *ar_sdio = ath10k_sdio_priv(ar);
+       struct sdio_func *func = ar_sdio->func;
+       int ret;
+
+       sdio_claim_host(func);
+
+       sdio_writel(func, val, addr, &ret);
+       if (ret) {
+               ath10k_warn(ar, "failed to write 0x%x to address 0x%x: %d\n",
+                           val, addr, ret);
+               goto out;
+       }
+
+       ath10k_dbg(ar, ATH10K_DBG_SDIO, "sdio write32 addr 0x%x val 0x%x\n",
+                  addr, val);
+
+out:
+       sdio_release_host(func);
+
+       return ret;
+}
+
+static int ath10k_sdio_writesb32(struct ath10k *ar, u32 addr, u32 val)
+{
+       struct ath10k_sdio *ar_sdio = ath10k_sdio_priv(ar);
+       struct sdio_func *func = ar_sdio->func;
+       __le32 *buf;
+       int ret;
+
+       buf = kzalloc(sizeof(*buf), GFP_KERNEL);
+       if (!buf)
+               return -ENOMEM;
+
+       *buf = cpu_to_le32(val);
+
+       sdio_claim_host(func);
+
+       ret = sdio_writesb(func, addr, buf, sizeof(*buf));
+       if (ret) {
+               ath10k_warn(ar, "failed to write value 0x%x to fixed sb address 0x%x: %d\n",
+                           val, addr, ret);
+               goto out;
+       }
+
+       ath10k_dbg(ar, ATH10K_DBG_SDIO, "sdio writesb32 addr 0x%x val 0x%x\n",
+                  addr, val);
+
+out:
+       sdio_release_host(func);
+
+       kfree(buf);
+
+       return ret;
+}
+
+static int ath10k_sdio_read32(struct ath10k *ar, u32 addr, u32 *val)
+{
+       struct ath10k_sdio *ar_sdio = ath10k_sdio_priv(ar);
+       struct sdio_func *func = ar_sdio->func;
+       int ret;
+
+       sdio_claim_host(func);
+       *val = sdio_readl(func, addr, &ret);
+       if (ret) {
+               ath10k_warn(ar, "failed to read from address 0x%x: %d\n",
+                           addr, ret);
+               goto out;
+       }
+
+       ath10k_dbg(ar, ATH10K_DBG_SDIO, "sdio read32 addr 0x%x val 0x%x\n",
+                  addr, *val);
+
+out:
+       sdio_release_host(func);
+
+       return ret;
+}
+
+static int ath10k_sdio_read(struct ath10k *ar, u32 addr, void *buf, size_t len)
+{
+       struct ath10k_sdio *ar_sdio = ath10k_sdio_priv(ar);
+       struct sdio_func *func = ar_sdio->func;
+       int ret;
+
+       sdio_claim_host(func);
+
+       ret = sdio_memcpy_fromio(func, buf, addr, len);
+       if (ret) {
+               ath10k_warn(ar, "failed to read from address 0x%x: %d\n",
+                           addr, ret);
+               goto out;
+       }
+
+       ath10k_dbg(ar, ATH10K_DBG_SDIO, "sdio read addr 0x%x buf 0x%p len %zu\n",
+                  addr, buf, len);
+       ath10k_dbg_dump(ar, ATH10K_DBG_SDIO_DUMP, NULL, "sdio read ", buf, len);
+
+out:
+       sdio_release_host(func);
+
+       return ret;
+}
+
+static int ath10k_sdio_write(struct ath10k *ar, u32 addr, const void *buf, size_t len)
+{
+       struct ath10k_sdio *ar_sdio = ath10k_sdio_priv(ar);
+       struct sdio_func *func = ar_sdio->func;
+       int ret;
+
+       sdio_claim_host(func);
+
+       /* For some reason toio() doesn't have const for the buffer, need
+        * an ugly hack to workaround that.
+        */
+       ret = sdio_memcpy_toio(func, addr, (void *)buf, len);
+       if (ret) {
+               ath10k_warn(ar, "failed to write to address 0x%x: %d\n",
+                           addr, ret);
+               goto out;
+       }
+
+       ath10k_dbg(ar, ATH10K_DBG_SDIO, "sdio write addr 0x%x buf 0x%p len %zu\n",
+                  addr, buf, len);
+       ath10k_dbg_dump(ar, ATH10K_DBG_SDIO_DUMP, NULL, "sdio write ", buf, len);
+
+out:
+       sdio_release_host(func);
+
+       return ret;
+}
+
+static int ath10k_sdio_readsb(struct ath10k *ar, u32 addr, void *buf, size_t len)
+{
+       struct ath10k_sdio *ar_sdio = ath10k_sdio_priv(ar);
+       struct sdio_func *func = ar_sdio->func;
+       int ret;
+
+       sdio_claim_host(func);
+
+       len = round_down(len, ar_sdio->mbox_info.block_size);
+
+       ret = sdio_readsb(func, buf, addr, len);
+       if (ret) {
+               ath10k_warn(ar, "failed to read from fixed (sb) address 0x%x: %d\n",
+                           addr, ret);
+               goto out;
+       }
+
+       ath10k_dbg(ar, ATH10K_DBG_SDIO, "sdio readsb addr 0x%x buf 0x%p len %zu\n",
+                  addr, buf, len);
+       ath10k_dbg_dump(ar, ATH10K_DBG_SDIO_DUMP, NULL, "sdio readsb ", buf, len);
+
+out:
+       sdio_release_host(func);
+
+       return ret;
+}
+
+/* HIF mbox functions */
+
+static int ath10k_sdio_mbox_rx_process_packet(struct ath10k *ar,
+                                             struct ath10k_sdio_rx_data *pkt,
+                                             u32 *lookaheads,
+                                             int *n_lookaheads)
+{
+       struct ath10k_htc *htc = &ar->htc;
+       struct sk_buff *skb = pkt->skb;
+       struct ath10k_htc_hdr *htc_hdr = (struct ath10k_htc_hdr *)skb->data;
+       bool trailer_present = htc_hdr->flags & ATH10K_HTC_FLAG_TRAILER_PRESENT;
+       enum ath10k_htc_ep_id eid;
+       u16 payload_len;
+       u8 *trailer;
+       int ret;
+
+       payload_len = le16_to_cpu(htc_hdr->len);
+
+       if (trailer_present) {
+               trailer = skb->data + sizeof(*htc_hdr) +
+                         payload_len - htc_hdr->trailer_len;
+
+               eid = pipe_id_to_eid(htc_hdr->eid);
+
+               ret = ath10k_htc_process_trailer(htc,
+                                                trailer,
+                                                htc_hdr->trailer_len,
+                                                eid,
+                                                lookaheads,
+                                                n_lookaheads);
+               if (ret)
+                       return ret;
+
+               if (is_trailer_only_msg(pkt))
+                       pkt->trailer_only = true;
+
+               skb_trim(skb, skb->len - htc_hdr->trailer_len);
+       }
+
+       skb_pull(skb, sizeof(*htc_hdr));
+
+       return 0;
+}
+
+static int ath10k_sdio_mbox_rx_process_packets(struct ath10k *ar,
+                                              u32 lookaheads[],
+                                              int *n_lookahead)
+{
+       struct ath10k_sdio *ar_sdio = ath10k_sdio_priv(ar);
+       struct ath10k_htc *htc = &ar->htc;
+       struct ath10k_sdio_rx_data *pkt;
+       struct ath10k_htc_ep *ep;
+       enum ath10k_htc_ep_id id;
+       int ret, i, *n_lookahead_local;
+       u32 *lookaheads_local;
+
+       for (i = 0; i < ar_sdio->n_rx_pkts; i++) {
+               lookaheads_local = lookaheads;
+               n_lookahead_local = n_lookahead;
+
+               id = ((struct ath10k_htc_hdr *)&lookaheads[i])->eid;
+
+               if (id >= ATH10K_HTC_EP_COUNT) {
+                       ath10k_warn(ar, "invalid endpoint in look-ahead: %d\n",
+                                   id);
+                       ret = -ENOMEM;
+                       goto out;
+               }
+
+               ep = &htc->endpoint[id];
+
+               if (ep->service_id == 0) {
+                       ath10k_warn(ar, "ep %d is not connected\n", id);
+                       ret = -ENOMEM;
+                       goto out;
+               }
+
+               pkt = &ar_sdio->rx_pkts[i];
+
+               if (pkt->part_of_bundle && !pkt->last_in_bundle) {
+                       /* Only read lookahead's from RX trailers
+                        * for the last packet in a bundle.
+                        */
+                       lookaheads_local = NULL;
+                       n_lookahead_local = NULL;
+               }
+
+               ret = ath10k_sdio_mbox_rx_process_packet(ar,
+                                                        pkt,
+                                                        lookaheads_local,
+                                                        n_lookahead_local);
+               if (ret)
+                       goto out;
+
+               if (!pkt->trailer_only)
+                       ep->ep_ops.ep_rx_complete(ar_sdio->ar, pkt->skb);
+               else
+                       kfree_skb(pkt->skb);
+
+               /* The RX complete handler now owns the skb...*/
+               pkt->skb = NULL;
+               pkt->alloc_len = 0;
+       }
+
+       ret = 0;
+
+out:
+       /* Free all packets that was not passed on to the RX completion
+        * handler...
+        */
+       for (; i < ar_sdio->n_rx_pkts; i++)
+               ath10k_sdio_mbox_free_rx_pkt(&ar_sdio->rx_pkts[i]);
+
+       return ret;
+}
+
+static int ath10k_sdio_mbox_alloc_pkt_bundle(struct ath10k *ar,
+                                            struct ath10k_sdio_rx_data *rx_pkts,
+                                            struct ath10k_htc_hdr *htc_hdr,
+                                            size_t full_len, size_t act_len,
+                                            size_t *bndl_cnt)
+{
+       int ret, i;
+
+       *bndl_cnt = FIELD_GET(ATH10K_HTC_FLAG_BUNDLE_MASK, htc_hdr->flags);
+
+       if (*bndl_cnt > HTC_HOST_MAX_MSG_PER_BUNDLE) {
+               ath10k_warn(ar,
+                           "HTC bundle length %u exceeds maximum %u\n",
+                           le16_to_cpu(htc_hdr->len),
+                           HTC_HOST_MAX_MSG_PER_BUNDLE);
+               return -ENOMEM;
+       }
+
+       /* Allocate bndl_cnt extra skb's for the bundle.
+        * The package containing the
+        * ATH10K_HTC_FLAG_BUNDLE_MASK flag is not included
+        * in bndl_cnt. The skb for that packet will be
+        * allocated separately.
+        */
+       for (i = 0; i < *bndl_cnt; i++) {
+               ret = ath10k_sdio_mbox_alloc_rx_pkt(&rx_pkts[i],
+                                                   act_len,
+                                                   full_len,
+                                                   true,
+                                                   false);
+               if (ret)
+                       return ret;
+       }
+
+       return 0;
+}
+
+static int ath10k_sdio_mbox_rx_alloc(struct ath10k *ar,
+                                    u32 lookaheads[], int n_lookaheads)
+{
+       struct ath10k_sdio *ar_sdio = ath10k_sdio_priv(ar);
+       struct ath10k_htc_hdr *htc_hdr;
+       size_t full_len, act_len;
+       bool last_in_bundle;
+       int ret, i;
+
+       if (n_lookaheads > ATH10K_SDIO_MAX_RX_MSGS) {
+               ath10k_warn(ar,
+                           "the total number of pkgs to be fetched (%u) exceeds maximum %u\n",
+                           n_lookaheads,
+                           ATH10K_SDIO_MAX_RX_MSGS);
+               ret = -ENOMEM;
+               goto err;
+       }
+
+       for (i = 0; i < n_lookaheads; i++) {
+               htc_hdr = (struct ath10k_htc_hdr *)&lookaheads[i];
+               last_in_bundle = false;
+
+               if (le16_to_cpu(htc_hdr->len) >
+                   ATH10K_HTC_MBOX_MAX_PAYLOAD_LENGTH) {
+                       ath10k_warn(ar,
+                                   "payload length %d exceeds max htc length: %zu\n",
+                                   le16_to_cpu(htc_hdr->len),
+                                   ATH10K_HTC_MBOX_MAX_PAYLOAD_LENGTH);
+                       ret = -ENOMEM;
+                       goto err;
+               }
+
+               act_len = le16_to_cpu(htc_hdr->len) + sizeof(*htc_hdr);
+               full_len = ath10k_sdio_calc_txrx_padded_len(ar_sdio, act_len);
+
+               if (full_len > ATH10K_SDIO_MAX_BUFFER_SIZE) {
+                       ath10k_warn(ar,
+                                   "rx buffer requested with invalid htc_hdr length (%d, 0x%x): %d\n",
+                                   htc_hdr->eid, htc_hdr->flags,
+                                   le16_to_cpu(htc_hdr->len));
+                       ret = -EINVAL;
+                       goto err;
+               }
+
+               if (htc_hdr->flags & ATH10K_HTC_FLAG_BUNDLE_MASK) {
+                       /* HTC header indicates that every packet to follow
+                        * has the same padded length so that it can be
+                        * optimally fetched as a full bundle.
+                        */
+                       size_t bndl_cnt;
+
+                       ret = ath10k_sdio_mbox_alloc_pkt_bundle(ar,
+                                                               &ar_sdio->rx_pkts[i],
+                                                               htc_hdr,
+                                                               full_len,
+                                                               act_len,
+                                                               &bndl_cnt);
+
+                       n_lookaheads += bndl_cnt;
+                       i += bndl_cnt;
+                       /*Next buffer will be the last in the bundle */
+                       last_in_bundle = true;
+               }
+
+               /* Allocate skb for packet. If the packet had the
+                * ATH10K_HTC_FLAG_BUNDLE_MASK flag set, all bundled
+                * packet skb's have been allocated in the previous step.
+                */
+               ret = ath10k_sdio_mbox_alloc_rx_pkt(&ar_sdio->rx_pkts[i],
+                                                   act_len,
+                                                   full_len,
+                                                   last_in_bundle,
+                                                   last_in_bundle);
+       }
+
+       ar_sdio->n_rx_pkts = i;
+
+       return 0;
+
+err:
+       for (i = 0; i < ATH10K_SDIO_MAX_RX_MSGS; i++) {
+               if (!ar_sdio->rx_pkts[i].alloc_len)
+                       break;
+               ath10k_sdio_mbox_free_rx_pkt(&ar_sdio->rx_pkts[i]);
+       }
+
+       return ret;
+}
+
+static int ath10k_sdio_mbox_rx_packet(struct ath10k *ar,
+                                     struct ath10k_sdio_rx_data *pkt)
+{
+       struct ath10k_sdio *ar_sdio = ath10k_sdio_priv(ar);
+       struct sk_buff *skb = pkt->skb;
+       int ret;
+
+       ret = ath10k_sdio_readsb(ar, ar_sdio->mbox_info.htc_addr,
+                                skb->data, pkt->alloc_len);
+       pkt->status = ret;
+       if (!ret)
+               skb_put(skb, pkt->act_len);
+
+       return ret;
+}
+
+static int ath10k_sdio_mbox_rx_fetch(struct ath10k *ar)
+{
+       struct ath10k_sdio *ar_sdio = ath10k_sdio_priv(ar);
+       int ret, i;
+
+       for (i = 0; i < ar_sdio->n_rx_pkts; i++) {
+               ret = ath10k_sdio_mbox_rx_packet(ar,
+                                                &ar_sdio->rx_pkts[i]);
+               if (ret)
+                       goto err;
+       }
+
+       return 0;
+
+err:
+       /* Free all packets that was not successfully fetched. */
+       for (; i < ar_sdio->n_rx_pkts; i++)
+               ath10k_sdio_mbox_free_rx_pkt(&ar_sdio->rx_pkts[i]);
+
+       return ret;
+}
+
+/* This is the timeout for mailbox processing done in the sdio irq
+ * handler. The timeout is deliberately set quite high since SDIO dump logs
+ * over serial port can/will add a substantial overhead to the processing
+ * (if enabled).
+ */
+#define SDIO_MBOX_PROCESSING_TIMEOUT_HZ (20 * HZ)
+
+static int ath10k_sdio_mbox_rxmsg_pending_handler(struct ath10k *ar,
+                                                 u32 msg_lookahead, bool *done)
+{
+       struct ath10k_sdio *ar_sdio = ath10k_sdio_priv(ar);
+       u32 lookaheads[ATH10K_SDIO_MAX_RX_MSGS];
+       int n_lookaheads = 1;
+       unsigned long timeout;
+       int ret;
+
+       *done = true;
+
+       /* Copy the lookahead obtained from the HTC register table into our
+        * temp array as a start value.
+        */
+       lookaheads[0] = msg_lookahead;
+
+       timeout = jiffies + SDIO_MBOX_PROCESSING_TIMEOUT_HZ;
+       while (time_before(jiffies, timeout)) {
+               /* Try to allocate as many HTC RX packets indicated by
+                * n_lookaheads.
+                */
+               ret = ath10k_sdio_mbox_rx_alloc(ar, lookaheads,
+                                               n_lookaheads);
+               if (ret)
+                       break;
+
+               if (ar_sdio->n_rx_pkts >= 2)
+                       /* A recv bundle was detected, force IRQ status
+                        * re-check again.
+                        */
+                       *done = false;
+
+               ret = ath10k_sdio_mbox_rx_fetch(ar);
+
+               /* Process fetched packets. This will potentially update
+                * n_lookaheads depending on if the packets contain lookahead
+                * reports.
+                */
+               n_lookaheads = 0;
+               ret = ath10k_sdio_mbox_rx_process_packets(ar,
+                                                         lookaheads,
+                                                         &n_lookaheads);
+
+               if (!n_lookaheads || ret)
+                       break;
+
+               /* For SYNCH processing, if we get here, we are running
+                * through the loop again due to updated lookaheads. Set
+                * flag that we should re-check IRQ status registers again
+                * before leaving IRQ processing, this can net better
+                * performance in high throughput situations.
+                */
+               *done = false;
+       }
+
+       if (ret && (ret != -ECANCELED))
+               ath10k_warn(ar, "failed to get pending recv messages: %d\n",
+                           ret);
+
+       return ret;
+}
+
+static int ath10k_sdio_mbox_proc_dbg_intr(struct ath10k *ar)
+{
+       u32 val;
+       int ret;
+
+       /* TODO: Add firmware crash handling */
+       ath10k_warn(ar, "firmware crashed\n");
+
+       /* read counter to clear the interrupt, the debug error interrupt is
+        * counter 0.
+        */
+       ret = ath10k_sdio_read32(ar, MBOX_COUNT_DEC_ADDRESS, &val);
+       if (ret)
+               ath10k_warn(ar, "failed to clear debug interrupt: %d\n", ret);
+
+       return ret;
+}
+
+static int ath10k_sdio_mbox_proc_counter_intr(struct ath10k *ar)
+{
+       struct ath10k_sdio *ar_sdio = ath10k_sdio_priv(ar);
+       struct ath10k_sdio_irq_data *irq_data = &ar_sdio->irq_data;
+       u8 counter_int_status;
+       int ret;
+
+       mutex_lock(&irq_data->mtx);
+       counter_int_status = irq_data->irq_proc_reg->counter_int_status &
+                            irq_data->irq_en_reg->cntr_int_status_en;
+
+       /* NOTE: other modules like GMBOX may use the counter interrupt for
+        * credit flow control on other counters, we only need to check for
+        * the debug assertion counter interrupt.
+        */
+       if (counter_int_status & ATH10K_SDIO_TARGET_DEBUG_INTR_MASK)
+               ret = ath10k_sdio_mbox_proc_dbg_intr(ar);
+       else
+               ret = 0;
+
+       mutex_unlock(&irq_data->mtx);
+
+       return ret;
+}
+
+static int ath10k_sdio_mbox_proc_err_intr(struct ath10k *ar)
+{
+       struct ath10k_sdio *ar_sdio = ath10k_sdio_priv(ar);
+       struct ath10k_sdio_irq_data *irq_data = &ar_sdio->irq_data;
+       u8 error_int_status;
+       int ret;
+
+       ath10k_dbg(ar, ATH10K_DBG_SDIO, "sdio error interrupt\n");
+
+       error_int_status = irq_data->irq_proc_reg->error_int_status & 0x0F;
+       if (!error_int_status) {
+               ath10k_warn(ar, "invalid error interrupt status: 0x%x\n",
+                           error_int_status);
+               return -EIO;
+       }
+
+       ath10k_dbg(ar, ATH10K_DBG_SDIO,
+                  "sdio error_int_status 0x%x\n", error_int_status);
+
+       if (FIELD_GET(MBOX_ERROR_INT_STATUS_WAKEUP_MASK,
+                     error_int_status))
+               ath10k_dbg(ar, ATH10K_DBG_SDIO, "sdio interrupt error wakeup\n");
+
+       if (FIELD_GET(MBOX_ERROR_INT_STATUS_RX_UNDERFLOW_MASK,
+                     error_int_status))
+               ath10k_warn(ar, "rx underflow interrupt error\n");
+
+       if (FIELD_GET(MBOX_ERROR_INT_STATUS_TX_OVERFLOW_MASK,
+                     error_int_status))
+               ath10k_warn(ar, "tx overflow interrupt error\n");
+
+       /* Clear the interrupt */
+       irq_data->irq_proc_reg->error_int_status &= ~error_int_status;
+
+       /* set W1C value to clear the interrupt, this hits the register first */
+       ret = ath10k_sdio_writesb32(ar, MBOX_ERROR_INT_STATUS_ADDRESS,
+                                   error_int_status);
+       if (ret) {
+               ath10k_warn(ar, "unable to write to error int status address: %d\n",
+                           ret);
+               return ret;
+       }
+
+       return 0;
+}
+
+static int ath10k_sdio_mbox_proc_cpu_intr(struct ath10k *ar)
+{
+       struct ath10k_sdio *ar_sdio = ath10k_sdio_priv(ar);
+       struct ath10k_sdio_irq_data *irq_data = &ar_sdio->irq_data;
+       u8 cpu_int_status;
+       int ret;
+
+       mutex_lock(&irq_data->mtx);
+       cpu_int_status = irq_data->irq_proc_reg->cpu_int_status &
+                        irq_data->irq_en_reg->cpu_int_status_en;
+       if (!cpu_int_status) {
+               ath10k_warn(ar, "CPU interrupt status is zero\n");
+               ret = -EIO;
+               goto out;
+       }
+
+       /* Clear the interrupt */
+       irq_data->irq_proc_reg->cpu_int_status &= ~cpu_int_status;
+
+       /* Set up the register transfer buffer to hit the register 4 times,
+        * this is done to make the access 4-byte aligned to mitigate issues
+        * with host bus interconnects that restrict bus transfer lengths to
+        * be a multiple of 4-bytes.
+        *
+        * Set W1C value to clear the interrupt, this hits the register first.
+        */
+       ret = ath10k_sdio_writesb32(ar, MBOX_CPU_INT_STATUS_ADDRESS,
+                                   cpu_int_status);
+       if (ret) {
+               ath10k_warn(ar, "unable to write to cpu interrupt status address: %d\n",
+                           ret);
+               goto out;
+       }
+
+out:
+       mutex_unlock(&irq_data->mtx);
+       return ret;
+}
+
+static int ath10k_sdio_mbox_read_int_status(struct ath10k *ar,
+                                           u8 *host_int_status,
+                                           u32 *lookahead)
+{
+       struct ath10k_sdio *ar_sdio = ath10k_sdio_priv(ar);
+       struct ath10k_sdio_irq_data *irq_data = &ar_sdio->irq_data;
+       struct ath10k_sdio_irq_proc_regs *irq_proc_reg = irq_data->irq_proc_reg;
+       struct ath10k_sdio_irq_enable_regs *irq_en_reg = irq_data->irq_en_reg;
+       u8 htc_mbox = FIELD_PREP(ATH10K_HTC_MAILBOX_MASK, 1);
+       int ret;
+
+       mutex_lock(&irq_data->mtx);
+
+       *lookahead = 0;
+       *host_int_status = 0;
+
+       /* int_status_en is supposed to be non zero, otherwise interrupts
+        * shouldn't be enabled. There is however a short time frame during
+        * initialization between the irq register and int_status_en init
+        * where this can happen.
+        * We silently ignore this condition.
+        */
+       if (!irq_en_reg->int_status_en) {
+               ret = 0;
+               goto out;
+       }
+
+       /* Read the first sizeof(struct ath10k_irq_proc_registers)
+        * bytes of the HTC register table. This
+        * will yield us the value of different int status
+        * registers and the lookahead registers.
+        */
+       ret = ath10k_sdio_read(ar, MBOX_HOST_INT_STATUS_ADDRESS,
+                              irq_proc_reg, sizeof(*irq_proc_reg));
+       if (ret)
+               goto out;
+
+       /* Update only those registers that are enabled */
+       *host_int_status = irq_proc_reg->host_int_status &
+                          irq_en_reg->int_status_en;
+
+       /* Look at mbox status */
+       if (!(*host_int_status & htc_mbox)) {
+               *lookahead = 0;
+               ret = 0;
+               goto out;
+       }
+
+       /* Mask out pending mbox value, we use look ahead as
+        * the real flag for mbox processing.
+        */
+       *host_int_status &= ~htc_mbox;
+       if (irq_proc_reg->rx_lookahead_valid & htc_mbox) {
+               *lookahead = le32_to_cpu(
+                       irq_proc_reg->rx_lookahead[ATH10K_HTC_MAILBOX]);
+               if (!*lookahead)
+                       ath10k_warn(ar, "sdio mbox lookahead is zero\n");
+       }
+
+out:
+       mutex_unlock(&irq_data->mtx);
+       return ret;
+}
+
+static int ath10k_sdio_mbox_proc_pending_irqs(struct ath10k *ar,
+                                             bool *done)
+{
+       u8 host_int_status;
+       u32 lookahead;
+       int ret;
+
+       /* NOTE: HIF implementation guarantees that the context of this
+        * call allows us to perform SYNCHRONOUS I/O, that is we can block,
+        * sleep or call any API that can block or switch thread/task
+        * contexts. This is a fully schedulable context.
+        */
+
+       ret = ath10k_sdio_mbox_read_int_status(ar,
+                                              &host_int_status,
+                                              &lookahead);
+       if (ret) {
+               *done = true;
+               goto out;
+       }
+
+       if (!host_int_status && !lookahead) {
+               ret = 0;
+               *done = true;
+               goto out;
+       }
+
+       if (lookahead) {
+               ath10k_dbg(ar, ATH10K_DBG_SDIO,
+                          "sdio pending mailbox msg lookahead 0x%08x\n",
+                          lookahead);
+
+               ret = ath10k_sdio_mbox_rxmsg_pending_handler(ar,
+                                                            lookahead,
+                                                            done);
+               if (ret)
+                       goto out;
+       }
+
+       /* now, handle the rest of the interrupts */
+       ath10k_dbg(ar, ATH10K_DBG_SDIO,
+                  "sdio host_int_status 0x%x\n", host_int_status);
+
+       if (FIELD_GET(MBOX_HOST_INT_STATUS_CPU_MASK, host_int_status)) {
+               /* CPU Interrupt */
+               ret = ath10k_sdio_mbox_proc_cpu_intr(ar);
+               if (ret)
+                       goto out;
+       }
+
+       if (FIELD_GET(MBOX_HOST_INT_STATUS_ERROR_MASK, host_int_status)) {
+               /* Error Interrupt */
+               ret = ath10k_sdio_mbox_proc_err_intr(ar);
+               if (ret)
+                       goto out;
+       }
+
+       if (FIELD_GET(MBOX_HOST_INT_STATUS_COUNTER_MASK, host_int_status))
+               /* Counter Interrupt */
+               ret = ath10k_sdio_mbox_proc_counter_intr(ar);
+
+       ret = 0;
+
+out:
+       /* An optimization to bypass reading the IRQ status registers
+        * unecessarily which can re-wake the target, if upper layers
+        * determine that we are in a low-throughput mode, we can rely on
+        * taking another interrupt rather than re-checking the status
+        * registers which can re-wake the target.
+        *
+        * NOTE : for host interfaces that makes use of detecting pending
+        * mbox messages at hif can not use this optimization due to
+        * possible side effects, SPI requires the host to drain all
+        * messages from the mailbox before exiting the ISR routine.
+        */
+
+       ath10k_dbg(ar, ATH10K_DBG_SDIO,
+                  "sdio pending irqs done %d status %d",
+                  *done, ret);
+
+       return ret;
+}
+
+static void ath10k_sdio_set_mbox_info(struct ath10k *ar)
+{
+       struct ath10k_sdio *ar_sdio = ath10k_sdio_priv(ar);
+       struct ath10k_mbox_info *mbox_info = &ar_sdio->mbox_info;
+       u16 device = ar_sdio->func->device, dev_id_base, dev_id_chiprev;
+
+       mbox_info->htc_addr = ATH10K_HIF_MBOX_BASE_ADDR;
+       mbox_info->block_size = ATH10K_HIF_MBOX_BLOCK_SIZE;
+       mbox_info->block_mask = ATH10K_HIF_MBOX_BLOCK_SIZE - 1;
+       mbox_info->gmbox_addr = ATH10K_HIF_GMBOX_BASE_ADDR;
+       mbox_info->gmbox_sz = ATH10K_HIF_GMBOX_WIDTH;
+
+       mbox_info->ext_info[0].htc_ext_addr = ATH10K_HIF_MBOX0_EXT_BASE_ADDR;
+
+       dev_id_base = FIELD_GET(QCA_MANUFACTURER_ID_BASE, device);
+       dev_id_chiprev = FIELD_GET(QCA_MANUFACTURER_ID_REV_MASK, device);
+       switch (dev_id_base) {
+       case QCA_MANUFACTURER_ID_AR6005_BASE:
+               if (dev_id_chiprev < 4)
+                       mbox_info->ext_info[0].htc_ext_sz =
+                               ATH10K_HIF_MBOX0_EXT_WIDTH;
+               else
+                       /* from QCA6174 2.0(0x504), the width has been extended
+                        * to 56K
+                        */
+                       mbox_info->ext_info[0].htc_ext_sz =
+                               ATH10K_HIF_MBOX0_EXT_WIDTH_ROME_2_0;
+               break;
+       case QCA_MANUFACTURER_ID_QCA9377_BASE:
+               mbox_info->ext_info[0].htc_ext_sz =
+                       ATH10K_HIF_MBOX0_EXT_WIDTH_ROME_2_0;
+               break;
+       default:
+               mbox_info->ext_info[0].htc_ext_sz =
+                               ATH10K_HIF_MBOX0_EXT_WIDTH;
+       }
+
+       mbox_info->ext_info[1].htc_ext_addr =
+               mbox_info->ext_info[0].htc_ext_addr +
+               mbox_info->ext_info[0].htc_ext_sz +
+               ATH10K_HIF_MBOX_DUMMY_SPACE_SIZE;
+       mbox_info->ext_info[1].htc_ext_sz = ATH10K_HIF_MBOX1_EXT_WIDTH;
+}
+
+/* BMI functions */
+
+static int ath10k_sdio_bmi_credits(struct ath10k *ar)
+{
+       u32 addr, cmd_credits;
+       unsigned long timeout;
+       int ret;
+
+       /* Read the counter register to get the command credits */
+       addr = MBOX_COUNT_DEC_ADDRESS + ATH10K_HIF_MBOX_NUM_MAX * 4;
+       timeout = jiffies + BMI_COMMUNICATION_TIMEOUT_HZ;
+       cmd_credits = 0;
+
+       while (time_before(jiffies, timeout) && !cmd_credits) {
+               /* Hit the credit counter with a 4-byte access, the first byte
+                * read will hit the counter and cause a decrement, while the
+                * remaining 3 bytes has no effect. The rationale behind this
+                * is to make all HIF accesses 4-byte aligned.
+                */
+               ret = ath10k_sdio_read32(ar, addr, &cmd_credits);
+               if (ret) {
+                       ath10k_warn(ar,
+                                   "unable to decrement the command credit count register: %d\n",
+                                   ret);
+                       return ret;
+               }
+
+               /* The counter is only 8 bits.
+                * Ignore anything in the upper 3 bytes
+                */
+               cmd_credits &= 0xFF;
+       }
+
+       if (!cmd_credits) {
+               ath10k_warn(ar, "bmi communication timeout\n");
+               return -ETIMEDOUT;
+       }
+
+       return 0;
+}
+
+static int ath10k_sdio_bmi_get_rx_lookahead(struct ath10k *ar)
+{
+       unsigned long timeout;
+       u32 rx_word;
+       int ret;
+
+       timeout = jiffies + BMI_COMMUNICATION_TIMEOUT_HZ;
+       rx_word = 0;
+
+       while ((time_before(jiffies, timeout)) && !rx_word) {
+               ret = ath10k_sdio_read32(ar,
+                                        MBOX_HOST_INT_STATUS_ADDRESS,
+                                        &rx_word);
+               if (ret) {
+                       ath10k_warn(ar, "unable to read RX_LOOKAHEAD_VALID: %d\n", ret);
+                       return ret;
+               }
+
+                /* all we really want is one bit */
+               rx_word &= 1;
+       }
+
+       if (!rx_word) {
+               ath10k_warn(ar, "bmi_recv_buf FIFO empty\n");
+               return -EINVAL;
+       }
+
+       return ret;
+}
+
+static int ath10k_sdio_bmi_exchange_msg(struct ath10k *ar,
+                                       void *req, u32 req_len,
+                                       void *resp, u32 *resp_len)
+{
+       struct ath10k_sdio *ar_sdio = ath10k_sdio_priv(ar);
+       u32 addr;
+       int ret;
+
+       if (req) {
+               ret = ath10k_sdio_bmi_credits(ar);
+               if (ret)
+                       return ret;
+
+               addr = ar_sdio->mbox_info.htc_addr;
+
+               memcpy(ar_sdio->bmi_buf, req, req_len);
+               ret = ath10k_sdio_write(ar, addr, ar_sdio->bmi_buf, req_len);
+               if (ret) {
+                       ath10k_warn(ar,
+                                   "unable to send the bmi data to the device: %d\n",
+                                   ret);
+                       return ret;
+               }
+       }
+
+       if (!resp || !resp_len)
+               /* No response expected */
+               return 0;
+
+       /* During normal bootup, small reads may be required.
+        * Rather than issue an HIF Read and then wait as the Target
+        * adds successive bytes to the FIFO, we wait here until
+        * we know that response data is available.
+        *
+        * This allows us to cleanly timeout on an unexpected
+        * Target failure rather than risk problems at the HIF level.
+        * In particular, this avoids SDIO timeouts and possibly garbage
+        * data on some host controllers.  And on an interconnect
+        * such as Compact Flash (as well as some SDIO masters) which
+        * does not provide any indication on data timeout, it avoids
+        * a potential hang or garbage response.
+        *
+        * Synchronization is more difficult for reads larger than the
+        * size of the MBOX FIFO (128B), because the Target is unable
+        * to push the 129th byte of data until AFTER the Host posts an
+        * HIF Read and removes some FIFO data.  So for large reads the
+        * Host proceeds to post an HIF Read BEFORE all the data is
+        * actually available to read.  Fortunately, large BMI reads do
+        * not occur in practice -- they're supported for debug/development.
+        *
+        * So Host/Target BMI synchronization is divided into these cases:
+        *  CASE 1: length < 4
+        *        Should not happen
+        *
+        *  CASE 2: 4 <= length <= 128
+        *        Wait for first 4 bytes to be in FIFO
+        *        If CONSERVATIVE_BMI_READ is enabled, also wait for
+        *        a BMI command credit, which indicates that the ENTIRE
+        *        response is available in the the FIFO
+        *
+        *  CASE 3: length > 128
+        *        Wait for the first 4 bytes to be in FIFO
+        *
+        * For most uses, a small timeout should be sufficient and we will
+        * usually see a response quickly; but there may be some unusual
+        * (debug) cases of BMI_EXECUTE where we want an larger timeout.
+        * For now, we use an unbounded busy loop while waiting for
+        * BMI_EXECUTE.
+        *
+        * If BMI_EXECUTE ever needs to support longer-latency execution,
+        * especially in production, this code needs to be enhanced to sleep
+        * and yield.  Also note that BMI_COMMUNICATION_TIMEOUT is currently
+        * a function of Host processor speed.
+        */
+       ret = ath10k_sdio_bmi_get_rx_lookahead(ar);
+       if (ret)
+               return ret;
+
+       /* We always read from the start of the mbox address */
+       addr = ar_sdio->mbox_info.htc_addr;
+       ret = ath10k_sdio_read(ar, addr, ar_sdio->bmi_buf, *resp_len);
+       if (ret) {
+               ath10k_warn(ar,
+                           "unable to read the bmi data from the device: %d\n",
+                           ret);
+               return ret;
+       }
+
+       memcpy(resp, ar_sdio->bmi_buf, *resp_len);
+
+       return 0;
+}
+
+/* sdio async handling functions */
+
+static struct ath10k_sdio_bus_request
+*ath10k_sdio_alloc_busreq(struct ath10k *ar)
+{
+       struct ath10k_sdio *ar_sdio = ath10k_sdio_priv(ar);
+       struct ath10k_sdio_bus_request *bus_req;
+
+       spin_lock_bh(&ar_sdio->lock);
+
+       if (list_empty(&ar_sdio->bus_req_freeq)) {
+               bus_req = NULL;
+               goto out;
+       }
+
+       bus_req = list_first_entry(&ar_sdio->bus_req_freeq,
+                                  struct ath10k_sdio_bus_request, list);
+       list_del(&bus_req->list);
+
+out:
+       spin_unlock_bh(&ar_sdio->lock);
+       return bus_req;
+}
+
+static void ath10k_sdio_free_bus_req(struct ath10k *ar,
+                                    struct ath10k_sdio_bus_request *bus_req)
+{
+       struct ath10k_sdio *ar_sdio = ath10k_sdio_priv(ar);
+
+       memset(bus_req, 0, sizeof(*bus_req));
+
+       spin_lock_bh(&ar_sdio->lock);
+       list_add_tail(&bus_req->list, &ar_sdio->bus_req_freeq);
+       spin_unlock_bh(&ar_sdio->lock);
+}
+
+static void __ath10k_sdio_write_async(struct ath10k *ar,
+                                     struct ath10k_sdio_bus_request *req)
+{
+       struct ath10k_htc_ep *ep;
+       struct sk_buff *skb;
+       int ret;
+
+       skb = req->skb;
+       ret = ath10k_sdio_write(ar, req->address, skb->data, skb->len);
+       if (ret)
+               ath10k_warn(ar, "failed to write skb to 0x%x asynchronously: %d",
+                           req->address, ret);
+
+       if (req->htc_msg) {
+               ep = &ar->htc.endpoint[req->eid];
+               ath10k_htc_notify_tx_completion(ep, skb);
+       } else if (req->comp) {
+               complete(req->comp);
+       }
+
+       ath10k_sdio_free_bus_req(ar, req);
+}
+
+static void ath10k_sdio_write_async_work(struct work_struct *work)
+{
+       struct ath10k_sdio *ar_sdio = container_of(work, struct ath10k_sdio,
+                                                  wr_async_work);
+       struct ath10k *ar = ar_sdio->ar;
+       struct ath10k_sdio_bus_request *req, *tmp_req;
+
+       spin_lock_bh(&ar_sdio->wr_async_lock);
+
+       list_for_each_entry_safe(req, tmp_req, &ar_sdio->wr_asyncq, list) {
+               list_del(&req->list);
+               spin_unlock_bh(&ar_sdio->wr_async_lock);
+               __ath10k_sdio_write_async(ar, req);
+               spin_lock_bh(&ar_sdio->wr_async_lock);
+       }
+
+       spin_unlock_bh(&ar_sdio->wr_async_lock);
+}
+
+static int ath10k_sdio_prep_async_req(struct ath10k *ar, u32 addr,
+                                     struct sk_buff *skb,
+                                     struct completion *comp,
+                                     bool htc_msg, enum ath10k_htc_ep_id eid)
+{
+       struct ath10k_sdio *ar_sdio = ath10k_sdio_priv(ar);
+       struct ath10k_sdio_bus_request *bus_req;
+
+       /* Allocate a bus request for the message and queue it on the
+        * SDIO workqueue.
+        */
+       bus_req = ath10k_sdio_alloc_busreq(ar);
+       if (!bus_req) {
+               ath10k_warn(ar,
+                           "unable to allocate bus request for async request\n");
+               return -ENOMEM;
+       }
+
+       bus_req->skb = skb;
+       bus_req->eid = eid;
+       bus_req->address = addr;
+       bus_req->htc_msg = htc_msg;
+       bus_req->comp = comp;
+
+       spin_lock_bh(&ar_sdio->wr_async_lock);
+       list_add_tail(&bus_req->list, &ar_sdio->wr_asyncq);
+       spin_unlock_bh(&ar_sdio->wr_async_lock);
+
+       return 0;
+}
+
+/* IRQ handler */
+
+static void ath10k_sdio_irq_handler(struct sdio_func *func)
+{
+       struct ath10k_sdio *ar_sdio = sdio_get_drvdata(func);
+       struct ath10k *ar = ar_sdio->ar;
+       unsigned long timeout;
+       bool done = false;
+       int ret;
+
+       /* Release the host during interrupts so we can pick it back up when
+        * we process commands.
+        */
+       sdio_release_host(ar_sdio->func);
+
+       timeout = jiffies + ATH10K_SDIO_HIF_COMMUNICATION_TIMEOUT_HZ;
+       while (time_before(jiffies, timeout) && !done) {
+               ret = ath10k_sdio_mbox_proc_pending_irqs(ar, &done);
+               if (ret)
+                       break;
+       }
+
+       sdio_claim_host(ar_sdio->func);
+
+       wake_up(&ar_sdio->irq_wq);
+
+       if (ret && ret != -ECANCELED)
+               ath10k_warn(ar, "failed to process pending SDIO interrupts: %d\n",
+                           ret);
+}
+
+/* sdio HIF functions */
+
+static int ath10k_sdio_hif_disable_intrs(struct ath10k *ar)
+{
+       struct ath10k_sdio *ar_sdio = ath10k_sdio_priv(ar);
+       struct ath10k_sdio_irq_data *irq_data = &ar_sdio->irq_data;
+       struct ath10k_sdio_irq_enable_regs *regs = irq_data->irq_en_reg;
+       int ret;
+
+       mutex_lock(&irq_data->mtx);
+
+       memset(regs, 0, sizeof(*regs));
+       ret = ath10k_sdio_write(ar, MBOX_INT_STATUS_ENABLE_ADDRESS,
+                               &regs->int_status_en, sizeof(*regs));
+       if (ret)
+               ath10k_warn(ar, "unable to disable sdio interrupts: %d\n", ret);
+
+       mutex_unlock(&irq_data->mtx);
+
+       return ret;
+}
+
+static int ath10k_sdio_hif_power_up(struct ath10k *ar)
+{
+       struct ath10k_sdio *ar_sdio = ath10k_sdio_priv(ar);
+       struct sdio_func *func = ar_sdio->func;
+       int ret;
+
+       if (!ar_sdio->is_disabled)
+               return 0;
+
+       ath10k_dbg(ar, ATH10K_DBG_BOOT, "sdio power on\n");
+
+       sdio_claim_host(func);
+
+       ret = sdio_enable_func(func);
+       if (ret) {
+               ath10k_warn(ar, "unable to enable sdio function: %d)\n", ret);
+               sdio_release_host(func);
+               return ret;
+       }
+
+       sdio_release_host(func);
+
+       /* Wait for hardware to initialise. It should take a lot less than
+        * 20 ms but let's be conservative here.
+        */
+       msleep(20);
+
+       ar_sdio->is_disabled = false;
+
+       ret = ath10k_sdio_hif_disable_intrs(ar);
+       if (ret)
+               return ret;
+
+       return 0;
+}
+
+static void ath10k_sdio_hif_power_down(struct ath10k *ar)
+{
+       struct ath10k_sdio *ar_sdio = ath10k_sdio_priv(ar);
+       int ret;
+
+       if (ar_sdio->is_disabled)
+               return;
+
+       ath10k_dbg(ar, ATH10K_DBG_BOOT, "sdio power off\n");
+
+       /* Disable the card */
+       sdio_claim_host(ar_sdio->func);
+       ret = sdio_disable_func(ar_sdio->func);
+       sdio_release_host(ar_sdio->func);
+
+       if (ret)
+               ath10k_warn(ar, "unable to disable sdio function: %d\n", ret);
+
+       ar_sdio->is_disabled = true;
+}
+
+static int ath10k_sdio_hif_tx_sg(struct ath10k *ar, u8 pipe_id,
+                                struct ath10k_hif_sg_item *items, int n_items)
+{
+       struct ath10k_sdio *ar_sdio = ath10k_sdio_priv(ar);
+       enum ath10k_htc_ep_id eid;
+       struct sk_buff *skb;
+       int ret, i;
+
+       eid = pipe_id_to_eid(pipe_id);
+
+       for (i = 0; i < n_items; i++) {
+               size_t padded_len;
+               u32 address;
+
+               skb = items[i].transfer_context;
+               padded_len = ath10k_sdio_calc_txrx_padded_len(ar_sdio,
+                                                             skb->len);
+               skb_trim(skb, padded_len);
+
+               /* Write TX data to the end of the mbox address space */
+               address = ar_sdio->mbox_addr[eid] + ar_sdio->mbox_size[eid] -
+                         skb->len;
+               ret = ath10k_sdio_prep_async_req(ar, address, skb,
+                                                NULL, true, eid);
+               if (ret)
+                       return ret;
+       }
+
+       queue_work(ar_sdio->workqueue, &ar_sdio->wr_async_work);
+
+       return 0;
+}
+
+static int ath10k_sdio_hif_enable_intrs(struct ath10k *ar)
+{
+       struct ath10k_sdio *ar_sdio = ath10k_sdio_priv(ar);
+       struct ath10k_sdio_irq_data *irq_data = &ar_sdio->irq_data;
+       struct ath10k_sdio_irq_enable_regs *regs = irq_data->irq_en_reg;
+       int ret;
+
+       mutex_lock(&irq_data->mtx);
+
+       /* Enable all but CPU interrupts */
+       regs->int_status_en = FIELD_PREP(MBOX_INT_STATUS_ENABLE_ERROR_MASK, 1) |
+                             FIELD_PREP(MBOX_INT_STATUS_ENABLE_CPU_MASK, 1) |
+                             FIELD_PREP(MBOX_INT_STATUS_ENABLE_COUNTER_MASK, 1);
+
+       /* NOTE: There are some cases where HIF can do detection of
+        * pending mbox messages which is disabled now.
+        */
+       regs->int_status_en |=
+               FIELD_PREP(MBOX_INT_STATUS_ENABLE_MBOX_DATA_MASK, 1);
+
+       /* Set up the CPU Interrupt status Register */
+       regs->cpu_int_status_en = 0;
+
+       /* Set up the Error Interrupt status Register */
+       regs->err_int_status_en =
+               FIELD_PREP(MBOX_ERROR_STATUS_ENABLE_RX_UNDERFLOW_MASK, 1) |
+               FIELD_PREP(MBOX_ERROR_STATUS_ENABLE_TX_OVERFLOW_MASK, 1);
+
+       /* Enable Counter interrupt status register to get fatal errors for
+        * debugging.
+        */
+       regs->cntr_int_status_en =
+               FIELD_PREP(MBOX_COUNTER_INT_STATUS_ENABLE_BIT_MASK,
+                          ATH10K_SDIO_TARGET_DEBUG_INTR_MASK);
+
+       ret = ath10k_sdio_write(ar, MBOX_INT_STATUS_ENABLE_ADDRESS,
+                               &regs->int_status_en, sizeof(*regs));
+       if (ret)
+               ath10k_warn(ar,
+                           "failed to update mbox interrupt status register : %d\n",
+                           ret);
+
+       mutex_unlock(&irq_data->mtx);
+       return ret;
+}
+
+static int ath10k_sdio_hif_set_mbox_sleep(struct ath10k *ar, bool enable_sleep)
+{
+       u32 val;
+       int ret;
+
+       ret = ath10k_sdio_read32(ar, ATH10K_FIFO_TIMEOUT_AND_CHIP_CONTROL, &val);
+       if (ret) {
+               ath10k_warn(ar, "failed to read fifo/chip control register: %d\n",
+                           ret);
+               return ret;
+       }
+
+       if (enable_sleep)
+               val &= ATH10K_FIFO_TIMEOUT_AND_CHIP_CONTROL_DISABLE_SLEEP_OFF;
+       else
+               val |= ATH10K_FIFO_TIMEOUT_AND_CHIP_CONTROL_DISABLE_SLEEP_ON;
+
+       ret = ath10k_sdio_write32(ar, ATH10K_FIFO_TIMEOUT_AND_CHIP_CONTROL, val);
+       if (ret) {
+               ath10k_warn(ar, "failed to write to FIFO_TIMEOUT_AND_CHIP_CONTROL: %d",
+                           ret);
+               return ret;
+       }
+
+       return 0;
+}
+
+/* HIF diagnostics */
+
+static int ath10k_sdio_hif_diag_read(struct ath10k *ar, u32 address, void *buf,
+                                    size_t buf_len)
+{
+       int ret;
+
+       /* set window register to start read cycle */
+       ret = ath10k_sdio_write32(ar, MBOX_WINDOW_READ_ADDR_ADDRESS, address);
+       if (ret) {
+               ath10k_warn(ar, "failed to set mbox window read address: %d", ret);
+               return ret;
+       }
+
+       /* read the data */
+       ret = ath10k_sdio_read(ar, MBOX_WINDOW_DATA_ADDRESS, buf, buf_len);
+       if (ret) {
+               ath10k_warn(ar, "failed to read from mbox window data addrress: %d\n",
+                           ret);
+               return ret;
+       }
+
+       return 0;
+}
+
+static int ath10k_sdio_hif_diag_read32(struct ath10k *ar, u32 address,
+                                      u32 *value)
+{
+       __le32 *val;
+       int ret;
+
+       val = kzalloc(sizeof(*val), GFP_KERNEL);
+       if (!val)
+               return -ENOMEM;
+
+       ret = ath10k_sdio_hif_diag_read(ar, address, val, sizeof(*val));
+       if (ret)
+               goto out;
+
+       *value = __le32_to_cpu(*val);
+
+out:
+       kfree(val);
+
+       return ret;
+}
+
+static int ath10k_sdio_hif_diag_write_mem(struct ath10k *ar, u32 address,
+                                         const void *data, int nbytes)
+{
+       int ret;
+
+       /* set write data */
+       ret = ath10k_sdio_write(ar, MBOX_WINDOW_DATA_ADDRESS, data, nbytes);
+       if (ret) {
+               ath10k_warn(ar,
+                           "failed to write 0x%p to mbox window data addrress: %d\n",
+                           data, ret);
+               return ret;
+       }
+
+       /* set window register, which starts the write cycle */
+       ret = ath10k_sdio_write32(ar, MBOX_WINDOW_WRITE_ADDR_ADDRESS, address);
+       if (ret) {
+               ath10k_warn(ar, "failed to set mbox window write address: %d", ret);
+               return ret;
+       }
+
+       return 0;
+}
+
+/* HIF start/stop */
+
+static int ath10k_sdio_hif_start(struct ath10k *ar)
+{
+       struct ath10k_sdio *ar_sdio = ath10k_sdio_priv(ar);
+       u32 addr, val;
+       int ret;
+
+       /* Sleep 20 ms before HIF interrupts are disabled.
+        * This will give target plenty of time to process the BMI done
+        * request before interrupts are disabled.
+        */
+       msleep(20);
+       ret = ath10k_sdio_hif_disable_intrs(ar);
+       if (ret)
+               return ret;
+
+       /* eid 0 always uses the lower part of the extended mailbox address
+        * space (ext_info[0].htc_ext_addr).
+        */
+       ar_sdio->mbox_addr[0] = ar_sdio->mbox_info.ext_info[0].htc_ext_addr;
+       ar_sdio->mbox_size[0] = ar_sdio->mbox_info.ext_info[0].htc_ext_sz;
+
+       sdio_claim_host(ar_sdio->func);
+
+       /* Register the isr */
+       ret =  sdio_claim_irq(ar_sdio->func, ath10k_sdio_irq_handler);
+       if (ret) {
+               ath10k_warn(ar, "failed to claim sdio interrupt: %d\n", ret);
+               sdio_release_host(ar_sdio->func);
+               return ret;
+       }
+
+       sdio_release_host(ar_sdio->func);
+
+       ret = ath10k_sdio_hif_enable_intrs(ar);
+       if (ret)
+               ath10k_warn(ar, "failed to enable sdio interrupts: %d\n", ret);
+
+       addr = host_interest_item_address(HI_ITEM(hi_acs_flags));
+
+       ret = ath10k_sdio_hif_diag_read32(ar, addr, &val);
+       if (ret) {
+               ath10k_warn(ar, "unable to read hi_acs_flags address: %d\n", ret);
+               return ret;
+       }
+
+       if (val & HI_ACS_FLAGS_SDIO_SWAP_MAILBOX_FW_ACK) {
+               ath10k_dbg(ar, ATH10K_DBG_SDIO,
+                          "sdio mailbox swap service enabled\n");
+               ar_sdio->swap_mbox = true;
+       }
+
+       /* Enable sleep and then disable it again */
+       ret = ath10k_sdio_hif_set_mbox_sleep(ar, true);
+       if (ret)
+               return ret;
+
+       /* Wait for 20ms for the written value to take effect */
+       msleep(20);
+
+       ret = ath10k_sdio_hif_set_mbox_sleep(ar, false);
+       if (ret)
+               return ret;
+
+       return 0;
+}
+
+#define SDIO_IRQ_DISABLE_TIMEOUT_HZ (3 * HZ)
+
+static void ath10k_sdio_irq_disable(struct ath10k *ar)
+{
+       struct ath10k_sdio *ar_sdio = ath10k_sdio_priv(ar);
+       struct ath10k_sdio_irq_data *irq_data = &ar_sdio->irq_data;
+       struct ath10k_sdio_irq_enable_regs *regs = irq_data->irq_en_reg;
+       struct sk_buff *skb;
+       struct completion irqs_disabled_comp;
+       int ret;
+
+       skb = dev_alloc_skb(sizeof(*regs));
+       if (!skb)
+               return;
+
+       mutex_lock(&irq_data->mtx);
+
+       memset(regs, 0, sizeof(*regs)); /* disable all interrupts */
+       memcpy(skb->data, regs, sizeof(*regs));
+       skb_put(skb, sizeof(*regs));
+
+       mutex_unlock(&irq_data->mtx);
+
+       init_completion(&irqs_disabled_comp);
+       ret = ath10k_sdio_prep_async_req(ar, MBOX_INT_STATUS_ENABLE_ADDRESS,
+                                        skb, &irqs_disabled_comp, false, 0);
+       if (ret)
+               goto out;
+
+       queue_work(ar_sdio->workqueue, &ar_sdio->wr_async_work);
+
+       /* Wait for the completion of the IRQ disable request.
+        * If there is a timeout we will try to disable irq's anyway.
+        */
+       ret = wait_for_completion_timeout(&irqs_disabled_comp,
+                                         SDIO_IRQ_DISABLE_TIMEOUT_HZ);
+       if (!ret)
+               ath10k_warn(ar, "sdio irq disable request timed out\n");
+
+       sdio_claim_host(ar_sdio->func);
+
+       ret = sdio_release_irq(ar_sdio->func);
+       if (ret)
+               ath10k_warn(ar, "failed to release sdio interrupt: %d\n", ret);
+
+       sdio_release_host(ar_sdio->func);
+
+out:
+       kfree_skb(skb);
+}
+
+static void ath10k_sdio_hif_stop(struct ath10k *ar)
+{
+       struct ath10k_sdio_bus_request *req, *tmp_req;
+       struct ath10k_sdio *ar_sdio = ath10k_sdio_priv(ar);
+
+       ath10k_sdio_irq_disable(ar);
+
+       cancel_work_sync(&ar_sdio->wr_async_work);
+
+       spin_lock_bh(&ar_sdio->wr_async_lock);
+
+       /* Free all bus requests that have not been handled */
+       list_for_each_entry_safe(req, tmp_req, &ar_sdio->wr_asyncq, list) {
+               struct ath10k_htc_ep *ep;
+
+               list_del(&req->list);
+
+               if (req->htc_msg) {
+                       ep = &ar->htc.endpoint[req->eid];
+                       ath10k_htc_notify_tx_completion(ep, req->skb);
+               } else if (req->skb) {
+                       kfree_skb(req->skb);
+               }
+               ath10k_sdio_free_bus_req(ar, req);
+       }
+
+       spin_unlock_bh(&ar_sdio->wr_async_lock);
+}
+
+#ifdef CONFIG_PM
+
+static int ath10k_sdio_hif_suspend(struct ath10k *ar)
+{
+       return -EOPNOTSUPP;
+}
+
+static int ath10k_sdio_hif_resume(struct ath10k *ar)
+{
+       switch (ar->state) {
+       case ATH10K_STATE_OFF:
+               ath10k_dbg(ar, ATH10K_DBG_SDIO,
+                          "sdio resume configuring sdio\n");
+
+               /* need to set sdio settings after power is cut from sdio */
+               ath10k_sdio_config(ar);
+               break;
+
+       case ATH10K_STATE_ON:
+       default:
+               break;
+       }
+
+       return 0;
+}
+#endif
+
+static int ath10k_sdio_hif_map_service_to_pipe(struct ath10k *ar,
+                                              u16 service_id,
+                                              u8 *ul_pipe, u8 *dl_pipe)
+{
+       struct ath10k_sdio *ar_sdio = ath10k_sdio_priv(ar);
+       struct ath10k_htc *htc = &ar->htc;
+       u32 htt_addr, wmi_addr, htt_mbox_size, wmi_mbox_size;
+       enum ath10k_htc_ep_id eid;
+       bool ep_found = false;
+       int i;
+
+       /* For sdio, we are interested in the mapping between eid
+        * and pipeid rather than service_id to pipe_id.
+        * First we find out which eid has been allocated to the
+        * service...
+        */
+       for (i = 0; i < ATH10K_HTC_EP_COUNT; i++) {
+               if (htc->endpoint[i].service_id == service_id) {
+                       eid = htc->endpoint[i].eid;
+                       ep_found = true;
+                       break;
+               }
+       }
+
+       if (!ep_found)
+               return -EINVAL;
+
+       /* Then we create the simplest mapping possible between pipeid
+        * and eid
+        */
+       *ul_pipe = *dl_pipe = (u8)eid;
+
+       /* Normally, HTT will use the upper part of the extended
+        * mailbox address space (ext_info[1].htc_ext_addr) and WMI ctrl
+        * the lower part (ext_info[0].htc_ext_addr).
+        * If fw wants swapping of mailbox addresses, the opposite is true.
+        */
+       if (ar_sdio->swap_mbox) {
+               htt_addr = ar_sdio->mbox_info.ext_info[0].htc_ext_addr;
+               wmi_addr = ar_sdio->mbox_info.ext_info[1].htc_ext_addr;
+               htt_mbox_size = ar_sdio->mbox_info.ext_info[0].htc_ext_sz;
+               wmi_mbox_size = ar_sdio->mbox_info.ext_info[1].htc_ext_sz;
+       } else {
+               htt_addr = ar_sdio->mbox_info.ext_info[1].htc_ext_addr;
+               wmi_addr = ar_sdio->mbox_info.ext_info[0].htc_ext_addr;
+               htt_mbox_size = ar_sdio->mbox_info.ext_info[1].htc_ext_sz;
+               wmi_mbox_size = ar_sdio->mbox_info.ext_info[0].htc_ext_sz;
+       }
+
+       switch (service_id) {
+       case ATH10K_HTC_SVC_ID_RSVD_CTRL:
+               /* HTC ctrl ep mbox address has already been setup in
+                * ath10k_sdio_hif_start
+                */
+               break;
+       case ATH10K_HTC_SVC_ID_WMI_CONTROL:
+               ar_sdio->mbox_addr[eid] = wmi_addr;
+               ar_sdio->mbox_size[eid] = wmi_mbox_size;
+               ath10k_dbg(ar, ATH10K_DBG_SDIO,
+                          "sdio wmi ctrl mbox_addr 0x%x mbox_size %d\n",
+                          ar_sdio->mbox_addr[eid], ar_sdio->mbox_size[eid]);
+               break;
+       case ATH10K_HTC_SVC_ID_HTT_DATA_MSG:
+               ar_sdio->mbox_addr[eid] = htt_addr;
+               ar_sdio->mbox_size[eid] = htt_mbox_size;
+               ath10k_dbg(ar, ATH10K_DBG_SDIO,
+                          "sdio htt data mbox_addr 0x%x mbox_size %d\n",
+                          ar_sdio->mbox_addr[eid], ar_sdio->mbox_size[eid]);
+               break;
+       default:
+               ath10k_warn(ar, "unsupported HTC service id: %d\n",
+                           service_id);
+               return -EINVAL;
+       }
+
+       return 0;
+}
+
+static void ath10k_sdio_hif_get_default_pipe(struct ath10k *ar,
+                                            u8 *ul_pipe, u8 *dl_pipe)
+{
+       ath10k_dbg(ar, ATH10K_DBG_SDIO, "sdio hif get default pipe\n");
+
+       /* HTC ctrl ep (SVC id 1) always has eid (and pipe_id in our
+        * case) == 0
+        */
+       *ul_pipe = 0;
+       *dl_pipe = 0;
+}
+
+/* This op is currently only used by htc_wait_target if the HTC ready
+ * message times out. It is not applicable for SDIO since there is nothing
+ * we can do if the HTC ready message does not arrive in time.
+ * TODO: Make this op non mandatory by introducing a NULL check in the
+ * hif op wrapper.
+ */
+static void ath10k_sdio_hif_send_complete_check(struct ath10k *ar,
+                                               u8 pipe, int force)
+{
+}
+
+static const struct ath10k_hif_ops ath10k_sdio_hif_ops = {
+       .tx_sg                  = ath10k_sdio_hif_tx_sg,
+       .diag_read              = ath10k_sdio_hif_diag_read,
+       .diag_write             = ath10k_sdio_hif_diag_write_mem,
+       .exchange_bmi_msg       = ath10k_sdio_bmi_exchange_msg,
+       .start                  = ath10k_sdio_hif_start,
+       .stop                   = ath10k_sdio_hif_stop,
+       .map_service_to_pipe    = ath10k_sdio_hif_map_service_to_pipe,
+       .get_default_pipe       = ath10k_sdio_hif_get_default_pipe,
+       .send_complete_check    = ath10k_sdio_hif_send_complete_check,
+       .power_up               = ath10k_sdio_hif_power_up,
+       .power_down             = ath10k_sdio_hif_power_down,
+#ifdef CONFIG_PM
+       .suspend                = ath10k_sdio_hif_suspend,
+       .resume                 = ath10k_sdio_hif_resume,
+#endif
+};
+
+#ifdef CONFIG_PM_SLEEP
+
+/* Empty handlers so that mmc subsystem doesn't remove us entirely during
+ * suspend. We instead follow cfg80211 suspend/resume handlers.
+ */
+static int ath10k_sdio_pm_suspend(struct device *device)
+{
+       return 0;
+}
+
+static int ath10k_sdio_pm_resume(struct device *device)
+{
+       return 0;
+}
+
+static SIMPLE_DEV_PM_OPS(ath10k_sdio_pm_ops, ath10k_sdio_pm_suspend,
+                        ath10k_sdio_pm_resume);
+
+#define ATH10K_SDIO_PM_OPS (&ath10k_sdio_pm_ops)
+
+#else
+
+#define ATH10K_SDIO_PM_OPS NULL
+
+#endif /* CONFIG_PM_SLEEP */
+
+static int ath10k_sdio_probe(struct sdio_func *func,
+                            const struct sdio_device_id *id)
+{
+       struct ath10k_sdio *ar_sdio;
+       struct ath10k *ar;
+       enum ath10k_hw_rev hw_rev;
+       u32 chip_id, dev_id_base;
+       int ret, i;
+
+       /* Assumption: All SDIO based chipsets (so far) are QCA6174 based.
+        * If there will be newer chipsets that does not use the hw reg
+        * setup as defined in qca6174_regs and qca6174_values, this
+        * assumption is no longer valid and hw_rev must be setup differently
+        * depending on chipset.
+        */
+       hw_rev = ATH10K_HW_QCA6174;
+
+       ar = ath10k_core_create(sizeof(*ar_sdio), &func->dev, ATH10K_BUS_SDIO,
+                               hw_rev, &ath10k_sdio_hif_ops);
+       if (!ar) {
+               dev_err(&func->dev, "failed to allocate core\n");
+               return -ENOMEM;
+       }
+
+       ath10k_dbg(ar, ATH10K_DBG_BOOT,
+                  "sdio new func %d vendor 0x%x device 0x%x block 0x%x/0x%x\n",
+                  func->num, func->vendor, func->device,
+                  func->max_blksize, func->cur_blksize);
+
+       ar_sdio = ath10k_sdio_priv(ar);
+
+       ar_sdio->irq_data.irq_proc_reg =
+               kzalloc(sizeof(struct ath10k_sdio_irq_proc_regs),
+                       GFP_KERNEL);
+       if (!ar_sdio->irq_data.irq_proc_reg) {
+               ret = -ENOMEM;
+               goto err_core_destroy;
+       }
+
+       ar_sdio->irq_data.irq_en_reg =
+               kzalloc(sizeof(struct ath10k_sdio_irq_enable_regs),
+                       GFP_KERNEL);
+       if (!ar_sdio->irq_data.irq_en_reg) {
+               ret = -ENOMEM;
+               goto err_free_proc_reg;
+       }
+
+       ar_sdio->bmi_buf = kzalloc(BMI_MAX_CMDBUF_SIZE, GFP_KERNEL);
+       if (!ar_sdio->bmi_buf) {
+               ret = -ENOMEM;
+               goto err_free_en_reg;
+       }
+
+       ar_sdio->func = func;
+       sdio_set_drvdata(func, ar_sdio);
+
+       ar_sdio->is_disabled = true;
+       ar_sdio->ar = ar;
+
+       spin_lock_init(&ar_sdio->lock);
+       spin_lock_init(&ar_sdio->wr_async_lock);
+       mutex_init(&ar_sdio->irq_data.mtx);
+
+       INIT_LIST_HEAD(&ar_sdio->bus_req_freeq);
+       INIT_LIST_HEAD(&ar_sdio->wr_asyncq);
+
+       INIT_WORK(&ar_sdio->wr_async_work, ath10k_sdio_write_async_work);
+       ar_sdio->workqueue = create_singlethread_workqueue("ath10k_sdio_wq");
+       if (!ar_sdio->workqueue) {
+               ret = -ENOMEM;
+               goto err_free_bmi_buf;
+       }
+
+       init_waitqueue_head(&ar_sdio->irq_wq);
+
+       for (i = 0; i < ATH10K_SDIO_BUS_REQUEST_MAX_NUM; i++)
+               ath10k_sdio_free_bus_req(ar, &ar_sdio->bus_req[i]);
+
+       dev_id_base = FIELD_GET(QCA_MANUFACTURER_ID_BASE, id->device);
+       switch (dev_id_base) {
+       case QCA_MANUFACTURER_ID_AR6005_BASE:
+       case QCA_MANUFACTURER_ID_QCA9377_BASE:
+               ar->dev_id = QCA9377_1_0_DEVICE_ID;
+               break;
+       default:
+               ret = -ENODEV;
+               ath10k_err(ar, "unsupported device id %u (0x%x)\n",
+                          dev_id_base, id->device);
+               goto err_free_bmi_buf;
+       }
+
+       ar->id.vendor = id->vendor;
+       ar->id.device = id->device;
+
+       ath10k_sdio_set_mbox_info(ar);
+
+       ret = ath10k_sdio_config(ar);
+       if (ret) {
+               ath10k_err(ar, "failed to config sdio: %d\n", ret);
+               goto err_free_wq;
+       }
+
+       /* TODO: don't know yet how to get chip_id with SDIO */
+       chip_id = 0;
+       ret = ath10k_core_register(ar, chip_id);
+       if (ret) {
+               ath10k_err(ar, "failed to register driver core: %d\n", ret);
+               goto err_free_wq;
+       }
+
+       /* TODO: remove this once SDIO support is fully implemented */
+       ath10k_warn(ar, "WARNING: ath10k SDIO support is incomplete, don't expect anything to work!\n");
+
+       return 0;
+
+err_free_wq:
+       destroy_workqueue(ar_sdio->workqueue);
+err_free_bmi_buf:
+       kfree(ar_sdio->bmi_buf);
+err_free_en_reg:
+       kfree(ar_sdio->irq_data.irq_en_reg);
+err_free_proc_reg:
+       kfree(ar_sdio->irq_data.irq_proc_reg);
+err_core_destroy:
+       ath10k_core_destroy(ar);
+
+       return ret;
+}
+
+static void ath10k_sdio_remove(struct sdio_func *func)
+{
+       struct ath10k_sdio *ar_sdio = sdio_get_drvdata(func);
+       struct ath10k *ar = ar_sdio->ar;
+
+       ath10k_dbg(ar, ATH10K_DBG_BOOT,
+                  "sdio removed func %d vendor 0x%x device 0x%x\n",
+                  func->num, func->vendor, func->device);
+
+       (void)ath10k_sdio_hif_disable_intrs(ar);
+       cancel_work_sync(&ar_sdio->wr_async_work);
+       ath10k_core_unregister(ar);
+       ath10k_core_destroy(ar);
+}
+
+static const struct sdio_device_id ath10k_sdio_devices[] = {
+       {SDIO_DEVICE(QCA_MANUFACTURER_CODE,
+                    (QCA_SDIO_ID_AR6005_BASE | 0xA))},
+       {SDIO_DEVICE(QCA_MANUFACTURER_CODE,
+                    (QCA_SDIO_ID_QCA9377_BASE | 0x1))},
+       {},
+};
+
+MODULE_DEVICE_TABLE(sdio, ath10k_sdio_devices);
+
+static struct sdio_driver ath10k_sdio_driver = {
+       .name = "ath10k_sdio",
+       .id_table = ath10k_sdio_devices,
+       .probe = ath10k_sdio_probe,
+       .remove = ath10k_sdio_remove,
+       .drv.pm = ATH10K_SDIO_PM_OPS,
+};
+
+static int __init ath10k_sdio_init(void)
+{
+       int ret;
+
+       ret = sdio_register_driver(&ath10k_sdio_driver);
+       if (ret)
+               pr_err("sdio driver registration failed: %d\n", ret);
+
+       return ret;
+}
+
+static void __exit ath10k_sdio_exit(void)
+{
+       sdio_unregister_driver(&ath10k_sdio_driver);
+}
+
+module_init(ath10k_sdio_init);
+module_exit(ath10k_sdio_exit);
+
+MODULE_AUTHOR("Qualcomm Atheros");
+MODULE_DESCRIPTION("Driver support for Qualcomm Atheros 802.11ac WLAN SDIO devices");
+MODULE_LICENSE("Dual BSD/GPL");
diff --git a/drivers/net/wireless/ath/ath10k/sdio.h b/drivers/net/wireless/ath/ath10k/sdio.h
new file mode 100644 (file)
index 0000000..3f61c67
--- /dev/null
@@ -0,0 +1,229 @@
+/*
+ * Copyright (c) 2004-2011 Atheros Communications Inc.
+ * Copyright (c) 2011-2012 Qualcomm Atheros, Inc.
+ * Copyright (c) 2016-2017 Erik Stromdahl <erik.stromdahl@gmail.com>
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#ifndef _SDIO_H_
+#define _SDIO_H_
+
+#define ATH10K_HIF_MBOX_BLOCK_SIZE              256
+
+#define QCA_MANUFACTURER_ID_BASE                GENMASK(11, 8)
+#define QCA_MANUFACTURER_ID_AR6005_BASE         0x5
+#define QCA_MANUFACTURER_ID_QCA9377_BASE        0x7
+#define QCA_SDIO_ID_AR6005_BASE                 0x500
+#define QCA_SDIO_ID_QCA9377_BASE                0x700
+#define QCA_MANUFACTURER_ID_REV_MASK            0x00FF
+#define QCA_MANUFACTURER_CODE                   0x271 /* Qualcomm/Atheros */
+
+#define ATH10K_SDIO_MAX_BUFFER_SIZE             4096 /*Unsure of this constant*/
+
+/* Mailbox address in SDIO address space */
+#define ATH10K_HIF_MBOX_BASE_ADDR               0x1000
+#define ATH10K_HIF_MBOX_WIDTH                   0x800
+
+#define ATH10K_HIF_MBOX_TOT_WIDTH \
+       (ATH10K_HIF_MBOX_NUM_MAX * ATH10K_HIF_MBOX_WIDTH)
+
+#define ATH10K_HIF_MBOX0_EXT_BASE_ADDR          0x5000
+#define ATH10K_HIF_MBOX0_EXT_WIDTH              (36 * 1024)
+#define ATH10K_HIF_MBOX0_EXT_WIDTH_ROME_2_0     (56 * 1024)
+#define ATH10K_HIF_MBOX1_EXT_WIDTH              (36 * 1024)
+#define ATH10K_HIF_MBOX_DUMMY_SPACE_SIZE        (2 * 1024)
+
+#define ATH10K_HTC_MBOX_MAX_PAYLOAD_LENGTH \
+       (ATH10K_SDIO_MAX_BUFFER_SIZE - sizeof(struct ath10k_htc_hdr))
+
+#define ATH10K_HIF_MBOX_NUM_MAX                 4
+#define ATH10K_SDIO_BUS_REQUEST_MAX_NUM         64
+
+#define ATH10K_SDIO_HIF_COMMUNICATION_TIMEOUT_HZ (100 * HZ)
+
+/* HTC runs over mailbox 0 */
+#define ATH10K_HTC_MAILBOX                      0
+#define ATH10K_HTC_MAILBOX_MASK                 BIT(ATH10K_HTC_MAILBOX)
+
+/* GMBOX addresses */
+#define ATH10K_HIF_GMBOX_BASE_ADDR              0x7000
+#define ATH10K_HIF_GMBOX_WIDTH                  0x4000
+
+/* Modified versions of the sdio.h macros.
+ * The macros in sdio.h can't be used easily with the FIELD_{PREP|GET}
+ * macros in bitfield.h, so we define our own macros here.
+ */
+#define ATH10K_SDIO_DRIVE_DTSX_MASK \
+       (SDIO_DRIVE_DTSx_MASK << SDIO_DRIVE_DTSx_SHIFT)
+
+#define ATH10K_SDIO_DRIVE_DTSX_TYPE_B           0
+#define ATH10K_SDIO_DRIVE_DTSX_TYPE_A           1
+#define ATH10K_SDIO_DRIVE_DTSX_TYPE_C           2
+#define ATH10K_SDIO_DRIVE_DTSX_TYPE_D           3
+
+/* SDIO CCCR register definitions */
+#define CCCR_SDIO_IRQ_MODE_REG                  0xF0
+#define CCCR_SDIO_IRQ_MODE_REG_SDIO3            0x16
+
+#define CCCR_SDIO_DRIVER_STRENGTH_ENABLE_ADDR   0xF2
+
+#define CCCR_SDIO_DRIVER_STRENGTH_ENABLE_A      0x02
+#define CCCR_SDIO_DRIVER_STRENGTH_ENABLE_C      0x04
+#define CCCR_SDIO_DRIVER_STRENGTH_ENABLE_D      0x08
+
+#define CCCR_SDIO_ASYNC_INT_DELAY_ADDRESS       0xF0
+#define CCCR_SDIO_ASYNC_INT_DELAY_MASK          0xC0
+
+/* mode to enable special 4-bit interrupt assertion without clock */
+#define SDIO_IRQ_MODE_ASYNC_4BIT_IRQ            BIT(0)
+#define SDIO_IRQ_MODE_ASYNC_4BIT_IRQ_SDIO3      BIT(1)
+
+#define ATH10K_SDIO_TARGET_DEBUG_INTR_MASK      0x01
+
+/* The theoretical maximum number of RX messages that can be fetched
+ * from the mbox interrupt handler in one loop is derived in the following
+ * way:
+ *
+ * Let's assume that each packet in a bundle of the maximum bundle size
+ * (HTC_HOST_MAX_MSG_PER_BUNDLE) has the HTC header bundle count set
+ * to the maximum value (HTC_HOST_MAX_MSG_PER_BUNDLE).
+ *
+ * in this case the driver must allocate
+ * (HTC_HOST_MAX_MSG_PER_BUNDLE * HTC_HOST_MAX_MSG_PER_BUNDLE) skb's.
+ */
+#define ATH10K_SDIO_MAX_RX_MSGS \
+       (HTC_HOST_MAX_MSG_PER_BUNDLE * HTC_HOST_MAX_MSG_PER_BUNDLE)
+
+#define ATH10K_FIFO_TIMEOUT_AND_CHIP_CONTROL   0x00000868u
+#define ATH10K_FIFO_TIMEOUT_AND_CHIP_CONTROL_DISABLE_SLEEP_OFF 0xFFFEFFFF
+#define ATH10K_FIFO_TIMEOUT_AND_CHIP_CONTROL_DISABLE_SLEEP_ON 0x10000
+
+struct ath10k_sdio_bus_request {
+       struct list_head list;
+
+       /* sdio address */
+       u32 address;
+
+       struct sk_buff *skb;
+       enum ath10k_htc_ep_id eid;
+       int status;
+       /* Specifies if the current request is an HTC message.
+        * If not, the eid is not applicable an the TX completion handler
+        * associated with the endpoint will not be invoked.
+        */
+       bool htc_msg;
+       /* Completion that (if set) will be invoked for non HTC requests
+        * (htc_msg == false) when the request has been processed.
+        */
+       struct completion *comp;
+};
+
+struct ath10k_sdio_rx_data {
+       struct sk_buff *skb;
+       size_t alloc_len;
+       size_t act_len;
+       enum ath10k_htc_ep_id eid;
+       bool part_of_bundle;
+       bool last_in_bundle;
+       bool trailer_only;
+       int status;
+};
+
+struct ath10k_sdio_irq_proc_regs {
+       u8 host_int_status;
+       u8 cpu_int_status;
+       u8 error_int_status;
+       u8 counter_int_status;
+       u8 mbox_frame;
+       u8 rx_lookahead_valid;
+       u8 host_int_status2;
+       u8 gmbox_rx_avail;
+       __le32 rx_lookahead[2];
+       __le32 rx_gmbox_lookahead_alias[2];
+};
+
+struct ath10k_sdio_irq_enable_regs {
+       u8 int_status_en;
+       u8 cpu_int_status_en;
+       u8 err_int_status_en;
+       u8 cntr_int_status_en;
+};
+
+struct ath10k_sdio_irq_data {
+       /* protects irq_proc_reg and irq_en_reg below.
+        * We use a mutex here and not a spinlock since we will have the
+        * mutex locked while calling the sdio_memcpy_ functions.
+        * These function require non atomic context, and hence, spinlocks
+        * can be held while calling these functions.
+        */
+       struct mutex mtx;
+       struct ath10k_sdio_irq_proc_regs *irq_proc_reg;
+       struct ath10k_sdio_irq_enable_regs *irq_en_reg;
+};
+
+struct ath10k_mbox_ext_info {
+       u32 htc_ext_addr;
+       u32 htc_ext_sz;
+};
+
+struct ath10k_mbox_info {
+       u32 htc_addr;
+       struct ath10k_mbox_ext_info ext_info[2];
+       u32 block_size;
+       u32 block_mask;
+       u32 gmbox_addr;
+       u32 gmbox_sz;
+};
+
+struct ath10k_sdio {
+       struct sdio_func *func;
+
+       struct ath10k_mbox_info mbox_info;
+       bool swap_mbox;
+       u32 mbox_addr[ATH10K_HTC_EP_COUNT];
+       u32 mbox_size[ATH10K_HTC_EP_COUNT];
+
+       /* available bus requests */
+       struct ath10k_sdio_bus_request bus_req[ATH10K_SDIO_BUS_REQUEST_MAX_NUM];
+       /* free list of bus requests */
+       struct list_head bus_req_freeq;
+       /* protects access to bus_req_freeq */
+       spinlock_t lock;
+
+       struct ath10k_sdio_rx_data rx_pkts[ATH10K_SDIO_MAX_RX_MSGS];
+       size_t n_rx_pkts;
+
+       struct ath10k *ar;
+       struct ath10k_sdio_irq_data irq_data;
+
+       /* temporary buffer for BMI requests */
+       u8 *bmi_buf;
+
+       wait_queue_head_t irq_wq;
+
+       bool is_disabled;
+
+       struct workqueue_struct *workqueue;
+       struct work_struct wr_async_work;
+       struct list_head wr_asyncq;
+       /* protects access to wr_asyncq */
+       spinlock_t wr_async_lock;
+};
+
+static inline struct ath10k_sdio *ath10k_sdio_priv(struct ath10k *ar)
+{
+       return (struct ath10k_sdio *)ar->drv_priv;
+}
+
+#endif
index cbac9e4..8bded5d 100644 (file)
@@ -205,6 +205,24 @@ struct host_interest {
         */
        /* Bit 1 - unused */
        u32 hi_fw_swap;                                 /* 0x104 */
+
+       /* global arenas pointer address, used by host driver debug */
+       u32 hi_dynamic_mem_arenas_addr;                 /* 0x108 */
+
+       /* allocated bytes of DRAM use by allocated */
+       u32 hi_dynamic_mem_allocated;                   /* 0x10C */
+
+       /* remaining bytes of DRAM */
+       u32 hi_dynamic_mem_remaining;                   /* 0x110 */
+
+       /* memory track count, configured by host */
+       u32 hi_dynamic_mem_track_max;                   /* 0x114 */
+
+       /* minidump buffer */
+       u32 hi_minidump;                                /* 0x118 */
+
+       /* bdata's sig and key addr */
+       u32 hi_bd_sig_key;                              /* 0x11c */
 } __packed;
 
 #define HI_ITEM(item)  offsetof(struct host_interest, item)
@@ -319,6 +337,12 @@ struct host_interest {
 #define HI_ACS_FLAGS_USE_WWAN       (1 << 1)
 /* Use test VAP */
 #define HI_ACS_FLAGS_TEST_VAP       (1 << 2)
+/* SDIO/mailbox ACS flag definitions */
+#define HI_ACS_FLAGS_SDIO_SWAP_MAILBOX_SET       (1 << 0)
+#define HI_ACS_FLAGS_SDIO_REDUCE_TX_COMPL_SET    (1 << 1)
+#define HI_ACS_FLAGS_ALT_DATA_CREDIT_SIZE        (1 << 2)
+#define HI_ACS_FLAGS_SDIO_SWAP_MAILBOX_FW_ACK    (1 << 16)
+#define HI_ACS_FLAGS_SDIO_REDUCE_TX_COMPL_FW_ACK (1 << 17)
 
 /*
  * CONSOLE FLAGS
index d856462..9d3eb25 100644 (file)
@@ -137,6 +137,13 @@ static int ath10k_tm_cmd_get_version(struct ath10k *ar, struct nlattr *tb[])
                return ret;
        }
 
+       ret = nla_put_u32(skb, ATH10K_TM_ATTR_WMI_OP_VERSION,
+                         ar->normal_mode_fw.fw_file.wmi_op_version);
+       if (ret) {
+               kfree_skb(skb);
+               return ret;
+       }
+
        return cfg80211_testmode_reply(skb);
 }
 
index ba81bf6..191a8f3 100644 (file)
@@ -33,6 +33,7 @@ enum ath10k_tm_attr {
        ATH10K_TM_ATTR_WMI_CMDID        = 3,
        ATH10K_TM_ATTR_VERSION_MAJOR    = 4,
        ATH10K_TM_ATTR_VERSION_MINOR    = 5,
+       ATH10K_TM_ATTR_WMI_OP_VERSION   = 6,
 
        /* keep last */
        __ATH10K_TM_ATTR_AFTER_LAST,
index d068df5..bd7f6d7 100644 (file)
@@ -938,7 +938,10 @@ static int open_file_eeprom(struct inode *inode, struct file *file)
        }
 
        for (i = 0; i < eesize; ++i) {
-               AR5K_EEPROM_READ(i, val);
+               if (!ath5k_hw_nvram_read(ah, i, &val)) {
+                       ret = -EIO;
+                       goto freebuf;
+               }
                buf[i] = val;
        }
 
index a531e0c..e6b2517 100644 (file)
@@ -399,15 +399,10 @@ int ath6kl_data_tx(struct sk_buff *skb, struct net_device *dev)
                        csum_dest = skb->csum_offset + csum_start;
                }
 
-               if (skb_headroom(skb) < dev->needed_headroom) {
-                       struct sk_buff *tmp_skb = skb;
-
-                       skb = skb_realloc_headroom(skb, dev->needed_headroom);
-                       kfree_skb(tmp_skb);
-                       if (skb == NULL) {
-                               dev->stats.tx_dropped++;
-                               return 0;
-                       }
+               if (skb_cow_head(skb, dev->needed_headroom)) {
+                       dev->stats.tx_dropped++;
+                       kfree_skb(skb);
+                       return 0;
                }
 
                if (ath6kl_wmi_dix_2_dot3(ar->wmi, skb)) {
index c67d0e0..099f3d4 100644 (file)
@@ -369,7 +369,7 @@ void ath9k_cmn_update_txpow(struct ath_hw *ah, u16 cur_txpow,
 {
        struct ath_regulatory *reg = ath9k_hw_regulatory(ah);
 
-       if (reg->power_limit != new_txpow)
+       if (ah->curchan && reg->power_limit != new_txpow)
                ath9k_hw_set_txpowerlimit(ah, new_txpow, false);
 
        /* read back in case value is clamped */
index 6ccf248..6fbd555 100644 (file)
@@ -143,7 +143,7 @@ bool ath9k_hw_nvram_read(struct ath_hw *ah, u32 off, u16 *data)
 
        if (ah->eeprom_blob)
                ret = ath9k_hw_nvram_read_firmware(ah->eeprom_blob, off, data);
-       else if (pdata && !pdata->use_eeprom && pdata->eeprom_data)
+       else if (pdata && !pdata->use_eeprom)
                ret = ath9k_hw_nvram_read_pdata(pdata, off, data);
        else
                ret = common->bus_ops->eeprom_read(common, off, data);
index 16aca9e..a866cbd 100644 (file)
@@ -153,7 +153,7 @@ static int ath9k_tx99_init(struct ath_softc *sc)
                sc->tx99_power,
                sc->tx99_power / 2);
 
-       /* We leave the harware awake as it will be chugging on */
+       /* We leave the hardware awake as it will be chugging on */
 
        return 0;
 }
index 5648ebb..5b0f9fc 100644 (file)
@@ -795,15 +795,11 @@ static ssize_t wil_write_file_txmgmt(struct file *file, const char __user *buf,
        struct wireless_dev *wdev = wil_to_wdev(wil);
        struct cfg80211_mgmt_tx_params params;
        int rc;
-       void *frame = kmalloc(len, GFP_KERNEL);
+       void *frame;
 
-       if (!frame)
-               return -ENOMEM;
-
-       if (copy_from_user(frame, buf, len)) {
-               kfree(frame);
-               return -EIO;
-       }
+       frame = memdup_user(buf, len);
+       if (IS_ERR(frame))
+               return PTR_ERR(frame);
 
        params.buf = frame;
        params.len = len;