muen/linux.git
6 years agodrm/nouveau/volt/pwm/gk104: fix an off-by-one resulting in the voltage not being set
Martin Peres [Thu, 5 Nov 2015 08:07:38 +0000 (09:07 +0100)]
drm/nouveau/volt/pwm/gk104: fix an off-by-one resulting in the voltage not being set

Reported-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Martin Peres <martin.peres@free.fr>
6 years agodrm/nouveau/nvif: allow userspace access to its own client object
Ben Skeggs [Tue, 24 Nov 2015 05:34:51 +0000 (15:34 +1000)]
drm/nouveau/nvif: allow userspace access to its own client object

Regression from "abi16: implement limited interoperability with
usif/nvif".

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
6 years agodrm/nouveau/gr/gf100-: fix oops when calling zbc methods
Ben Skeggs [Wed, 25 Nov 2015 02:39:01 +0000 (12:39 +1000)]
drm/nouveau/gr/gf100-: fix oops when calling zbc methods

Somehow missed these two when removing dodgy void casts during the
rework.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
6 years agodrm/nouveau/gr/gf117-: assume no PPC if NV_PGRAPH_GPC_GPM_PD_PES_TPC_ID_MASK is zero
Ben Skeggs [Sun, 22 Nov 2015 19:47:19 +0000 (05:47 +1000)]
drm/nouveau/gr/gf117-: assume no PPC if NV_PGRAPH_GPC_GPM_PD_PES_TPC_ID_MASK is zero

fdo#92761

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
6 years agodrm/nouveau/gr/gf117-: read NV_PGRAPH_GPC_GPM_PD_PES_TPC_ID_MASK from correct GPC
Ben Skeggs [Sun, 22 Nov 2015 19:31:51 +0000 (05:31 +1000)]
drm/nouveau/gr/gf117-: read NV_PGRAPH_GPC_GPM_PD_PES_TPC_ID_MASK from correct GPC

Each GPCCS unit was reading the mask from GPC0, which causes problems on
boards where some GPCs are missing PPCs.

Part of the fix for fdo#92761.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
6 years agodrm/nouveau/gr/gf100-: split out per-gpc address calculation macro
Ben Skeggs [Sun, 22 Nov 2015 19:24:32 +0000 (05:24 +1000)]
drm/nouveau/gr/gf100-: split out per-gpc address calculation macro

There's a few places where we need to access a GPC register from ucode,
but outside of the falcon's io address space.  To do this we need to
calculate the offset based on which GPC we're executing on.

This used to be done manually, but we've since found a "base" offset
that can be added by the hardware.  To use this, an extra bit needs to
be set in the register address, which is what this macro achieves.

There should be no functional change from this commit.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
6 years agodrm/nouveau/bios: return actual size of the buffer retrieved via _ROM
Ben Skeggs [Thu, 19 Nov 2015 03:18:34 +0000 (13:18 +1000)]
drm/nouveau/bios: return actual size of the buffer retrieved via _ROM

Fixes detection of a failed attempt at fetching the entire ROM image
in one-shot (a violation of the spec, that works a lot of the time).

Tested on a HP Zbook 15 G2.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
6 years agodrm/nouveau/instmem: protect instobj list with a spinlock
Ben Skeggs [Tue, 10 Nov 2015 23:48:13 +0000 (09:48 +1000)]
drm/nouveau/instmem: protect instobj list with a spinlock

No locking is required for the traversal of this list, as it only
happens during suspend/resume where nothing else can be executing.

Fixes some of the issues noticed during parallel piglit runs.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
6 years agodrm/nouveau/pci: enable c800 magic for some unknown Samsung laptop
Ben Skeggs [Thu, 5 Nov 2015 01:00:29 +0000 (11:00 +1000)]
drm/nouveau/pci: enable c800 magic for some unknown Samsung laptop

fdo#70354 - comment #88.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
6 years agodrm/nouveau/pci: enable c800 magic for Clevo P157SM
Karol Herbst [Tue, 3 Nov 2015 22:16:04 +0000 (23:16 +0100)]
drm/nouveau/pci: enable c800 magic for Clevo P157SM

this is needed for my gpu

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
6 years agodrm/nouveau: bump patchlevel to indicate availability of abi16/nvif interop
Ben Skeggs [Tue, 3 Nov 2015 02:40:13 +0000 (12:40 +1000)]
drm/nouveau: bump patchlevel to indicate availability of abi16/nvif interop

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
6 years agodrm/nouveau/abi16: implement limited interoperability with usif/nvif
Ben Skeggs [Tue, 3 Nov 2015 01:21:43 +0000 (11:21 +1000)]
drm/nouveau/abi16: implement limited interoperability with usif/nvif

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
6 years agodrm/nouveau/abi16: introduce locked variant of nouveau_abi16_get()
Ben Skeggs [Tue, 3 Nov 2015 00:55:45 +0000 (10:55 +1000)]
drm/nouveau/abi16: introduce locked variant of nouveau_abi16_get()

USIF already takes the client mutex, but will need access to ABI16 data
in order to provide some limited interoperability.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
6 years agodrm/nouveau/abi16: remove unused argument from nouveau_abi16_get()
Ben Skeggs [Tue, 3 Nov 2015 00:17:49 +0000 (10:17 +1000)]
drm/nouveau/abi16: remove unused argument from nouveau_abi16_get()

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
6 years agodrm/nouveau/pci: enable c800 magic for Medion Erazer X7827
Ilia Mirkin [Sat, 31 Oct 2015 19:06:11 +0000 (15:06 -0400)]
drm/nouveau/pci: enable c800 magic for Medion Erazer X7827

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91557
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
6 years agodrm/nouveau/pci: enable c800 magic for Lenovo Y510P
Ilia Mirkin [Tue, 27 Oct 2015 21:39:49 +0000 (17:39 -0400)]
drm/nouveau/pci: enable c800 magic for Lenovo Y510P

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=70354#c75
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
6 years agodrm/nouveau/pll/gk104: fix PLL instability due to bad configuration with gddr5
Karol Herbst [Sun, 16 Aug 2015 08:19:25 +0000 (10:19 +0200)]
drm/nouveau/pll/gk104: fix PLL instability due to bad configuration with gddr5

This patch uses an approach closer to the nvidia driver to configure
both PLLs for high gddr5 memory clocks (usually above 2400MHz)

Previously nouveau used the one PLL as it was used for the lower clocks
and just adjusted the second PLL to get as close as possible to the
requested clock.  This means for my card, that I got a 4050 MHz clock
although 4008 MHz was requested.

Now the driver iterates over a list of PLL configuration also used by
the nvidia driver and then adjust the second PLL to get near the
requested clock.  Also it hold to some restriction I found while
analyzing the PLL configurations

This won't fix all gddr5 high clock issues itself, but it should be
fine on hybrid gpu systems as found on many laptops these days.  Also
switching while normal desktop usage should be a lot more stable than
before.

v2: move the pll code into ramgk104

Signed-off-by: Karol Herbst <nouveau@karolherbst.de>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
6 years agodrm/nouveau/clk/g84: Enable reclocking for GDDR3 G94-G200
Roy Spliet [Tue, 29 Sep 2015 23:23:52 +0000 (00:23 +0100)]
drm/nouveau/clk/g84: Enable reclocking for GDDR3 G94-G200

Your milage may vary, as it's only been tested on a single G94 and one G96.

Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Tested-by: Pierre Moreau <pierre.morrow@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
6 years agodrm/nouveau/bus/hwsq: Implement VBLANK waiting heuristic
Roy Spliet [Tue, 29 Sep 2015 23:23:51 +0000 (00:23 +0100)]
drm/nouveau/bus/hwsq: Implement VBLANK waiting heuristic

Avoids waiting for VBLANKS that never arrive on headless or otherwise
unconventional set-ups. Strategy taken from MEMX.

Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Tested-by: Pierre Moreau <pierre.morrow@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
6 years agodrm/nouveau/fb/ramnv50: Script changes for G94 and up
Roy Spliet [Tue, 29 Sep 2015 23:23:50 +0000 (00:23 +0100)]
drm/nouveau/fb/ramnv50: Script changes for G94 and up

10053c is not even read on some cards, and I have no idea exactly what the
criteria are. Likely NVIDIA pre-scans the VBIOS and in their driver disables
all features that are never used. The practical effect should be the same
as this implementation though.

Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Tested-by: Pierre Moreau <pierre.morrow@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
6 years agodrm/nouveau/fb/ramnv50: Deal with cards without timing entries
Roy Spliet [Tue, 29 Sep 2015 23:23:49 +0000 (00:23 +0100)]
drm/nouveau/fb/ramnv50: Deal with cards without timing entries

Like Pierre's G94. We might want to structure Kepler similarly in a follow-up.

Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Tested-by: Pierre Moreau <pierre.morrow@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
6 years agodrm/nouveau/fb/ramnv50: Voltage GPIOs
Roy Spliet [Tue, 29 Sep 2015 23:23:48 +0000 (00:23 +0100)]
drm/nouveau/fb/ramnv50: Voltage GPIOs

Does not seem to be necessary for NVA0, hence untested by me.

Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Tested-by: Pierre Moreau <pierre.morrow@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
6 years agodrm/nouveau/fb/ramgt215: Restructure r111100 calculation for DDR2
Roy Spliet [Tue, 29 Sep 2015 23:23:47 +0000 (00:23 +0100)]
drm/nouveau/fb/ramgt215: Restructure r111100 calculation for DDR2

Seems to be mostly equal to DDR3 on < GT218, should improve stability for
DDR2 reclocks.

Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
6 years agodrm/nouveau/fb/ramgt215: Change FBVDD/Q when BIOS asks for it
Roy Spliet [Tue, 29 Sep 2015 23:23:46 +0000 (00:23 +0100)]
drm/nouveau/fb/ramgt215: Change FBVDD/Q when BIOS asks for it

Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
6 years agodrm/nouveau/fb/ramgt215: Transform GPIO ramfuc method from FBVREF-specific to generic
Roy Spliet [Tue, 29 Sep 2015 23:23:45 +0000 (00:23 +0100)]
drm/nouveau/fb/ramgt215: Transform GPIO ramfuc method from FBVREF-specific to generic

In preparation of changing FBVDDQ, as observed on at least one GDDR3 card.
While at it, adhere to func.log[1] properly for consistency.

Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
6 years agodrm/nouveau/bios/rammap: Identify DLLoff for >= GF100
Roy Spliet [Tue, 29 Sep 2015 23:23:44 +0000 (00:23 +0100)]
drm/nouveau/bios/rammap: Identify DLLoff for >= GF100

Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
6 years agodrm/nouveau/pci: Handle 5-bit and 8-bit tag field
Pierre Moreau [Sat, 3 Oct 2015 19:35:16 +0000 (21:35 +0200)]
drm/nouveau/pci: Handle 5-bit and 8-bit tag field

If the hardware supports extended tag field (8-bit ones), then enable it.

This is usually done by the VBIOS, but not on some MBPs (see fdo#86537).

In case extended tag field is not supported, 5-bit tag field is used which
limits the possible number of requests to 32. Apparently bits 7:0 of
0x08841c stores some number of outstanding requests, so cap it to 32 if
extended tag is unsupported.

Fixes: fdo#86537
v2: Restrict changes to chipsets >= 0x84
v3:
  * Add nvkm_pci_mask to pci.h
  * Mask bit 8 before setting it
v4:
  * Rename `add` argument of nvkm_pci_mask to `value`
  * Move code from nvkm_pci_init to g84_pci_init and remove PCIe and chipset
    checks
v5:
  * Rebase code on latest PCI structure
  * Restore PCIe check
  * Fix namings in nvkm_pci_mask
  * Rephrase part of the commit message

Signed-off-by: Pierre Moreau <pierre.morrow@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
6 years agodrm/nouveau/disp,pm: constify nvkm_object_func structures
Julia Lawall [Sun, 11 Oct 2015 12:18:09 +0000 (14:18 +0200)]
drm/nouveau/disp,pm: constify nvkm_object_func structures

These nvkm_object_func structures are never modified.  All other
nvkm_object_func structures are declared as const.

Done with the help of Coccinelle.

Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
6 years agodrm/nouveau/gr: add FERMI_COMPUTE_B class to GF110+
Ilia Mirkin [Wed, 7 Oct 2015 22:39:33 +0000 (18:39 -0400)]
drm/nouveau/gr: add FERMI_COMPUTE_B class to GF110+

GF110+ supports both the A and B compute classes, make sure to accept
both.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
6 years agodrm/nouveau/gr: document mp error 0x10
Ilia Mirkin [Wed, 7 Oct 2015 22:39:32 +0000 (18:39 -0400)]
drm/nouveau/gr: document mp error 0x10

NVIDIA provided the documentation for mp error 0x10, INVALID_ADDR_SPACE,
which apparently happens when trying to use an atomic operation on
local or shared memory (instead of global memory).

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
6 years agodrm/nouveau: fix memory leak
Sudip Mukherjee [Fri, 11 Sep 2015 09:30:56 +0000 (15:00 +0530)]
drm/nouveau: fix memory leak

If pm_runtime_get_sync() we were going to "out" but we missed freeing
vma.

Signed-off-by: Sudip Mukherjee <sudip@vectorindia.org>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
6 years agodrm/nouveau: remove unused function
Sudip Mukherjee [Wed, 2 Sep 2015 06:38:08 +0000 (12:08 +0530)]
drm/nouveau: remove unused function

coverity.com reported that memset was using a buffer of size 0, on
checking the code it turned out that the function was not being used. So
remove it.

Signed-off-by: Sudip Mukherjee <sudip@vectorindia.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
6 years agodrm/nouveau/pmu/gk107: enable PGOB codepaths
Ben Skeggs [Thu, 1 Oct 2015 05:00:23 +0000 (15:00 +1000)]
drm/nouveau/pmu/gk107: enable PGOB codepaths

Reported to be needed as per fdo#70354 comment #61.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
6 years agodrm/nouveau/pmu/gk104: check fuse to determine presence of PGOB
Ben Skeggs [Thu, 1 Oct 2015 04:58:04 +0000 (14:58 +1000)]
drm/nouveau/pmu/gk104: check fuse to determine presence of PGOB

Not 100% confirmed, but seems to match from the few boards I've looked
at so far.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
6 years agodrm/nouveau/pci: prepare for chipset-specific initialisation tasks
Ben Skeggs [Wed, 30 Sep 2015 23:42:54 +0000 (09:42 +1000)]
drm/nouveau/pci: prepare for chipset-specific initialisation tasks

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
6 years agodrm/nouveau/pci/nv46: attempt to fix msi, and re-enable by default
Ben Skeggs [Thu, 1 Oct 2015 01:36:58 +0000 (11:36 +1000)]
drm/nouveau/pci/nv46: attempt to fix msi, and re-enable by default

Was not able to obtain a trace of NVRM due to kernel version annoyances,
however, experimentally confirmed that the WAR we use on NV50/G8x boards
works here too.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
6 years agodrm/nouveau/pci/g94: split implementation from nv40
Ben Skeggs [Wed, 30 Sep 2015 23:34:45 +0000 (09:34 +1000)]
drm/nouveau/pci/g94: split implementation from nv40

An upcoming patch will implement functionality that we don't use on any
NV40 chipset.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
6 years agodrm/nouveau/pci/g84: split implementation from nv50
Ben Skeggs [Wed, 30 Sep 2015 23:29:58 +0000 (09:29 +1000)]
drm/nouveau/pci/g84: split implementation from nv50

An upcoming patch will implement functionality that we don't use on the
original NV50.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
6 years agodrm/nouveau/ibus/gf100: increase wait timeout to avoid read faults
Samuel Pitoiset [Thu, 24 Sep 2015 18:26:15 +0000 (20:26 +0200)]
drm/nouveau/ibus/gf100: increase wait timeout to avoid read faults

Increase clock timeout of some unknown engines in order to avoid failure
at high gpcclk rate.

This fixes IBUS read faults on my GF119 when reclocking is manually
enabled. Note that memory reclocking is completely broken and NvMemExec
has to be disabled to allow core clock reclocking only.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
6 years agodrm/nouveau/gm204/6: add voltage control using the new gk104 volt class
Martin Peres [Wed, 16 Sep 2015 19:45:33 +0000 (22:45 +0300)]
drm/nouveau/gm204/6: add voltage control using the new gk104 volt class

I got confirmation that we can read and change the voltage with the same code.
The divider is also computed correctly on the gm204 we got our hands on.

Thanks to Yoshimo on IRC for executing the tests on his gm204!

Signed-off-by: Martin Peres <martin.peres@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
6 years agodrm/nouveau/gm107: add voltage control using the new gk104 volt class
Martin Peres [Wed, 9 Sep 2015 00:13:30 +0000 (02:13 +0200)]
drm/nouveau/gm107: add voltage control using the new gk104 volt class

Let's ignore the other desktop Maxwells until I get my hands on one and confirm
that we still can change the voltage.

Signed-off-by: Martin Peres <martin.peres@free.fr>
6 years agodrm/nouveau/volt/gk104: add support for pwm and gpio modes
Martin Peres [Tue, 8 Sep 2015 22:34:33 +0000 (00:34 +0200)]
drm/nouveau/volt/gk104: add support for pwm and gpio modes

Most Keplers actually use the GPIO-based voltage management instead of the new
PWM-based one. Use the GPIO mode as a fallback as it already gracefully handles
the case where no GPIOs exist.

All the Maxwells seem to use the PWM method though.

v2:
 - Do not forget to commit the PWM configuration change!

Signed-off-by: Martin Peres <martin.peres@free.fr>
6 years agodrm/nouveau/volt: add support for non-vid-based voltage controllers
Martin Peres [Wed, 9 Sep 2015 01:05:51 +0000 (04:05 +0300)]
drm/nouveau/volt: add support for non-vid-based voltage controllers

This patch is not ideal but it definitely beats a rewrite of the current
interface and is very self-contained.

Signed-off-by: Martin Peres <martin.peres@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
6 years agodrm/nouveau/bios/volt: add support for pwm-based volt management
Martin Peres [Wed, 9 Sep 2015 01:05:50 +0000 (04:05 +0300)]
drm/nouveau/bios/volt: add support for pwm-based volt management

Signed-off-by: Martin Peres <martin.peres@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
6 years agodrm/nouveau/ttm: set the DMA mask for platform devices
Alexandre Courbot [Fri, 4 Sep 2015 10:59:34 +0000 (19:59 +0900)]
drm/nouveau/ttm: set the DMA mask for platform devices

So far the DMA mask was not set for platform devices, which limited them
to a 32-bit physical space. Allow dma_set_mask() to be called for
non-PCI devices, and also take the IOMMU bit into account since it could
restrict the physically addressable space.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
6 years agodrm/nouveau/ttm: convert to DMA API
Alexandre Courbot [Fri, 4 Sep 2015 10:59:33 +0000 (19:59 +0900)]
drm/nouveau/ttm: convert to DMA API

The pci_dma_* functions are now superseeded in the kernel by the DMA
API. Make the conversion to this more generic API.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
6 years agodrm/nouveau/instmem/gk20a: make use of the IOMMU bit
Alexandre Courbot [Fri, 4 Sep 2015 10:59:32 +0000 (19:59 +0900)]
drm/nouveau/instmem/gk20a: make use of the IOMMU bit

Use the IOMMU bit specified in platform data instead of hardcoding it to
the bit used by current Tegra GPUs.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
6 years agodrm/nouveau/platform: allow to specify the IOMMU bit
Alexandre Courbot [Fri, 4 Sep 2015 10:59:31 +0000 (19:59 +0900)]
drm/nouveau/platform: allow to specify the IOMMU bit

Current Tegra code taking advantage of the IOMMU assumes a hardcoded
value for the IOMMU bit. Make it a platform property instead for
flexibility.

v2 (Ben Skeggs): remove nvkm dependence on drm structures

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
6 years agodrm/nouveau/instmem/gk20a: use direct CPU access
Alexandre Courbot [Fri, 4 Sep 2015 10:52:11 +0000 (19:52 +0900)]
drm/nouveau/instmem/gk20a: use direct CPU access

The Great Nouveau Refactoring Take II brought us a lot of goodness,
including acquire/release methods that are called before and after an
instobj is modified. These functions can be used as synchronization
points to manage CPU/GPU coherency if we modify an instobj using the
CPU.

This patch replaces the legacy and slow PRAMIN access for gk20a instmem
with CPU mappings and writes. A LRU list is used to unmap unused
mappings after a certain threshold (currently 1MB) of mapped instobjs is
reached. This allows mappings to be reused most of the time.

Accessing instobjs using the CPU requires to maintain the GPU L2 cache,
which we do in the acquire/release functions. This triggers a lot of L2
flushes/invalidates, but most of them are performed on an empty cache
(and thus return immediately), and overall context setup performance
greatly benefits from this (from 250ms to 160ms on Jetson TK1 for a
simple libdrm program).

Making L2 management more explicit should allow us to grab some more
performance in the future.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
6 years agodrm/nouveau: remove unnecessary usage of object handles
Ben Skeggs [Fri, 4 Sep 2015 04:40:32 +0000 (14:40 +1000)]
drm/nouveau: remove unnecessary usage of object handles

No longer required in a lot of cases, as objects are identified over NVIF
via an alternate mechanism since the rework.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
6 years agodrm/nouveau/ltc/gf100: add flush/invalidate functions
Alexandre Courbot [Thu, 3 Sep 2015 08:48:15 +0000 (17:48 +0900)]
drm/nouveau/ltc/gf100: add flush/invalidate functions

Allow clients to manually flush and invalidate L2. This will be useful
for Tegra systems for which we want to write instmem using the CPU.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
6 years agodrm/nouveau/ltc: add hooks for invalidate and flush
Alexandre Courbot [Thu, 3 Sep 2015 08:48:14 +0000 (17:48 +0900)]
drm/nouveau/ltc: add hooks for invalidate and flush

These are useful for systems without a coherent CPU/GPU bus. For such
systems we may need to maintain the L2 ourselves.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
6 years agodrm/nouveau/timer: re-introduce nvkm_wait_xsec macros
Alexandre Courbot [Thu, 3 Sep 2015 08:48:13 +0000 (17:48 +0900)]
drm/nouveau/timer: re-introduce nvkm_wait_xsec macros

Reintroduce macros allowing us to test a register against a certain
mask, since this is the most common usage pattern for the more generic
nvkm_xsec macros and makes the code more concise and readable.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
6 years agodrm/nouveau/pmu: do not assume a PMU is present
Alexandre Courbot [Thu, 3 Sep 2015 08:39:52 +0000 (17:39 +0900)]
drm/nouveau/pmu: do not assume a PMU is present

Some devices may not have a PMU. Avoid a NULL pointer dereference in
such cases by checking whether the pointer given to nvkm_pmu_pgob() is
valid.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
6 years agodrm/nouveau/gem: return only valid domain when there's only one
Ilia Mirkin [Tue, 20 Oct 2015 05:15:39 +0000 (01:15 -0400)]
drm/nouveau/gem: return only valid domain when there's only one

On nv50+, we restrict the valid domains to just the one where the buffer
was originally created. However after the buffer is evicted to system
memory, we might move it back to a different domain that was not
originally valid. When sharing the buffer and retrieving its GEM_INFO
data, we still want the domain that will be valid for this buffer in a
pushbuf, not the one where it currently happens to be.

This resolves fdo#92504 and several others. These are due to suspend
evicting all buffers, making it more likely that they temporarily end up
in the wrong place.

Cc: stable@vger.kernel.org
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92504
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
6 years agoMerge tag 'topic/drm-misc-2015-10-22' of git://anongit.freedesktop.org/drm-intel...
Dave Airlie [Thu, 29 Oct 2015 23:49:06 +0000 (09:49 +1000)]
Merge tag 'topic/drm-misc-2015-10-22' of git://anongit.freedesktop.org/drm-intel into drm-next

Few more drm-misc stragglers for 4.4. Big thing is the generic probe for
imx/rockchip/armada (but the variant for msm/rpi/exynos is still missing).

Also the hdmi clocking fixes from Ville which was a lot of confusion about
which tree it should be applied to ;-)

* tag 'topic/drm-misc-2015-10-22' of git://anongit.freedesktop.org/drm-intel:
  drm: correctly check failed allocation
  vga_switcheroo: Constify vga_switcheroo_handler
  drm/armada: Convert the probe function to the generic drm_of_component_probe()
  drm/rockchip: Convert the probe function to the generic drm_of_component_probe()
  drm/imx: Convert the probe function to the generic drm_of_component_probe()
  drm: Introduce generic probe function for component based masters.
  drm/edid: Round to closest when computing the CEA/HDMI alternate clock
  drm/edid: Fix up clock for CEA/HDMI modes specified via detailed timings

6 years agoMerge branch 'drm-next-4.4' of git://people.freedesktop.org/~agd5f/linux into drm...
Dave Airlie [Thu, 29 Oct 2015 23:48:28 +0000 (09:48 +1000)]
Merge branch 'drm-next-4.4' of git://people.freedesktop.org/~agd5f/linux into drm-next

More amdgpu and radeon stuff for drm-next.  Stoney support is the big change.
The rest is just bug fixes and code cleanups.  The Stoney stuff is pretty
low impact with respect to existing chips.

* 'drm-next-4.4' of git://people.freedesktop.org/~agd5f/linux:
  drm/amdgpu: change VM size default to 64GB
  drm/amdgpu: add Stoney pci ids
  drm/amdgpu: update the core VI support for Stoney
  drm/amdgpu: add VCE support for Stoney (v2)
  drm/amdgpu: add UVD support for Stoney
  drm/amdgpu: add GFX support for Stoney (v2)
  drm/amdgpu: add SDMA support for Stoney (v2)
  drm/amdgpu: add DCE support for Stoney
  drm/amdgpu: Update SMC/DPM for Stoney
  drm/amdgpu: add GMC support for Stoney
  drm/amdgpu: add Stoney chip family
  drm/amdgpu: fix the broken vm->mutex V2
  drm/amdgpu: remove the unnecessary parameter adev for amdgpu_fence_wait_any()
  drm/amdgpu: remove the exclusive lock
  drm/amdgpu: remove old lockup detection infrastructure
  drm: fix trivial typos
  drm/amdgpu/dce: simplify suspend/resume
  drm/amdgpu/gfx8: set TC_WB_ACTION_EN in RELEASE_MEM packet
  drm/radeon: Use rdev->gem.mutex to protect hyperz/cmask owners

6 years agoMerge tag 'drm-intel-next-fixes-2015-10-22' of git://anongit.freedesktop.org/drm...
Dave Airlie [Thu, 29 Oct 2015 23:45:33 +0000 (09:45 +1000)]
Merge tag 'drm-intel-next-fixes-2015-10-22' of git://anongit.freedesktop.org/drm-intel into drm-next

Bunch of -fixes for 4.4. Well not just, I've left the mmio/register work
from Ville in here since it's low-risk but lots of churn all over.

* tag 'drm-intel-next-fixes-2015-10-22' of git://anongit.freedesktop.org/drm-intel: (23 commits)
  drm/i915: Use round to closest when computing the CEA 1.001 pixel clocks
  drm/i915: Kill the leftover RMW from ivb_sprite_disable()
  drm/i915: restore ggtt double-bind avoidance
  drm/i915/skl: Enable pipe gamma for sprite planes.
  drm/i915/skl+: Enable pipe CSC on cursor planes. (v2)
  MAINTAINERS: add link to the Intel Graphics for Linux web site
  drm/i915: Move skl/bxt gt specific workarounds to ring init
  drm/i915: Drop i915_gem_obj_is_pinned() from set-cache-level
  drm/i915: revert a few more watermark commits
  drm/i915: Remove dev_priv argument from NEEDS_FORCE_WAKE
  drm/i915: Clean up LVDS register handling
  drm/i915: Throw out some useless variables
  drm/i915: Parametrize and fix SWF registers
  drm/i915: s/PIPE_FRMCOUNT_GM45/PIPE_FRMCOUNT_G4X/ etc.
  drm/i915: Turn GEN5_ASSERT_IIR_IS_ZERO() into a function
  drm/i915: Fix a few bad hex numbers in register defines
  drm/i915: Protect register macro arguments
  drm/i915: Include gpio_mmio_base in GMBUS reg defines
  drm/i915: Parametrize HSW video DIP data registers
  drm/i915: Eliminate weird parameter inversion from BXT PPS registers
  ...

6 years agoMerge branch 'msm-next' of git://people.freedesktop.org/~robclark/linux into drm...
Dave Airlie [Fri, 23 Oct 2015 01:54:03 +0000 (11:54 +1000)]
Merge branch 'msm-next' of git://people.freedesktop.org/~robclark/linux into drm-next

A bit smaller pull this time.  Few minor things, plus initial support
for msm8996 (snapdragon 820)..  Sorry, a bit latish, was hoping to get
some 8960/8064 DSI stuff included.  But still waiting on the v2 of the
patchset (just pending some minor review comments).  It would be nice
to get the DSI patches merged since it would help some folks trying to
get upstream kernel running on n4/n7 and xperia z and wanting to write
some more panel drivers.  Also, waiting for OCMEM driver to get merged
via other trees and then I have a small bit to go along with that to
make the gpu actually work on devices w/ OCMEM (snapdragon 800, 805,
etc).  So maybe a second later pull req, time permitting.

* 'msm-next' of git://people.freedesktop.org/~robclark/linux:
  drm/msm: Remove local fbdev emulation Kconfig option
  drm/msm/mdp5: Basic support for MDP5 v1.7 (MSM8996)
  drm/msm/mdp: Add Software Pixel Extension support
  drm/msm/mdp5: Use the newly introduced enum mdp_component_type
  drm/msm/hdmi: Add basic HDMI support for msm8996
  drm/msm/mdp5: Avoid printing error messages for optional clocks
  drm/msm: Fix IOMMU clean up path in case msm_iommu_new() fails
  drm/msm/mdp5: remove the cfg pointer from SMP struct
  drm/msm/dsi: Updata LNn_CFG4 register settings for 28nm PHY
  drm: msm: dsi: Don't attempt changing voltage of switches
  drm/msm: update generated headers

6 years agodrm/msm: Remove local fbdev emulation Kconfig option
Archit Taneja [Mon, 13 Jul 2015 06:42:07 +0000 (12:12 +0530)]
drm/msm: Remove local fbdev emulation Kconfig option

DRM_MSM_FBDEV config is used to enable/disable fbdev emulation for the
msm kms driver.

Replace this with the top level DRM_FBDEV_EMULATION config option where
applicable. This also prevents build breaks caused by undefined
drm_fb_helper_* functions when legacy fbdev support was disabled.

Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
6 years agodrm/msm/mdp5: Basic support for MDP5 v1.7 (MSM8996)
Stephane Viau [Tue, 15 Sep 2015 12:41:53 +0000 (08:41 -0400)]
drm/msm/mdp5: Basic support for MDP5 v1.7 (MSM8996)

This change adds the basic MDP5 support for MSM8996.

Signed-off-by: Stephane Viau <sviau@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
6 years agodrm/msm/mdp: Add Software Pixel Extension support
Stephane Viau [Tue, 15 Sep 2015 12:41:52 +0000 (08:41 -0400)]
drm/msm/mdp: Add Software Pixel Extension support

In order to produce an image, the scalar needs to be fed extra
pixels. These top/bottom/left/right values depend on a various of
factors, including resolution, scaling type, phase step and
initial phase.

Pixel Extension are programmed by hardware in most targets - and
can be overwritten by software. For some targets (e.g.: msm8996),
software *must* program those registers.

In order to ease this computation, let's always use bilinear
filters, which are easier to program from kernel. Eventually,
all of these values will come down from user space for better
quality.

Signed-off-by: Stephane Viau <sviau@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
6 years agodrm/msm/mdp5: Use the newly introduced enum mdp_component_type
Stephane Viau [Tue, 15 Sep 2015 12:41:51 +0000 (08:41 -0400)]
drm/msm/mdp5: Use the newly introduced enum mdp_component_type

When calculating phase steps, let's use the same enum
mdp_component_type in order to ease the readability; 0/1 indexes
are a bit confusing and we now have explicit values to index
this type of arrays.

Signed-off-by: Stephane Viau <sviau@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
6 years agodrm/msm/hdmi: Add basic HDMI support for msm8996
Stephane Viau [Tue, 15 Sep 2015 12:41:49 +0000 (08:41 -0400)]
drm/msm/hdmi: Add basic HDMI support for msm8996

The HDMI controller is new in MDP5 v1.7. As of now, this change
doesn't reflect the novelty and only adds the basics so the probe
gets triggered.

Signed-off-by: Stephane Viau <sviau@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
6 years agodrm/msm/mdp5: Avoid printing error messages for optional clocks
Stephane Viau [Tue, 15 Sep 2015 12:41:47 +0000 (08:41 -0400)]
drm/msm/mdp5: Avoid printing error messages for optional clocks

The current behavior is to try to get optional clocks and print a
dev_err message in case of failure. This looks rather confusing
and may increase with the amount of optional clocks.

We may need a cleaner way to handle per-device clocks but in the
meantime, let's reduce the amount of dev_err messages during the
probe.

Signed-off-by: Stephane Viau <sviau@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
6 years agodrm/msm: Fix IOMMU clean up path in case msm_iommu_new() fails
Stephane Viau [Tue, 15 Sep 2015 12:41:46 +0000 (08:41 -0400)]
drm/msm: Fix IOMMU clean up path in case msm_iommu_new() fails

msm_iommu_new() can fail and this change makes sure that we
detect the failure and free the allocated domain before going
any further.

Signed-off-by: Stephane Viau <sviau@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
6 years agodrm/msm/mdp5: remove the cfg pointer from SMP struct
Stephane Viau [Tue, 15 Sep 2015 12:41:44 +0000 (08:41 -0400)]
drm/msm/mdp5: remove the cfg pointer from SMP struct

We want to make sure we control all the information being passed
down to SMP block. Having access to the cfg pointer here may create
bad things in the future.

Signed-off-by: Stephane Viau <sviau@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
6 years agodrm/msm/dsi: Updata LNn_CFG4 register settings for 28nm PHY
Hai Li [Fri, 11 Sep 2015 19:56:09 +0000 (15:56 -0400)]
drm/msm/dsi: Updata LNn_CFG4 register settings for 28nm PHY

The current settings for 28nm PHY data lane CFG4 registers do
not work with certain panels. This change is to modify them to
hw recommended values.

Signed-off-by: Hai Li <hali@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
6 years agodrm: msm: dsi: Don't attempt changing voltage of switches
Bjorn Andersson [Tue, 18 Aug 2015 17:34:32 +0000 (10:34 -0700)]
drm: msm: dsi: Don't attempt changing voltage of switches

In some configurations the supplies are voltage switches and not LDOs,
making the set voltage call to fail. Check with the regulator framework
if the supply can change voltage before attempting.

Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Reviewed-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
6 years agodrm/msm: update generated headers
Rob Clark [Thu, 22 Oct 2015 16:36:57 +0000 (12:36 -0400)]
drm/msm: update generated headers

Signed-off-by: Rob Clark <robdclark@gmail.com>
6 years agoMerge branch 'drm/next/du' of git://linuxtv.org/pinchartl/fbdev into drm-next
Dave Airlie [Thu, 22 Oct 2015 00:31:43 +0000 (10:31 +1000)]
Merge branch 'drm/next/du' of git://linuxtv.org/pinchartl/fbdev into drm-next

rcar-du support for r8a7793/4
* 'drm/next/du' of git://linuxtv.org/pinchartl/fbdev:
  drm: rcar-du: Add support for the R8A7794 DU
  drm: rcar-du: Add support for the R8A7793 DU

6 years agoMerge tag 'drm-vc4-next-2015-10-21' of http://github.com/anholt/linux into drm-next
Dave Airlie [Thu, 22 Oct 2015 00:23:31 +0000 (10:23 +1000)]
Merge tag 'drm-vc4-next-2015-10-21' of github.com/anholt/linux into drm-next

This pull request introduces the vc4 driver, for kernel modesetting on
the Raspberry Pi (bcm2835/bcm2836 architectures).  It currently
supports a display plane and cursor on the HDMI output.  The driver
doesn't do 3D, power management, or overlay planes yet.

[airlied: fixup the enable/disable vblank APIs]

Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* tag 'drm-vc4-next-2015-10-21' of http://github.com/anholt/linux:
  drm/vc4: Allow vblank to be disabled
  drm/vc4: Use the fbdev_cma helpers
  drm/vc4: Add KMS support for Raspberry Pi.
  drm/vc4: Add devicetree bindings for VC4.

6 years agodrm/amdgpu: change VM size default to 64GB
Christian König [Thu, 15 Oct 2015 15:34:20 +0000 (17:34 +0200)]
drm/amdgpu: change VM size default to 64GB

That's still small enough to not waste to much memory on PD/PTs.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: add Stoney pci ids
Samuel Li [Thu, 8 Oct 2015 20:32:03 +0000 (16:32 -0400)]
drm/amdgpu: add Stoney pci ids

Signed-off-by: Samuel Li <samuel.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: update the core VI support for Stoney
Samuel Li [Thu, 8 Oct 2015 20:31:43 +0000 (16:31 -0400)]
drm/amdgpu: update the core VI support for Stoney

Add core VI enablement for Stoney.

Signed-off-by: Samuel Li <samuel.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: add VCE support for Stoney (v2)
Samuel Li [Thu, 8 Oct 2015 20:27:55 +0000 (16:27 -0400)]
drm/amdgpu: add VCE support for Stoney (v2)

Stoney is VCE 3.x single.

v2: Stoney is single pipe like Fiji

Signed-off-by: Samuel Li <samuel.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: add UVD support for Stoney
Samuel Li [Thu, 8 Oct 2015 20:27:21 +0000 (16:27 -0400)]
drm/amdgpu: add UVD support for Stoney

Stoney is UVD 6.x.

Signed-off-by: Samuel Li <samuel.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: add GFX support for Stoney (v2)
Samuel Li [Thu, 8 Oct 2015 20:29:40 +0000 (16:29 -0400)]
drm/amdgpu: add GFX support for Stoney (v2)

Stoney is GFX 8.1.

v2: update to latest golden settings

Signed-off-by: Samuel Li <samuel.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: add SDMA support for Stoney (v2)
Samuel Li [Thu, 8 Oct 2015 21:17:51 +0000 (17:17 -0400)]
drm/amdgpu: add SDMA support for Stoney (v2)

Stoney is SDMA 3.x.

v2: update to latest golden register settings

Signed-off-by: Samuel Li <samuel.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: add DCE support for Stoney
Samuel Li [Thu, 8 Oct 2015 20:29:06 +0000 (16:29 -0400)]
drm/amdgpu: add DCE support for Stoney

Stoney is DCE 11.x.

Signed-off-by: Samuel Li <samuel.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: Update SMC/DPM for Stoney
Samuel Li [Thu, 8 Oct 2015 20:28:41 +0000 (16:28 -0400)]
drm/amdgpu: Update SMC/DPM for Stoney

Stoney is SMC 8.x.

Signed-off-by: Samuel Li <samuel.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: add GMC support for Stoney
Samuel Li [Thu, 8 Oct 2015 20:26:41 +0000 (16:26 -0400)]
drm/amdgpu: add GMC support for Stoney

Stoney is GMC 8.x.

Signed-off-by: Samuel Li <samuel.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: add Stoney chip family
Samuel Li [Thu, 8 Oct 2015 18:50:27 +0000 (14:50 -0400)]
drm/amdgpu: add Stoney chip family

Stoney is based on Carrizo with some IP upgrades.

Signed-off-by: Samuel Li <samuel.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm: rcar-du: Add support for the R8A7794 DU
Laurent Pinchart [Fri, 17 Jul 2015 07:44:33 +0000 (10:44 +0300)]
drm: rcar-du: Add support for the R8A7794 DU

The R8A7794 DU has a fixed output routing configuration with one RGB
output per CRTC and thus lacks the RGB output routing register field.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
6 years agodrm: rcar-du: Add support for the R8A7793 DU
Laurent Pinchart [Fri, 17 Jul 2015 07:44:33 +0000 (10:44 +0300)]
drm: rcar-du: Add support for the R8A7793 DU

The R8A7793 DU is identical to the R8A7791 and thus only requires a new
DT compatible string.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
6 years agodrm/amdgpu: fix the broken vm->mutex V2
Chunming Zhou [Fri, 16 Oct 2015 06:06:19 +0000 (14:06 +0800)]
drm/amdgpu: fix the broken vm->mutex V2

fix the vm->mutex and ww_mutex confilcts.
vm->mutex is always token first, then ww_mutex.

V2: remove unneccessary checking for pt bo.

Change-Id: Iea56e183752c02831126d06d2f5b7a474a6e4743
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
6 years agodrm/amdgpu: remove the unnecessary parameter adev for amdgpu_fence_wait_any()
Junwei Zhang [Sun, 6 Sep 2015 05:55:03 +0000 (13:55 +0800)]
drm/amdgpu: remove the unnecessary parameter adev for amdgpu_fence_wait_any()

Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
6 years agodrm/amdgpu: remove the exclusive lock
Christian König [Tue, 1 Sep 2015 13:13:53 +0000 (15:13 +0200)]
drm/amdgpu: remove the exclusive lock

Finally getting rid of it.

Signed-off-by: Christian König <christian.koenig@amd.com>
6 years agodrm/amdgpu: remove old lockup detection infrastructure
Christian König [Tue, 1 Sep 2015 08:50:26 +0000 (10:50 +0200)]
drm/amdgpu: remove old lockup detection infrastructure

It didn't worked to well anyway.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
6 years agodrm: fix trivial typos
Geliang Tang [Sun, 18 Oct 2015 15:29:48 +0000 (23:29 +0800)]
drm: fix trivial typos

s/regsiter/register/

Signed-off-by: Geliang Tang <geliangtang@163.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/vc4: Allow vblank to be disabled
Derek Foreman [Thu, 2 Jul 2015 16:20:21 +0000 (11:20 -0500)]
drm/vc4: Allow vblank to be disabled

Signed-off-by: Derek Foreman <derekf@osg.samsung.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
6 years agodrm/vc4: Use the fbdev_cma helpers
Derek Foreman [Thu, 2 Jul 2015 16:19:54 +0000 (11:19 -0500)]
drm/vc4: Use the fbdev_cma helpers

Keep the fbdev_cma pointer around so we can use it on hotplog and close
to ensure the frame buffer console is in a useful state.

Signed-off-by: Derek Foreman <derekf@osg.samsung.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
6 years agodrm/vc4: Add KMS support for Raspberry Pi.
Eric Anholt [Mon, 2 Mar 2015 21:01:12 +0000 (13:01 -0800)]
drm/vc4: Add KMS support for Raspberry Pi.

This is enough for fbcon and bringing up X using
xf86-video-modesetting.  It doesn't support the 3D accelerator or
power management yet.

v2: Drop FB_HELPER select thanks to Archit's patches.  Do manual init
    ordering instead of using the .load hook.  Structure registration
    more like tegra's, but still using the typical "component" code.
    Drop no-op hooks for atomic_begin and mode_fixup() now that
    they're optional.  Drop sentinel in Makefile.  Fix minor style
    nits I noticed on another reread.

v3: Use the new bcm2835 clk driver to manage pixel/HSM clocks instead
    of having a fixed video mode.  Use exynos-style component driver
    matching instead of devicetree nodes to list the component driver
    instances.  Rename compatibility strings to say bcm2835, and
    distinguish pv0/1/2.  Clean up some h/vsync code, and add in
    interlaced mode setup.  Fix up probe/bind error paths.  Use
    bitops.h macros for vc4_regs.h

v4: Include i2c.h, allow building under COMPILE_TEST, drop msleep now
    that other bugs have been fixed, add timeouts to cpu_relax()
    loops, rename hpd-gpio to hpd-gpios.

Signed-off-by: Eric Anholt <eric@anholt.net>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
6 years agodrm/vc4: Add devicetree bindings for VC4.
Eric Anholt [Tue, 11 Aug 2015 20:17:11 +0000 (13:17 -0700)]
drm/vc4: Add devicetree bindings for VC4.

VC4 is the GPU (display and 3D) subsystem present on the 2835 and some
other Broadcom SoCs.

This binding follows the model of msm, imx, sti, and others, where
there is a subsystem node for the whole GPU, with nodes for the
individual HW components within it.

v2: Extend the commit message, fix several nits from Stephen Warren.
v3: Rename the compatibility strings, clean up node names, drop the
    unnecessary lists of components.  Use compatibility strings for
    choosing CRTC HVS channel numbers.  Document the HDMI clock usage.
v4: Whitespace fix, expand acronyms, move to display/ instead of gpu/,
    rename "hpd-gpio" to "hpd-gpios".

Signed-off-by: Eric Anholt <eric@anholt.net>
6 years agodrm: correctly check failed allocation
Insu Yun [Mon, 19 Oct 2015 16:33:30 +0000 (16:33 +0000)]
drm: correctly check failed allocation

drm_property_create_range can be failed in memory pressure
Therefore, check return value and handle an error

Signed-off-by: Insu Yun <wuninsu@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
6 years agovga_switcheroo: Constify vga_switcheroo_handler
Lukas Wunner [Sun, 18 Oct 2015 11:05:40 +0000 (13:05 +0200)]
vga_switcheroo: Constify vga_switcheroo_handler

vga_switcheroo_client_ops has always been declared const since its
introduction with 26ec685ff9d9 ("vga_switcheroo: Introduce struct
vga_switcheroo_client_ops").

Do so for vga_switcheroo_handler as well.

 drivers/gpu/drm/amd/amdgpu/amdgpu.ko:
   6 .rodata       00009888
- 19 .data         00001f00
+ 19 .data         00001ee0
 drivers/gpu/drm/nouveau/nouveau.ko:
   6 .rodata       000460b8
  17 .data         00018fe0
 drivers/gpu/drm/radeon/radeon.ko:
-  7 .rodata       00030944
+  7 .rodata       00030964
- 21 .data         0000d6a0
+ 21 .data         0000d678
 drivers/platform/x86/apple-gmux.ko:
-  7 .rodata       00000140
+  7 .rodata       00000160
- 11 .data         000000e0
+ 11 .data         000000b8

Cc: Ben Skeggs <bskeggs@redhat.com>
Cc: Darren Hart <dvhart@linux.intel.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Reviewed-by: Christian König <christian.koenig@amd.com>.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
6 years agodrm/armada: Convert the probe function to the generic drm_of_component_probe()
Liviu Dudau [Tue, 20 Oct 2015 09:23:15 +0000 (10:23 +0100)]
drm/armada: Convert the probe function to the generic drm_of_component_probe()

The armada DRM driver keeps some old platform data compatibility in the
probe function that makes moving to the generic drm_of_component_probe()
a bit more complicated that it should. Refactor the probe function to do
the platform_data processing after the generic probe (and only if that
fails). This way future cleanup can further remove support for it.

Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
Link: http://patchwork.freedesktop.org/patch/msgid/1445332995-11212-5-git-send-email-Liviu.Dudau@arm.com
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
6 years agodrm/rockchip: Convert the probe function to the generic drm_of_component_probe()
Liviu Dudau [Tue, 20 Oct 2015 09:23:14 +0000 (10:23 +0100)]
drm/rockchip: Convert the probe function to the generic drm_of_component_probe()

Use the generic drm_of_component_probe() function to probe for components.

Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1445332995-11212-4-git-send-email-Liviu.Dudau@arm.com
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
6 years agodrm/imx: Convert the probe function to the generic drm_of_component_probe()
Liviu Dudau [Tue, 20 Oct 2015 09:23:13 +0000 (10:23 +0100)]
drm/imx: Convert the probe function to the generic drm_of_component_probe()

The generic function is functionally equivalent to the driver's
imx_drm_platform_probe(). Use the generic function and reduce the
overall code size.

Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
Link: http://patchwork.freedesktop.org/patch/msgid/1445332995-11212-3-git-send-email-Liviu.Dudau@arm.com
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
6 years agodrm: Introduce generic probe function for component based masters.
Liviu Dudau [Tue, 20 Oct 2015 09:23:12 +0000 (10:23 +0100)]
drm: Introduce generic probe function for component based masters.

A lot of component based DRM drivers use a variant of the same code
as the probe function. They bind the crtc ports in the first iteration
and then scan through the child nodes and bind the encoders attached
to the remote endpoints. Factor the common code into a separate
function called drm_of_component_probe() in order to increase code
reuse.

Cc: David Airlie <airlied@linux.ie>
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
Link: http://patchwork.freedesktop.org/patch/msgid/1445332995-11212-2-git-send-email-Liviu.Dudau@arm.com
Acked-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>