Add second TSC speed regular expression
[muen/mugenhwcfg.git] / test / test_creator.py
1 #   Copyright (C) 2015 Chen Chin Jieh <chinjieh@gmail.com>
2 #   Copyright (C) 2015 Reto Buerki <reet@codelabs.ch>
3 #   Copyright (C) 2015 Adrian-Ken Rueegsegger <ken@codelabs.ch>
4 #
5 #   This file is part of mugenhwcfg.
6 #
7 #   mugenhwcfg is free software: you can redistribute it and/or modify
8 #   it under the terms of the GNU General Public License as published by
9 #   the Free Software Foundation, either version 3 of the License, or
10 #   (at your option) any later version.
11 #
12 #   mugenhwcfg is distributed in the hope that it will be useful,
13 #   but WITHOUT ANY WARRANTY; without even the implied warranty of
14 #   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15 #   GNU General Public License for more details.
16 #
17 #   You should have received a copy of the GNU General Public License
18 #   along with mugenhwcfg.  If not, see <http://www.gnu.org/licenses/>.
19
20 import os
21 from collections import namedtuple
22
23 import testpaths
24 import mock
25 import pytest
26
27 import paths
28 import src.creator as creator
29 import src.dmar as dmar
30 import src.fadt as fadt
31 import src.devicecap as devicecap
32 import src.schemadata
33 import src.util as util
34 from src import parseutil
35 from src import customExceptions
36
37 from testutil import assert_xb, assert_xbl
38
39
40 class TestCreator:
41
42     def setUp(self):
43         self.testdir = testpaths.PATH_TEST_CREATOR
44
45     def test_create_elements(setUp):
46
47         def mock_dmesg(arg, *args):
48             pass
49
50         def mock_dmar(arg, *args):
51             pass
52
53         def mock_fadt(arg, *args):
54             pass
55
56         def mock_proc_create(arg, *args):
57             return src.schemadata.schema.processorType(
58                 cpuCores=12, speed=2000, vmxTimerRate=12)
59
60         def mock_mem_create(arg, *args):
61             return src.schemadata.schema.physicalMemoryType()
62
63         def mock_dev_create(arg, *args):
64             return src.schemadata.schema.devicesType()
65
66         @mock.patch("src.creator.genDmesg", mock_dmesg)
67         @mock.patch("src.dmar.parse_table", mock_dmar)
68         @mock.patch("src.fadt.parse_table", mock_fadt)
69         @mock.patch("src.creator.ProcessorCreator.createElem",
70                     mock_proc_create)
71         @mock.patch("src.creator.MemoryCreator.createElem", mock_mem_create)
72         @mock.patch("src.creator.DevicesCreator.createElem", mock_dev_create)
73         def execute():
74             hardware = creator.createElements()
75             assert hardware.validateBinding() is True
76         execute()
77
78
79 class TestProcessorCreator:
80
81     @pytest.fixture(autouse=True)
82     def setUp(self):
83         self.testdir = os.path.join(
84             testpaths.PATH_TEST_CREATOR, "processorcreator")
85         self.procreator = creator.ProcessorCreator()
86
87     def test_createElem(self):
88         cpuinfo = os.path.join(self.testdir, "cpuinfo")
89         msr = os.path.join(testpaths.PATH_TEST_GEN, "msr")
90         dmesg = os.path.join(self.testdir, "dmesg")
91
92         ref = src.schemadata.schema.processorType(cpuCores=4, speed=3193,
93                                                   vmxTimerRate=5)
94
95         VMX_OFFSET = 0x485
96         VMX_BITSIZE = 5
97         with open(msr, "wb") as f:
98             f.seek(VMX_OFFSET)
99             f.write(b"\x05\x0e")
100
101         result = self.procreator.createElem(cpuinfo, [msr], dmesg)
102         assert_xb(result, ref, "processor")
103
104     def test_get_cpu_cores(self):
105         cpuinfoloc = os.path.join(self.testdir, "cpuinfo")
106         assert self.procreator.get_cpu_cores(cpuinfoloc) == 4
107
108     def test_getSpeed(self):
109         dmesgloc = os.path.join(self.testdir, "dmesg")
110         dmesgloc2 = os.path.join(self.testdir, "dmesg_tsc_detected")
111         dmesg_nokey = os.path.join(self.testdir, "dmesg_nokey")
112         invalidloc = os.path.join(self.testdir, "invalidlocdmesg")
113         KEY = "Refined TSC clocksource calibration"
114         assert self.procreator.getSpeed(dmesgloc) == 3192.746
115         assert self.procreator.getSpeed(dmesgloc2) == 3192.667
116         with pytest.raises(customExceptions.ForceQuit):
117             self.procreator.getSpeed(invalidloc)
118         with pytest.raises(customExceptions.ForceQuit):
119             self.procreator.getSpeed(dmesg_nokey)
120
121     def test_getVmxTimerRate(self):
122         msrpath1 = os.path.join(testpaths.PATH_TEST_GEN, "testmsr_path1")
123         msrpath_invalid = "invalidpath"
124         msrpathlist = [msrpath_invalid]
125         OFFSET = 0
126         VMX_BITSIZE = 5
127         with pytest.raises(customExceptions.ForceQuit):
128             self.procreator.getVmxTimerRate(msrpathlist, OFFSET, VMX_BITSIZE)
129
130         with open(msrpath1, "wb") as f:
131             f.write(b"\x01\x02\x03\x04")
132         msrpathlist.append(msrpath1)
133
134         assert self.procreator.getVmxTimerRate(msrpathlist, OFFSET,
135                                                VMX_BITSIZE) == 1
136
137     def test_getVmxFromMSR(self):
138         msrpath = os.path.join(testpaths.PATH_TEST_GEN, "testmsr")
139         with open(msrpath, "wb") as f:
140             f.write(b"\x01\x02\x03\x04")
141         OFFSET = 0
142         VMX_BITSIZE = 5
143         assert self.procreator.getVmxFromMSR(
144             msrpath, OFFSET, VMX_BITSIZE) == 1
145         with open(msrpath, "wb") as f:
146             f.write(b"\x05\x02\x03\x04")
147         assert self.procreator.getVmxFromMSR(
148             msrpath, OFFSET, VMX_BITSIZE) == 5
149         with open(msrpath, "wb") as f:
150             f.write(b"\x11\x02\x03\x04")
151         assert self.procreator.getVmxFromMSR(
152             msrpath, OFFSET, VMX_BITSIZE) == 17
153         msrinvalidpath = os.path.join(self.testdir, "testmsr_invalid")
154         with pytest.raises(IOError):
155             self.procreator.getVmxFromMSR(msrinvalidpath, OFFSET, VMX_BITSIZE)
156
157
158 class TestMemoryCreator():
159
160     @pytest.fixture(autouse=True)
161     def setUp(self):
162         self.testdir = os.path.join(
163             testpaths.PATH_TEST_CREATOR, "memorycreator")
164         self.memcreator = creator.MemoryCreator()
165
166     def test_createElem(self):
167
168         def mock_dmar_get_reserved_mem_regions():
169             return [dmar.Rmrr_Region(name="rmrr23",
170                                      start="0x1f0000", end="0x1f1000")]
171
172         with mock.patch('src.dmar.get_reserved_mem_regions',
173                         side_effect=mock_dmar_get_reserved_mem_regions):
174             result = self.memcreator.createElem(os.path.join(self.testdir,
175                                                 "memmap"))
176             assert len(result.memoryBlock) == 2
177             assert len(result.reservedMemory) == 1
178             assert result.reservedMemory[0].name == "rmrr23"
179
180     def test_memmapextraction(self):
181         "Tests various functions related to memmap extraction"
182
183         loc = os.path.join(self.testdir, "memmap")
184         invalidloc = os.path.join(self.testdir, "memmap_invalid")
185         incompleteloc = os.path.join(self.testdir, "memmap_incomplete")
186
187         # Test isAllocatable function
188         mem1_name = "System RAM"
189         mem1_addr = "0x0010000f"
190
191         mem2_name = "System RAM2"
192         mem2_addr = "0x0010000f"
193
194         mem3_name = "System RAM"
195         mem3_addr = "0xfffff"
196
197         mem4_name = "System RAM2"
198         mem4_addr = "0x1000"
199
200         assert self.memcreator.isAllocatable(mem1_name, mem1_addr) is True
201         assert self.memcreator.isAllocatable(mem2_name, mem2_addr) is False
202         assert self.memcreator.isAllocatable(mem3_name, mem3_addr) is False
203         assert self.memcreator.isAllocatable(mem4_name, mem4_addr) is False
204
205         # Test getMemoryBlocks
206         memoryBlockList_invalid = self.memcreator.getMemoryBlocks(invalidloc)
207         memoryBlockList_incomplete = self.memcreator.getMemoryBlocks(
208             incompleteloc)
209         memoryBlockList = self.memcreator.getMemoryBlocks(loc)
210
211         assert len(memoryBlockList) == 2
212
213         memoryBlock0 = memoryBlockList[0]
214         memoryBlock2 = memoryBlockList[1]
215         assert memoryBlock0.name == "0_type"
216         assert memoryBlock0.physicalAddress == "16#000a#"
217         assert memoryBlock0.size == "16#f000#"
218         assert memoryBlock2.name == "2_type"
219         assert memoryBlock2.physicalAddress == "16#3000#"
220         assert memoryBlock2.size == "16#6000#"
221
222         # Test generateMemoryBlock
223         startfile = os.path.join(loc, "0/start")
224         startfile_invalid = os.path.join(loc, "0/start_invalid")
225         endfile = os.path.join(loc, "0/end")
226         typefile = os.path.join(loc, "0/type")
227
228         memoryBlock = self.memcreator.generateMemoryBlock(
229             endfile, typefile, startfile)
230         assert memoryBlock.name == "0_type"
231         assert memoryBlock.physicalAddress == "16#000a#"
232         with pytest.raises(IOError):
233             self.memcreator.generateMemoryBlock(endfile, typefile,
234                                                 startfile_invalid)
235
236         def isAllocatable_true(name, physical_addr):
237             return True
238
239         @mock.patch.object(self.memcreator,
240                            "isAllocatable",
241                            isAllocatable_true)
242         def mock_testAllocatable():
243             return self.memcreator.generateMemoryBlock(endfile,
244                                                        typefile,
245                                                        startfile)
246         mockmemblock = mock_testAllocatable()
247         assert mockmemblock.allocatable == "true"
248
249     def test_generate_reserved_mem_region(self):
250         rmrr = dmar.Rmrr_Region(name="region1",
251                                 start="0xafe0000",
252                                 end="0xdeadbfff")
253
254         reg = self.memcreator.generate_reserved_mem_region(rmrr)
255         assert reg.name == "region1"
256         assert reg.physicalAddress == "16#0afe_0000#"
257         assert reg.size == "16#d3af_c000#"
258
259
260 class TestDevicesCreator:
261
262     def mock_sysboard_create_element(self):
263         return src.schemadata.schema.deviceType(name="dummy")
264
265     @mock.patch("src.creator.IommuDevicesCreator.createElems")
266     @mock.patch("src.creator.SystemboardDeviceCreator.create_element",
267                 mock_sysboard_create_element)
268     @mock.patch("src.creator.SerialDevicesCreator.createElems")
269     @mock.patch("src.creator.PciDevicesCreator.createElems")
270     def test_createElem(self, mock_iommu, mock_serial, mock_pci):
271         creator.DevicesCreator().createElem()
272         assert (mock_iommu.called)
273         assert (mock_serial.called)
274         assert (mock_pci.called)
275
276     def test_getPciConfigAddress(self):
277         testdir = os.path.join(testpaths.PATH_TEST_CREATOR, "devicescreator")
278         testiomem = os.path.join(testdir, "test_iomem")
279         testinvalidloc = os.path.join(testdir, "testgetpciconfig_invalidloc")
280         testnokey = os.path.join(testdir, "test_iomem_nopciconfig")
281
282         devcreator = creator.DevicesCreator()
283         assert devcreator.getPciConfigAddress(testiomem) == "e0000000"
284         assert not devcreator.getPciConfigAddress(testinvalidloc)
285         assert not devcreator.getPciConfigAddress(testnokey)
286
287
288 class TestPciDevicesCreator:
289
290     @pytest.fixture(autouse=True)
291     def setUp(self):
292         self.testdir = os.path.join(
293             testpaths.PATH_TEST_CREATOR, "devicescreator")
294         self.devloc = os.path.join(self.testdir, "devices")
295         self.devtree = os.path.join(self.testdir, "devices_test")
296         self.devicesdir = testpaths.PATH_DEVICELINKS
297         self.pcicreator = creator.PciDevicesCreator()
298
299     def test_createElems(self):
300         devicesdir = os.path.join(self.testdir, "devices_test_links")
301         assert len(self.pcicreator.createElems(devicesdir,
302                                                testpaths.PATH_IOMMUGRP)) == 2
303
304     def test_init_DevicecapManager(self):
305         testloc = self.devtree
306         devices = os.listdir(testloc)
307         devicepaths = []
308         for devicename in devices:
309             devicepaths.append(os.path.join(testloc, devicename))
310
311         valid = self.pcicreator.init_DevicecapManager(devicepaths)
312         assert len(valid.getCapabilities()) == 2
313
314         devicecapmgr_invalid = self.pcicreator.init_DevicecapManager(
315             "invaliddevicepaths")
316         assert len(devicecapmgr_invalid.getCapabilities()) == 0
317
318     def test_filterDevicePaths(self):
319         testloc = self.devtree
320         devices = os.listdir(testloc)
321         devicepaths = []
322         for devicename in devices:
323             devicepaths.append(os.path.join(testloc, devicename))
324
325         devicecapmgr = devicecap.DevicecapManager()
326         devicecapmgr.extractCapabilities(devicepaths)
327
328         assert (len(self.pcicreator.filterDevicePaths(
329             devicepaths,
330             devicecapmgr)) == 8,
331             "filterDevicePaths not working")
332
333     def test_isDeviceName(self):
334         assert self.pcicreator.isDeviceName("0000:01:00.0") is True
335         assert self.pcicreator.isDeviceName("0000:00:01.2") is True
336         assert self.pcicreator.isDeviceName("0001:17:02.5") is True
337         assert self.pcicreator.isDeviceName("010:10:01.2") is False
338         assert self.pcicreator.isDeviceName("0000:10:01") is False
339         assert self.pcicreator.isDeviceName("000:10:01.1") is False
340         assert self.pcicreator.isDeviceName("000:10:010.1") is False
341         assert self.pcicreator.isDeviceName("000:10:01.11") is False
342         assert self.pcicreator.isDeviceName("000:10:01:00.1") is False
343         assert self.pcicreator.isDeviceName("0003:0E0F:0003.0001") is False
344
345     def test_isBridge(self):
346         assert self.pcicreator.isBridge(
347             os.path.join(self.devloc, "pcibridge0")) is True
348         assert self.pcicreator.isBridge(
349             os.path.join(self.devloc, "dev0")) is False
350
351     def test_isPciExpress(self):
352         dev0 = os.path.join(self.testdir, "devices_testcap/dev0")
353         dev1 = os.path.join(self.testdir, "devices_testcap/dev1")
354         devicecapmgr = devicecap.DevicecapManager()
355         devicecapmgr.extractCapabilities([dev0, dev1])
356         assert self.pcicreator.isPciExpress(dev0, devicecapmgr) is True
357         assert self.pcicreator.isPciExpress(dev1, devicecapmgr) is False
358
359     def test_getDeviceBus(self):
360         assert self.pcicreator.getDeviceBus("0011:01:02.3") == "01"
361
362     def test_getDeviceNo(self):
363         assert self.pcicreator.getDeviceNo("0000:01:02.3") == "02"
364
365     def test_getDeviceFunction(self):
366         assert self.pcicreator.getDeviceFunction("0000:01:02.3") == "3"
367
368     def test_getDeviceSpecs(self):
369         testpciids = testpaths.PATH_PCIIDS
370         devdir = os.path.join(self.testdir, "devices_testspecs")
371         devpaths = []
372         for dir in sorted(os.listdir(devdir)):
373             devpaths.append(os.path.join(devdir, dir))
374         testresult = {
375             os.path.join(devdir, "dev0"):
376                 creator.PciDevice(
377                     name="host_bridge_1",
378                     classcode="16#0600#",
379                     vendorId="16#8086#",
380                     deviceId="16#0082#",
381                     revisionId="16#a1#",
382                     descr="Intel Corporation Centrino Advanced-N 6205 "
383                     + "[Taylor Peak]"),
384             os.path.join(devdir, "dev1"):
385                 creator.PciDevice(
386                     name="06ff_1",
387                     classcode="16#06ff#",
388                     vendorId="16#102f#",
389                     deviceId="16#01b5#",
390                     revisionId="16#05#",
391                     descr="Toshiba America SCC USB 2.0 EHCI controller"),
392             os.path.join(devdir, "dev2"):
393                 creator.PciDevice(
394                     name="pci_bridge_1",
395                     classcode="16#0604#",
396                     vendorId="16#0e11#",
397                     deviceId="16#1000#",
398                     revisionId="16#67#",
399                     descr="Compaq Computer Corporation Triflex/Pentium Bridge,"
400                     + " Model 1000"),
401             os.path.join(devdir, "unknown"):
402                 creator.PciDevice(
403                     name="fa00_1",
404                     classcode="16#fa00#",
405                     vendorId="16#9876#",
406                     deviceId="16#1234#",
407                     revisionId="16#00#",
408                     descr="")
409         }
410
411         result = self.pcicreator.getDeviceSpecs(devpaths, testpciids)
412         assert result == testresult
413         specs = self.pcicreator.getDeviceSpecs(devpaths,
414                                                "invalidpciidsloc")
415         assert len(specs) == 0
416
417     def test_toClassName(self):
418         testpciids = testpaths.PATH_PCIIDS
419         pciidsparser = parseutil.PciIdsParser(testpciids)
420         assert self.pcicreator.toClassName("0x0600",
421                                            pciidsparser) == "host_bridge"
422         assert self.pcicreator.toClassName("0x1234",
423                                            pciidsparser) == "0x1234"
424
425     def test_getPci(self):
426         testloc = os.path.join(self.testdir, "devices_testcap")
427         devicecapmgr = devicecap.DevicecapManager()
428         dev = os.path.join(testloc, "0000:01:02.3")
429         devicecapmgr.extractCapabilities([dev])
430
431         devicespec = creator.PciDevice(
432             name="testdevice",
433             classcode="16#0403#",
434             vendorId="16#2222#",
435             deviceId="16#1112#",
436             revisionId="16#a1#",
437             descr="Some device")
438
439         dev_pci = self.pcicreator.getPci(dev, devicecapmgr, devicespec,
440                                          testpaths.PATH_IOMMUGRP)
441         assert dev_pci.bus == "16#01#"
442         assert dev_pci.function == 3
443         assert dev_pci.device == "16#02#"
444         assert dev_pci.identification.classcode == "16#0403#"
445         assert dev_pci.identification.vendorId == "16#2222#"
446         assert dev_pci.identification.deviceId == "16#1112#"
447         assert dev_pci.identification.revisionId == "16#a1#"
448         assert dev_pci.iommuGroup.id == 2
449
450     def test_getPci_MSI(self):
451         testloc = os.path.join(self.testdir, "devices_testcap")
452         devicecapmgr = devicecap.DevicecapManager()
453         dev0 = os.path.join(testloc, "dev0")
454         dev1 = os.path.join(testloc, "dev1")
455         dev2 = os.path.join(testloc, "dev2")
456         devicelist = [dev0, dev1, dev2  ]
457         devicecapmgr.extractCapabilities(devicelist)
458
459         assert self.pcicreator.getPci_MSI(dev0, devicecapmgr) == "true"
460         assert self.pcicreator.getPci_MSI(dev1, devicecapmgr) == "true"
461         assert self.pcicreator.getPci_MSI(dev2, devicecapmgr) == "false"
462
463     def test_getLegacyIrq(self):
464         testloc = os.path.join(self.testdir, "devices_testirq")
465         dev0 = os.path.join(testloc, "dev0")
466         dev1 = os.path.join(testloc, "dev1")
467         dev_invalid = "test_getirq_invalid"
468
469         dev0_irq = self.pcicreator.getLegacyIrq(dev0)
470         dev1_irq = self.pcicreator.getLegacyIrq(dev1)
471         dev_invalid_irq = self.pcicreator.getLegacyIrq(dev_invalid)
472
473         assert dev1_irq[0].number == 15
474         assert dev1_irq[0].name == "irq1"
475         assert not dev0_irq
476         assert not dev_invalid_irq
477
478     def test_getMsiIrqs(self):
479         testloc = os.path.join(self.testdir, "devices_testirq")
480         dev1 = os.path.join(testloc, "dev1")
481         dev2 = os.path.join(testloc, "dev2")
482         dev3 = os.path.join(testloc, "dev3")
483         dev_invalid = "test_getirq_invalid"
484
485         dev1_irqs = self.pcicreator.getMsiIrqs(dev1)
486         dev2_irqs = self.pcicreator.getMsiIrqs(dev2)
487         dev3_irqs = self.pcicreator.getMsiIrqs(dev3)
488         dev_invalid_irqs = self.pcicreator.getMsiIrqs(dev_invalid)
489
490         assert not dev1_irqs
491         assert dev2_irqs[0].number == 40
492         assert dev2_irqs[0].name == "irq1"
493         assert dev2_irqs[1].number == 41
494         assert dev2_irqs[1].name == "irq2"
495         assert dev3_irqs[0].number == 50
496         assert dev3_irqs[0].name == "irq1"
497         assert not dev_invalid_irqs
498
499     def test_getDeviceMemory(self):
500         testloc = os.path.join(self.testdir, "devices_testresource")
501
502         # No filter: actual data
503         dev0_loc = os.path.join(testloc, "dev0")
504         dev2_loc = os.path.join(testloc, "dev2")
505         dev_emptyresource = os.path.join(testloc, "dev_emptyresource")
506         dev_invalidresource = os.path.join(testloc, "dev_invalidresource")
507
508         dev0_testmemblock_nofilter = [
509             src.schemadata.schema.deviceMemoryType(
510                 name="mem1", physicalAddress="16#fb22_5000#", size="16#0800#",
511                 caching="UC")]
512         dev2_testmemblock_nofilter = [
513             src.schemadata.schema.deviceMemoryType(
514                 name="mem1", physicalAddress="16#fb20_0000#",
515                 size="16#0002_0000#", caching="UC"),
516             src.schemadata.schema.deviceMemoryType(
517                 name="mem2", physicalAddress="16#fb22_8000#", size="16#1000#",
518                 caching="UC")
519         ]
520
521         NOFILTERSIZE = "0x0"
522         dev0_memblocks_nofilter = self.pcicreator.getDeviceMemory(
523             dev0_loc, NOFILTERSIZE)
524         dev2_memblocks_nofilter = self.pcicreator.getDeviceMemory(
525             dev2_loc, NOFILTERSIZE)
526
527         assert_xbl(dev0_memblocks_nofilter,
528                    dev0_testmemblock_nofilter, "memory")
529         assert_xbl(dev2_memblocks_nofilter,
530                    dev2_testmemblock_nofilter, "memory")
531
532         # Filter on
533         dev0_testmemblock_filter = [
534             src.schemadata.schema.deviceMemoryType(
535                 name="mem1", physicalAddress="16#fb22_5000#", size="16#1000#",
536                 caching="UC")]
537         dev0_memblocks_filter = self.pcicreator.getDeviceMemory(dev0_loc)
538
539         assert_xbl(dev0_memblocks_filter, dev0_testmemblock_filter, "memory")
540
541         # Test empty resource
542         dev_emptyresource_list = self.pcicreator.getDeviceMemory(
543             dev_emptyresource)
544         assert dev_emptyresource_list == []
545
546         # Test invalid resource
547         dev_invalidresourcelist = self.pcicreator.getDeviceMemory(
548             dev_invalidresource)
549         assert dev_invalidresourcelist == []
550
551     def test_getIoports(self):
552         testloc = os.path.join(self.testdir, "devices_testresource")
553         dev0_loc = os.path.join(testloc, "dev0")
554         dev1_loc = os.path.join(testloc, "dev1")
555         dev_noresource = os.path.join(testloc, "dev_noresource")
556         dev_emptyresource = os.path.join(testloc, "dev_emptyresource")
557         dev0_testioports = [
558             src.schemadata.schema.ioPortType(
559                 name="ioport1", start="16#f090#", end="16#f097#"),
560             src.schemadata.schema.ioPortType(
561                 name="ioport2", start="16#f080#", end="16#f083#"),
562             src.schemadata.schema.ioPortType(
563                 name="ioport3", start="16#f070#", end="16#f077#"),
564             src.schemadata.schema.ioPortType(
565                 name="ioport4", start="16#f060#", end="16#f063#"),
566             src.schemadata.schema.ioPortType(
567                 name="ioport5", start="16#f020#", end="16#f03f#")
568         ]
569         dev1_testioports = []
570         dev_emptyresource_testioports = []
571
572         dev0_ioports = self.pcicreator.getIoports(dev0_loc)
573         dev1_ioports = self.pcicreator.getIoports(dev1_loc)
574         dev_emptyresource_ioports = self.pcicreator.getIoports(
575             dev_emptyresource)
576
577         assert_xbl(dev0_ioports, dev0_testioports, "ioPort")
578         assert_xbl(dev1_ioports, dev1_testioports, "ioPort")
579         assert dev_emptyresource_ioports == dev_emptyresource_testioports
580         assert self.pcicreator.getIoports(dev_noresource) == []
581
582     def test_getIrqs(self):
583         testloc = os.path.join(self.testdir, "devices_testirq")
584         dev0_loc = os.path.join(testloc, "dev0")
585         dev1_loc = os.path.join(testloc, "dev1")
586         dev2_loc = os.path.join(testloc, "dev2")
587         dev3_loc = os.path.join(testloc, "dev3")
588         dev_noresource = os.path.join(testloc, "dev_noresource")
589         dev_emptyresource = os.path.join(testloc, "dev_emptyresource")
590         Irq = namedtuple("Irq", ["name", "number"])
591         dev1_testirqs = [src.schemadata.schema.irqType(name="irq1", number=15)]
592         dev2_testirqs = [
593             src.schemadata.schema.irqType(name="irq1", number=40),
594             src.schemadata.schema.irqType(name="irq2", number=41),
595         ]
596         dev3_testirqs = [src.schemadata.schema.irqType(name="irq1", number=50)]
597
598         dev0_irqs = self.pcicreator.getIrqs(dev0_loc)
599         dev1_irqs = self.pcicreator.getIrqs(dev1_loc)
600         dev2_irqs = self.pcicreator.getIrqs(dev2_loc)
601         dev3_irqs = self.pcicreator.getIrqs(dev3_loc)
602         dev_emptyresource_irqs = self.pcicreator.getIrqs(
603             dev_emptyresource)
604
605         assert not dev0_irqs
606         assert_xbl(dev1_irqs, dev1_testirqs, "irq")
607         assert_xbl(dev2_irqs, dev2_testirqs, "irq")
608         assert_xbl(dev3_irqs, dev3_testirqs, "irq")
609         assert not dev_emptyresource_irqs
610
611     def test_createDeviceFromPath(self):
612         testloc = os.path.join(self.testdir, "devices_test")
613         devpath = os.path.join(testloc, "0000:00:1f.3")
614
615         devcapmgr = devicecap.DevicecapManager()
616         devcapmgr.extractCapabilities([devpath])
617         devspecs = self.pcicreator.getDeviceSpecs(
618             [devpath], testpaths.PATH_PCIIDS)
619
620         dmar._devices.append(dmar.PCI_Dev(bus=0, device=0x1f, function=3,
621                              rmrr_name="rmrr42"))
622         resultdev = self.pcicreator.createDeviceFromPath(
623             devpath, devcapmgr, devspecs[devpath], None)
624
625         device = src.schemadata.schema.deviceType(name="smbus_1")
626         device.description = ("Intel Corporation 6 Series/C200 Series " +
627                               "Chipset Family SMBus Controller")
628
629         pci = src.schemadata.schema.pciType(
630             bus="16#00#",
631             device="16#1f#",
632             function=3,
633             msi=False).append(
634                 src.schemadata.schema.deviceIdentificationType(
635                     classcode="16#0c05#",
636                     deviceId="16#1c22#",
637                     vendorId="16#8086#",
638                     revisionId="16#04#"))
639
640         irq = src.schemadata.schema.irqType(name="irq1", number=3)
641
642         memory = src.schemadata.schema.deviceMemoryType(
643             caching="UC", name="mem1", physicalAddress="16#fb22_4000#",
644             size="16#1000#")
645
646         rmrr = src.schemadata.schema.namedRefType(ref="rmrr42")
647
648         ioport = src.schemadata.schema.ioPortType(
649             name="ioport1", start="16#f000#", end="16#f01f#")
650
651         device.append(pci)
652         device.append(irq)
653         device.append(memory)
654         device.append(ioport)
655         device.append(rmrr)
656
657         assert_xb(resultdev, device, "device")
658
659
660 class TestSerialDevicesCreator:
661
662     @pytest.fixture(autouse=True)
663     def setUp(self):
664         self.testdir = os.path.join(
665             testpaths.PATH_TEST_CREATOR, "devicescreator")
666         self.serialcreator = creator.SerialDevicesCreator()
667
668     def test_createElems(self):
669         result = self.serialcreator.createElems(testpaths.PATH_SERIALS)
670
671         assert len(result) == 4
672
673         device = src.schemadata.schema.deviceType(name="com_1")
674         device.append(src.schemadata.schema.irqType(
675             name="irq1", number=4))
676         device.append(src.schemadata.schema.ioPortType(
677             name="ioport1", start="16#03f8#", end="16#03ff#"))
678         assert_xb(result[0], device, "com_1")
679
680         device = src.schemadata.schema.deviceType(name="com_2")
681         device.append(src.schemadata.schema.irqType(
682             name="irq1", number=3))
683         device.append(src.schemadata.schema.ioPortType(
684             name="ioport1", start="16#02f8#", end="16#02ff#"))
685         assert_xb(result[1], device, "com_2")
686
687         device = src.schemadata.schema.deviceType(name="com_3")
688         device.append(src.schemadata.schema.irqType(
689             name="irq1", number=7))
690         device.append(src.schemadata.schema.ioPortType(
691             name="ioport1", start="16#03e8#", end="16#03ef#"))
692         assert_xb(result[2], device, "com_3")
693
694         device = src.schemadata.schema.deviceType(name="com_4")
695         device.append(src.schemadata.schema.irqType(
696             name="irq1", number=10))
697         device.append(src.schemadata.schema.ioPortType(
698             name="ioport1", start="16#02e8#", end="16#02ef#"))
699         assert_xb(result[3], device, "com_4")
700
701     def test_parseSerialDeviceResources(self):
702         ref1 = creator.SerialDevice(name="com_1",
703                                     start="0x3f8", end="0x3ff",
704                                     irq="4")
705         ref2 = creator.SerialDevice(name="serial_port_1",
706                                     start="0x50b0", end="0x50b7",
707                                     irq=None)
708         resource1 = "status=active\nio 0x3f8-0x3ff\nirq 4"
709         resource2 = "status=active\nio 0x50b0-0x50b7"
710
711         assert self.serialcreator.parseSerialDeviceResources(resource1) == ref1
712         assert self.serialcreator.parseSerialDeviceResources(resource2) == ref2
713         assert self.serialcreator.parseSerialDeviceResources("") is None
714         assert self.serialcreator.parseSerialDeviceResources(
715             "invalid resouce") is None
716
717
718 class TestSystemboardDeviceCreator:
719
720     @pytest.fixture(autouse=True)
721     def setUp(self):
722         self.sysboardcreator = creator.SystemboardDeviceCreator()
723
724     def test_create_element(self):
725
726         def mock_get_shutdown_port():
727             return "0x00001804"
728
729         @mock.patch.object(fadt, "get_shutdown_port",
730                            mock_get_shutdown_port)
731         def mock_create_element():
732             return self.sysboardcreator.create_element()
733
734         result = mock_create_element()
735
736         dev = src.schemadata.schema.deviceType(name="system_board")
737         port = 0xcf8
738         for i in range(1, 9):
739             dev.append(src.schemadata.schema.ioPortType(
740                 name="ioport" + str(i),
741                 start=util.toWord64(hex(port)),
742                 end=util.toWord64(hex(port))))
743             port += 1
744
745         dev.append(src.schemadata.schema.ioPortType(
746             name="pm1a_cnt",
747             start="16#1804#",
748             end="16#1804#"))
749
750         caps = src.schemadata.schema.capabilitiesType()
751         caps.append(src.schemadata.schema.capabilityType(name="systemboard"))
752         caps.append(src.schemadata.schema.capabilityType(
753             7168, name="pm1a_cnt_slp_typ"))
754         dev.append(caps)
755         assert_xb(result, dev, "system_board")
756
757
758 class TestIommuDevicesCreator:
759
760     @pytest.fixture(autouse=True)
761     def setUp(self):
762         self.testdir = os.path.join(
763             testpaths.PATH_TEST_CREATOR, "devicescreator")
764         self.iommucreator = creator.IommuDevicesCreator()
765
766     def test_createElems(self):
767
768         def mock_dmarparser_getIommuAddrs():
769             return ["e00000"]
770
771         @mock.patch.object(dmar, "get_iommu_addrs",
772                            mock_dmarparser_getIommuAddrs)
773         def mock_createElems():
774             return self.iommucreator.createElems("dmarpath",
775                                                  "temppath",
776                                                  "devmem")
777
778         mock_createElems()
779
780     def test_getIommuAGAW(self):
781         testdevmem = os.path.join(testpaths.PATH_TEST_GEN, "testdevmem")
782         testdevmem_invalid = "test_devmem_invalid"
783         IOMMUADDR = 0x0
784         CAP_OFFSET = 0x0
785         CAP_REG_BYTE_SIZE = 3
786         AGAW_BIT_START = 0
787
788         with open(testdevmem, "wb") as f:
789             f.write(b"\x02\x02\x03\x04")
790         assert self.iommucreator.getIommuAGAW(IOMMUADDR,
791                                               testdevmem,
792                                               CAP_OFFSET,
793                                               CAP_REG_BYTE_SIZE,
794                                               AGAW_BIT_START) == "39"
795
796         with open(testdevmem, "wb") as f:
797             f.write(b"\x04\x02\x03\x04")
798         assert self.iommucreator.getIommuAGAW(IOMMUADDR,
799                                               testdevmem,
800                                               CAP_OFFSET,
801                                               CAP_REG_BYTE_SIZE,
802                                               AGAW_BIT_START) == "48"
803         with open(testdevmem, "wb") as f:
804             f.write(b"\x01\x02\x03\x04")
805         assert self.iommucreator.getIommuAGAW(IOMMUADDR,
806                                               testdevmem,
807                                               CAP_OFFSET,
808                                               CAP_REG_BYTE_SIZE,
809                                               AGAW_BIT_START) == "agaw"
810
811         assert self.iommucreator.getIommuAGAW(IOMMUADDR,
812                                               testdevmem_invalid,
813                                               CAP_OFFSET,
814                                               CAP_REG_BYTE_SIZE,
815                                               AGAW_BIT_START) == "agaw"
816
817     def test_createDeviceFromAddr(self):
818         DEVMEM = paths.DEVMEM
819         AGAW_BIT_START = 8
820         IOMMU_SIZE = "1000"
821
822         iommuaddr = "0xfed91000"
823         testiommuaddr = "0x0"
824         devmemloc = os.path.join(self.testdir, "testdevmem")
825
826         iommudev = self.iommucreator.createDeviceFromAddr(devmemloc,
827                                                           testiommuaddr,
828                                                           "iommu")
829
830         device = src.schemadata.schema.deviceType(name="iommu")
831
832         device.append(src.schemadata.schema.deviceMemoryType(
833             name="mmio", caching="UC", physicalAddress="16#0000#",
834             size="16#1000#"))
835
836         capabilities = src.schemadata.schema.capabilitiesType()
837         capabilities.append(src.schemadata.schema.capabilityType(
838             name="iommu"))
839         capabilities.append(src.schemadata.schema.capabilityType(
840             "39", name="agaw"))
841         capabilities.append(src.schemadata.schema.capabilityType(
842             "512", name="fr_offset"))
843         capabilities.append(src.schemadata.schema.capabilityType(
844             "264", name="iotlb_invalidate_offset"))
845
846         device.append(capabilities)
847
848         assert_xb(iommudev, device, "device")